[Feature][ZXW-130]merge P50U02 version
Only Configure: No
Affected branch: master
Affected module: unknow
Is it affected on both ZXIC and MTK: only ZXIC
Self-test: Yes
Doc Update: No
Change-Id: I4f29ec5bb7c59385f23738d2b7ca84e67c100f69
diff --git a/boot/common/src/loader/drivers/efuse.c b/boot/common/src/loader/drivers/efuse.c
old mode 100644
new mode 100755
index c4dc051..2b2cc08
--- a/boot/common/src/loader/drivers/efuse.c
+++ b/boot/common/src/loader/drivers/efuse.c
@@ -47,7 +47,9 @@
ddr_flag = CHIP_DDR_64M;
}
else if(((psEfuseInfo->secure_flag >> 8) == ZX297520V3ECOSC_GW_NYC_2G_DDR)
- ||((psEfuseInfo->secure_flag >> 8) == ZX297520V3ECOGG_GW_NYC_2G_DDR))
+ ||((psEfuseInfo->secure_flag >> 8) == ZX297520V3ECOGG_GW_NYC_2G_DDR)
+ ||((psEfuseInfo->secure_flag >> 8) == ZX297520V3ECOGG_GW_NYC_NOR_2G_DDR)
+ ||((psEfuseInfo->secure_flag >> 8) == ZX297520V3ECOSC_GW_NYC_NOR_2G_DDR))
{
ddr_flag = CHIP_DDR_256M;
}
diff --git a/boot/common/src/loader/drivers/efuse.h b/boot/common/src/loader/drivers/efuse.h
old mode 100644
new mode 100755
index 7089952..791f1b9
--- a/boot/common/src/loader/drivers/efuse.h
+++ b/boot/common/src/loader/drivers/efuse.h
@@ -43,6 +43,8 @@
#define ZX297520V3ECOSCC_GW_NYB_4G_DDR 0xF86313
#define ZX297520V3ECOGG_GW_NYC_2G_DDR 0xF86314
#define ZX297520V3ECOGG_GW_NYB_4G_DDR 0xF86315
+#define ZX297520V3ECOGG_GW_NYC_NOR_2G_DDR 0xF86316
+#define ZX297520V3ECOSC_GW_NYC_NOR_2G_DDR 0xF86317
#define ZX297520V3_ZW_NYB_1G_DDR 0x1E871E
#define ZX297520V3_ZW_NYC_1G_DDR 0x1E871F
diff --git a/boot/common/src/loader/drivers/image.c b/boot/common/src/loader/drivers/image.c
index 09c296a..4614eb2 100755
--- a/boot/common/src/loader/drivers/image.c
+++ b/boot/common/src/loader/drivers/image.c
@@ -222,7 +222,7 @@
uint32_t uiPageSize = 0;
uint32_t uiImgHdrSizeOld = sizeof(image_header_t);
- uint32_t uiImgHdrSizeNew = sizeof(sImageHeader);
+ uint32_t uiImgHdrSizeNew = sizeof(sImageNewHeader);
uint32_t uiUBootSize = 0;
uint32_t uiUBootLoadAddr = 0;
@@ -329,7 +329,7 @@
writel(remap,0x140000);
/*3¡¢½âÎöM0µÄ°æ±¾Í·£¬»ñÈ¡ÔËÐеØÖ·ÒÔ¼°´óС*/
- header = (image_header_t *)CONFIG_SYS_SDRAM_TEMP_BASE;
+ header = (image_header_t *)(CONFIG_SYS_SDRAM_TEMP_BASE + sizeof(sImageNewHeader));
m0_size = ___htonl(header->ih_size); /* m0.bin */
m0_load_addr = ___htonl(header->ih_load);
*m0_entry_point = ___htonl(header->ih_ep);
@@ -340,7 +340,7 @@
}
/*4¡¢½«M0µÄ°æ±¾´ÓIRAM0¿½±´µ½load_addr*/
- memcpy(m0_load_addr, CONFIG_SYS_SDRAM_TEMP_BASE + image_header_size, m0_size);
+ memcpy(m0_load_addr, CONFIG_SYS_SDRAM_TEMP_BASE + sizeof(sImageNewHeader)+ image_header_size, m0_size);
/*5¡¢ÐÞ¸ÄIRAM±ê¼Ç£¬Ê¹BOOT¼ÌÐøÍùÏÂÖ´ÐÐ*/
writel(0, M0_IMAGE_READY_FLAG_ADDR);
diff --git a/boot/common/src/loader/drivers/secure_verify.c b/boot/common/src/loader/drivers/secure_verify.c
old mode 100644
new mode 100755
index 98eea5c..30e8473
--- a/boot/common/src/loader/drivers/secure_verify.c
+++ b/boot/common/src/loader/drivers/secure_verify.c
@@ -7,14 +7,10 @@
#include <asm/string.h>
#include <sdio.h>
#include <image.h>
-#include <key.h>
-
-
#include "efuse.h"
#include "drv_rsa.h"
#include "drv_hash.h"
-
#define E_N_LEN 256
#define HASH_LEN 128
@@ -61,21 +57,19 @@
u32 uiLen = 0;
u32 uiRet = -1;
image_header_t *puiLegacyImgAddr = NULL;
- sImageHeader *psImageHeader = NULL;
+ sImageNewHeader *psImageHeader = NULL;
efuse_struct *psEfuseInfo = NULL;
u32 *puiDataLoadAddr = NULL;
- u32 *puiArrPubKeyEN = NULL;
u32 *puiArrHASH = NULL;
u32 uiHashResArr[4] = {0};
u32 uiHashResLen = 0;
u32 uiHashVerifySize = 0;
u32 uiRsaResArr[32] = {0};
+ u32 puiArrPubKey[64] = {0};
int guiEfuseStatus = 1;
+ int default_flag = 1;
- u32 sRamKey[5] = {SECURE_EN,SECURE_PUK_HASH0,SECURE_PUK_HASH1,
- SECURE_PUK_HASH2,SECURE_PUK_HASH3};
-
T_Rsa_Paramter sRSAInput;
u32 *puiRsaResAddr = NULL;
@@ -84,15 +78,21 @@
return -1;
}
- psImageHeader = (sImageHeader *)puiSdrmStartAddr;
- puiLegacyImgAddr = (image_header_t *)(puiSdrmStartAddr + sizeof(sImageHeader));
+ psImageHeader = (sImageNewHeader *)puiSdrmStartAddr;
+ puiLegacyImgAddr = (image_header_t *)(puiSdrmStartAddr + sizeof(sImageNewHeader));
uiHashVerifySize = ___htonl(puiLegacyImgAddr->ih_size) + sizeof(image_header_t);
guiEfuseStatus = get_secure_verify_status();
if(guiEfuseStatus == 0) //efuse secure verify.
psEfuseInfo = (efuse_struct*)EFUSE_RAM_BASE;
else
- psEfuseInfo = (efuse_struct*)sRamKey;
+ {
+ default_flag = 0;
+#if defined(CONFIG_ZX297520V3E_VEHICLE_DC) || defined(CONFIG_ZX297520V3E_VEHICLE_DC_REF)
+ return 0;
+#endif
+ }
+
/*
* 0. ¼ì²éPubKeyÊÇ·ñ±»´Û¸Ä¡£
@@ -102,11 +102,12 @@
* - ²»Í¬£¬·µ»Ø1¡£
*/
uiLen = E_N_LEN; //¹«Ô¿EºÍN£¬¹²256byte³¤¶È¡£
- puiArrPubKeyEN = psImageHeader->uiPubKeyRsaE;
-
+ memcpy((puiArrPubKey+31), psImageHeader->uiPubKeyRsaE, 4);
+ memcpy((puiArrPubKey+32), psImageHeader->uiPubKeyRsaN, 128);
+
uiRet = Hash_Calculate(HASH_MODE_MD5,
HASH_SMALL_ENDIAN,
- puiArrPubKeyEN,
+ puiArrPubKey,
uiLen,
NULL,
0,
@@ -114,18 +115,21 @@
&uiHashResLen);
if(uiRet != 0)
{
- return -1;
- }
-
- if(data_cmp_word((u32 *)psEfuseInfo->puk_hash,
- uiHashResArr, uiHashResLen))
- {
- printf("Puk hash verify fail!\n");
- return -1;
+ return 1;
}
+ if(1 == default_flag)
+ {
+ if(data_cmp_word((u32 *)psEfuseInfo->puk_hash,
+ uiHashResArr, uiHashResLen))
+ {
+ //printf("Puk hash verify fail!\n");
+ printf("2\n");
+ return 2;
+ }
+ }
+
puiArrHASH = psImageHeader->uiHashY;
- uiLen = HASH_LEN;
/*
* 1. ÀûÓù«Ô¿¶ÔuiHashY'½øÐнâÃÜ£¬µÃµ½1024bit½á¹û¡£
@@ -134,15 +138,16 @@
sRSAInput.udNbitLen = 1024;
sRSAInput.udEbitLen = 1024;
sRSAInput.pudInputM = puiArrHASH;
- sRSAInput.pudInputE = puiArrPubKeyEN;
- sRSAInput.pudInputN = (puiArrPubKeyEN + 32);
+ sRSAInput.pudInputE = puiArrPubKey;
+ sRSAInput.pudInputN = (puiArrPubKey + 32);
sRSAInput.pudOutputP = uiRsaResArr;
uiRet = Rsa_Calculate(sRSAInput);
if(uiRet != 0)
{
- printf("Rsa_Calculate fail!\n");
- return -1;
+ //printf("Rsa_Calculate fail!\n");
+ printf("3\n");
+ return 3;
}
//È¡×îºó4×Ö½Ú×÷ΪPubKey½âÃܺóµÄHASH_MD5Öµ¡£
@@ -160,7 +165,7 @@
/* Cleanup Output Buffer. */
uiHashResLen = 0;
memset(uiHashResArr, 0, 4*sizeof(uiHashResArr[0]));
-
+
uiRet = Hash_Calculate(HASH_MODE_MD5,
HASH_SMALL_ENDIAN,
puiDataLoadAddr,
@@ -171,16 +176,17 @@
&uiHashResLen);
if(uiRet != 0)
{
- printf("Hash_Calculate Fail!\n");
- return -1;
+ //printf("Hash_Calculate Fail!\n");
+ printf("4\n");
+ return 4;
}
if(data_cmp_word(puiRsaResAddr, uiHashResArr, uiHashResLen))
{
- printf("SignImage Verify Fail!\n");
- return -1;
+ //printf("SignImage Verify Fail!\n");
+ printf("5\n");
+ return 5;
}
-
return 0;
}
diff --git a/boot/common/src/loader/drivers/spifc.c b/boot/common/src/loader/drivers/spifc.c
index 61ea186..b41effc 100755
--- a/boot/common/src/loader/drivers/spifc.c
+++ b/boot/common/src/loader/drivers/spifc.c
@@ -77,6 +77,8 @@
{0x2C, 0x35, 0x77, 4096, 12, 256, 18, 2048, 0x40000, 1},
/*XTX XT26Q04D 512M SPI-NAND*/
{0x0B, 0x53, 0x77, 4096, 12, 256, 18, 2048, 0x40000, 1},
+ /*UNIM UM19A0LISW 128M SPI-NAND*/
+ {0xB0, 0x15, 0x77, 2048, 11, 64, 17, 1024, 0x20000, 1},
{0}
};
@@ -847,12 +849,19 @@
printf("spi-nand:");
boot_mode = get_boot_mode();
+#if defined(CONFIG_ZX297520V3E_VEHICLE_DC) || defined(CONFIG_ZX297520V3E_VEHICLE_DC_REF)
+ if(boot_mode == NOR_BOOT)
+ {
+ writel(CFG_START_MODE_SPI_NAND, CFG_BOOT_MODE_START_MODE_FOR_UBOOT);
+ return 0;
+ }
+#else
if(boot_mode != SPI_NAND_BOOT)
{
printf("mode err.\n");
return -1;
}
-
+#endif
writel(CFG_START_MODE_SPI_NAND, CFG_BOOT_MODE_START_MODE_FOR_UBOOT);
ret = spifc_init();
if(ret != 0)
diff --git a/boot/common/src/loader/include/configs/zx297520v3.h b/boot/common/src/loader/include/configs/zx297520v3.h
index c463be8..771f6a8 100755
--- a/boot/common/src/loader/include/configs/zx297520v3.h
+++ b/boot/common/src/loader/include/configs/zx297520v3.h
@@ -60,6 +60,7 @@
#define M0_PARTITION_NAME "cpurpm"
#define UBOOT_IMAGE "uboot"
#define UBOOT_MIRROR_IMAGE "uboot-mirr"
+#define ZLOADER_IMAGE "zloader"
#endif
diff --git a/boot/common/src/loader/include/image.h b/boot/common/src/loader/include/image.h
index a2865d8..4f2dc68 100755
--- a/boot/common/src/loader/include/image.h
+++ b/boot/common/src/loader/include/image.h
@@ -143,6 +143,33 @@
u32 uiHashY[32];
} sImageHeader;
+typedef struct
+{
+ uint16_t signtype;
+ uint16_t hashtype;
+ uint32_t uiPubKeyRsaELen;
+ uint32_t uiPubKeyRsaNLen;
+ uint8_t uiPubKeyRsaE[4];
+ uint8_t uiPubKeyRsaN[256];
+ uint8_t reserve[112]; //380 bytes
+ uint8_t uiHashY[256]; //256 bytes
+} sImageNewHeader;
+
+
+typedef struct
+{
+ u8 resv;
+ u8 uart_print;
+ u8 usb_start;
+ u8 usb_timeout;
+ u32 chip_id[2];
+ u32 zdata_length;
+ u32 puk_rsa_d[32];
+ u32 puk_rsa_n[32];
+ u32 hash_y[32];
+ u16 VID;
+ u16 PID;
+} boot_header;
extern int read_uboot_image(uint8_t *name, uint32_t *uboot_entry_point);
extern int nand_read_m0(uint32_t *m0_entry_point);