[Feature][ZXW-179]merge P52U02 version
Only Configure: No
Affected branch: master
Affected module: unknow
Is it affected on both ZXIC and MTK: only ZXIC
Self-test: Yes
Doc Update: No
Change-Id: I4fa8f86757e71388ae88400914dae8b50cd00338
diff --git a/pub/include/infra/pub_flags.h b/pub/include/infra/pub_flags.h
index 444a200..107cc5f 100755
--- a/pub/include/infra/pub_flags.h
+++ b/pub/include/infra/pub_flags.h
@@ -34,6 +34,8 @@
#define DUALSYSTEM_STATUS_SUCCESSFUL (0x5CCF) /* Äܳɹ¦Æô¶¯ */
#define DUALSYSTEM_STATUS_UNBOOTABLE (0xBABE) /* ²»¿ÉÆô¶¯ */
+#define OTA_PARTITION_NUM_MAX 15
+
/*******************************************************************************
* Type definitions *
@@ -85,6 +87,11 @@
char fs_ubi_vol_name[16];
} T_UBIFS_STATUS;
+typedef struct {
+ int mtdnum;
+ unsigned int len;
+} T_AA_PARTITION_INFO;
+
typedef struct
{
unsigned int magic_start; /* Êý¾ÝÓÐЧÐÔħÊõ×Ö */
@@ -93,7 +100,10 @@
T_BOOT_ENV boot_env;
T_UBIFS_STATUS ubifs_status;
unsigned int nvro_flag;
- char reserve[180];
+ unsigned int crc32;
+ T_BOOT_TARGET ota_system; /* Éý¼¶Ê±ÊÇϵͳA»¹ÊÇϵͳB */
+ T_AA_PARTITION_INFO ota_partiton_info[OTA_PARTITION_NUM_MAX]; /* ÈÝÄÉ×î¶à15¸öÉý¼¶·ÖÇøµÄimage¾µÏñ´óС */
+ char reserve[52];
unsigned int magic_end; /* Êý¾ÝÓÐЧÐÔħÊõ×Ö */
} T_FLAGS_INFO;
diff --git a/pub/include/ps_phy/atipsevent.h b/pub/include/ps_phy/atipsevent.h
index 8bbcb79..303d66e 100755
--- a/pub/include/ps_phy/atipsevent.h
+++ b/pub/include/ps_phy/atipsevent.h
@@ -291,7 +291,8 @@
#define AP_UICC_READ_TO_PSDEV_IND_EV (DWORD)(AP_UICC_EVENT_BASE + 45)
#define AP_UICC_GET_REC_NUM_REQ_EV (DWORD)(AP_UICC_EVENT_BASE + 46)
#define AP_UICC_AIR_AUTH_RSP_IND_EV (DWORD)(AP_UICC_EVENT_BASE + 47)
-#define AP_UICC_READ_EID_REQ_EV (DWORD)(AP_UICC_EVENT_BASE + 48)
+#define AP_UICC_READ_EID_REQ_EV (DWORD)(AP_UICC_EVENT_BASE + 48)
+#define AP_UICC_READ_REC_DIRECT_REQ_EV (DWORD)(AP_UICC_EVENT_BASE + 50)
#define AP_UICC_INIT_CNF_EV (DWORD)(AP_UICC_RSP_EVENT + 0)
#define AP_UICC_UICCOK_IND_EV (DWORD)(AP_UICC_RSP_EVENT + 1)
@@ -943,6 +944,8 @@
#define MMIA_UMM_LASTCID_APNMODIFY_IND_EV (DWORD)(MMIA_UMM_EVENT_BASE + 29)
#define MMIA_UMM_CSVOICE_QUERY_REQ_EV (DWORD)(MMIA_UMM_EVENT_BASE + 30)
#define MMIA_UMM_CARDSWITCH_CMP_IND_EV (DWORD)(MMIA_UMM_EVENT_BASE + 31)
+#define MMIA_UMM_ECALLSPT_QUERY_REQ_EV (DWORD)(MMIA_UMM_EVENT_BASE + 32)
+#define MMIA_UMM_ECALLONLY_QUERY_REQ_EV (DWORD)(MMIA_UMM_EVENT_BASE + 33)
#define MMIA_UMM_PLMN_INFO_IND_EV (DWORD)(MMIA_UMM_RSP_EVENT + 0)
@@ -975,6 +978,8 @@
#define MMIA_UMM_CSVOICE_QUERY_CNF_EV (DWORD)(MMIA_UMM_RSP_EVENT + 27)
#define MMIA_UMM_SCAN_CNF_EV (DWORD)(MMIA_UMM_RSP_EVENT + 28)
#define MMIA_UMM_CARDSWITCH_REQ_IND_EV (DWORD)(MMIA_UMM_RSP_EVENT + 29)
+#define MMIA_UMM_ECALLSPT_QUERY_CNF_EV (DWORD)(MMIA_UMM_RSP_EVENT + 30)
+#define MMIA_UMM_ECALLONLY_QUERY_CNF_EV (DWORD)(MMIA_UMM_RSP_EVENT + 31)
/* ========================================================================
MMIA£CCÏûÏ¢ºÅ¶¨Òå
======================================================================== */
@@ -1024,6 +1029,8 @@
#define MMIA_CC_DTMF_CNF_EV (DWORD)(MMIA_CC_RSP_EVENT + 25)
#define MMIA_CC_CSTA_SET_CNF_EV (DWORD)(MMIA_CC_RSP_EVENT + 26)
#define MMIA_CC_START_LOCALVOICE_IND_EV (DWORD)(MMIA_CC_RSP_EVENT + 27)
+#define MMIA_CC_ZECALL_IND_EV (DWORD)(MMIA_CC_RSP_EVENT + 28)
+#define MMIA_CC_CECN_IND_EV (DWORD)(MMIA_CC_RSP_EVENT + 29)
/* ========================================================================
MMIA£SMSÏûÏ¢ºÅ¶¨Òå
diff --git a/pub/include/ps_phy/psevent.h b/pub/include/ps_phy/psevent.h
old mode 100644
new mode 100755
index ff9a9a4..1e15c11
--- a/pub/include/ps_phy/psevent.h
+++ b/pub/include/ps_phy/psevent.h
@@ -1577,6 +1577,17 @@
#define CM_SM_ONLY_ONE_EPDNCON_EV (DWORD)(CM_MM_EVENT_BASE + 16)
#define CM_ESM_DETACH_REQ_EV (DWORD)(CM_MM_EVENT_BASE + 17)
#define CM_SM_DEACT_NON_EMERGENCY_EV (DWORD)(CM_MM_EVENT_BASE + 18)
+#define CC_UMM_RETURN_IMS_REQ_EV (DWORD)(CM_MM_EVENT_BASE + 19)
+#define UMM_CC_RETURN_IMS_CNF_EV (DWORD)(CM_MM_EVENT_BASE + 20)
+/*IVSÏ߳̽ÓÊÕÏûÏ¢*/
+#define IVS_DL_PCM_IND_EV (DWORD)(CM_MM_EVENT_BASE + 21)
+#define CC_IVS_RESET_REQ_EV (DWORD)(CM_MM_EVENT_BASE + 22)
+#define CC_IVS_MSD_IND_EV (DWORD)(CM_MM_EVENT_BASE + 23)
+/*IVS·¢¸øCC*/
+#define IVS_CC_MSD_REQ_EV (DWORD)(CM_MM_EVENT_BASE + 24)
+#define IVS_CC_HLACK_IND_EV (DWORD)(CM_MM_EVENT_BASE + 25)
+
+#define PSAP_UL_PCM_IND_EV (DWORD)(CM_MM_EVENT_BASE + 26)
/* ========================================================================
UMM£MM/GMM/EMMÏûÏ¢ºÅ¶¨Òå
@@ -1643,6 +1654,7 @@
#define UMM_ASC_HPPLMN_END_IND_EV (DWORD)(UMM_ASC_EVENT_BASE + 24)
#define UMM_ASC_XCELLINFO_REQ_EV (DWORD)(UMM_ASC_EVENT_BASE + 25)
#define UMM_ASC_XCELLINFO_ABORT_REQ_EV (DWORD)(UMM_ASC_EVENT_BASE + 26)
+#define UMM_ASC_UPDATE_ECALLMODE_EV (DWORD)(UMM_ASC_EVENT_BASE + 27)
#define UMM_ASC_CELL_INFO_IND_EV (DWORD)(UMM_ASC_RSP_EVENT + 0)
#define UMM_ASC_NOCELL_IND_EV (DWORD)(UMM_ASC_RSP_EVENT + 1)
@@ -1993,6 +2005,7 @@
#define ASC_LTE_SCANSWITCH_REQ_EV (DWORD)(ASC_EUAS_EVENT_BASE + 20)
#define ASC_LTE_XCELLINFO_REQ_EV (DWORD)(ASC_EUAS_EVENT_BASE + 21)
#define ASC_LTE_XCELLINFO_ABORT_REQ_EV (DWORD)(ASC_EUAS_EVENT_BASE + 22)
+#define ASC_LTE_UPDATE_CAMP_ACT_REQ_EV (DWORD)(ASC_EUAS_EVENT_BASE + 23)
/* EURRC->ASC */
#define ASC_LTE_SWITCH_RADIO_CNF_EV (DWORD)(ASC_EUAS_RSP_EVENT + 0)
@@ -3107,6 +3120,10 @@
#define UMM_T_DISFRESEARCH_EXPIRY_EV (DWORD)(UMM_TIMER_EVENT_BASE + 27)
#define UMM_T_RESETCAUSEPAR_EXPIRY_EV (DWORD)(UMM_TIMER_EVENT_BASE + 28)
#define UMM_T_SWITCHCARD_EXPIRY_EV (DWORD)(UMM_TIMER_EVENT_BASE + 29)
+#define UMM_T_ARREARS_EXPIRY_EV (DWORD)(UMM_TIMER_EVENT_BASE + 30)
+#define UMM_TSEARCHECALLCELL_EXPIRY_EV (DWORD)(UMM_TIMER_EVENT_BASE + 31)
+#define UMM_TECALL_INACT_EXPIRY_EV (DWORD)(UMM_TIMER_EVENT_BASE + 32)
+#define UMM_TTESTECALL_INACT_EXPIRY_EV (DWORD)(UMM_TIMER_EVENT_BASE + 33)
/* ========================================================================
CC¶¨Ê±Æ÷ÏûÏ¢ºÅ¶¨Òå
======================================================================== */
@@ -3147,7 +3164,11 @@
#define CC_T_DTMFDURA_EXPIRY_EV (DWORD)(CC_TIMER_EVENT_BASE + 26)
#define CC_T_MMCONNRETRY_EXPIRY_EV (DWORD)(CC_TIMER_EVENT_BASE + 27)
#define CC_T_ALLOWEDCALL_TIME_EXPIRY_EV (DWORD)(CC_TIMER_EVENT_BASE + 28)
-#define CC_T_ECT_EXPIRY_EV (DWORD)(CC_TIMER_EVENT_BASE + 29)
+#define CC_T_ECT_EXPIRY_EV (DWORD)(CC_TIMER_EVENT_BASE + 29)
+#define CC_T_T2_EXPIRY_EV (DWORD)(CC_TIMER_EVENT_BASE + 30)
+#define CC_T_T5_EXPIRY_EV (DWORD)(CC_TIMER_EVENT_BASE + 31)
+#define CC_T_T6_EXPIRY_EV (DWORD)(CC_TIMER_EVENT_BASE + 32)
+#define CC_T_T7_EXPIRY_EV (DWORD)(CC_TIMER_EVENT_BASE + 33)
/* ========================================================================
SMS¶¨Ê±Æ÷ÏûÏ¢ºÅ¶¨Òå
diff --git a/pub/include/tools/ZspTrace.h b/pub/include/tools/ZspTrace.h
index 0712c6e..343e77b 100755
--- a/pub/include/tools/ZspTrace.h
+++ b/pub/include/tools/ZspTrace.h
@@ -36,8 +36,11 @@
#define ZCAT_PHY_LOG_ZSP_BUF_READY (ZCAT_PHY_LOG_OFF + (4>>CPU_SHIFT))
#define ZCAT_PHY_LOG_VEHICLE_SIGN (ZCAT_PHY_LOG_ZSP_BUF_READY + (4>>CPU_SHIFT))
+/*ά²âÐÅÏ¢Log¿ª¹Ø*/
+#define ZCAT_DEBUG_INFO_DISABLE (ZCAT_PHY_LOG_VEHICLE_SIGN + (4>>CPU_SHIFT))
+
////zCat Log Rule
-#define ZCAT_RULE_LTE_ENABLED (ZCAT_PHY_LOG_VEHICLE_SIGN + (4>>CPU_SHIFT))
+#define ZCAT_RULE_LTE_ENABLED (ZCAT_DEBUG_INFO_DISABLE + (4>>CPU_SHIFT))
#define ZCAT_RULE_SIG_ENABLED (ZCAT_RULE_LTE_ENABLED + (4>>CPU_SHIFT))
#define ZCAT_RULE_TD_ENABLED (ZCAT_RULE_SIG_ENABLED + (4>>CPU_SHIFT))
#define ZCAT_RULE_WCDMA_ENABLED (ZCAT_RULE_TD_ENABLED + (4>>CPU_SHIFT))
diff --git a/pub/project/zx297520v3/include/drv/NvParam_drv.h b/pub/project/zx297520v3/include/drv/NvParam_drv.h
old mode 100644
new mode 100755
index b75a563..aba43bc
--- a/pub/project/zx297520v3/include/drv/NvParam_drv.h
+++ b/pub/project/zx297520v3/include/drv/NvParam_drv.h
@@ -204,16 +204,17 @@
UINT8 isVpConfigInitOn;
UINT8 isVpParamInNv;
UINT8 isUseSlicCodec;
- UINT8 isUseVoiceProc;//UINT8 isUseNXP;
+ UINT8 isUseVoiceProc;//4 UINT8 isUseNXP;
UINT8 isUseCodecDsp;
UINT8 isUseNvWrite;
UINT8 isCloseVpBufferBak;
- UINT8 isUseTdm;
+ UINT8 isUseTdm;//8
UINT8 isUseRxDtmfDet;
UINT8 isUseTxDtmfDet;
UINT8 isUseRxMixData;
- UINT8 isUseTxMixData;//12¸öflag
- UINT8 reserved[20];//32-12
+ UINT8 isUseTxMixData;//12
+ UINT8 isUseEcall;
+ UINT8 reserved[19];//32-13
} T_Audio_NvFlag;
diff --git a/pub/project/zx297520v3/include/nv/NvConfig.h b/pub/project/zx297520v3/include/nv/NvConfig.h
old mode 100644
new mode 100755
index a70dbf5..261d8b8
--- a/pub/project/zx297520v3/include/nv/NvConfig.h
+++ b/pub/project/zx297520v3/include/nv/NvConfig.h
@@ -35,6 +35,7 @@
//NV-RO-AMT
#define AMT_CALIB_LTE_NVRAM_BASE_ADDR (DDR_BASE_ADDR_PHY_NV)
#define AMT_CALIB_LTE_NVRAM_LENTH OS_FLASH_AMT_LTE_RO_NONFAC_SIZE
+#define AMT_CALIB_LTE_NVRAM_LENTH1 (240 * 1024UL)
#define AMT_CALIB_TDS_NVRAM_BASE_ADDR (AMT_CALIB_LTE_NVRAM_BASE_ADDR+AMT_CALIB_LTE_NVRAM_LENTH)
#define AMT_CALIB_TDS_NVRAM_LENTH OS_FLASH_AMT_TDS_RO_NONFAC_SIZE
@@ -47,6 +48,7 @@
#define AMT_CALIB_LTEA_NVRAM_BASE_ADDR (AMT_CALIB_WCDMA_NVRAM_BASE_ADDR+AMT_CALIB_WCDMA_NVRAM_LENTH)
#define AMT_CALIB_LTEA_NVRAM_LENTH OS_FLASH_AMT_LTEA_RO_NONFAC_SIZE
+#define AMT_CALIB_LTE_NVRAM_LENTH2 (80 * 1024UL)
//NV-RW-AMT-USER
#define AMT_USER_LTE_NVRAM_BASE_ADDR (AMT_CALIB_LTEA_NVRAM_BASE_ADDR+AMT_CALIB_LTEA_NVRAM_LENTH)
diff --git a/pub/project/zx297520v3/include/nv/NvConfig_Table.h b/pub/project/zx297520v3/include/nv/NvConfig_Table.h
old mode 100644
new mode 100755
index c3077c4..95b41ed
--- a/pub/project/zx297520v3/include/nv/NvConfig_Table.h
+++ b/pub/project/zx297520v3/include/nv/NvConfig_Table.h
@@ -29,14 +29,17 @@
/****************************************************************************
* Local Macros
****************************************************************************/
+/*
+ * ZX297520V3-472565: LTE 16Band 校准(240KB + 80KB)
+ */
T_zPhyNVCfg g_PhyNVCfg[] =
{
/*flash base addr */ /*DDR base addr */ /*nv size*/
- {OS_FLASH_AMT_LTE_RO_NONFAC_BASE_ADDR, AMT_CALIB_LTE_NVRAM_BASE_ADDR, AMT_CALIB_LTE_NVRAM_LENTH},
+ {OS_FLASH_AMT_LTE_RO_NONFAC_BASE_ADDR, AMT_CALIB_LTE_NVRAM_BASE_ADDR, AMT_CALIB_LTE_NVRAM_LENTH1},
+ {OS_FLASH_AMT_LTEA_RO_NONFAC_BASE_ADDR, AMT_CALIB_LTEA_NVRAM_BASE_ADDR, AMT_CALIB_LTE_NVRAM_LENTH2},
{OS_FLASH_AMT_TDS_RO_NONFAC_BASE_ADDR, AMT_CALIB_TDS_NVRAM_BASE_ADDR, AMT_CALIB_TDS_NVRAM_LENTH},
{OS_FLASH_AMT_GGE_RO_NONFAC_BASE_ADDR, AMT_CALIB_GGE_NVRAM_BASE_ADDR, AMT_CALIB_GGE_NVRAM_LENTH},
{OS_FLASH_AMT_WCDMA_RO_NONFAC_BASE_ADDR, AMT_CALIB_WCDMA_NVRAM_BASE_ADDR, AMT_CALIB_WCDMA_NVRAM_LENTH},
-// {OS_FLASH_AMT_LTEA_RO_NONFAC_BASE_ADDR, AMT_CALIB_LTEA_NVRAM_BASE_ADDR, AMT_CALIB_LTEA_NVRAM_LENTH},
// {OS_FLASH_AMT_RW_USER_LTE_BASE_ADDR, AMT_USER_LTE_NVRAM_BASE_ADDR, AMT_USER_LTE_NVRAM_LENTH},
{OS_FLASH_AMT_RW_USER_TDS_BASE_ADDR, AMT_USER_TDS_NVRAM_BASE_ADDR, AMT_USER_TDS_NVRAM_LENTH},