[Feature][ZXW-179]merge P52U02 version
Only Configure: No
Affected branch: master
Affected module: unknow
Is it affected on both ZXIC and MTK: only ZXIC
Self-test: Yes
Doc Update: No
Change-Id: I4fa8f86757e71388ae88400914dae8b50cd00338
diff --git a/pub/project/zx297520v3/include/drv/NvParam_drv.h b/pub/project/zx297520v3/include/drv/NvParam_drv.h
old mode 100644
new mode 100755
index b75a563..aba43bc
--- a/pub/project/zx297520v3/include/drv/NvParam_drv.h
+++ b/pub/project/zx297520v3/include/drv/NvParam_drv.h
@@ -204,16 +204,17 @@
UINT8 isVpConfigInitOn;
UINT8 isVpParamInNv;
UINT8 isUseSlicCodec;
- UINT8 isUseVoiceProc;//UINT8 isUseNXP;
+ UINT8 isUseVoiceProc;//4 UINT8 isUseNXP;
UINT8 isUseCodecDsp;
UINT8 isUseNvWrite;
UINT8 isCloseVpBufferBak;
- UINT8 isUseTdm;
+ UINT8 isUseTdm;//8
UINT8 isUseRxDtmfDet;
UINT8 isUseTxDtmfDet;
UINT8 isUseRxMixData;
- UINT8 isUseTxMixData;//12¸öflag
- UINT8 reserved[20];//32-12
+ UINT8 isUseTxMixData;//12
+ UINT8 isUseEcall;
+ UINT8 reserved[19];//32-13
} T_Audio_NvFlag;
diff --git a/pub/project/zx297520v3/include/nv/NvConfig.h b/pub/project/zx297520v3/include/nv/NvConfig.h
old mode 100644
new mode 100755
index a70dbf5..261d8b8
--- a/pub/project/zx297520v3/include/nv/NvConfig.h
+++ b/pub/project/zx297520v3/include/nv/NvConfig.h
@@ -35,6 +35,7 @@
//NV-RO-AMT
#define AMT_CALIB_LTE_NVRAM_BASE_ADDR (DDR_BASE_ADDR_PHY_NV)
#define AMT_CALIB_LTE_NVRAM_LENTH OS_FLASH_AMT_LTE_RO_NONFAC_SIZE
+#define AMT_CALIB_LTE_NVRAM_LENTH1 (240 * 1024UL)
#define AMT_CALIB_TDS_NVRAM_BASE_ADDR (AMT_CALIB_LTE_NVRAM_BASE_ADDR+AMT_CALIB_LTE_NVRAM_LENTH)
#define AMT_CALIB_TDS_NVRAM_LENTH OS_FLASH_AMT_TDS_RO_NONFAC_SIZE
@@ -47,6 +48,7 @@
#define AMT_CALIB_LTEA_NVRAM_BASE_ADDR (AMT_CALIB_WCDMA_NVRAM_BASE_ADDR+AMT_CALIB_WCDMA_NVRAM_LENTH)
#define AMT_CALIB_LTEA_NVRAM_LENTH OS_FLASH_AMT_LTEA_RO_NONFAC_SIZE
+#define AMT_CALIB_LTE_NVRAM_LENTH2 (80 * 1024UL)
//NV-RW-AMT-USER
#define AMT_USER_LTE_NVRAM_BASE_ADDR (AMT_CALIB_LTEA_NVRAM_BASE_ADDR+AMT_CALIB_LTEA_NVRAM_LENTH)
diff --git a/pub/project/zx297520v3/include/nv/NvConfig_Table.h b/pub/project/zx297520v3/include/nv/NvConfig_Table.h
old mode 100644
new mode 100755
index c3077c4..95b41ed
--- a/pub/project/zx297520v3/include/nv/NvConfig_Table.h
+++ b/pub/project/zx297520v3/include/nv/NvConfig_Table.h
@@ -29,14 +29,17 @@
/****************************************************************************
* Local Macros
****************************************************************************/
+/*
+ * ZX297520V3-472565: LTE 16Band 校准(240KB + 80KB)
+ */
T_zPhyNVCfg g_PhyNVCfg[] =
{
/*flash base addr */ /*DDR base addr */ /*nv size*/
- {OS_FLASH_AMT_LTE_RO_NONFAC_BASE_ADDR, AMT_CALIB_LTE_NVRAM_BASE_ADDR, AMT_CALIB_LTE_NVRAM_LENTH},
+ {OS_FLASH_AMT_LTE_RO_NONFAC_BASE_ADDR, AMT_CALIB_LTE_NVRAM_BASE_ADDR, AMT_CALIB_LTE_NVRAM_LENTH1},
+ {OS_FLASH_AMT_LTEA_RO_NONFAC_BASE_ADDR, AMT_CALIB_LTEA_NVRAM_BASE_ADDR, AMT_CALIB_LTE_NVRAM_LENTH2},
{OS_FLASH_AMT_TDS_RO_NONFAC_BASE_ADDR, AMT_CALIB_TDS_NVRAM_BASE_ADDR, AMT_CALIB_TDS_NVRAM_LENTH},
{OS_FLASH_AMT_GGE_RO_NONFAC_BASE_ADDR, AMT_CALIB_GGE_NVRAM_BASE_ADDR, AMT_CALIB_GGE_NVRAM_LENTH},
{OS_FLASH_AMT_WCDMA_RO_NONFAC_BASE_ADDR, AMT_CALIB_WCDMA_NVRAM_BASE_ADDR, AMT_CALIB_WCDMA_NVRAM_LENTH},
-// {OS_FLASH_AMT_LTEA_RO_NONFAC_BASE_ADDR, AMT_CALIB_LTEA_NVRAM_BASE_ADDR, AMT_CALIB_LTEA_NVRAM_LENTH},
// {OS_FLASH_AMT_RW_USER_LTE_BASE_ADDR, AMT_USER_LTE_NVRAM_BASE_ADDR, AMT_USER_LTE_NVRAM_LENTH},
{OS_FLASH_AMT_RW_USER_TDS_BASE_ADDR, AMT_USER_TDS_NVRAM_BASE_ADDR, AMT_USER_TDS_NVRAM_LENTH},