| ;-------------------------------------------------------------------------- | |
| ; Initialize SERIAL 0 as console for zx297520v3_fpga linux: 115200 8/N/1 | |
| ; created by xuzhiguo / ZTE-TSP at 03.18.2013 | |
| ;-------------------------------------------------------------------------- | |
| &UART_BASE_SYS=0x1408000 // UART1 Base Address | |
| &DBGU_DR=&UART_BASE_SYS+0x4 // data Register | |
| &DBGU_SC=&UART_BASE_SYS+0x8 // special character Register | |
| &DBGU_FR=&UART_BASE_SYS+0x14 // flag Register | |
| &DBGU_IBRD=&UART_BASE_SYS+0x24 // integer Baud Rate Generator Register | |
| &DBGU_FBRD=&UART_BASE_SYS+0x28 // fractional Baud Rate Generator Register | |
| &DBGU_LCR_H=&UART_BASE_SYS+0x30 // Line Control Register | |
| &DBGU_CR=&UART_BASE_SYS+0x34 // Control Register | |
| &DBGU_IMSC=&UART_BASE_SYS+0x40 // Interrupt Mask Register | |
| &TOP_FUNC_SEL_BASE=0x0013C000 // 0-AON FUNC | |
| &AON_FUNC_SEL_BASE=0x0013C000 // 0-rxd or txd func | |
| &UART0_TOP_FUNC=&TOP_FUNC_SEL_BASE+0x10 | |
| &UART0_AON_FUNC=&AON_FUNC_SEL_BASE+0 | |
| // set gpio function to UART0 TX and RX | |
| ;&tmp=data.long(D:&UART0_TOP_FUNC) | |
| ;&tmp=&tmp&0xFFE7FFFF // AON func | |
| ;&tmp=data.long(D:&UART0_AON_FUNC) | |
| ;&tmp=&tmp&0xFFFF0FFF // UART FUNC | |
| //set uart1 works clock divison to 1 | |
| ; it is done in evb297510.cmm | |
| //disable uart | |
| data.set &DBGU_CR %LONG 0x0 | |
| // mask all interrupt | |
| data.set &DBGU_IMSC %LONG 0x0 | |
| // Set baud rate 115200 | |
| data.set &DBGU_IBRD %LONG 0xD //on FPGA platform, uart work clock is 25MHz | |
| data.set &DBGU_FBRD %LONG 0x24 | |
| // set the port to no parity, no loopback, 8/N/1, enable FIFO | |
| data.set &DBGU_LCR_H %LONG 0x70 | |
| // Enable | |
| data.set &DBGU_CR %LONG 0x301 | |
| print "printing 'UART OK' on console" | |
| data.set &DBGU_DR %BYTE 0x0a //next line | |
| wait 10.ms | |
| data.set &DBGU_DR %BYTE 0x0d //enter | |
| wait 10.ms | |
| data.set &DBGU_DR %BYTE 0x55 //U | |
| wait 10.ms | |
| data.set &DBGU_DR %BYTE 0x41 //A | |
| wait 10.ms | |
| data.set &DBGU_DR %BYTE 0x52 //R | |
| wait 10.ms | |
| data.set &DBGU_DR %BYTE 0x54 //T | |
| wait 10.ms | |
| data.set &DBGU_DR %BYTE 0x20 //space | |
| wait 10.ms | |
| data.set &DBGU_DR %BYTE 0x4f //O | |
| wait 10.ms | |
| data.set &DBGU_DR %BYTE 0x4b //K | |
| wait 10.ms | |
| data.set &DBGU_DR %BYTE 0x0a //next line | |
| wait 10.ms | |
| data.set &DBGU_DR %BYTE 0x0d //enter | |
| wait 10.ms | |
| enddo | |