| commit | db4f43f0150836941f56a4d2e2923f7182328607 | [log] [tgz] |
|---|---|---|
| author | xf.li <xf.li@mobiletek.cn> | Mon May 08 03:11:45 2023 -0700 |
| committer | xf.li <xf.li@mobiletek.cn> | Mon May 08 03:11:45 2023 -0700 |
| tree | d719c703f417cd8e13157527054cee3c3f1f541e | |
| parent | 8b91b6d728d44427ef3820650da12704db36d1d2 [diff] |
[Feature][T106][ZXW-29]open uart1 Change-Id: If148b1aeae718d7196dfc10936609a351e99439a
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/arch/arm/boot/dts/zx297520v3.dtsi b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/arch/arm/boot/dts/zx297520v3.dtsi index 4ea7090..0934d0e 100644 --- a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/arch/arm/boot/dts/zx297520v3.dtsi +++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/arch/arm/boot/dts/zx297520v3.dtsi
@@ -312,7 +312,9 @@ interrupts = <GIC_SPI UART0_MIX_INT IRQ_TYPE_LEVEL_HIGH>; clocks = <&clkc UART0_WCLK>, <&clkc UART0_PCLK>; clock-names = "uartclk", "apb_pclk"; - status = "disabled"; + //xf.li@20230508 add for open uart1(zxw-uart0) start + status = "okay"; + //xf.li@20230508 add for open uart1(zxw-uart0) end }; soc_uart1: uart@1408000 {