blob: ae34bbc87e8db01d6ac9023d9add25b20711dcac [file] [log] [blame]
#ifndef EDCPTEST_H
#define EDCPTEST_H
void memcpy_edcp(U32* pCopyTo, U32* pSource, U32 num_index, U32 num_word);
void data_pre(void);
void ul_asyn_dat_cmp( void);
void ul_syn_dat_cmp( void);
void dl_asyn_dat_cmp( void);
void EDCP_SW_ENCRYPT(void);
//ddr data ram src addr
#define DDR_SRC_DATA_UL 0x24010000//0x24200000//ddr data ram base ddr 2M byte if 1496 byte enough for 1000 pdcp pdu
#define DDR_SRC_DATA_EMAC 0x24205000//0x24600000//ddr data ram base ddr
#define DDR_SRC_DATA_DL 0x245F0000//0x24A00000//ddr data ram base ddr
//#define DDR_SRC_DATA_CHECKSUM 0x250b0000//0x24E00000//ddr data ram base ddr
//ddr data ram des addr
#define DDR_DES_DATA_UL 0x25300000// allocate to UL SYN
#define DDR_DES_DATA_EMAC 0x254F5000//0x25700000
#define DDR_DES_DATA_DL 0x25BE0000//0x25B00000
//#define DDR_DES_DATA_CHECKSUM 0x266A0000//0x25F00000
#define DDR_ADDR_INTERVAL 0x2000//0x1f40//8000 //0x7D0 //2000
#define DDR_SRC_UL_ENC_DL 0x26400000
#define DDR_DES_UL_ENC_DL 0x27000000
#endif /* #ifndef EDCPTEST_H */