[Feature][ZXW-100]optimize powerkey times during the DL phase
Only Configure: No
Affected branch: master
Affected module: zloader
Is it affected on both ZXIC and MTK: only ZXIC
Self-test: Yes
Doc Update: Yes
Change-Id: Ibb4450080b17e661d8ea94d033175531c62fb3d5
diff --git a/boot/common/src/loader/lib/board.c b/boot/common/src/loader/lib/board.c
index 09417af..6d38893 100755
--- a/boot/common/src/loader/lib/board.c
+++ b/boot/common/src/loader/lib/board.c
@@ -20,7 +20,11 @@
#include "pub_flags.h"
#define FLAGS_PARTITION_ERROR (0x1111) /*·ÖÇøÒì³£*/
-
+//xf.li@20230815 add for download without powerkey start
+#define GPIO0_REG_BASE 0x0013D000
+#define GPIO24_PSHOLD (24)
+#define IO_CFG_BASE (0x0013C000+0x800)
+//xf.li@20230815 add for download without powerkey end
typedef short (init_fnc_t) (void);
int print_info(void)
@@ -152,6 +156,21 @@
#if CFG_PRINTF
uart_init();
#endif
+//xf.li@20230815 add for download without powerkey start
+#if 1//pshold on
+ amt_value = readl(IO_CFG_BASE+0x4);
+ amt_value &= ~(3<<28);
+ writel(amt_value, (IO_CFG_BASE+0x4));
+ /*direction: out*/
+ amt_value = readl(GPIO0_REG_BASE + (GPIO24_PSHOLD/16)*0x40);
+ amt_value &= ~(1<<(24%16));
+ writel(amt_value, GPIO0_REG_BASE + (GPIO24_PSHOLD/16)*0x40);
+ /*set out 1*/
+ amt_value = readl(GPIO0_REG_BASE + 0x18+ (GPIO24_PSHOLD/16)*0x40);
+ amt_value |= (1<<(24%16));
+ writel(amt_value, GPIO0_REG_BASE + 0x18+ (GPIO24_PSHOLD/16)*0x40);
+#endif
+//xf.li@20230815 add for download without powerkey end
print_info();
/* After reset, Copy zloader forcely. */