[Feature][T106][XILI] support JL5104 switch
Only Configure: No
Affected branch: XILI_V17.12_BASE
Affected module: ethernet
Is it affected on both ZXIC and MTK: only ZXIC
Self-test: yes
Doc Update: no
Change-Id: Iacce5e4b514b9ae19f56229a6053c8e311615356
diff --git a/cap/zx297520v3/sources/meta-zxic/recipes-kernel/linux/files/zx297520v3/linux-5_10-vehicle_dc_ref-normal-defconfig b/cap/zx297520v3/sources/meta-zxic/recipes-kernel/linux/files/zx297520v3/linux-5_10-vehicle_dc_ref-normal-defconfig
index 9baa954..5612f62 100755
--- a/cap/zx297520v3/sources/meta-zxic/recipes-kernel/linux/files/zx297520v3/linux-5_10-vehicle_dc_ref-normal-defconfig
+++ b/cap/zx297520v3/sources/meta-zxic/recipes-kernel/linux/files/zx297520v3/linux-5_10-vehicle_dc_ref-normal-defconfig
@@ -3118,3 +3118,5 @@
# end of Kernel hacking
CONFIG_FLAGS_UTILS=y
# CONFIG_TEST_FLAGS_UTILS is not set
+CONFIG_JL_SWITCH_DEVICES=y
+CONFIG_JLFE_SMI_OVER_MDIO=y
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/arch/arm/boot/dts/zx297520v3-vehicle_dc_ref.dts b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/arch/arm/boot/dts/zx297520v3-vehicle_dc_ref.dts
index ca14eb2..6d93c69 100755
--- a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/arch/arm/boot/dts/zx297520v3-vehicle_dc_ref.dts
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/arch/arm/boot/dts/zx297520v3-vehicle_dc_ref.dts
@@ -214,4 +214,7 @@
//xf.li add for status init end
};
+&jl_switch {
+ status = "okay";
+};
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/arch/arm/boot/dts/zx297520v3.dtsi b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/arch/arm/boot/dts/zx297520v3.dtsi
index 9d2cb3c..53d9a44 100755
--- a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/arch/arm/boot/dts/zx297520v3.dtsi
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/arch/arm/boot/dts/zx297520v3.dtsi
@@ -917,6 +917,9 @@
compatible = "lynq,gpio_init";
};
//xf.li add for status init end
+ jl_switch: jl_switch {
+ compatible = "jl, jl_switch";
+ };
};
#include "zx297520v3-pinctrl.dtsi"
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/net/ethernet/zte/zx29_gmac.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/net/ethernet/zte/zx29_gmac.c
index 668d9d9..53d656d 100755
--- a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/net/ethernet/zte/zx29_gmac.c
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/net/ethernet/zte/zx29_gmac.c
@@ -31,7 +31,9 @@
static u8 zx29_gmac_addr[MAC_ADDR_LENTH] = {0xec,0x1d,0x7f,0xb0,0x2f,0x32};
static struct tasklet_struct *g_gmac_tasklet = NULL;
-/*struct zx29_gmac_dev *g_gmac_dev = NULL; */ /* no use possible */
+#ifdef CONFIG_JL_SWITCH_DEVICES
+struct zx29_gmac_dev *g_gmac_dev = NULL; /* no use possible */
+#endif
extern void gmac_event_notify(GMAC_NOTIFY_EVENT notify_type, void* puf);
extern int gmac_event_init(const char *name);
static void gmac_hw_deinit(struct net_device *dev);
@@ -40,8 +42,14 @@
extern void dma_map(const void *addr, size_t len, int flags);
extern unsigned long virt_to_phys_ap_new(unsigned long virt_addr);
extern void kobj_gmac_del(struct kobject *kobject);
-
-
+#ifdef CONFIG_JL_SWITCH_DEVICES
+struct mii_bus * get_gmac_mii_bus(void)
+{
+ if (g_gmac_dev == NULL)
+ return NULL;
+ return g_gmac_dev->mii.bus;
+}
+#endif
void dump_pkt_trace(unsigned char *data,int len)
{
int i;
@@ -725,9 +733,11 @@
mac_int_clear(0x0001FFFF);
while (mac_mii_is_busy());
-
+#ifndef CONFIG_JL_SWITCH_DEVICES
gmac_set_speed_duplex(ndev, priv->phydev->speed, priv->phydev->duplex);
-
+#else
+ gmac_set_speed_duplex(ndev, 100, 1);
+#endif
mac_rece_all_data();
gmac_start((void *)ndev->base_addr);
@@ -744,14 +754,21 @@
unsigned long delay_in_us = GTIMER_INTERVAL;
ktime_t gmac_schdule_time;
#endif
+#ifndef CONFIG_JL_SWITCH_DEVICES
err = phy_read_status(priv->phydev); /*interal, phy drv provide*/
if (err < 0)
return err;
-
+#endif
spin_lock_irqsave(&priv->lock, flags);
+#ifdef CONFIG_JL_SWITCH_DEVICES
+ priv->link.speed = 100;
+ priv->link.duplex = 1;
+ priv->link.giga = true;
+ priv->link.isup = 1;
+#else
priv->link.speed = 0;
-
zx29_gmac_linkisup(ndev, priv->phydev->link);
+#endif
ret = gmac_hw_init(ndev);
if(ret) {
@@ -762,8 +779,9 @@
netif_carrier_on(ndev);
spin_unlock_irqrestore(&priv->lock, flags);
+#ifndef CONFIG_JL_SWITCH_DEVICES
phy_start(priv->phydev);
-
+#endif
netif_start_queue(ndev);
#ifdef GMAC_NO_INT
@@ -799,7 +817,9 @@
priv->stopped = 1;
netif_stop_queue(ndev);
netif_carrier_off(ndev);
+#ifndef CONFIG_JL_SWITCH_DEVICES
phy_stop(priv->phydev);
+#endif
gmac_hw_deinit(ndev);
memset(&ndev->stats, 0, sizeof(struct net_device_stats));
@@ -1154,7 +1174,9 @@
// netif_device_detach(ndev);
// gmac_stop((void*)ndev->base_addr);
#ifdef CONFIG_BOOT_WITHOUT_LOCK
+#ifndef CONFIG_JL_SWITCH_DEVICES
phy_stop(priv->phydev);
+#endif
spin_lock_irqsave(&priv->lock, flag);
netif_stop_queue(ndev);
netif_carrier_off(ndev);
@@ -1214,13 +1236,15 @@
gmac_phy_release();
mdelay(500); //icplus ping need
-
+#ifndef CONFIG_JL_SWITCH_DEVICES
priv->phydev->drv->config_init(priv->phydev);
+#endif
gmac_hw_init(ndev);
netif_carrier_on(ndev);
-
+#ifndef CONFIG_JL_SWITCH_DEVICES
phy_start(priv->phydev);
+#endif
netif_start_queue(ndev);
#ifdef GMAC_NO_INT
@@ -1798,12 +1822,14 @@
gpio_direction_output(prv->gpio_power[0], 1);
mdelay(15);
#ifdef CONFIG_MDIO_C45 //zw.wang Customer chooses phy c22/c45 issues on 20240301
- prv->gpio_power[1] = of_get_gpio_flags(pdev->dev.of_node, 1, &flags);
- ret = gpio_request(prv->gpio_power[1], "phy_rst"); /* gpio 63 */
- gpio_direction_output(prv->gpio_power[1], 0);
- mdelay(10);
- gpio_direction_output(prv->gpio_power[1], 1);
- mdelay(15);
+#ifndef CONFIG_JL_SWITCH_DEVICES
+ prv->gpio_power[1] = of_get_gpio_flags(pdev->dev.of_node, 1, &flags);
+ ret = gpio_request(prv->gpio_power[1], "phy_rst"); /* gpio 63 */
+ gpio_direction_output(prv->gpio_power[1], 0);
+ mdelay(10);
+ gpio_direction_output(prv->gpio_power[1], 1);
+ mdelay(15);
+#endif
#endif
SET_NETDEV_DEV(ndev, &pdev->dev); //if not, will panic
@@ -1898,6 +1924,7 @@
}
prv->mii.bus = mb;
+#ifndef CONFIG_JL_SWITCH_DEVICES
ret = zx29_gmac_phy_start(ndev);
if (ret)
goto errphystart;
@@ -1914,7 +1941,12 @@
strcpy(board_name, "mdl");
netif_device_detach(ndev);
}
-
+#else
+#ifndef CONFIG_BOOT_WITHOUT_LOCK
+ pm_stay_awake(&pdev->dev);
+#endif
+ strcpy(board_name, "cpe");
+#endif
platform_set_drvdata(pdev, ndev);
tasklet_init(&prv->tasklet, zx29_gmac_tasklet, (unsigned long)ndev);
@@ -1946,8 +1978,10 @@
#endif
gmac_event_init(board_name);
-/* g_gmac_dev = prv; */ /* no use possible*/
-
+#ifdef CONFIG_JL_SWITCH_DEVICES
+ g_gmac_dev = prv; /* no use possible*/
+#endif
+
printk("[%s] probe end\n", __func__);
return 0;
errmalloc:
@@ -2009,8 +2043,10 @@
platform_set_drvdata(pdev, NULL);
#ifdef CONFIG_MDIO_C45 //zw.wang Customer chooses phy c22/c45 issues on 20240301
+#ifndef CONFIG_JL_SWITCH_DEVICES
gpio_free(priv->gpio_power[1]);
#endif
+#endif
gpio_direction_output(priv->gpio_power[0], 0);
gpio_free(priv->gpio_power[0]);
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/Kconfig b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/Kconfig
index aacc8d0..118f7e9 100755
--- a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/Kconfig
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/Kconfig
@@ -121,4 +121,7 @@
source "drivers/staging/voicedrv/Kconfig"
source "drivers/staging/voicebufferdrv/Kconfig"
+
+source "drivers/staging/jl_switch_sdk_v4.0.0/libswitch/Kconfig"
+
endif # STAGING
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/Makefile b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/Makefile
index 276dea6..d0a2796 100755
--- a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/Makefile
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/Makefile
@@ -1,6 +1,5 @@
# SPDX-License-Identifier: GPL-2.0
# Makefile for staging directory
-
obj-y += media/
obj-$(CONFIG_PRISM2_USB) += wlan-ng/
obj-$(CONFIG_COMEDI) += comedi/
@@ -51,3 +50,4 @@
obj-y += hikey9xx/
obj-$(CONFIG_VOICE_DRV) += voicedrv/
obj-$(CONFIG_VOICE_BUFFER_DRV) += voicebufferdrv/
+obj-$(CONFIG_JL_SWITCH_DEVICES) += jl_switch_sdk_v4.0.0/libswitch/
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/.gitignore b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/.gitignore
new file mode 100644
index 0000000..b3c3e19
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/.gitignore
@@ -0,0 +1,15 @@
+*.o
+*.os
+*.a
+*.so
+*.lib
+*.dll
+*.exe
+.sconsign.dblite
+!**/3rdparty/**/*
+tags
+*:Zone.Identifier
+*.vs
+*.bak
+cscope.*
+*.cmd
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/Kbuild b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/Kbuild
new file mode 100644
index 0000000..7fdbb8d
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/Kbuild
@@ -0,0 +1,4 @@
+obj-$(CONFIG_JLFE_SWITCH) += libjl51xx/
+
+
+
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/Kconfig b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/Kconfig
new file mode 100644
index 0000000..4422955
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/Kconfig
@@ -0,0 +1,18 @@
+#test
+
+config JL_SWITCH_DEVICES
+ bool "JLSemi Switch Devices"
+ default y
+ help
+ If you have a network(switch) chipset belongs to this class, say Y.
+
+ Note that the answer to this question doesn't directly affect the
+ kernel: saying N will just cause the configurator to skip all
+ the questions about JLSemi chipsets. If you say Y, you will be asked for
+ your specific chipsets in the following questions.
+
+if JL_SWITCH_DEVICES
+
+source "drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/Kconfig"
+
+endif # JL_SWITCH_DEVICES
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/Kbuild b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/Kbuild
new file mode 100755
index 0000000..5e24a90
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/Kbuild
@@ -0,0 +1,8 @@
+#subdir-ccflags-y += -Werror -Wno-deprecated-declarations
+subdir-ccflags-y += -I$(srctree)/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc
+include $(src)/scripts/Makefile.build
+
+obj-$(CONFIG_JLFE_SWITCH) += libjl51xx.o
+libjl51xx-y := $(LIBOBJ-y)
+
+
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/Kconfig b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/Kconfig
new file mode 100755
index 0000000..5b4bad2
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/Kconfig
@@ -0,0 +1,250 @@
+menuconfig JLFE_SWITCH
+ tristate "JLSemi Fast Ethernet Switch Support"
+ default y
+ help
+ This option enables driver support for jl51xx fast ethernet switch chips:
+
+ "jl5104"
+ "jl5105"
+ "jl5106"
+ "jl5108"
+ "jl5109"
+ "jl5110"
+
+ If you have such a chip, say Y here.
+ To compile this support as a module, choose M here.
+
+if JLFE_SWITCH
+
+choice
+ prompt "chip selection"
+ default JLFE_CHIP_ID_51XX
+ help
+ Select target chip
+
+config JLFE_CHIP_ID_5104
+ bool "JL5104"
+ select JLFE_DRV_51XX
+
+config JLFE_CHIP_ID_5105
+ bool "JL5105"
+ select JLFE_DVR_51XX
+
+config JLFE_CHIP_ID_5106
+ bool "JL5106"
+ select JLFE_DVR_51XX
+
+config JLFE_CHIP_ID_5108
+ bool "JL5108"
+ select JLFE_DVR_51XX
+
+config JLFE_CHIP_ID_5109
+ bool "JL5109"
+ select JLFE_DVR_51XX
+
+config JLFE_CHIP_ID_5110
+ bool "JL5110"
+ select JLFE_DVR_51XX
+
+config JLFE_CHIP_ID_51XX
+ bool "JL51xx Auto Probe"
+ select JLFE_DVR_51XX
+ help
+ Probe jl51xx series switch chip automatically.
+ Note, this will increase the code size!
+endchoice
+
+
+# XXX duplicate with jl61xx
+config JLFE_DEBUG
+ bool "debug message on"
+ default y
+config JLFE_DBG_LEVEL
+ depends on JLFE_DEBUG
+ int "debug message level"
+ default 1
+ range 0 4
+ help
+ range: 0 (no message) ~ 4 (full message)
+ 0: debug off, 1: error, 2: warning, 3: information, 4: verbose
+
+# XXX duplicate with jl61xx
+config JLFE_API_MUTEX
+ bool "api mutex"
+ default n
+ help
+ API thread safe.
+ Please complete the mutex portable apis under portable directory.
+
+# XXX duplicate with jl61xx
+config JLFE_LOAD_PATCH
+ bool "load patch"
+ default y
+ help
+ Load patch automatically when "jl_switch_device_create" is called.
+ User can choose more than one patch versions and sdk will load the right one.
+ Note, this will increase the code size!
+
+if JLFE_LOAD_PATCH
+choice
+ prompt "load patch select"
+ default JLFE_LOAD_FORMAL_PATCH
+ help
+ Select the default patch, default is load formal patch
+
+config JLFE_LOAD_FORMAL_PATCH
+ bool "load formal patch"
+ help
+ Load formal patch automatically when "jl_switch_init" is called.
+ User can choose more than one patch version and sdk will load the right one.
+ Note, this will increase the code size!
+
+config JLFE_LOAD_CUSTOMIZED_PATCH
+ bool "load customized patch"
+ help
+ Load customized patch automatically when "jl_switch_init" is called.
+ Note, this is used for customer customized requirements.
+
+endchoice
+
+if JLFE_LOAD_FORMAL_PATCH
+
+config JLFE_LOAD_PATCH_VER0
+ bool "Verion R0P0"
+ default y
+ help
+ load formal patch eco version R0P0.
+
+config JLFE_LOAD_PATCH_VER1
+ bool "Verion R0P1"
+ default y
+ help
+ load formal patch eco version R0P1.
+
+config JLFE_LOAD_PATCH_VER2
+ bool "Verion R0P2"
+ default y
+ help
+ load formal patch eco version R0P2.
+
+config JLFE_LOAD_PATCH_VER3
+ bool "Verion R1P0"
+ default y
+ help
+ load formal patch eco version R1P0.
+
+endif # JLFE_LOAD_FORMAL_PATCH
+endif # JLFE_LOAD_PATCH
+
+config JLFE_EXT_PORT_MODE
+ bool "force EXT PORT mode"
+ default n
+ depends on JLFE_CHIP_ID_5104 || JLFE_CHIP_ID_5106 || \
+ JLFE_CHIP_ID_5109 || \
+ JLFE_CHIP_ID_5110 || JLFE_CHIP_ID_51XX
+ help
+ Configure the interface mode of ext ports(EXT_PORT0 and EXT_PORT1).
+ The configure process is done in jl_switch_init() API.
+ The supported interface mode is listed:
+ MII PHY MODE,
+ MII MAC MODE,
+ RMII PHY MODE,
+ RMII MAC MODE,
+ DISABLE.
+
+if JLFE_EXT_PORT_MODE
+choice
+ prompt "EXT_PORT0 supported interface modes"
+ default JLFE_EXT_PORT0_MII_MAC_MODE
+
+config JLFE_EXT_PORT0_MII_MAC_MODE
+ depends on !JLFE_CHIP_ID_5104
+ bool "MII MAC mode"
+
+config JLFE_EXT_PORT0_MII_PHY_MODE
+ depends on !JLFE_CHIP_ID_5104
+ bool "MII PHY mode"
+
+config JLFE_EXT_PORT0_RMII_MAC_MODE
+ bool "RMII MAC mode"
+
+config JLFE_EXT_PORT0_RMII_PHY_MODE
+ bool "RMII PHY mode"
+
+config JLFE_EXT_PORT0_DISABLE_MODE
+ bool "DISABLE"
+endchoice
+
+choice
+ prompt "EXT_PORT1 supported interface modes"
+ depends on JLFE_CHIP_ID_5110 || JLFE_CHIP_ID_51XX
+ default JLFE_EXT_PORT1_RMII_MAC_MODE
+
+config JLFE_EXT_PORT1_RMII_MAC_MODE
+ depends on JLFE_CHIP_ID_5110 || JLFE_CHIP_ID_51XX
+ bool "RMII MAC mode"
+
+config JLFE_EXT_PORT1_RMII_PHY_MODE
+ depends on JLFE_CHIP_ID_5110 || JLFE_CHIP_ID_51XX
+ bool "RMII PHY mode"
+
+config JLFE_EXT_PORT1_DISABLE_MODE
+ depends on JLFE_CHIP_ID_5110 || JLFE_CHIP_ID_51XX
+ bool "DISABLE"
+endchoice
+endif
+
+config JLFE_DUMP_REG_WRITE
+ bool "dump switch register write operation"
+ help
+ Dump all the switch register write operations and save it as "smi_dump_write.txt".
+ This is part of the "Tiny SDK Solution", refer to "User Guide" for more details.
+ Note, this will increase SDK code size, it's not necessary to enable in only library use case.
+
+#config JLFE_PHY_MUTEX
+config JLFE_APB_MUTEX
+ bool "io mutex"
+ default n
+ help
+ IO thread safe.
+ Please complete the mutex portable apis under portable directory.
+
+choice
+ prompt "Regsiter IO configuration"
+ default JLFE_SMI_OVER_WINUSB
+
+config JLFE_SMI_OVER_MDIO
+ bool "SMI interface"
+ help
+ Using Native MDIO as SMI interface
+
+config JLFE_SMI_OVER_GPIO
+ bool "SMI over GPIO interface"
+ help
+ Using GPIO pins to emulate SMI interface when native MIDO controller is unavailable on embeded systems.
+ Emulation with GPIO pins with bit-bang driver is tested on Raspberry Pi test board.
+
+config JLFE_SMI_OVER_SPI
+ bool "SMI over SPI interface"
+ help
+ Using SPI pins to emulate SMI interface when native MIDO controller is unavailable on embeded systems.
+
+# To-do:Conditonal on kernel mode
+config JLFE_SMI_OVER_FTDI
+ bool "SMI over FTDI to MDIO USB interface"
+ help
+ For Windows & Linux, an FTDI to MDIO USB interface board is needed. To obtain the interface board, please contact JLSemi FAE.
+
+config JLFE_SMI_OVER_HID
+ bool "SMI over HID to MDIO USB interface"
+ help
+ For Windows & Linux, an HID to MDIO USB interface board is needed. To obtain the interface board, please contact JLSemi FAE.
+
+config JLFE_SMI_OVER_WINUSB
+ bool "SMI over WinUSB to MDIO USB interface"
+ help
+ For Windows & Linux, an WinUSB to MDIO USB interface board is needed. Please get a raspberrypi pico and refer to SDK user guide.
+
+endchoice
+
+endif # JLFE_SWITCH
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/example/example_acl_ring.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/example/example_acl_ring.c
new file mode 100644
index 0000000..6199e30
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/example/example_acl_ring.c
@@ -0,0 +1,95 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+#include <stdio.h>
+#include <signal.h>
+#include <string.h>
+#include <stdlib.h>
+
+#include "acl.h"
+#include "vlan.h"
+int main(int argc, char *argv[])
+{
+ (void) argc;
+ (void) argv;
+
+ jl_api_ret_t ret = 0;
+ jl_acl_rule_t acl_rule = {0};
+ jl_acl_action_t acl_action = {0};
+ jl_uint32 port = 0;
+ jl_uint32 index = 0;
+
+ // Set stdout to unbuffered mode
+ if (setvbuf(stdout, NULL, _IONBF, 0) != 0) {
+ perror("Failed to set unbuffered mode for stdout");
+ return 1;
+ }
+
+ /* init sdk */
+ jl_switch_init();
+
+ /* 2. set acl rule match source port to send dst port*/
+ for (port = UTP_PORT0; port <= UTP_PORT4; port++) {
+ memset(&acl_rule, 0, sizeof(jl_acl_rule_t));
+ // use has_vlans = 0 and 1 to match source port
+ acl_rule.compare_has_vlans = 1;
+ acl_rule.has_vlans = 0;
+ acl_rule.type_of_comparison_has_vlans = 1;
+ acl_rule.ports = 1 << port;
+
+ memset(&acl_action, 0, sizeof(jl_acl_action_t));
+ acl_action.send_to_port_enable = ENABLED;
+ if (port == UTP_PORT4)
+ acl_action.dest_port = UTP_PORT0;
+ else
+ acl_action.dest_port = port+1;
+ index = port * 2;
+ ret = jl_acl_set(index, &acl_rule, &acl_action);
+ if (ret) {
+ printf("jl_acl_set index %d error[%d]\n", index, ret);
+ return ret;
+ }
+
+ acl_rule.compare_has_vlans = 1;
+ acl_rule.has_vlans = 1;
+ acl_rule.type_of_comparison_has_vlans = 1;
+ acl_rule.ports = 1 << port;
+ index = port * 2 + 1;
+ ret = jl_acl_set(index, &acl_rule, &acl_action);
+ if (ret) {
+ printf("jl_acl_set index %d error[%d]\n", index, ret);
+ return ret;
+ }
+ }
+
+ for (index = 0; index < UTP_PORT5*2; index++) {
+ memset(&acl_rule, 0, sizeof(jl_acl_rule_t));
+ memset(&acl_action, 0, sizeof(jl_acl_action_t));
+
+ ret = jl_acl_get(index, &acl_rule, &acl_action);
+ if (ret) {
+ printf("jl_acl_get index %d error[%d]\n", index, ret);
+ return ret;
+ }
+ printf("index %d, compara_has_vlans:%d, has_vlans:%d, type_of_comparison_has_vlans:%d, port:0x%x,send_to_port_enable:%d, dest_port:%d.\n",
+ index,
+ acl_rule.compare_has_vlans,
+ acl_rule.has_vlans,
+ acl_rule.type_of_comparison_has_vlans,
+ acl_rule.ports,
+ acl_action.send_to_port_enable,
+ acl_action.dest_port
+ );
+ }
+ return 0;
+}
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/example/example_acl_set_rule.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/example/example_acl_set_rule.c
new file mode 100644
index 0000000..367f5ad
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/example/example_acl_set_rule.c
@@ -0,0 +1,96 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+#include <stdio.h>
+#include <signal.h>
+#include <string.h>
+#include <stdlib.h>
+
+#include "acl.h"
+
+int main(int argc, char *argv[])
+{
+ (void) argc;
+ (void) argv;
+
+ jl_api_ret_t ret;
+ jl_acl_rule_t acl_rule;
+ jl_acl_action_t acl_action;
+
+ // Set stdout to unbuffered mode
+ if (setvbuf(stdout, NULL, _IONBF, 0) != 0) {
+ perror("Failed to set unbuffered mode for stdout");
+ return 1;
+ }
+
+ /* init sdk */
+ jl_switch_init();
+
+ /* set entry 0 rule*/
+ memset(&acl_rule, 0, sizeof(jl_acl_rule_t));
+ acl_rule.compare_sa = 1;
+ acl_rule.sa_mac = 0x11;
+ acl_rule.type_of_comparison_sa = 1;
+ acl_rule.ports = 1 << UTP_PORT0;
+
+ memset(&acl_action, 0, sizeof(jl_acl_action_t));
+ acl_action.force_queue_enable = ENABLED;
+ acl_action.queue_id = 0;
+ ret = jl_acl_set(0, &acl_rule, &acl_action);
+
+ if (ret) {
+ /*throw exception*/
+ return ret;
+ }
+
+ /* set entry 1 rule */
+ memset(&acl_rule, 0, sizeof(jl_acl_rule_t));
+ acl_rule.compare_sa = 1;
+ acl_rule.sa_mac = 0x22;
+ acl_rule.type_of_comparison_sa = 1;
+ acl_rule.ports = 1 << UTP_PORT1;
+
+ memset(&acl_action, 0, sizeof(jl_acl_action_t));
+ acl_action.force_queue_enable = ENABLED;
+ acl_action.queue_id = 1;
+ ret = jl_acl_set(1, &acl_rule, &acl_action);
+
+ if (ret) {
+ /*throw exception*/
+ return ret;
+ }
+
+ /* set entry 2 rule */
+ memset(&acl_rule, 0, sizeof(jl_acl_rule_t));
+ acl_rule.compare_da = 1;
+ acl_rule.da_mac = 0x33;
+ acl_rule.type_of_comparison_da = 1;
+ acl_rule.compare_vid = 1;
+ acl_rule.vid = 100;
+ acl_rule.type_of_comparison_vid = 1;
+ acl_rule.ports = (1 << UTP_PORT2) + (1 << UTP_PORT3);
+
+ memset(&acl_action, 0, sizeof(jl_acl_action_t));
+ acl_action.force_queue_enable = ENABLED;
+ acl_action.queue_id = 0;
+ acl_action.send_to_port_enable = ENABLED;
+ acl_action.dest_port = UTP_PORT4;
+ ret = jl_acl_set(2, &acl_rule, &acl_action);
+
+ if (ret) {
+ /*throw exception*/
+ return ret;
+ }
+
+ return 0;
+}
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/example/example_l2_aging_learning.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/example/example_l2_aging_learning.c
new file mode 100644
index 0000000..d674a36
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/example/example_l2_aging_learning.c
@@ -0,0 +1,41 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+#include <stdio.h>
+#include <signal.h>
+#include <string.h>
+#include <stdlib.h>
+
+
+#include "jl_base.h"
+#include "l2.h"
+
+int main(int argc, char *argv[])
+{
+ (void) argc;
+ (void) argv;
+
+ // Set stdout to unbuffered mode
+ if (setvbuf(stdout, NULL, _IONBF, 0) != 0) {
+ perror("Failed to set unbuffered mode for stdout");
+ return 1;
+ }
+
+ /* turn off auto-learning and aging */
+ /* init sdk */
+ jl_switch_init();
+
+ jl_l2_aging_learning_set(0, 0);
+
+ return 0;
+}
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/example/example_l2_del_uni_entry.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/example/example_l2_del_uni_entry.c
new file mode 100644
index 0000000..4d26002
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/example/example_l2_del_uni_entry.c
@@ -0,0 +1,60 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+#include <stdio.h>
+#include <signal.h>
+#include <string.h>
+#include <stdlib.h>
+
+
+#include "jl_base.h"
+#include "l2.h"
+
+int main(int argc, char *argv[])
+{
+ (void) argc;
+ (void) argv;
+
+ // Set stdout to unbuffered mode
+ if (setvbuf(stdout, NULL, _IONBF, 0) != 0) {
+ perror("Failed to set unbuffered mode for stdout");
+ return 1;
+ }
+
+ /* delete a static unicast entry with MAC address 00:11:22:33:44:55, fid 1 */
+ jl_l2_fib_key_t key = {
+ .is_collision = 0,
+ .mac_addr.val = 0x1122334455, //mac
+ .fid = 1, //fid
+ .entry_index = 0,
+ };
+
+ jl_l2_fib_config_t config = {
+ .aging = {
+ .is_valid = 0, //invalid
+ .is_static = 1, //static
+ },
+ .dest = {
+ .is_unicast = 1, //unicast
+ .port = UTP_PORT0,
+ .pkt_drop = 0,
+ },
+ };
+
+ /* init sdk */
+ jl_switch_init();
+
+ jl_l2_fib_config_set_auto(&key, &config);
+
+ return 0;
+}
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/example/example_l2_get_mul_entry.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/example/example_l2_get_mul_entry.c
new file mode 100644
index 0000000..7d80822
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/example/example_l2_get_mul_entry.c
@@ -0,0 +1,55 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+#include <stdio.h>
+#include <signal.h>
+#include <string.h>
+#include <stdlib.h>
+
+#include "jl_base.h"
+#include "l2.h"
+
+int main(int argc, char *argv[])
+{
+ (void) argc;
+ (void) argv;
+
+ // Set stdout to unbuffered mode
+ if (setvbuf(stdout, NULL, _IONBF, 0) != 0) {
+ perror("Failed to set unbuffered mode for stdout");
+ return 1;
+ }
+
+ /* get a multicast entry with MAC address 01:00:5E:01:01:01, fid 1, and its multicast port mask */
+ jl_uint32 portmask;
+ jl_l2_fib_config_t config;
+
+ jl_l2_fib_key_t key = {
+ .is_collision = 0,
+ .mac_addr.val = 0x01005E010101, //mac
+ .fid = 1, //fid
+ .entry_index = 0,
+ };
+ portmask = 0;
+ memset(&config, 0, sizeof(jl_l2_fib_config_t));
+
+ /* init sdk */
+ jl_switch_init();
+
+ jl_l2_fib_config_get(&key, &config);
+
+ /* get the multicast member port mask */
+ jl_l2_mc_port_mask_get(config.dest.port, &portmask);
+
+ return 0;
+}
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/example/example_l2_get_table.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/example/example_l2_get_table.c
new file mode 100644
index 0000000..e23127b
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/example/example_l2_get_table.c
@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+#include <stdio.h>
+#include <signal.h>
+#include <string.h>
+#include <stdlib.h>
+
+
+#include "jl_base.h"
+#include "l2.h"
+
+int main(int argc, char *argv[])
+{
+ (void) argc;
+ (void) argv;
+
+ // Set stdout to unbuffered mode
+ if (setvbuf(stdout, NULL, _IONBF, 0) != 0) {
+ perror("Failed to set unbuffered mode for stdout");
+ return 1;
+ }
+
+ /* dump the 3th(0 - 2063) index of the L2 table */
+ int i;
+ jl_l2_fib_key_t key;
+ jl_l2_fib_config_t config;
+
+ i = 3;
+ memset(&key, 0, sizeof(jl_l2_fib_key_t));
+ memset(&config, 0, sizeof(jl_l2_fib_config_t));
+
+ /* init sdk */
+ jl_switch_init();
+
+ jl_l2_fib_config_get_by_index(i, &key, &config);
+ /* dump all the L2 table entires whose dest port equals UTP_PORT0 */
+
+ for (i = 0; i < JL_L2_DA_TABLE_SIZE; i++) {
+ jl_l2_fib_config_get_by_index(i, &key, &config);
+
+ if (config.dest.port == UTP_PORT0) {
+ /* do some thing */
+ }
+ }
+
+ return 0;
+}
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/example/example_l2_set_mul_entry.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/example/example_l2_set_mul_entry.c
new file mode 100644
index 0000000..c525219
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/example/example_l2_set_mul_entry.c
@@ -0,0 +1,69 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+#include <stdio.h>
+#include <signal.h>
+#include <string.h>
+#include <stdlib.h>
+
+#include "jl_base.h"
+#include "l2.h"
+
+int main(int argc, char *argv[])
+{
+ (void) argc;
+ (void) argv;
+
+ /* add a multicast member port 0,1,2 to the L2 Multicast Table index 2. */
+ /* add a multicast static entry with MAC address 01:00:5E:01:01:01, fid 5 and member port 0,1,2 */
+ jl_uint32 portmask;
+ jl_l2_table_entry_idx_t index;
+
+ portmask = (1 << UTP_PORT0) | (1 << UTP_PORT1) | (1 << UTP_PORT2);
+ index = 2;
+
+ jl_l2_fib_key_t key = {
+ .is_collision = 0, //ignored
+ .mac_addr.val = 0x01005E010101, //mac
+ .fid = 5, //fid
+ .entry_index = 0, //ignored
+ };
+
+ jl_l2_fib_config_t config = {
+ .aging = {
+ .is_valid = 1, //valid
+ .is_static = 1, //static
+ },
+ .dest = {
+ .is_unicast = 0, //multicast
+ .port = index, //pointer to multicast table index
+ .pkt_drop = 0,
+ },
+ };
+
+ // Set stdout to unbuffered mode
+ if (setvbuf(stdout, NULL, _IONBF, 0) != 0) {
+ perror("Failed to set unbuffered mode for stdout");
+ return 1;
+ }
+
+ /* init sdk */
+ jl_switch_init();
+
+ /* set L2 multicast entry */
+ jl_l2_mc_port_mask_set(index, portmask);
+
+ jl_l2_fib_config_set_auto(&key, &config);
+
+ return 0;
+}
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/example/example_l2_set_uni_entry.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/example/example_l2_set_uni_entry.c
new file mode 100644
index 0000000..b508a08
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/example/example_l2_set_uni_entry.c
@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+#include <stdio.h>
+#include <signal.h>
+#include <string.h>
+#include <stdlib.h>
+
+#include "jl_base.h"
+#include "l2.h"
+
+int main(int argc, char *argv[])
+{
+ (void) argc;
+ (void) argv;
+
+ /* add a unicast static entry with MAC address 00:11:22:33:44:55, untagged, destport 5 */
+ jl_l2_fib_key_t key = {
+ .is_collision = 0,
+ .mac_addr.val = 0x1122334455, //mac
+ .fid = 1, //fid
+ .entry_index = 0,
+ };
+
+ jl_l2_fib_config_t config = {
+ .aging = {
+ .is_valid = 1, //valid
+ .is_static = 1, //static
+ },
+ .dest = {
+ .is_unicast = 1, //unicast
+ .port = UTP_PORT5, //dest port
+ .pkt_drop = 0,
+ },
+ };
+
+ // Set stdout to unbuffered mode
+ if (setvbuf(stdout, NULL, _IONBF, 0) != 0) {
+ perror("Failed to set unbuffered mode for stdout");
+ return 1;
+ }
+
+ /* init sdk */
+ jl_switch_init();
+
+ /* set aging time to 300s */
+ jl_l2_aging_time_set(300, L2_AGING_S);
+
+ jl_l2_fib_config_set_auto(&key, &config);
+
+ return 0;
+}
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/example/example_led_oper_mode.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/example/example_led_oper_mode.c
new file mode 100644
index 0000000..96625d1
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/example/example_led_oper_mode.c
@@ -0,0 +1,45 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+#include <stdio.h>
+#include <signal.h>
+#include <string.h>
+#include <stdlib.h>
+
+#include "led.h"
+
+int main(int argc, char *argv[])
+{
+ (void) argc;
+ (void) argv;
+
+ // Set stdout to unbuffered mode
+ if (setvbuf(stdout, NULL, _IONBF, 0) != 0) {
+ perror("Failed to set unbuffered mode for stdout");
+ return 1;
+ }
+
+ /* Use group 1, and the port is Port 0 ~ Port 7*/
+ /* Set blinking rate to 128ms*/
+ /* Set LED mode group 1 to indicate operation in 10M or not */
+ jl_switch_init();
+
+ jl_led_enable_set(LED_GROUP1, ((1 << UTP_PORT0) | (1 << UTP_PORT1) | (1 << UTP_PORT2) \
+ | (1 << UTP_PORT3) | (1 << UTP_PORT4) | (1 << UTP_PORT5) | (1 << UTP_PORT6) | (1 << UTP_PORT7)));
+
+ jl_led_blink_rate_set(LED_BLINKRATE_128MS);
+
+ jl_led_group_config_set(LED_GROUP1, LED_CONFIG_SPD10);
+
+ return 0;
+}
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/example/example_lpd.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/example/example_lpd.c
new file mode 100644
index 0000000..8c5339a
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/example/example_lpd.c
@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+#include <stdio.h>
+#include <signal.h>
+#include <string.h>
+#include <stdlib.h>
+#include <unistd.h>
+
+#include "lpd.h"
+
+
+int main(int argc, char *argv[])
+{
+ (void) argc;
+ (void) argv;
+ jl_port_t port;
+ jl_lpd_config_t lpd_config = {
+ /* TODO a random MAC Address */
+ .src_mac.octet = {0x00, 0x11, 0x22, 0x33, 0x44, 0x55},
+ .eth_type = 0x9988,
+ .op_code = 0x1,
+ .ttl = 15,
+ };
+
+ // Set stdout to unbuffered mode
+ if (setvbuf(stdout, NULL, _IONBF, 0) != 0) {
+ perror("Failed to set unbuffered mode for stdout");
+ return 1;
+ }
+
+ /* init sdk */
+ jl_switch_init();
+
+ /* 1. set loop frame format */
+ jl_lpd_config_set(&lpd_config);
+
+ /* 2. enable loop detection */
+ jl_lpd_enable();
+
+ /* 3. trigger loop detection periodically */
+ while (1) {
+ JL_FOR_EACH_PHY_PORT(port)
+ jl_lpd_trigger_once(port);
+ sleep(1);
+ }
+
+ return 0;
+}
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/example/example_lpd_protect.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/example/example_lpd_protect.c
new file mode 100644
index 0000000..09ca9c5
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/example/example_lpd_protect.c
@@ -0,0 +1,134 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+#include <stdio.h>
+#include <signal.h>
+#include <string.h>
+#include <stdlib.h>
+
+#include "lpd.h"
+#include "stp.h"
+#include "port.h"
+
+typedef struct lpd_status_s {
+ jl_uint8 is_blocked;
+ jl_uint8 is_in_loop;
+ jl_int16 ports_in_loop[SWITCH_PORT_NUM - 1];
+ jl_uint8 ports_in_loop_count;
+} lpd_status_t;
+
+lpd_status_t lpd_status_array[SWITCH_PORT_NUM];
+
+
+int main(int argc, char *argv[])
+{
+ (void) argc;
+ (void) argv;
+ jl_port_t port;
+ jl_port_t port_m;
+ jl_port_t port_in_loop;
+ jl_portmask_t port_mask = 0;
+ jl_port_duplex_t duplex;
+ jl_port_speed_t speed;
+ jl_port_link_status_t link_status;
+ jl_lpd_config_t lpd_config = {
+ /* TODO a random MAC Address */
+ .src_mac.octet = {0x00, 0x11, 0x22, 0x33, 0x44, 0x55},
+ .eth_type = 0x9988,
+ .op_code = 0x1,
+ .ttl = 15
+ };
+
+ // Set stdout to unbuffered mode
+ if (setvbuf(stdout, NULL, _IONBF, 0) != 0) {
+ perror("Failed to set unbuffered mode for stdout");
+ return 1;
+ }
+
+ /* init sdk */
+ jl_switch_init();
+
+ /* clear lpd_status for all ports */
+ memset(lpd_status_array, 0, (sizeof(lpd_status_t)*SWITCH_PORT_NUM));
+
+ /* 1. set loop frame format */
+ jl_lpd_config_set(&lpd_config);
+
+ /* 2. enable loop detection */
+ jl_lpd_enable();
+
+ /* 3. trigger loop detection and block loop ports periodically */
+ while (1) {
+ /*clear when one loop start*/
+ JL_FOR_EACH_PHY_PORT(port) {
+ lpd_status_array[port].is_in_loop = FALSE;
+ lpd_status_array[port].ports_in_loop_count = 0;
+ memset(lpd_status_array[port].ports_in_loop, 0, sizeof(jl_int16)*(SWITCH_PORT_NUM - 1));
+ }
+ /* get port's lpd staus, before that ,the port should be is_in_loop=false and link up */
+ JL_FOR_EACH_PHY_PORT(port) {
+ if (lpd_status_array[port].is_in_loop)
+ continue;
+ jl_port_phy_link_status_get(port, &link_status, &duplex, &speed);
+
+ /*use time out err presents port link down, it is not accurately*/
+ if (-10 == jl_lpd_trigger_once(port)) {
+ if (link_status == PORT_LINKUP && port < 8) {
+ printf("Port %d trigger loop frame time out, pls fix this issue at first.", port);
+ return 0;
+ }
+ continue;
+ }
+
+ jl_lpd_lp_ports_get(&port_mask);
+
+ /*get ports in loop based on port_mask */
+ JL_FOR_EACH_PHY_PORT(port_m) {
+ if (((port_mask >> port_m) & 0x01) == 1) {
+ lpd_status_array[port_m].is_in_loop = TRUE;
+ lpd_status_array[port].ports_in_loop[lpd_status_array[port].ports_in_loop_count] = port_m;
+ lpd_status_array[port].ports_in_loop_count++;
+ }
+ }
+ }
+ /* block port based on lpd staus */
+ JL_FOR_EACH_PHY_PORT(port) {
+ if (lpd_status_array[port].is_in_loop)
+ continue;
+ //it means port is not one port in ports__in_loop, need to clear the blocked status
+ else if (lpd_status_array[port].is_blocked) {
+ jl_stp_port_egress_state_set(port, STP_STATE_FORWARDING);
+ jl_stp_port_ingress_state_set(port, STP_STATE_FORWARDING);
+ lpd_status_array[port].is_blocked = FALSE;
+ }
+ if (lpd_status_array[port].ports_in_loop_count > 0) {
+
+ /* go through the ports in loop */
+ for (int i = 0; i < lpd_status_array[port].ports_in_loop_count; i++) {
+
+ port_in_loop = lpd_status_array[port].ports_in_loop[i];
+
+ if (!lpd_status_array[port_in_loop].is_blocked) {
+ jl_stp_port_egress_state_set(port_in_loop, STP_STATE_BLOCKING);
+ jl_stp_port_ingress_state_set(port_in_loop, STP_STATE_BLOCKING);
+ lpd_status_array[port_in_loop].is_blocked = TRUE;
+ }
+ }
+ }
+ }
+ //sleep(100);
+ }
+ return 0;
+}
+
+
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/example/example_mib_port_cnt.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/example/example_mib_port_cnt.c
new file mode 100644
index 0000000..53b41c7
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/example/example_mib_port_cnt.c
@@ -0,0 +1,101 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+#include <stdio.h>
+#include <signal.h>
+#include <string.h>
+#include <stdlib.h>
+
+#include "jl_base.h"
+#include "mib.h"
+
+int main(int argc, char *argv[])
+{
+ (void) argc;
+ (void) argv;
+
+ /* Set port 0 mib counter mode as read-clear */
+ /* Get number of received valid unicast packets of port 0 */
+ /* Clear all types of mib counter of port 0 */
+ jl_uint64 counter = 0;
+ jl_ret_t ret = JL_ERR_OK;
+ jl_mib_swc_glb_drop_t port_cnt = {0};
+ jl_port_t port = 0;
+ jl_mib_swc_port_drop_t swc_port_cnt = {0};
+
+ // Set stdout to unbuffered mode
+ if (setvbuf(stdout, NULL, _IONBF, 0) != 0) {
+ perror("Failed to set unbuffered mode for stdout");
+ return 1;
+ }
+
+ jl_switch_init();
+
+ jl_mib_port_rc_mode_set(UTP_PORT0, 1);
+
+ jl_mib_port_get(UTP_PORT0, PORT_MIB_TX_PKT_UC_CNT, &counter);
+
+ jl_mib_port_clear_all(UTP_PORT0);
+
+ ret = jl_mib_swc_global_drop_get(&port_cnt);
+ if (ret)
+ printf("jl_mib_swc_global_drop_get return err 0x%x\n", ret);
+ printf("buf_overflow_drop:%d\n", port_cnt.buf_overflow_drop);
+ printf("empty_mask_drop:%d\n", port_cnt.empty_mask_drop);
+ printf("epp_pm_drop:%d\n", port_cnt.epp_pm_drop);
+ printf("ingress_config_acl_drop:%d\n", port_cnt.ingress_config_acl_drop);
+ printf("ingress_res_manager_drop:%d\n", port_cnt.ingress_res_manager_drop);
+ printf("ingress_stp_block_drop:%d\n", port_cnt.ingress_stp_block_drop);
+ printf("ingress_stp_learn_drop:%d\n", port_cnt.ingress_stp_learn_drop);
+ printf("ingress_stp_listen_drop:%d\n", port_cnt.ingress_stp_listen_drop);
+ printf("ipp_broken_pkt:%d\n", port_cnt.ipp_broken_pkt);
+ printf("ipp_pm_drop:%d\n", port_cnt.ipp_pm_drop);
+ printf("l2_flag_drop:%d\n", port_cnt.l2_lookup_drop);
+ printf("max_allow_vlan_drop:%d\n", port_cnt.max_allow_vlan_drop);
+ printf("mini_allow_vlan_drop:%d\n", port_cnt.mini_allow_vlan_drop);
+ printf("re_queue_overflow_drop:%d\n", port_cnt.re_queue_overflow_drop);
+ printf("unknown_ingress_drop:%d\n", port_cnt.unknown_ingress_drop);
+ printf("vlan_member_drop:%d\n", port_cnt.vlan_member_drop);
+
+ for (port = 0; port < JL_PORT_MAX; port++) {
+ printf("=========port %d:==========\n", port);
+ memset(&swc_port_cnt, 0, sizeof(swc_port_cnt));
+ ret = jl_mib_swc_port_drop_get(port, &swc_port_cnt);
+ if (ret)
+ printf("jl_mib_swc_port_drop_get return err 0x%x\n", ret);
+ printf("drain_port_drop:%d\n", swc_port_cnt.drain_port_drop);
+ printf("egress_port_dis_drop:%d\n", swc_port_cnt.egress_port_dis_drop);
+ printf("egress_res_manage_drop:%d\n", swc_port_cnt.egress_res_manage_drop);
+ printf("egress_stp_drop:%d\n", swc_port_cnt.egress_stp_drop);
+ printf("mac_rx_broken_pkt:%d\n", swc_port_cnt.mac_rx_broken_pkt);
+ printf("mac_rx_short_pkt_drop:%d\n", swc_port_cnt.mac_rx_short_pkt_drop);
+ printf("mbsc_drop:%d\n", swc_port_cnt.mbsc_drop);
+ printf("ps_err_overflow:%d\n", swc_port_cnt.ps_err_overflow);
+ printf("ps_err_underrun:%d\n", swc_port_cnt.ps_err_underrun);
+ printf("queue_off_drop:%d\n", swc_port_cnt.queue_off_drop);
+ printf("sp_overflow_drop:%d\n", swc_port_cnt.sp_overflow_drop);
+ printf("unknown_egress_drop:%d\n", swc_port_cnt.unknown_egress_drop);
+ printf("=========end==========\n");
+ }
+
+ ret = jl_mib_swc_global_drop_clear();
+ if (ret)
+ printf("jl_mib_swc_global_drop_clear return err 0x%x\n", ret);
+ for (port = 0; port < JL_PORT_MAX; port++) {
+ printf("=========port %d:==========\n", port);
+ ret = jl_mib_swc_port_drop_clear(port);
+ if (ret)
+ printf("jl_mib_swc_port_drop_clear return err 0x%x\n", ret);
+ }
+ return 0;
+}
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/example/example_mirror_port_in.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/example/example_mirror_port_in.c
new file mode 100644
index 0000000..97c1626
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/example/example_mirror_port_in.c
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+#include <stdio.h>
+#include <signal.h>
+#include <string.h>
+#include <stdlib.h>
+
+#include "mirror.h"
+
+int main(int argc, char *argv[])
+{
+ (void) argc;
+ (void) argv;
+
+
+ // Set stdout to unbuffered mode
+ if (setvbuf(stdout, NULL, _IONBF, 0) != 0) {
+ perror("Failed to set unbuffered mode for stdout");
+ return 1;
+ }
+
+ /* init sdk */
+ jl_switch_init();
+
+ /* 1. set port input mirror */
+ jl_mirror_input_mr_set(UTP_PORT0, UTP_PORT2);
+
+ return 0;
+}
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/example/example_mirror_port_out.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/example/example_mirror_port_out.c
new file mode 100644
index 0000000..654254b
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/example/example_mirror_port_out.c
@@ -0,0 +1,39 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+#include <stdio.h>
+#include <signal.h>
+#include <string.h>
+#include <stdlib.h>
+
+#include "mirror.h"
+
+int main(int argc, char *argv[])
+{
+ (void) argc;
+ (void) argv;
+
+ // Set stdout to unbuffered mode
+ if (setvbuf(stdout, NULL, _IONBF, 0) != 0) {
+ perror("Failed to set unbuffered mode for stdout");
+ return 1;
+ }
+
+ /* init sdk */
+ jl_switch_init();
+
+ /* 1. set port output mirror */
+ jl_mirror_output_mr_set(UTP_PORT2, UTP_PORT3);
+
+ return 0;
+}
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/example/example_port_mac_port.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/example/example_port_mac_port.c
new file mode 100644
index 0000000..ae725a3
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/example/example_port_mac_port.c
@@ -0,0 +1,55 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+#include <stdio.h>
+#include <signal.h>
+#include <string.h>
+#include <stdlib.h>
+
+#include "jl_base.h"
+#include "port.h"
+
+int main(int argc, char *argv[])
+{
+ (void) argc;
+ (void) argv;
+
+ jl_port_ext_mac_ability_t ability;
+ jl_port_mac_ability_t cur_ability;
+
+ // Set stdout to unbuffered mode
+ if (setvbuf(stdout, NULL, _IONBF, 0) != 0) {
+ perror("Failed to set unbuffered mode for stdout");
+ return 1;
+ }
+
+ jl_switch_init();
+
+ /* Force the MAC of EXT_PORT 1 working with 100F */
+ /* and Symmetric PAUSE flow control abilities */
+ memset(&ability, 0x00, sizeof(jl_port_ext_mac_ability_t));
+ jl_port_mac_force_link_ext_get(EXT_PORT1, &ability);
+ ability.force_mode = 1;
+ ability.speed = 1;
+ ability.duplex = 1;
+ ability.link = 1;
+ ability.tx_pause = 1;
+ ability.rx_pause = 1;
+ jl_port_mac_force_link_ext_set(EXT_PORT1, &ability);
+
+ /* Get MAC link status of UTP PORT 1 */
+ memset(&cur_ability, 0x00, sizeof(jl_port_mac_ability_t));
+ jl_port_mac_status_get(UTP_PORT1, &cur_ability);
+
+ return 0;
+}
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/example/example_port_phy_port.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/example/example_port_phy_port.c
new file mode 100644
index 0000000..8bb701e
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/example/example_port_phy_port.c
@@ -0,0 +1,112 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+#include <stdio.h>
+#include <signal.h>
+#include <string.h>
+#include <stdlib.h>
+
+#include "jl_base.h"
+#include "port.h"
+
+int main(int argc, char *argv[])
+{
+ (void) argc;
+ (void) argv;
+ int ret = 0;
+ jl_port_t port;
+
+ jl_port_phy_ability_t ability;
+ jl_port_speed_t speed;
+ jl_port_duplex_t duplex;
+ jl_port_link_status_t linkst;
+
+ // Set stdout to unbuffered mode
+ if (setvbuf(stdout, NULL, _IONBF, 0) != 0) {
+ perror("Failed to set unbuffered mode for stdout");
+ return 1;
+ }
+
+ jl_switch_init();
+
+ /* set PHY 1 with Auto negotiation, 100F,10F */
+ /* and Symmetric PAUSE flow control abilities */
+ memset(&ability, 0x00, sizeof(jl_port_phy_ability_t));
+ ability.full_duplex_100 = 1;
+ ability.full_duplex_10 = 1;
+ ability.flow_control = 1;
+ ability.asym_flow_control = 1;
+ ret = jl_port_phy_autoneg_ability_set(UTP_PORT1, &ability);
+ if (ret)
+ printf(" UTP_PORT1 jl_port_phy_autoneg_ability_set ret err %d\n", ret);
+
+ /* set PHY 2 with Auto negotiation, 100h, without flow control */
+ memset(&ability, 0x00, sizeof(jl_port_phy_ability_t));
+ ability.half_duplex_100 = 1;
+ ret = jl_port_phy_autoneg_ability_set(UTP_PORT2, &ability);
+ if (ret)
+ printf("UTP_PORT2 jl_port_phy_autoneg_ability_set ret err %d\n", ret);
+
+ /* set PHY 3 with Auto negotiation, 10h, without flow control */
+ memset(&ability, 0x00, sizeof(jl_port_phy_ability_t));
+ ability.half_duplex_10 = 1;
+ ret = jl_port_phy_autoneg_ability_set(UTP_PORT3, &ability);
+ if (ret)
+ printf("UTP_PORT3 jl_port_phy_autoneg_ability_set ret err %d\n", ret);
+
+ JL_FOR_EACH_PHY_PORT(port) {
+ /* Get ability of PHY port */
+ memset(&ability, 0x00, sizeof(jl_port_phy_ability_t));
+ ret = jl_port_phy_autoneg_ability_get(port, &ability);
+ if (ret)
+ printf("jl_port_phy_autoneg_ability_get ret err %d\n", ret);
+ printf("jl_port_phy_autoneg_ability_get port %d\n", port);
+ printf("auto_negotiation is %d\n", ability.auto_negotiation);
+ printf("half_duplex_10 is %d\n", ability.half_duplex_10);
+ printf("full_duplex_10 is %d\n", ability.full_duplex_10);
+ printf("half_duplex_100 is %d\n", ability.half_duplex_100);
+ printf("full_duplex_100 is %d\n", ability.full_duplex_100);
+ printf("flow_control is %d\n", ability.flow_control);
+ printf("asym_flow_control is %d\n", ability.asym_flow_control);
+ }
+ /* Get PHY link status of UTP PORT */
+
+ port_udelay(2000000); //wait 2s
+ JL_FOR_EACH_PHY_PORT(port) {
+ speed = 0;
+ duplex = 0;
+ linkst = 0;
+ ret = jl_port_phy_link_status_get(port, &linkst, &duplex, &speed);
+ if (ret)
+ printf("jl_port_phy_link_status_get ret err %d\n", ret);
+
+ printf("port%d linkst is %d,duplex is %d,speed is %d\n", port, linkst, duplex, speed);
+ }
+
+ jl_port_mac_ability_t cur_ability = {0};
+
+ JL_FOR_EACH_PHY_PORT(port) {
+ memset(&cur_ability, 0x00, sizeof(jl_port_mac_ability_t));
+ ret = jl_port_mac_status_get(port, &cur_ability);
+ if (ret)
+ printf("jl_port_mac_status_get ret err %d\n", ret);
+ printf("port%d force_mode is %d\n", port, cur_ability.force_mode);
+ printf("port%d speed is %d\n", port, cur_ability.speed);
+ printf("port%d duplex is %d\n", port, cur_ability.duplex);
+ printf("port%d link is %d\n", port, cur_ability.link);
+ printf("port%d force_fc_en is %d\n", port, cur_ability.force_fc_en);
+ printf("port%d tx_pause is %d\n", port, cur_ability.tx_pause);
+ printf("port%d rx_pause is %d\n", port, cur_ability.rx_pause);
+ }
+ return 0;
+}
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/example/example_qos_dscp_to_queue_map.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/example/example_qos_dscp_to_queue_map.c
new file mode 100644
index 0000000..f9118c4
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/example/example_qos_dscp_to_queue_map.c
@@ -0,0 +1,66 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+#include <stdio.h>
+#include <signal.h>
+#include <string.h>
+#include <stdlib.h>
+
+#include "jl_base.h"
+#include "qos.h"
+
+int main(int argc, char *argv[])
+{
+ (void) argc;
+ (void) argv;
+ jl_api_ret_t ret = JL_ERR_OK;
+ jl_uint32 dscp[4] = {0, 10, 20, 63};
+ jl_uint32 queue[4] = {0, 1, 2, 3};
+ jl_port_t port[4] = {UTP_PORT0, UTP_PORT1, UTP_PORT2, UTP_PORT3};
+ jl_uint32 i = 0;
+
+ // Set stdout to unbuffered mode
+ if (setvbuf(stdout, NULL, _IONBF, 0) != 0) {
+ perror("Failed to set unbuffered mode for stdout");
+ return 1;
+ }
+
+ ret = jl_switch_init();
+ if (ret) {
+ /*throw exception*/
+ return ret;
+ }
+
+ ret = jl_qos_init();
+ if (ret) {
+ /*throw exception*/
+ return ret;
+ }
+
+ for (i = 0; i < 4; i++) {
+ ret = jl_qos_l3_queue_assign_enable_set(port[i], ENABLED);
+ if (ret) {
+ /*throw exception*/
+ return ret;
+ }
+
+ ret = jl_qos_l3_dscp2queue_map_set(dscp[i], queue[i]);
+ if (ret) {
+ /*throw exception*/
+ return ret;
+ }
+ }
+ return 0;
+}
+
+
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/example/example_qos_enqueue.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/example/example_qos_enqueue.c
new file mode 100644
index 0000000..4242061
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/example/example_qos_enqueue.c
@@ -0,0 +1,80 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+#include <stdio.h>
+#include <signal.h>
+#include <string.h>
+#include <stdlib.h>
+
+#include "jl_base.h"
+#include "qos.h"
+
+int main(int argc, char *argv[])
+{
+ (void) argc;
+ (void) argv;
+ jl_api_ret_t ret = JL_ERR_OK;
+ jl_port_t port[4] = {UTP_PORT0, UTP_PORT1, UTP_PORT2, EXT_PORT0};
+ jl_uint32 dscp[4] = {0, 15, 33, 63};
+ jl_uint32 queue[4] = {0, 1, 2, 3};
+ jl_uint8 i;
+// jl_uint8 enmask;
+
+ // Set stdout to unbuffered mode
+ if (setvbuf(stdout, NULL, _IONBF, 0) != 0) {
+ perror("Failed to set unbuffered mode for stdout");
+ return 1;
+ }
+
+ ret = jl_switch_init();
+ if (ret) {
+ /*throw exception*/
+ return ret;
+ }
+
+ ret = jl_qos_init();
+ if (ret) {
+ /*throw exception*/
+ return ret;
+ }
+
+// enmask = 1;
+
+ for (i = 0; i < 4; i++) {
+ ret = jl_qos_l3_queue_assign_enable_set(port[i], ENABLED);
+ if (ret) {
+ /*throw exception*/
+ return ret;
+ }
+
+ ret = jl_qos_l3_dscp2queue_map_set(dscp[i], queue[i]);
+ if (ret) {
+ /*throw exception*/
+ return ret;
+ }
+
+// ret = jl_qos_enqueue_set(port[i], enmask);
+// if (ret)
+// return ret;
+
+// ret = jl_qos_enqueue_get(port[i], &enmask);
+// if (ret)
+// return ret;
+
+// enmask <<= 1;
+ }
+
+ return 0;
+}
+
+
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/example/example_qos_exp_to_queue_map.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/example/example_qos_exp_to_queue_map.c
new file mode 100644
index 0000000..3febcc3
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/example/example_qos_exp_to_queue_map.c
@@ -0,0 +1,67 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+#include <stdio.h>
+#include <signal.h>
+#include <string.h>
+#include <stdlib.h>
+
+#include "jl_base.h"
+#include "qos.h"
+
+int main(int argc, char *argv[])
+{
+ (void) argc;
+ (void) argv;
+ jl_api_ret_t ret = JL_ERR_OK;
+ jl_uint32 exp[8] = {7, 6, 5, 4, 3, 2, 1, 0};
+ jl_uint32 queue[8] = {0, 1, 2, 3, 3, 2, 1, 0};
+ jl_port_t port[4] = {UTP_PORT0, UTP_PORT1, UTP_PORT2, UTP_PORT3};
+ jl_uint32 i = 0;
+
+ // Set stdout to unbuffered mode
+ if (setvbuf(stdout, NULL, _IONBF, 0) != 0) {
+ perror("Failed to set unbuffered mode for stdout");
+ return 1;
+ }
+
+ ret = jl_switch_init();
+ if (ret) {
+ /*throw exception*/
+ return ret;
+ }
+
+ ret = jl_qos_init();
+ if (ret) {
+ /*throw exception*/
+ return ret;
+ }
+
+ for (i = 0; i < 4; i++) {
+ ret = jl_qos_l3_queue_assign_enable_set(port[i], ENABLED);
+ if (ret) {
+ /*throw exception*/
+ return ret;
+ }
+ }
+ for (i = 0; i < 8; i++) {
+ ret = jl_qos_l3_exp2queue_map_set(exp[i], queue[i]);
+ if (ret) {
+ /*throw exception*/
+ return ret;
+ }
+ }
+ return 0;
+}
+
+
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/example/example_qos_pcp_to_queue_map.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/example/example_qos_pcp_to_queue_map.c
new file mode 100644
index 0000000..fc1df53
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/example/example_qos_pcp_to_queue_map.c
@@ -0,0 +1,66 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+#include <stdio.h>
+#include <signal.h>
+#include <string.h>
+#include <stdlib.h>
+
+#include "jl_base.h"
+#include "qos.h"
+
+int main(int argc, char *argv[])
+{
+ (void) argc;
+ (void) argv;
+ jl_api_ret_t ret = JL_ERR_OK;
+ jl_uint32 i = 0;
+ jl_uint32 pcp[8] = {7, 6, 5, 4, 3, 2, 1, 0};
+ jl_uint32 queue[8] = {0, 1, 2, 3, 3, 2, 1, 0};
+ jl_port_t port[8] = {UTP_PORT0, UTP_PORT1, UTP_PORT2, UTP_PORT3, UTP_PORT4, UTP_PORT5, UTP_PORT6, UTP_PORT7};
+
+ // Set stdout to unbuffered mode
+ if (setvbuf(stdout, NULL, _IONBF, 0) != 0) {
+ perror("Failed to set unbuffered mode for stdout");
+ return 1;
+ }
+
+ ret = jl_switch_init();
+ if (ret) {
+ /*throw exception*/
+ return ret;
+ }
+
+ ret = jl_qos_init();
+ if (ret) {
+ /*throw exception*/
+ return ret;
+ }
+
+ for (i = 0; i < 8; i++) {
+ ret = jl_qos_l2_port_pcp_set(port[i], pcp[i]);
+ if (ret) {
+ /*throw exception*/
+ return ret;
+ }
+
+ ret = jl_qos_l2_pcp2queue_map_set(pcp[i], queue[i]);
+ if (ret) {
+ /*throw exception*/
+ return ret;
+ }
+ }
+ return 0;
+}
+
+
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/example/example_qos_schedule.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/example/example_qos_schedule.c
new file mode 100644
index 0000000..10e1c7f
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/example/example_qos_schedule.c
@@ -0,0 +1,98 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+#include <stdio.h>
+#include <signal.h>
+#include <string.h>
+#include <stdlib.h>
+
+#include "jl_base.h"
+#include "qos.h"
+
+int main(int argc, char *argv[])
+{
+ (void) argc;
+ (void) argv;
+ jl_api_ret_t ret = JL_ERR_OK;
+ jl_port_t port[4] = {UTP_PORT0, UTP_PORT1, UTP_PORT2, EXT_PORT0};
+ jl_uint32 pcp[4] = {0, 1, 2, 3};
+ jl_uint32 queue[4] = {0, 1, 2, 3};
+ jl_uint32 queue_weight[4] = {1, 2, 4, 8};
+ jl_qos_schedule_t t_sche;
+ jl_uint8 i;
+
+ // Set stdout to unbuffered mode
+ if (setvbuf(stdout, NULL, _IONBF, 0) != 0) {
+ perror("Failed to set unbuffered mode for stdout");
+ return 1;
+ }
+
+ ret = jl_switch_init();
+ if (ret) {
+ /*throw exception*/
+ return ret;
+ }
+
+ ret = jl_qos_init();
+ if (ret) {
+ /*throw exception*/
+ return ret;
+ }
+
+ /*DWRR scheduling based on PCP assigned queue*/
+ for (i = 0; i < 4; i++) {
+ /*set port pcp*/
+ ret = jl_qos_l2_port_pcp_set(port[i], pcp[i]);
+ if (ret) {
+ /*throw exception*/
+ return ret;
+ }
+ /*map pcp to queue*/
+ ret = jl_qos_l2_pcp2queue_map_set(pcp[i], queue[i]);
+ if (ret) {
+ /*throw exception*/
+ return ret;
+ }
+ /*set queue dwrr weight*/
+ /*only when the queue has joined in DWRR scheduler it's weight value can be effective*/
+ ret = jl_qos_queue_dwrr_set(port[i], queue[i], queue_weight[i]);
+ if (ret) {
+ /*throw exception*/
+ return ret;
+ }
+ }
+ /*queue 0、3 join in SP, queue 1、2 join in DWRR*/
+ t_sche.type[0] = QOS_SCHE_SP;
+ t_sche.type[1] = QOS_SCHE_DWRR;
+ t_sche.type[2] = QOS_SCHE_DWRR;
+ t_sche.type[3] = QOS_SCHE_SP;
+
+ for (i = 0; i < 4; i++)
+ {
+ /*set schedule type*/
+ ret = jl_qos_schedule_set(port[i], &t_sche);
+ if (ret)
+ return ret;
+ }
+
+ for (i = 0; i < 4; i++)
+ {
+ ret = jl_qos_schedule_get(port[i], &t_sche);
+ if (ret)
+ return ret;
+ }
+
+ return 0;
+}
+
+
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/example/example_storm_rate_ctrl.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/example/example_storm_rate_ctrl.c
new file mode 100644
index 0000000..d840574
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/example/example_storm_rate_ctrl.c
@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+#include <stdio.h>
+#include <signal.h>
+#include <string.h>
+#include <stdlib.h>
+
+#include "jl_base.h"
+#include "storm.h"
+
+int main(int argc, char *argv[])
+{
+ (void) argc;
+ (void) argv;
+
+
+ // Set stdout to unbuffered mode
+ if (setvbuf(stdout, NULL, _IONBF, 0) != 0) {
+ perror("Failed to set unbuffered mode for stdout");
+ return 1;
+ }
+
+ /* Enable Strom control on port 0 for all kind of packet.*/
+ /* Set the control rate of broadcast storm on port 0 to 5Mbps */
+ /* Set the control rate of multicast storm on port 0 to 2000pps */
+ jl_switch_init();
+
+ jl_storm_control_enable_set(UTP_PORT0, STORM_TYPE_BROADCAST, 1);
+
+ jl_storm_control_enable_set(UTP_PORT0, STORM_TYPE_MULTICAST, 1);
+
+ jl_storm_control_enable_set(UTP_PORT0, STORM_TYPE_UNKNOWN, 1);
+
+ jl_storm_control_rate_set(UTP_PORT0, STORM_TYPE_BROADCAST, RATE_UNIT_KBPS, 5000);
+
+ jl_storm_control_rate_set(UTP_PORT0, STORM_TYPE_MULTICAST, RATE_UNIT_PPS, 2000);
+
+ return 0;
+}
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/example/example_vlan_mtu.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/example/example_vlan_mtu.c
new file mode 100644
index 0000000..46d4e6d
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/example/example_vlan_mtu.c
@@ -0,0 +1,142 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+#include <stdio.h>
+#include <signal.h>
+#include <string.h>
+#include <stdlib.h>
+
+#include "vlan.h"
+
+#define ARRAY_SIZE(xs) (sizeof(xs) / sizeof(xs[0]))
+
+static int g_exit;
+
+static void sig_handle(int sig)
+{
+ (void) sig;
+ g_exit = 1;
+}
+
+static void clear_window(void)
+{
+ printf("\033c");
+}
+
+
+static void mtu_vlan_test(void)
+{
+
+ /* 1. set Port VID: port0_pvid=100, port1_pvid=200 */
+ jl_port_vlan_set(UTP_PORT0, 100);
+ jl_port_vlan_set(UTP_PORT1, 200);
+
+ /* 2. set VLAN Assignment: port0=port based; port1=port based; port2=packet based */
+ jl_port_vlan_assignment_set(UTP_PORT0, VLAN_ASSIGN_PORT);
+ jl_port_vlan_assignment_set(UTP_PORT1, VLAN_ASSIGN_PORT);
+ jl_port_vlan_assignment_set(UTP_PORT2, VLAN_ASSIGN_PKT);
+
+ /* 3. only accept untagged frames on port0 & port1, tagged frames from port0 & port1 will be dropped. port2 accepts all type frames */
+ jl_vlan_acpt_frmt_set(UTP_PORT0, VLAN_ACCEPT_FRAME_TYPE_UNTAG_ONLY);
+ jl_vlan_acpt_frmt_set(UTP_PORT1, VLAN_ACCEPT_FRAME_TYPE_UNTAG_ONLY);
+ jl_vlan_acpt_frmt_set(UTP_PORT2, VLAN_ACCEPT_FRAME_TYPE_ALL);
+
+ /* 4. set port ingress direction VLAN Operation: port0=push; port1=push; port2=pop */
+ jl_port_vlan_operation_set(UTP_PORT0, PORT_DIR_INGRESS, VLAN_OPERATION_PUSH);
+ jl_port_vlan_operation_set(UTP_PORT1, PORT_DIR_INGRESS, VLAN_OPERATION_PUSH);
+ jl_port_vlan_operation_set(UTP_PORT2, PORT_DIR_INGRESS, VLAN_OPERATION_POP);
+
+ /* 5. set port egress direction VLAN Operation: port0=remove all; port1=remove all;*/
+ jl_port_vlan_operation_set(UTP_PORT0, PORT_DIR_EGRESS, VLAN_OPERATION_REMOVE_ALL);
+ jl_port_vlan_operation_set(UTP_PORT1, PORT_DIR_EGRESS, VLAN_OPERATION_REMOVE_ALL);
+
+ /* 6. create VLAN 100 for port0 & port2; create VLAN 200 for port1 & port2; both are SVL */
+ struct vlan_config vlan_cfg0 = {0};
+ struct vlan_config vlan_cfg1 = {0};
+
+ vlan_cfg0.valid = 1;
+ vlan_cfg0.vid = 100;
+ vlan_cfg0.port_mask = (1 << UTP_PORT0) | (1 << UTP_PORT2);
+ vlan_cfg0.fid = 0;
+
+ vlan_cfg1.valid = 1;
+ vlan_cfg1.vid = 200;
+ vlan_cfg1.port_mask = (1 << UTP_PORT1) | (1 << UTP_PORT2);
+ vlan_cfg1.fid = 0;
+
+ jl_vlan_set(1, &vlan_cfg0);
+ jl_vlan_set(2, &vlan_cfg1);
+}
+
+int main(int argc, char *argv[])
+{
+ (void) argc;
+ (void) argv;
+ char console_input[128] = {0};
+ int cmd_index = -1;
+ jl_error_code_t ret;
+
+ signal(SIGINT, sig_handle);
+ signal(SIGTERM, sig_handle);
+
+ // Set stdout to unbuffered mode
+ if (setvbuf(stdout, NULL, _IONBF, 0) != 0) {
+ perror("Failed to set unbuffered mode for stdout");
+ return 1;
+ }
+
+ ret = jl_switch_init();
+ if (ret) {
+ printf("JL SWITCH init fail\n");
+ return -1;
+ }
+ /* init vlan */
+ ret = jl_vlan_init();
+ if (ret) {
+ printf("JL vlan init fail\n");
+ return -1;
+ }
+
+ while (!g_exit) {
+ printf("\n======JL SWITCH: %s=======\n", argv[0]);
+ printf("1. MTU Vlan test\n");
+ printf("Type a number or 'q' to exit\n");
+
+ fgets(console_input, 127, stdin);
+ if (!strncmp(console_input, "q", 1))
+ goto exit;
+ else
+ cmd_index = atoi(console_input);
+
+ clear_window();
+
+ switch (cmd_index) {
+ case 1:
+ mtu_vlan_test();
+ break;
+ default:
+ printf("Unknown input message\n");
+ break;
+ }
+
+ (void)getchar();
+
+ clear_window();
+ };
+
+exit:
+ jl_switch_deinit();
+
+ return 0;
+}
+
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/example/example_vlan_table.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/example/example_vlan_table.c
new file mode 100644
index 0000000..855380d
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/example/example_vlan_table.c
@@ -0,0 +1,219 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+#include <stdio.h>
+#include <signal.h>
+#include <string.h>
+#include <stdlib.h>
+
+#include "vlan.h"
+
+#define ARRAY_SIZE(xs) (sizeof(xs) / sizeof(xs[0]))
+
+static int g_exit;
+
+static void sig_handle(int sig)
+{
+ (void) sig;
+ g_exit = 1;
+}
+
+static void clear_window(void)
+{
+ printf("\033c");
+}
+
+
+static void vlan_table_test(void)
+{
+ struct vlan_config vlan_cfg = {0};
+ struct vlan_config vlan_cfg_tmp = {0};
+ jl_uint32 vlan_table_index = 0;
+ jl_api_ret_t ret = 0;
+
+ /* init vlan */
+ ret = jl_vlan_init();
+ if (ret != JL_ERR_OK) {
+ printf("JL vlan init fail\n");
+ return;
+ }
+
+ for (vlan_table_index = 1; vlan_table_index <= 5; vlan_table_index++)
+ {
+ memset(&vlan_cfg, 0, sizeof(vlan_cfg));
+ vlan_cfg.valid = 1;
+ vlan_cfg.vid = 100 + vlan_table_index;
+ vlan_cfg.port_mask = (1 << UTP_PORT0) | (1 << UTP_PORT1) | (1 << UTP_PORT2);
+ vlan_cfg.fid = 0;
+ vlan_cfg.operation = vlan_table_index;
+ if (vlan_cfg.operation == VLAN_OPERATION_SWAP) {
+ vlan_cfg.vid_sel = VLANID_INHERIT_FROM_TABLE_VALUE;
+ vlan_cfg.new_vid = 200 + vlan_table_index;
+ } else if (vlan_cfg.operation == VLAN_OPERATION_PUSH) {
+ vlan_cfg.vid_sel = VLANID_INHERIT_FROM_ORIGINAL_OUTERMOST;
+ vlan_cfg.new_vid = 200 + vlan_table_index;
+ }
+
+ ret = jl_vlan_set(vlan_table_index, &vlan_cfg);
+ if (ret != JL_ERR_OK) {
+ printf("jl_vlan_set fail, index %d return %d!\n", vlan_table_index, ret);
+ }
+
+ memset(&vlan_cfg_tmp, 0, sizeof(vlan_cfg_tmp));
+ ret = jl_vlan_get(vlan_table_index, &vlan_cfg_tmp);
+ if (ret != JL_ERR_OK) {
+ printf("jl_vlan_get fail, index %d return %d!\n", vlan_table_index, ret);
+ }
+ else {
+ printf("vlan table entry %d: valid %d, vlanid %d, portmask 0x%x, fid %d, operation %d, vid_sel %d, new_vid %d.\n",\
+ vlan_table_index, vlan_cfg_tmp.valid, vlan_cfg_tmp.vid, vlan_cfg_tmp.port_mask, \
+ vlan_cfg_tmp.fid, vlan_cfg_tmp.operation, vlan_cfg_tmp.vid_sel, vlan_cfg_tmp.new_vid);
+ }
+ }
+ return;
+}
+
+/* example for trunk port
+if pkt vlan tag == default vid, then need to remove vlan tag to transmit;
+if pkt vlan tag != default vid, then transmit directly.*/
+static void vlan_trunk_tx_test(void)
+{
+ struct vlan_config vlan_cfg0 = {0};
+ struct vlan_config vlan_cfg1 = {0};
+ struct vlan_config vlan_cfg_tmp = {0};
+ jl_uint32 vlan_table_index = 0;
+ jl_api_ret_t ret = 0;
+
+ ret = jl_vlan_init();
+ if (ret != JL_ERR_OK) {
+ printf("JL vlan init fail\n");
+ return;
+ }
+
+ /* 1. set utp_port0 as vlan trunk port, default vid=3 */
+ jl_port_vlan_set(UTP_PORT0, 3);
+ jl_port_vlan_assignment_set(UTP_PORT0, VLAN_ASSIGN_PKT);
+ jl_vlan_acpt_frmt_set(UTP_PORT0, VLAN_ACCEPT_FRAME_TYPE_ALL);
+
+ /* 2. set vlan 3 members {UTP_PORT0, UTP_PORT1, UTP_PORT2} and vlan operation = remove all*/
+ vlan_cfg0.valid = 1;
+ vlan_cfg0.vid = 3;
+ vlan_cfg0.port_mask = (1 << UTP_PORT1) | (1 << UTP_PORT2) | (1 << UTP_PORT0);
+ vlan_cfg0.operation = VLAN_OPERATION_REMOVE_ALL;
+ vlan_table_index = 1;
+ ret = jl_vlan_set(vlan_table_index, &vlan_cfg0);
+ if (ret != JL_ERR_OK) {
+ printf("jl_vlan_set fail, index %d return %d!\n", vlan_table_index, ret);
+ }
+
+ memset(&vlan_cfg_tmp, 0, sizeof(vlan_cfg_tmp));
+ ret = jl_vlan_get(vlan_table_index, &vlan_cfg_tmp);
+ if (ret == JL_ERR_OK) {
+ printf("vlan table entry %d: valid %d, vlanid %d, portmask 0x%x, fid %d, operation %d, vid_sel %d, new_vid %d.\n",\
+ vlan_table_index, vlan_cfg_tmp.valid, vlan_cfg_tmp.vid, vlan_cfg_tmp.port_mask, \
+ vlan_cfg_tmp.fid, vlan_cfg_tmp.operation, vlan_cfg_tmp.vid_sel, vlan_cfg_tmp.new_vid);
+ } else {
+ printf("jl_vlan_get fail, index %d return %d!\n", vlan_table_index, ret);
+ }
+
+ /* 3. set vlan 4 members {UTP_PORT0, UTP_PORT1}*/
+ vlan_cfg1.valid = 1;
+ vlan_cfg1.vid = 4;
+ vlan_cfg1.port_mask = (1 << UTP_PORT0) | (1 << UTP_PORT1);
+ vlan_table_index = 2;
+ ret = jl_vlan_set(vlan_table_index, &vlan_cfg1);
+ if (ret != JL_ERR_OK) {
+ printf("jl_vlan_set fail, index %d return %d!\n", vlan_table_index, ret);
+ }
+
+ memset(&vlan_cfg_tmp, 0, sizeof(vlan_cfg_tmp));
+ ret = jl_vlan_get(vlan_table_index, &vlan_cfg_tmp);
+ if (ret == JL_ERR_OK) {
+ printf("vlan table entry %d: valid %d, vlanid %d, portmask 0x%x, fid %d, operation %d, vid_sel %d, new_vid %d.\n",\
+ vlan_table_index, vlan_cfg_tmp.valid, vlan_cfg_tmp.vid, vlan_cfg_tmp.port_mask, \
+ vlan_cfg_tmp.fid, vlan_cfg_tmp.operation, vlan_cfg_tmp.vid_sel, vlan_cfg_tmp.new_vid);
+ } else {
+ printf("jl_vlan_get fail, index %d return %d!\n", vlan_table_index, ret);
+ }
+ return;
+}
+
+int main(int argc, char *argv[])
+{
+ (void) argc;
+ (void) argv;
+ char console_input[128] = {0};
+ int cmd_index = -1;
+ jl_error_code_t ret;
+ char *pstr = NULL;
+
+ signal(SIGINT, sig_handle);
+ signal(SIGTERM, sig_handle);
+
+ // Set stdout to unbuffered mode
+ if (setvbuf(stdout, NULL, _IONBF, 0) != 0) {
+ perror("Failed to set unbuffered mode for stdout");
+ return 1;
+ }
+
+ ret = jl_switch_init();
+ if (ret) {
+ printf("JL SWITCH init fail\n");
+ return -1;
+ }
+ /* init vlan */
+ ret = jl_vlan_init();
+ if (ret) {
+ printf("JL vlan init fail\n");
+ return -1;
+ }
+
+ while (!g_exit) {
+ printf("\n======JL SWITCH: %s=======\n", argv[0]);
+ printf("1. vlan_table_test \n");
+ printf("2. vlan_trunk_tx_test \n");
+ printf("Type a number or 'q' to exit\n");
+
+ pstr = fgets(console_input, 127, stdin);
+ if (pstr == NULL)
+ continue;
+ if (!strncmp(console_input, "q", 1))
+ goto exit;
+ else
+ cmd_index = atoi(console_input);
+
+ clear_window();
+
+ switch (cmd_index) {
+ case 1:
+ vlan_table_test();
+ break;
+ case 2:
+ vlan_trunk_tx_test();
+ break;
+ default:
+ printf("Unknown input message\n");
+ break;
+ }
+
+ (void)getchar();
+
+ clear_window();
+ };
+
+exit:
+ jl_switch_deinit();
+
+ return 0;
+}
+
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/acl.h b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/acl.h
new file mode 100644
index 0000000..5c3a9a7
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/acl.h
@@ -0,0 +1,138 @@
+/**
+ * @file acl.h
+ * @brief ACL
+ */
+
+/**
+ *
+ * @defgroup acl_group ACL
+ * @{
+ */
+
+/**
+ * @example example_acl_set_rule.c
+ */
+
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+
+#ifndef __JL_API_ACL_H__
+#define __JL_API_ACL_H__
+
+#include "jl_base.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @struct jl_acl_rule_s
+ * @brief ACL rules.
+ */
+struct jl_acl_rule_s {
+ jl_uint8 compare_ethtype;/**< Determines if the EthType field in this entry shall be compared. */
+ jl_uint8 type_of_comparison_ethtype;/**< What type of comparison shall be considered as hit */
+ jl_uint16 eth_type;/**< Ethernet Type */
+ jl_uint8 compare_da;/**< Determines if the DaMac field in this entry shall be compared. */
+ jl_uint8 type_of_comparison_da;/**< What type of comparison shall be considered as hit. */
+ jl_uint64 da_mac;/**< Destination MAC address */
+ jl_uint8 compare_sa;/**< Determines if the SaMac field in this entry shall be compared. */
+ jl_uint8 type_of_comparison_sa;/**< What type of comparison shall be considered as hit */
+ jl_uint64 sa_mac;/**< Source MAC address. */
+ jl_uint8 compare_vid;/**< Determines if the Vid field in this entry shall becompared */
+ jl_uint8 type_of_comparison_vid;/**< What type of comparison shall be considered as hit */
+ jl_uint16 vid;/**< Compared with the packets VLAN VID after Ingress vlan assignment and Source Port Table VLAN operation. */
+ jl_uint8 compare_pcp;/**< Determines if the Pcp field in this entry shall becompared. */
+ jl_uint8 type_of_comparison_pcp;/**< What type of comparison shall be considered as hit. */
+ jl_uint8 pcp;/**< Compared with the packets VLAN PCP after Source Port Table VLAN operation */
+ jl_uint8 compare_dei;/**< Determines if the Dei field in this entry shall becompared */
+ jl_uint8 type_of_comparison_dei;/**< What type of comparison shall be considered as hit */
+ jl_uint8 dei;/**< Compared with the packets VLAN CFI/DEI after Source Port Table VLAN operation */
+ jl_uint8 compare_has_vlans;/**< Determines if the HasVlans field in this entry shall be compared */
+ jl_uint8 type_of_comparison_has_vlans;/**< What type of comparison shall be considered as hit */
+ jl_uint8 has_vlans;/**< Is there at least one VLAN in the packet. */
+ jl_uint8 compare_cstag;/**< Determines if the Cstag field in this entry shall be compared */
+ jl_uint8 type_of_comparison_cstag;/**< What type of comparison shall be considered as hit */
+ jl_uint8 cstag;/**< Is the outermost VLAN tag a C-tag or S-Tag. If a packet does not have a VLAN or the VLAN was removed
+ *due to a pop operation in the source port vlan operation then the value will be set to zero(0). */
+ jl_portmask_t ports;/**< Ports that this filter rule applies to.One bit per source port, bit 0 for port 0, bit 1 for port 1 etc. */
+};
+
+/**
+ * @public typedef jl_acl_rule_t
+ */
+typedef struct jl_acl_rule_s jl_acl_rule_t;
+
+/**
+ * @struct jl_acl_action_s
+ * @brief ACL actions.
+ */
+struct jl_acl_action_s {
+ jl_enable_t drop_enable;/**< If set, the packet shall be dropped. */
+ jl_enable_t send_to_cpu_enable;/**< If set, the packet shall be sent to the CPU port. */
+ jl_enable_t force_queue_enable;/**< If set, the packet shall have a forced egress queue. */
+ jl_uint8 queue_id;/**< The egress queue to be assigned if the forceQueue field in this entry is set to 1. */
+ jl_enable_t send_to_port_enable;/**< If set,the packet shall be sent to a specific port. */
+ jl_port_t dest_port;/**< The port which the packet shall be sent to */
+ jl_enable_t update_pcp_enable;/**< If set,the PCP value of the packets outermost VLAN should be updated. */
+ jl_uint8 new_pcp_value;/**< The PCP value to update to. */
+ jl_enable_t update_vid_enable;/**< If set,the Vid value of the packets outermost VLAN should be updated. */
+ jl_uint16 new_vid_value;/**< The Vid value to update to. */
+};
+
+/**
+ * @public typedef jl_acl_rule_t
+ */
+typedef struct jl_acl_action_s jl_acl_action_t;
+
+/**
+ * @brief Set the ACL filter rules and ACL actions
+ * @details This function sets the ACL filter rules and the correspond actions into the ACL table,
+ * and applys the ACL rule to the specified ports. There are 32 ACL Rule Entries and 32
+ * ACL Action Entries in the ACL table. Each ACL Rule Entry contains several compare
+ * fields, and each ACL Action Entry also contains several actions.
+ * @param[in] entry_index Index of ACL table, range [0,31]
+ * @param[in] acl_rule ACL rule of this entry
+ * @param[in] acl_action ACL action of this entry
+ * @return set the ACL filter rules and ACL actions successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PARAM PARAM Fail
+ * @retval JL_ERR_TIMEOUT Read/Write Reg Timeout
+ * @retval JL_ERR_FAIL Read/Write Reg Fail
+ * @retval JL_ERR_PORT Error Port id
+ */
+JL_API jl_api_ret_t jl_acl_set(jl_uint8 entry_index, jl_acl_rule_t *acl_rule, jl_acl_action_t *acl_action);
+
+/**
+ * @brief Get the filter rule and action of the entry from the ACL table
+ * @param[in] entry_index Index of ACL table, range [0,31]
+ * @param[out] acl_rule ACL rule of this entry
+ * @param[out] acl_action ACL action of this entry
+ * @return get the ACL filter rules and ACL actions successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PARAM PARAM Fail
+ * @retval JL_ERR_TIMEOUT Read Reg Timeout
+ * @retval JL_ERR_FAIL Read Reg Fail
+ * @retval JL_ERR_PORT Error Port id
+ */
+JL_API jl_api_ret_t jl_acl_get(jl_uint8 entry_index, jl_acl_rule_t *acl_rule, jl_acl_action_t *acl_action);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __JL_API_ACL_H__*/
+/** @} ACL APIs*/
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/cpu.h b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/cpu.h
new file mode 100644
index 0000000..f5161a8
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/cpu.h
@@ -0,0 +1,155 @@
+/**
+ * @file cpu.h
+ * @brief cpu
+ */
+
+/**
+ * @defgroup cpu_group CPU
+ * @{
+ */
+
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+
+#ifndef __JL_API_CPU_H__
+#define __JL_API_CPU_H__
+
+#include "jl_base.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Set enable allow bpdu packets send to CPU port or not
+ * @param enable: enable state
+ * @return set successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_SMI SMI Operation Fail
+ * @retval JL_ERR_FAIL Fail
+ * @note
+ * This API can be used to set allow bpdu packets send to CPU port or not.
+ * If set then packets that have the destination MAC address equal to
+ * 01:80:C2:00:00:00 are sent to the CPU port. Otherwise, the packets
+ * that have thedestination MAC address equal to 01:80:C2:00:00:00 are
+ * broadcast to all the ports.
+ */
+JL_API jl_api_ret_t jl_cpu_allow_bpdu_enable_set(jl_enable_t enable);
+
+/**
+ * @brief Get allow bpdu packets send to CPU port is enabled or not
+ * @param penable: enable state
+ * @return Get successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_SMI SMI Operation Fail
+ * @retval JL_ERR_FAIL Fail
+ * @note
+ * This API can be used to get allow bpdu packets send to CPU port or not.
+ * If set then packets that have the destination MAC address equal to
+ * 01:80:C2:00:00:00 are sent to the CPU port. Otherwise, the packets
+ * that have the destination MAC address equal to 01:80:C2:00:00:00 are
+ * broadcast to all the ports.
+ */
+JL_API jl_api_ret_t jl_cpu_allow_bpdu_enable_get(jl_enable_t *penable);
+
+/**
+ * @brief Set allow rst-bpdu packets send to CPU port or not
+ * @param enable: enable state
+ * @return Set successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_SMI SMI Operation Fail
+ * @retval JL_ERR_FAIL Fail
+ * @note
+ * This API can be used to set allow rst bpdu packets send to CPU port or not.
+ * If set then packets that have the destination MAC address equal to
+ * 01:00:0C:CC:CC:CD are sent to the CPU port.
+ */
+JL_API jl_api_ret_t jl_cpu_allow_rst_bpdu_enable_set(jl_enable_t enable);
+
+/**
+ * @brief Get allow rst-bpdu packets send to CPU port or not
+ * @param penable: enable state
+ * @return Set successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_SMI SMI Operation Fail
+ * @retval JL_ERR_FAIL Fail
+ * @note
+ * This API can be used to get allow rst bpdu packets send to CPU port or not.
+ * If the packets's destination MAC address is equal to
+ * 01:00:0C:CC:CC:CD, then they are allowed to send to the CPU port.
+ */
+JL_API jl_api_ret_t jl_cpu_allow_rst_bpdu_enable_get(jl_enable_t *penable);
+
+/**
+ * @brief Enable or disable To CPU Port Tag
+ * @param enable: enable state
+ * @return Set successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_SMI SMI Operation Fail
+ * @retval JL_ERR_FAIL Fail
+ * @note
+ * This API can be used to enable the To CPU Port Tag.
+ */
+JL_API jl_api_ret_t jl_cpu_tag_enable_set(jl_enable_t enable);
+
+/**
+ * @brief Get To CPU Port Tag is enabled or not
+ * @param penable: enable state
+ * @return Get successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_SMI SMI Operation Fail
+ * @retval JL_ERR_FAIL Fail
+ * @note
+ * This API can be used to get the To CPU Port Tag is enabled or not.
+ */
+JL_API jl_api_ret_t jl_cpu_tag_enable_get(jl_enable_t *penable);
+
+/**
+ * @brief Set enable lldp packets to send to CPU port or not
+ * @param enable: 1:send to cpu; 0:Transparent
+ * @return Set successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_SMI SMI Operation Fail
+ * @retval JL_ERR_FAIL Fail
+ * @note
+ * This API can enable lldp packets To CPU or Transparent.
+ * LLDP is as following definition:
+ * DMAC = 01:80:c2:00:00:0e ethertype = 0x88CC
+ * DMAC = 01:80:c2:00:00:03 ethertype = 0x88CC
+ * DMAC = 01:80:c2:00:00:00 ethertype = 0x88CC
+ */
+JL_API jl_api_ret_t jl_cpu_allow_lldp_enable_set(jl_enable_t enable);
+
+/**
+ * @brief Get lldp packets send to CPU port is enabled or not
+ * @param penable: enable status, 1:send to cpu; 0:Transparent
+ * @return Set successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_SMI SMI Operation Fail
+ * @retval JL_ERR_FAIL Fail
+ * @note
+ * This API can get lldp packets To CPU is enabled or not.
+ * LLDP is as following definition:
+ * DMAC = 01:80:c2:00:00:0e ethertype = 0x88CC
+ * DMAC = 01:80:c2:00:00:03 ethertype = 0x88CC
+ * DMAC = 01:80:c2:00:00:00 ethertype = 0x88CC
+ */
+JL_API jl_api_ret_t jl_cpu_allow_lldp_enable_get(jl_enable_t *penable);
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* __JL_API_CPU_H__*/
+/** @} CPU APIs*/
+
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/driver/demo_hidapi.h b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/driver/demo_hidapi.h
new file mode 100644
index 0000000..f457b1b
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/driver/demo_hidapi.h
@@ -0,0 +1,498 @@
+/*******************************************************
+ HIDAPI - Multi-Platform library for
+ communication with HID devices.
+
+ Alan Ott
+ Signal 11 Software
+
+ 8/22/2009
+
+ Copyright 2009, All Rights Reserved.
+
+ At the discretion of the user of this library,
+ this software may be licensed under the terms of the
+ GNU General Public License v3, a BSD-Style license, or the
+ original HIDAPI license as outlined in the LICENSE.txt,
+ LICENSE-gpl3.txt, LICENSE-bsd.txt, and LICENSE-orig.txt
+ files located at the root of the source distribution.
+ These files may also be found in the public source
+ code repository located at:
+ https://github.com/libusb/hidapi .
+********************************************************/
+
+
+/** @file
+ * @defgroup API hidapi API
+ */
+
+#ifndef HIDAPI_H__
+#define HIDAPI_H__
+
+#include <wchar.h>
+
+#ifdef _WIN32
+ #define HID_API_EXPORT __declspec(dllexport)
+ #define HID_API_CALL
+#else
+ #define HID_API_EXPORT /**< API export macro */
+ #define HID_API_CALL /**< API call macro */
+#endif
+
+#define HID_API_EXPORT_CALL HID_API_EXPORT HID_API_CALL /**< API export and call macro*/
+
+/** @brief Static/compile-time major version of the library.
+
+ @ingroup API
+*/
+#define HID_API_VERSION_MAJOR 0
+/** @brief Static/compile-time minor version of the library.
+
+ @ingroup API
+*/
+#define HID_API_VERSION_MINOR 11
+/** @brief Static/compile-time patch version of the library.
+
+ @ingroup API
+*/
+#define HID_API_VERSION_PATCH 2
+
+/* Helper macros */
+#define HID_API_AS_STR_IMPL(x) #x
+#define HID_API_AS_STR(x) HID_API_AS_STR_IMPL(x)
+#define HID_API_TO_VERSION_STR(v1, v2, v3) HID_API_AS_STR(v1.v2.v3)
+
+/** @brief Static/compile-time string version of the library.
+
+ @ingroup API
+*/
+#define HID_API_VERSION_STR HID_API_TO_VERSION_STR(HID_API_VERSION_MAJOR, HID_API_VERSION_MINOR, HID_API_VERSION_PATCH)
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+ struct hid_api_version {
+ int major;
+ int minor;
+ int patch;
+ };
+
+ struct hid_device_;
+ typedef struct hid_device_ hid_device; /**< opaque hidapi structure */
+
+ /** hidapi info structure */
+ struct hid_device_info {
+ /** Platform-specific device path */
+ char *path;
+ /** Device Vendor ID */
+ unsigned short vendor_id;
+ /** Device Product ID */
+ unsigned short product_id;
+ /** Serial Number */
+ wchar_t *serial_number;
+ /** Device Release Number in binary-coded decimal,
+ also known as Device Version Number */
+ unsigned short release_number;
+ /** Manufacturer String */
+ wchar_t *manufacturer_string;
+ /** Product string */
+ wchar_t *product_string;
+ /** Usage Page for this Device/Interface
+ (Windows/Mac/hidraw only) */
+ unsigned short usage_page;
+ /** Usage for this Device/Interface
+ (Windows/Mac/hidraw only) */
+ unsigned short usage;
+ /** The USB interface which this logical device
+ represents.
+
+ * Valid on both Linux implementations in all cases.
+ * Valid on the Windows implementation only if the device
+ contains more than one interface.
+ * Valid on the Mac implementation if and only if the device
+ is a USB HID device. */
+ int interface_number;
+
+ /** Pointer to the next device */
+ struct hid_device_info *next;
+ };
+
+
+ /** @brief Initialize the HIDAPI library.
+
+ This function initializes the HIDAPI library. Calling it is not
+ strictly necessary, as it will be called automatically by
+ hid_enumerate() and any of the hid_open_*() functions if it is
+ needed. This function should be called at the beginning of
+ execution however, if there is a chance of HIDAPI handles
+ being opened by different threads simultaneously.
+
+ @ingroup API
+
+ @returns
+ This function returns 0 on success and -1 on error.
+ */
+ int HID_API_EXPORT HID_API_CALL hid_init(void);
+
+ /** @brief Finalize the HIDAPI library.
+
+ This function frees all of the static data associated with
+ HIDAPI. It should be called at the end of execution to avoid
+ memory leaks.
+
+ @ingroup API
+
+ @returns
+ This function returns 0 on success and -1 on error.
+ */
+ int HID_API_EXPORT HID_API_CALL hid_exit(void);
+
+ /** @brief Enumerate the HID Devices.
+
+ This function returns a linked list of all the HID devices
+ attached to the system which match vendor_id and product_id.
+ If @p vendor_id is set to 0 then any vendor matches.
+ If @p product_id is set to 0 then any product matches.
+ If @p vendor_id and @p product_id are both set to 0, then
+ all HID devices will be returned.
+
+ @ingroup API
+ @param vendor_id The Vendor ID (VID) of the types of device
+ to open.
+ @param product_id The Product ID (PID) of the types of
+ device to open.
+
+ @returns
+ This function returns a pointer to a linked list of type
+ struct #hid_device_info, containing information about the HID devices
+ attached to the system, or NULL in the case of failure. Free
+ this linked list by calling hid_free_enumeration().
+ */
+ struct hid_device_info HID_API_EXPORT * HID_API_CALL hid_enumerate(unsigned short vendor_id, unsigned short product_id);
+
+ /** @brief Free an enumeration Linked List
+
+ This function frees a linked list created by hid_enumerate().
+
+ @ingroup API
+ @param devs Pointer to a list of struct_device returned from
+ hid_enumerate().
+ */
+ void HID_API_EXPORT HID_API_CALL hid_free_enumeration(struct hid_device_info *devs);
+
+ /** @brief Open a HID device using a Vendor ID (VID), Product ID
+ (PID) and optionally a serial number.
+
+ If @p serial_number is NULL, the first device with the
+ specified VID and PID is opened.
+
+ This function sets the return value of hid_error().
+
+ @ingroup API
+ @param vendor_id The Vendor ID (VID) of the device to open.
+ @param product_id The Product ID (PID) of the device to open.
+ @param serial_number The Serial Number of the device to open
+ (Optionally NULL).
+
+ @returns
+ This function returns a pointer to a #hid_device object on
+ success or NULL on failure.
+ */
+ HID_API_EXPORT hid_device * HID_API_CALL hid_open(unsigned short vendor_id, unsigned short product_id, const wchar_t *serial_number);
+
+ /** @brief Open a HID device by its path name.
+
+ The path name be determined by calling hid_enumerate(), or a
+ platform-specific path name can be used (eg: /dev/hidraw0 on
+ Linux).
+
+ This function sets the return value of hid_error().
+
+ @ingroup API
+ @param path The path name of the device to open
+
+ @returns
+ This function returns a pointer to a #hid_device object on
+ success or NULL on failure.
+ */
+ HID_API_EXPORT hid_device * HID_API_CALL hid_open_path(const char *path);
+
+ /** @brief Write an Output report to a HID device.
+
+ The first byte of @p data[] must contain the Report ID. For
+ devices which only support a single report, this must be set
+ to 0x0. The remaining bytes contain the report data. Since
+ the Report ID is mandatory, calls to hid_write() will always
+ contain one more byte than the report contains. For example,
+ if a hid report is 16 bytes long, 17 bytes must be passed to
+ hid_write(), the Report ID (or 0x0, for devices with a
+ single report), followed by the report data (16 bytes). In
+ this example, the length passed in would be 17.
+
+ hid_write() will send the data on the first OUT endpoint, if
+ one exists. If it does not, it will send the data through
+ the Control Endpoint (Endpoint 0).
+
+ This function sets the return value of hid_error().
+
+ @ingroup API
+ @param dev A device handle returned from hid_open().
+ @param data The data to send, including the report number as
+ the first byte.
+ @param length The length in bytes of the data to send.
+
+ @returns
+ This function returns the actual number of bytes written and
+ -1 on error.
+ */
+ int HID_API_EXPORT HID_API_CALL hid_write(hid_device *dev, const unsigned char *data, size_t length);
+
+ /** @brief Read an Input report from a HID device with timeout.
+
+ Input reports are returned
+ to the host through the INTERRUPT IN endpoint. The first byte will
+ contain the Report number if the device uses numbered reports.
+
+ This function sets the return value of hid_error().
+
+ @ingroup API
+ @param dev A device handle returned from hid_open().
+ @param data A buffer to put the read data into.
+ @param length The number of bytes to read. For devices with
+ multiple reports, make sure to read an extra byte for
+ the report number.
+ @param milliseconds timeout in milliseconds or -1 for blocking wait.
+
+ @returns
+ This function returns the actual number of bytes read and
+ -1 on error. If no packet was available to be read within
+ the timeout period, this function returns 0.
+ */
+ int HID_API_EXPORT HID_API_CALL hid_read_timeout(hid_device *dev, unsigned char *data, size_t length, int milliseconds);
+
+ /** @brief Read an Input report from a HID device.
+
+ Input reports are returned
+ to the host through the INTERRUPT IN endpoint. The first byte will
+ contain the Report number if the device uses numbered reports.
+
+ This function sets the return value of hid_error().
+
+ @ingroup API
+ @param dev A device handle returned from hid_open().
+ @param data A buffer to put the read data into.
+ @param length The number of bytes to read. For devices with
+ multiple reports, make sure to read an extra byte for
+ the report number.
+
+ @returns
+ This function returns the actual number of bytes read and
+ -1 on error. If no packet was available to be read and
+ the handle is in non-blocking mode, this function returns 0.
+ */
+ int HID_API_EXPORT HID_API_CALL hid_read(hid_device *dev, unsigned char *data, size_t length);
+
+ /** @brief Set the device handle to be non-blocking.
+
+ In non-blocking mode calls to hid_read() will return
+ immediately with a value of 0 if there is no data to be
+ read. In blocking mode, hid_read() will wait (block) until
+ there is data to read before returning.
+
+ Nonblocking can be turned on and off at any time.
+
+ @ingroup API
+ @param dev A device handle returned from hid_open().
+ @param nonblock enable or not the nonblocking reads
+ - 1 to enable nonblocking
+ - 0 to disable nonblocking.
+
+ @returns
+ This function returns 0 on success and -1 on error.
+ */
+ int HID_API_EXPORT HID_API_CALL hid_set_nonblocking(hid_device *dev, int nonblock);
+
+ /** @brief Send a Feature report to the device.
+
+ Feature reports are sent over the Control endpoint as a
+ Set_Report transfer. The first byte of @p data[] must
+ contain the Report ID. For devices which only support a
+ single report, this must be set to 0x0. The remaining bytes
+ contain the report data. Since the Report ID is mandatory,
+ calls to hid_send_feature_report() will always contain one
+ more byte than the report contains. For example, if a hid
+ report is 16 bytes long, 17 bytes must be passed to
+ hid_send_feature_report(): the Report ID (or 0x0, for
+ devices which do not use numbered reports), followed by the
+ report data (16 bytes). In this example, the length passed
+ in would be 17.
+
+ This function sets the return value of hid_error().
+
+ @ingroup API
+ @param dev A device handle returned from hid_open().
+ @param data The data to send, including the report number as
+ the first byte.
+ @param length The length in bytes of the data to send, including
+ the report number.
+
+ @returns
+ This function returns the actual number of bytes written and
+ -1 on error.
+ */
+ int HID_API_EXPORT HID_API_CALL hid_send_feature_report(hid_device *dev, const unsigned char *data, size_t length);
+
+ /** @brief Get a feature report from a HID device.
+
+ Set the first byte of @p data[] to the Report ID of the
+ report to be read. Make sure to allow space for this
+ extra byte in @p data[]. Upon return, the first byte will
+ still contain the Report ID, and the report data will
+ start in data[1].
+
+ This function sets the return value of hid_error().
+
+ @ingroup API
+ @param dev A device handle returned from hid_open().
+ @param data A buffer to put the read data into, including
+ the Report ID. Set the first byte of @p data[] to the
+ Report ID of the report to be read, or set it to zero
+ if your device does not use numbered reports.
+ @param length The number of bytes to read, including an
+ extra byte for the report ID. The buffer can be longer
+ than the actual report.
+
+ @returns
+ This function returns the number of bytes read plus
+ one for the report ID (which is still in the first
+ byte), or -1 on error.
+ */
+ int HID_API_EXPORT HID_API_CALL hid_get_feature_report(hid_device *dev, unsigned char *data, size_t length);
+
+ /** @brief Get a input report from a HID device.
+
+ Set the first byte of @p data[] to the Report ID of the
+ report to be read. Make sure to allow space for this
+ extra byte in @p data[]. Upon return, the first byte will
+ still contain the Report ID, and the report data will
+ start in data[1].
+
+ @ingroup API
+ @param device A device handle returned from hid_open().
+ @param data A buffer to put the read data into, including
+ the Report ID. Set the first byte of @p data[] to the
+ Report ID of the report to be read, or set it to zero
+ if your device does not use numbered reports.
+ @param length The number of bytes to read, including an
+ extra byte for the report ID. The buffer can be longer
+ than the actual report.
+
+ @returns
+ This function returns the number of bytes read plus
+ one for the report ID (which is still in the first
+ byte), or -1 on error.
+ */
+ int HID_API_EXPORT HID_API_CALL hid_get_input_report(hid_device *dev, unsigned char *data, size_t length);
+
+ /** @brief Close a HID device.
+
+ This function sets the return value of hid_error().
+
+ @ingroup API
+ @param dev A device handle returned from hid_open().
+ */
+ void HID_API_EXPORT HID_API_CALL hid_close(hid_device *dev);
+
+ /** @brief Get The Manufacturer String from a HID device.
+
+ @ingroup API
+ @param dev A device handle returned from hid_open().
+ @param string A wide string buffer to put the data into.
+ @param maxlen The length of the buffer in multiples of wchar_t.
+
+ @returns
+ This function returns 0 on success and -1 on error.
+ */
+ int HID_API_EXPORT_CALL hid_get_manufacturer_string(hid_device *dev, wchar_t *string, size_t maxlen);
+
+ /** @brief Get The Product String from a HID device.
+
+ @ingroup API
+ @param dev A device handle returned from hid_open().
+ @param string A wide string buffer to put the data into.
+ @param maxlen The length of the buffer in multiples of wchar_t.
+
+ @returns
+ This function returns 0 on success and -1 on error.
+ */
+ int HID_API_EXPORT_CALL hid_get_product_string(hid_device *dev, wchar_t *string, size_t maxlen);
+
+ /** @brief Get The Serial Number String from a HID device.
+
+ @ingroup API
+ @param dev A device handle returned from hid_open().
+ @param string A wide string buffer to put the data into.
+ @param maxlen The length of the buffer in multiples of wchar_t.
+
+ @returns
+ This function returns 0 on success and -1 on error.
+ */
+ int HID_API_EXPORT_CALL hid_get_serial_number_string(hid_device *dev, wchar_t *string, size_t maxlen);
+
+ /** @brief Get a string from a HID device, based on its string index.
+
+ @ingroup API
+ @param dev A device handle returned from hid_open().
+ @param string_index The index of the string to get.
+ @param string A wide string buffer to put the data into.
+ @param maxlen The length of the buffer in multiples of wchar_t.
+
+ @returns
+ This function returns 0 on success and -1 on error.
+ */
+ int HID_API_EXPORT_CALL hid_get_indexed_string(hid_device *dev, int string_index, wchar_t *string, size_t maxlen);
+
+ /** @brief Get a string describing the last error which occurred.
+
+ Whether a function sets the last error is noted in its
+ documentation. These functions will reset the last error
+ to NULL before their execution.
+
+ Strings returned from hid_error() must not be freed by the user!
+
+ This function is thread-safe, and error messages are thread-local.
+
+ @ingroup API
+ @param dev A device handle returned from hid_open(),
+ or NULL to get the last non-device-specific error
+ (e.g. for errors in hid_open() itself).
+
+ @returns
+ This function returns a string containing the last error
+ which occurred or NULL if none has occurred.
+ */
+ HID_API_EXPORT const wchar_t* HID_API_CALL hid_error(hid_device *dev);
+
+ /** @brief Get a runtime version of the library.
+
+ @ingroup API
+
+ @returns
+ Pointer to statically allocated struct, that contains version.
+ */
+ HID_API_EXPORT const struct hid_api_version* HID_API_CALL hid_version(void);
+
+
+ /** @brief Get a runtime version string of the library.
+
+ @ingroup API
+
+ @returns
+ Pointer to statically allocated string, that contains version string.
+ */
+ HID_API_EXPORT const char* HID_API_CALL hid_version_str(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/driver/demo_hidapi_libusb.h b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/driver/demo_hidapi_libusb.h
new file mode 100644
index 0000000..08d99e4
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/driver/demo_hidapi_libusb.h
@@ -0,0 +1,54 @@
+/*******************************************************
+ HIDAPI - Multi-Platform library for
+ communication with HID devices.
+
+ libusb/hidapi Team
+
+ Copyright 2021, All Rights Reserved.
+
+ At the discretion of the user of this library,
+ this software may be licensed under the terms of the
+ GNU General Public License v3, a BSD-Style license, or the
+ original HIDAPI license as outlined in the LICENSE.txt,
+ LICENSE-gpl3.txt, LICENSE-bsd.txt, and LICENSE-orig.txt
+ files located at the root of the source distribution.
+ These files may also be found in the public source
+ code repository located at:
+ https://github.com/libusb/hidapi .
+********************************************************/
+
+/** @file
+ * @defgroup API hidapi API
+ */
+
+#ifndef HIDAPI_LIBUSB_H__
+#define HIDAPI_LIBUSB_H__
+
+#include <stdint.h>
+
+#include "driver/demo_hidapi.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+ /** @brief Open a HID device using libusb_wrap_sys_device.
+ See https://libusb.sourceforge.io/api-1.0/group__libusb__dev.html#ga98f783e115ceff4eaf88a60e6439563c,
+ for details on libusb_wrap_sys_device.
+
+ @ingroup API
+ @param sys_dev Platform-specific file descriptor that can be recognised by libusb.
+ @param interface_num USB interface number of the device to be used as HID interface.
+ Pass -1 to select first HID interface of the device.
+
+ @returns
+ This function returns a pointer to a #hid_device object on
+ success or NULL on failure.
+ */
+ HID_API_EXPORT hid_device * HID_API_CALL hid_libusb_wrap_sys_device(intptr_t sys_dev, int interface_num);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/driver/hal_smi.h b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/driver/hal_smi.h
new file mode 100644
index 0000000..c3efbe4
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/driver/hal_smi.h
@@ -0,0 +1,28 @@
+#ifndef __JL_SMI_H__
+#define __JL_SMI_H__
+
+#include "jl_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+struct smi_device_s {
+ void *device;
+ void *phy_mutex;
+ void *apb_mutex;
+};
+
+extern struct smi_device_s g_smi_dev;
+
+jl_api_ret_t jl_smi_init(void);
+jl_api_ret_t jl_smi_deinit(void);
+
+void jl_smi_write(jl_uint8 phy, jl_uint8 reg, jl_uint16 val);
+jl_uint16 jl_smi_read(jl_uint8 phy, jl_uint8 reg);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __JL_SMI_H__ */
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/driver/jl_reg_io.h b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/driver/jl_reg_io.h
new file mode 100644
index 0000000..5710e6e
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/driver/jl_reg_io.h
@@ -0,0 +1,68 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+#ifndef __JL_REG_ACC_H__
+#define __JL_REG_ACC_H__
+
+#include "jl_base.h"
+#include "jl_types.h"
+#include "jl_error.h"
+#include "jl_debug.h"
+#include "portable/jl_portable.h"
+#include "driver/hal_smi.h"
+#include "jl51xx/reg_ethmac.h"
+#include "jl51xx/reg_mag.h"
+#include "jl51xx/reg_swcore.h"
+#include "jl51xx/reg_phy.h"
+#include "jl51xx/reg_fephy.h"
+#include "jl51xx/reg_top.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* TODO only for Little Endian, bits count should not bigger than 64 */
+JL_API void jl_read_bits(jl_uint8 *buffer, jl_uint64 *bits,
+ jl_uint8 start, jl_uint8 count);
+JL_API void jl_write_bits(jl_uint8 *buffer, jl_uint64 bits,
+ jl_uint8 start, jl_uint8 count);
+
+JL_API jl_uint16 jl_phy_reg_read_ext(jl_uint32 phy, jl_uint32 page, jl_uint32 reg);
+JL_API void jl_phy_reg_write_ext(jl_uint32 phy, jl_uint32 page, jl_uint32 reg, jl_uint16 val);
+JL_API jl_api_ret_t jl_apb_reg_read(jl_uint32 reg, jl_uint32 *val);
+JL_API jl_api_ret_t jl_apb_reg_burst_read(jl_uint32 reg, jl_uint32 *buf, jl_uint32 size);
+JL_API jl_api_ret_t jl_apb_reg_write(jl_uint32 reg, jl_uint32 val);
+JL_API jl_api_ret_t jl_apb_reg_burst_write(jl_uint32 reg, jl_uint32 *buf, jl_uint32 size);
+JL_API jl_api_ret_t jl_reg_io_init(void);
+JL_API jl_api_ret_t jl_reg_io_deinit(void);
+
+#ifdef CONFIG_JLFE_DUMP_REG_WRITE
+JL_API jl_api_ret_t jl_dump_file_open(void);
+JL_API void jl_dump_file_close(void);
+JL_API jl_api_ret_t jl_dump_direct_write(jl_uint32 phy_id, jl_uint32 page_id,
+ jl_uint32 reg_id, jl_uint16 val);
+JL_API jl_api_ret_t jl_dump_indirect_write(jl_uint32 addr, jl_uint32 val);
+JL_API jl_api_ret_t jl_dump_indirect_burst_write(jl_uint32 addr,
+ jl_uint32 size, jl_uint32 *pval);
+JL_API jl_api_ret_t jl_dump_add_delay(jl_uint32 us);
+JL_API jl_api_ret_t jl_dump_add_comment(char *comment);
+JL_API void jl_dump_enable(void);
+JL_API void jl_dump_disable(void);
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __JL_REG_ACC_H__ */
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/fc.h b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/fc.h
new file mode 100644
index 0000000..e3e91c3
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/fc.h
@@ -0,0 +1,143 @@
+/**
+ * @file fc.h
+ * @brief Flow Control
+ */
+
+/**
+ * @defgroup fc_group Flow Control
+ * @{
+ */
+
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+
+
+#ifndef __JL_API_FC_H__
+#define __JL_API_FC_H__
+
+#include "jl_base.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Set enable or disable port flow control
+ * @details This function can enable or disable flow control in the specified port.
+ * @param[in] port Port ID
+ * @param[in] enable Enable or disable
+ * @return Set successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval minus_value Fail
+ */
+JL_API jl_ret_t jl_port_fc_enable_set(jl_port_t port, jl_enable_t enable);
+
+/**
+ * @brief Get port flow control status
+ * @details This function can get flow control status in the specified port.
+ * @param[in] port Port ID
+ * @param[out] penable Get enable status
+ * @return Set successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval minus_value Fail
+ */
+JL_API jl_ret_t jl_port_fc_enable_get(jl_port_t port, jl_enable_t *penable);
+
+/**
+ * @brief Set port flow control threshold
+ * @details This function can set flow control threshold in the specified port.
+ * @param[in] port Port ID
+ * @param[in] threshold_on On threshold for the number of used free-for-all cells for this port,range[0,0x3ff]
+ * @param[in] threshold_off Off threshold for the number of used free-for-all cells for this port,range[0,0x3ff]
+ * @return Set successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval minus_value Fail
+ * @note The value of threshold_off should be greater than the value of threshold_on
+ */
+JL_API jl_ret_t jl_port_fc_threshold_set(jl_port_t port,
+ jl_uint32 threshold_on, jl_uint32 threshold_off);
+
+/**
+ * @brief Get port flow control threshold
+ * @details This function can get flow control threshold in the specified port.
+ * @param[in] port Port ID
+ * @param[out] pthreshold_on Get On threshold for this port
+ * @param[out] pthreshold_off Get Off threshold for this port
+ * @return Set successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval minus_value Fail
+ */
+JL_API jl_ret_t jl_port_fc_threshold_get(jl_port_t port,
+ jl_uint32 *pthreshold_on, jl_uint32 *pthreshold_off);
+
+/**
+ * @brief Set port flow control tx pause time
+ * @details This function can set flow control tx pause time in the specified port.
+ * @param[in] port Port ID
+ * @param[in] pause_time tx pause time,range[0,65535]
+ * @return Set successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval minus_value Fail
+ * @note Default value is 65535.
+ */
+JL_API jl_ret_t jl_port_fc_pause_time_set(jl_port_t port, jl_uint32 pause_time);
+
+/**
+ * @brief Get port flow control tx pause time
+ * @details This function can get flow control tx pause time in the specified port.
+ * @param[in] port Port ID
+ * @param[in] ppause_time get tx pause time
+ * @return Set successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval minus_value Fail
+ */
+JL_API jl_ret_t jl_port_fc_pause_time_get(jl_port_t port, jl_uint32 *ppause_time);
+
+/**
+ * @brief Set enable or disable tail drop of the specified port
+ * @param[in] phyport port number
+ * @param[in] enable 1: enable tail drop; 0: disable tail drop
+ * @return Set successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval minus_value Fail
+ */
+JL_API jl_api_ret_t jl_taildrop_enable_set(jl_port_t phyport, jl_enable_t enable);
+
+/**
+ * @brief Get tail drop enable status per source port
+ * @param[in] phyport port number
+ * @param[out] penable the return enable status, 1: enable tail drop; 0: disable tail drop
+ * @return Get successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval minus_value Fail
+ */
+JL_API jl_api_ret_t jl_taildrop_enable_get(jl_port_t phyport, jl_enable_t *penable);
+
+/**
+ * @brief Get the drop counters due to taildrop
+ * @param[out] pcntr drop counter
+ * @return Get successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval minus_value Fail
+ */
+JL_API jl_api_ret_t jl_taildrop_counter_get(jl_uint32 *pcntr);
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __JL_API_FC_H__*/
+/** @} Flow Control APIs*/
+
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/jl51xx_drv_acl.h b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/jl51xx_drv_acl.h
new file mode 100644
index 0000000..2732bb0
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/jl51xx_drv_acl.h
@@ -0,0 +1,32 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+
+#ifndef __JL51XX_DRV_ACL_H__
+#define __JL51XX_DRV_ACL_H__
+
+#include "jl_error.h"
+#include "acl.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+jl_ret_t jl51xx_acl_set(jl_uint8 entry_index, jl_acl_rule_t *acl_rule, jl_acl_action_t *acl_action);
+jl_ret_t jl51xx_acl_get(jl_uint8 entry_index, jl_acl_rule_t *acl_rule, jl_acl_action_t *acl_action);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __JL51XX_DRV_ACL_H__ */
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/jl51xx_drv_cpu.h b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/jl51xx_drv_cpu.h
new file mode 100644
index 0000000..174a90e
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/jl51xx_drv_cpu.h
@@ -0,0 +1,41 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+
+#ifndef __JL51XX_DRV_CPU_H__
+#define __JL51XX_DRV_CPU_H__
+
+#include "jl_types.h"
+#include "cpu.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+jl_ret_t jl51xx_cpu_allow_bpdu_enable_set(jl_enable_t enable);
+jl_ret_t jl51xx_cpu_allow_bpdu_enable_get(jl_enable_t *penable);
+
+jl_ret_t jl51xx_cpu_allow_rst_bpdu_enable_set(jl_enable_t enable);
+jl_ret_t jl51xx_cpu_allow_rst_bpdu_enable_get(jl_enable_t *penable);
+
+jl_ret_t jl51xx_to_cpu_tag_enable_get(jl_enable_t *penable);
+jl_ret_t jl51xx_to_cpu_tag_enable_set(jl_enable_t enable);
+
+jl_ret_t jl51xx_cpu_allow_lldp_enable_set(jl_enable_t enable);
+jl_ret_t jl51xx_cpu_allow_lldp_enable_get(jl_enable_t *penable);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __JL51XX_DRV_CPU_H__ */
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/jl51xx_drv_customized_patch.h b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/jl51xx_drv_customized_patch.h
new file mode 100644
index 0000000..19cc5a8
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/jl51xx_drv_customized_patch.h
@@ -0,0 +1,61 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+#ifndef __JL51XX_DRV_CUSTOMIZED_PATCH_H__
+#define __JL51XX_DRV_CUSTOMIZED_PATCH_H__
+
+#include "jl_types.h"
+#include "jl_config.h"
+
+#ifdef CONFIG_JLFE_LOAD_CUSTOMIZED_PATCH
+/* Autogenerated file, do not modify */
+
+enum jl_cmd_e {
+ JL_CMD_NONE = 0,
+ JL_CMD_WRITE,
+ JL_CMD_BWRITE,
+ JL_CMD_DELAY
+};
+
+enum jl_cmd_flag_e {
+ JL_CMD_FLAG_DA = 0,
+ JL_CMD_FLAG_IDA,
+ /* burst write size in word */
+};
+
+struct jl_cmd_line_s {
+ jl_uint8 cmd; //cmd=1, write;cmd=2, burst write;cmd=3, dealy
+ jl_uint8 flag; //flag=0, DA；flag=1, IDA;if cmd==2,flag=burst size
+ jl_uint32 addr; //regiter SMI access address
+ jl_uint32 val; //register value;dealy time ms
+} __attribute__ ((__packed__));
+
+
+struct jl_cmd_line_s g_cmd_line_set_customize[] = {
+
+
+
+};
+
+struct jl_cmd_line_desc_s {
+ struct jl_cmd_line_s *p_line_set;
+ jl_uint32 lines;
+};
+
+struct jl_cmd_line_desc_s g_cmd_line_desc = {
+ .p_line_set = g_cmd_line_set_customize,
+ .lines = JL_ARRAY_SIZE(g_cmd_line_set_customize)
+};
+
+#endif /* CONFIG_JLFE_LOAD_CUSTOMIZED_PATCH */
+#endif /* __JL51XX_DRV_CUSTOMIZED_PATCH_H__ */
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/jl51xx_drv_fc.h b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/jl51xx_drv_fc.h
new file mode 100644
index 0000000..fe4f8b3
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/jl51xx_drv_fc.h
@@ -0,0 +1,53 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+
+#ifndef __JL51XX_DRV_FC_H__
+#define __JL51XX_DRV_FC_H__
+
+#include "jl_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+jl_ret_t jl51xx_taildrop_global_ffa_threshold_set(jl_enable_t enable, jl_uint32 cells);
+jl_ret_t jl51xx_taildrop_global_ffa_threshold_get(jl_enable_t *penable, jl_uint32 *pcells);
+
+jl_ret_t jl51xx_taildrop_port_ffa_threshold_set(jl_port_t phyport, jl_enable_t enable, jl_uint32 cells);
+jl_ret_t jl51xx_taildrop_port_ffa_threshold_get(jl_port_t phyport, jl_enable_t *penable, jl_uint32 *pcells);
+
+jl_ret_t jl51xx_taildrop_enable_set(jl_port_t phyport, jl_enable_t enable);
+jl_ret_t jl51xx_taildrop_enable_get(jl_port_t phyport, jl_enable_t *penable);
+
+jl_ret_t jl51xx_taildrop_enable_set(jl_port_t port, jl_enable_t enable);
+jl_ret_t jl51xx_taildrop_enable_get(jl_port_t port, jl_enable_t *penable);
+
+jl_ret_t jl51xx_ingress_resource_manager_drop_counter_get(jl_uint32 *pcntr);
+
+jl_ret_t jl51xx_port_fc_enable_set(jl_port_t port, jl_enable_t enable);
+jl_ret_t jl51xx_port_fc_enable_get(jl_port_t port, jl_enable_t *penable);
+
+jl_ret_t jl51xx_port_fc_threshold_set(jl_port_t port,
+ jl_uint32 threshold_on, jl_uint32 threshold_off);
+jl_ret_t jl51xx_port_fc_threshold_get(jl_port_t port,
+ jl_uint32 *pthreshold_on, jl_uint32 *pthreshold_off);
+
+jl_ret_t jl51xx_port_fc_pause_time_set(jl_port_t port, jl_uint32 pause_time);
+jl_ret_t jl51xx_port_fc_pause_time_get(jl_port_t port, jl_uint32 *ppause_time);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __JL51XX_DRV_FC_H__ */
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/jl51xx_drv_formal_patch.h b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/jl51xx_drv_formal_patch.h
new file mode 100644
index 0000000..28f625f
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/jl51xx_drv_formal_patch.h
@@ -0,0 +1,2396 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+#ifndef __JL51XX_DRV_FORMAL_PATCH_H__
+#define __JL51XX_DRV_FORMAL_PATCH_H__
+#ifndef __KERNEL__
+#include <stdlib.h>
+#endif
+#include "jl_types.h"
+#include "jl_config.h"
+
+#ifdef CONFIG_JLFE_LOAD_FORMAL_PATCH
+/* Autogenerated file, do not modify */
+
+enum jl_cmd_e {
+ JL_CMD_NONE = 0,
+ JL_CMD_WRITE,
+ JL_CMD_BWRITE,
+ JL_CMD_DELAY
+};
+
+enum jl_cmd_flag_e {
+ JL_CMD_FLAG_DA = 0,
+ JL_CMD_FLAG_IDA,
+ /* burst write size in word */
+};
+
+struct jl_cmd_line_s {
+ jl_uint8 cmd; //cmd=1, write;cmd=2, burst write;cmd=3, dealy
+ jl_uint8 flag; //flag=0, DA；flag=1, IDA;if cmd==2,flag=burst size
+ jl_uint32 addr; //regiter SMI access address
+ jl_uint32 val; //register value;dealy time ms
+}__attribute__ ((__packed__));
+
+#if ((defined CONFIG_JLFE_CHIP_ID_5104) || (defined CONFIG_JLFE_CHIP_ID_51XX) \
+ && (defined CONFIG_JLFE_LOAD_PATCH_VER0))
+struct jl_cmd_line_s g_cmd_line_set_5104_ver0[] = {
+ {1, 1, 0x800000, 0x6e6f},
+ {3, 0, 0, 10000},
+ {1, 1, 0x1200000, 0x40},
+ {1, 1, 0x500006, 0x00189700},
+ {1, 1, 0x500007, 0x80000008},
+ {3, 0, 0, 10000},
+ {1, 1, 0x500016, 0x4000},
+ {1, 1, 0x500017, 0x113},
+ {1, 1, 0x500015, 0x800f},
+ {1, 1, 0x800001, 0x0},
+ {1, 1, 0x800002, 0xeeee},
+ {1, 1, 0x800003, 0xeeee},
+ {1, 1, 0x800001, 0x19},
+ {1, 1, 0x130101b, 0x2000},
+ {1, 1, 0x150101b, 0x2000},
+ {1, 1, 0x170101b, 0x2000},
+ {1, 1, 0x190101b, 0x2000},
+ {1, 1, 0x1b0101b, 0x2000},
+ {1, 1, 0x1d0101b, 0x2000},
+ {1, 1, 0x1f0101b, 0x2000},
+ {1, 1, 0x210101b, 0x2000},
+ {1, 1, 0x800002, 0xfeef},
+ {1, 1, 0x800003, 0xeeef},
+ {1, 1, 0x500016, 0xcd1d},
+ {1, 1, 0x500017, 0xe06f},
+ {1, 1, 0x500015, 0x854c},
+ {1, 1, 0x130101c, 0x200},
+ {1, 1, 0x130101b, 0x400},
+ {1, 1, 0x130101c, 0x0},
+ {1, 1, 0x130101b, 0x800},
+ {1, 1, 0x130101c, 0x04a3},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0x0402},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0x2703},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0xd902},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0xeb09},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0x17b7},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0x0300},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0x670d},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0xa023},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0xc4e7},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0x476d},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0xac23},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0xc4e7},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0x4501},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0x106f},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0x3182},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x1301077, 0xa0b9},
+ {1, 1, 0x1301078, 0x808b},
+ {1, 1, 0x1301079, 0x20},
+ {1, 1, 0x1300318, 0xa0},
+ {1, 1, 0x190101c, 0x200},
+ {1, 1, 0x190101b, 0x400},
+ {1, 1, 0x190101c, 0x0},
+ {1, 1, 0x190101b, 0x800},
+ {1, 1, 0x190101c, 0x04a3},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x190101c, 0x0402},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x190101c, 0x2703},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x190101c, 0xd902},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x190101c, 0xeb09},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x190101c, 0x17b7},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x190101c, 0x0300},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x190101c, 0x670d},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x190101c, 0xa023},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x190101c, 0xc4e7},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x190101c, 0x476d},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x190101c, 0xac23},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x190101c, 0xc4e7},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x190101c, 0x4501},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x190101c, 0x106f},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x190101c, 0x3182},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x1901077, 0xa0b9},
+ {1, 1, 0x1901078, 0x808b},
+ {1, 1, 0x1901079, 0x20},
+ {1, 1, 0x1900318, 0xa0},
+ {1, 1, 0x1b0101c, 0x200},
+ {1, 1, 0x1b0101b, 0x400},
+ {1, 1, 0x1b0101c, 0x0},
+ {1, 1, 0x1b0101b, 0x800},
+ {1, 1, 0x1b0101c, 0x04a3},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b0101c, 0x0402},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b0101c, 0x2703},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b0101c, 0xd902},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b0101c, 0xeb09},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b0101c, 0x17b7},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b0101c, 0x0300},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b0101c, 0x670d},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b0101c, 0xa023},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b0101c, 0xc4e7},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b0101c, 0x476d},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b0101c, 0xac23},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b0101c, 0xc4e7},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b0101c, 0x4501},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b0101c, 0x106f},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b0101c, 0x3182},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b01077, 0xa0b9},
+ {1, 1, 0x1b01078, 0x808b},
+ {1, 1, 0x1b01079, 0x20},
+ {1, 1, 0x1b00318, 0xa0},
+ {1, 1, 0x130101b, 0x1000},
+ {1, 1, 0x170101b, 0x1000},
+ {1, 1, 0x1b0101b, 0x1000},
+ {1, 1, 0x1f0101b, 0x1000},
+ {1, 1, 0x150101b, 0x1000},
+ {1, 1, 0x190101b, 0x1000},
+ {1, 1, 0x1d0101b, 0x1000},
+ {1, 1, 0x210101b, 0x1000},
+ {1, 0, 0x79, 0x40b7},
+ {1, 1, 0x200012, 0xffff},
+ {1, 1, 0x200112, 0xffff},
+ {1, 1, 0x200212, 0xffff},
+ {1, 1, 0x200312, 0xffff},
+ {1, 1, 0x200412, 0xffff},
+ {1, 1, 0x200512, 0xffff},
+ {1, 1, 0x200612, 0xffff},
+ {1, 1, 0x200712, 0xffff},
+ {1, 1, 0x200912, 0xffff},
+ {1, 1, 0x20000a, 0x401001},
+ {1, 1, 0x20010a, 0x401001},
+ {1, 1, 0x20020a, 0x401001},
+ {1, 1, 0x20030a, 0x401001},
+ {1, 1, 0x20040a, 0x401001},
+ {1, 1, 0x20050a, 0x401001},
+ {1, 1, 0x20060a, 0x401001},
+ {1, 1, 0x20070a, 0x401001},
+ {1, 1, 0x20090a, 0x401001},
+ {1, 1, 0x100002, 0x2800a},
+ {1, 1, 0x100078, 0x7735940},
+ {1, 1, 0x100079, 0x0},
+ {1, 1, 0x102adb, 0x0},
+ {1, 1, 0x102af3, 0x0},
+ {1, 0, 0x4, 0xde1},
+ {1, 0, 0x200004, 0xde1},
+ {1, 0, 0x400004, 0xde1},
+ {1, 0, 0x600004, 0xde1},
+ {1, 0, 0x800004, 0xde1},
+ {1, 0, 0xa00004, 0xde1},
+ {1, 0, 0xc00004, 0xde1},
+ {1, 0, 0xe00004, 0xde1},
+ {1, 0, 0x0, 0x3300},
+ {1, 0, 0x200000, 0x3300},
+ {1, 0, 0x400000, 0x3300},
+ {1, 0, 0x600000, 0x3300},
+ {1, 0, 0x800000, 0x3300},
+ {1, 0, 0xa00000, 0x3300},
+ {1, 0, 0xc00000, 0x3300},
+ {1, 0, 0xe00000, 0x3300}
+};
+#else
+struct jl_cmd_line_s g_cmd_line_set_5104_ver0[] = {};
+#endif
+
+
+#if ((defined CONFIG_JLFE_CHIP_ID_5105) || (defined CONFIG_JLFE_CHIP_ID_51XX) \
+ && (defined CONFIG_JLFE_LOAD_PATCH_VER0))
+struct jl_cmd_line_s g_cmd_line_set_5105_ver0[] = {
+ {1, 1, 0x800000, 0x6e6f},
+ {3, 0, 0, 10000},
+ {1, 1, 0x1200000, 0x40},
+ {1, 1, 0x500006, 0x10188700},
+ {1, 1, 0x500007, 0x80000008},
+ {3, 0, 0, 10000},
+ {1, 1, 0x500016, 0x4000},
+ {1, 1, 0x500017, 0x113},
+ {1, 1, 0x500015, 0x800f},
+ {1, 1, 0x800001, 0x0},
+ {1, 1, 0x800002, 0xeeee},
+ {1, 1, 0x800003, 0xeeee},
+ {1, 1, 0x800001, 0xe5},
+ {1, 1, 0x130101b, 0x2000},
+ {1, 1, 0x150101b, 0x2000},
+ {1, 1, 0x170101b, 0x2000},
+ {1, 1, 0x190101b, 0x2000},
+ {1, 1, 0x1b0101b, 0x2000},
+ {1, 1, 0x1d0101b, 0x2000},
+ {1, 1, 0x1f0101b, 0x2000},
+ {1, 1, 0x210101b, 0x2000},
+ {1, 1, 0x800002, 0xefef},
+ {1, 1, 0x800003, 0xfffe},
+ {1, 1, 0x500016, 0xcd1d},
+ {1, 1, 0x500017, 0xe06f},
+ {1, 1, 0x500015, 0x854c},
+ {1, 1, 0x130101c, 0x200},
+ {1, 1, 0x130101b, 0x400},
+ {1, 1, 0x130101c, 0x0},
+ {1, 1, 0x130101b, 0x800},
+ {1, 1, 0x130101c, 0x04a3},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0x0402},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0x2703},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0xd902},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0xeb09},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0x17b7},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0x0300},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0x670d},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0xa023},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0xc4e7},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0x476d},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0xac23},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0xc4e7},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0x4501},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0x106f},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0x3182},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x1301077, 0xa0b9},
+ {1, 1, 0x1301078, 0x808b},
+ {1, 1, 0x1301079, 0x20},
+ {1, 1, 0x1300318, 0xa0},
+ {1, 1, 0x170101c, 0x200},
+ {1, 1, 0x170101b, 0x400},
+ {1, 1, 0x170101c, 0x0},
+ {1, 1, 0x170101b, 0x800},
+ {1, 1, 0x170101c, 0x04a3},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x170101c, 0x0402},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x170101c, 0x2703},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x170101c, 0xd902},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x170101c, 0xeb09},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x170101c, 0x17b7},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x170101c, 0x0300},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x170101c, 0x670d},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x170101c, 0xa023},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x170101c, 0xc4e7},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x170101c, 0x476d},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x170101c, 0xac23},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x170101c, 0xc4e7},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x170101c, 0x4501},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x170101c, 0x106f},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x170101c, 0x3182},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x1701077, 0xa0b9},
+ {1, 1, 0x1701078, 0x808b},
+ {1, 1, 0x1701079, 0x20},
+ {1, 1, 0x1700318, 0xa0},
+ {1, 1, 0x1d0101c, 0x200},
+ {1, 1, 0x1d0101b, 0x400},
+ {1, 1, 0x1d0101c, 0x0},
+ {1, 1, 0x1d0101b, 0x800},
+ {1, 1, 0x1d0101c, 0x04a3},
+ {1, 1, 0x1d0101b, 0x8000},
+ {1, 1, 0x1d0101c, 0x0402},
+ {1, 1, 0x1d0101b, 0x8000},
+ {1, 1, 0x1d0101c, 0x2703},
+ {1, 1, 0x1d0101b, 0x8000},
+ {1, 1, 0x1d0101c, 0xd902},
+ {1, 1, 0x1d0101b, 0x8000},
+ {1, 1, 0x1d0101c, 0xeb09},
+ {1, 1, 0x1d0101b, 0x8000},
+ {1, 1, 0x1d0101c, 0x17b7},
+ {1, 1, 0x1d0101b, 0x8000},
+ {1, 1, 0x1d0101c, 0x0300},
+ {1, 1, 0x1d0101b, 0x8000},
+ {1, 1, 0x1d0101c, 0x670d},
+ {1, 1, 0x1d0101b, 0x8000},
+ {1, 1, 0x1d0101c, 0xa023},
+ {1, 1, 0x1d0101b, 0x8000},
+ {1, 1, 0x1d0101c, 0xc4e7},
+ {1, 1, 0x1d0101b, 0x8000},
+ {1, 1, 0x1d0101c, 0x476d},
+ {1, 1, 0x1d0101b, 0x8000},
+ {1, 1, 0x1d0101c, 0xac23},
+ {1, 1, 0x1d0101b, 0x8000},
+ {1, 1, 0x1d0101c, 0xc4e7},
+ {1, 1, 0x1d0101b, 0x8000},
+ {1, 1, 0x1d0101c, 0x4501},
+ {1, 1, 0x1d0101b, 0x8000},
+ {1, 1, 0x1d0101c, 0x106f},
+ {1, 1, 0x1d0101b, 0x8000},
+ {1, 1, 0x1d0101c, 0x3182},
+ {1, 1, 0x1d0101b, 0x8000},
+ {1, 1, 0x1d01077, 0xa0b9},
+ {1, 1, 0x1d01078, 0x808b},
+ {1, 1, 0x1d01079, 0x20},
+ {1, 1, 0x1d00318, 0xa0},
+ {1, 1, 0x1f0101c, 0x200},
+ {1, 1, 0x1f0101b, 0x400},
+ {1, 1, 0x1f0101c, 0x0},
+ {1, 1, 0x1f0101b, 0x800},
+ {1, 1, 0x1f0101c, 0x04a3},
+ {1, 1, 0x1f0101b, 0x8000},
+ {1, 1, 0x1f0101c, 0x0402},
+ {1, 1, 0x1f0101b, 0x8000},
+ {1, 1, 0x1f0101c, 0x2703},
+ {1, 1, 0x1f0101b, 0x8000},
+ {1, 1, 0x1f0101c, 0xd902},
+ {1, 1, 0x1f0101b, 0x8000},
+ {1, 1, 0x1f0101c, 0xeb09},
+ {1, 1, 0x1f0101b, 0x8000},
+ {1, 1, 0x1f0101c, 0x17b7},
+ {1, 1, 0x1f0101b, 0x8000},
+ {1, 1, 0x1f0101c, 0x0300},
+ {1, 1, 0x1f0101b, 0x8000},
+ {1, 1, 0x1f0101c, 0x670d},
+ {1, 1, 0x1f0101b, 0x8000},
+ {1, 1, 0x1f0101c, 0xa023},
+ {1, 1, 0x1f0101b, 0x8000},
+ {1, 1, 0x1f0101c, 0xc4e7},
+ {1, 1, 0x1f0101b, 0x8000},
+ {1, 1, 0x1f0101c, 0x476d},
+ {1, 1, 0x1f0101b, 0x8000},
+ {1, 1, 0x1f0101c, 0xac23},
+ {1, 1, 0x1f0101b, 0x8000},
+ {1, 1, 0x1f0101c, 0xc4e7},
+ {1, 1, 0x1f0101b, 0x8000},
+ {1, 1, 0x1f0101c, 0x4501},
+ {1, 1, 0x1f0101b, 0x8000},
+ {1, 1, 0x1f0101c, 0x106f},
+ {1, 1, 0x1f0101b, 0x8000},
+ {1, 1, 0x1f0101c, 0x3182},
+ {1, 1, 0x1f0101b, 0x8000},
+ {1, 1, 0x1f01077, 0xa0b9},
+ {1, 1, 0x1f01078, 0x808b},
+ {1, 1, 0x1f01079, 0x20},
+ {1, 1, 0x1f00318, 0xa0},
+ {1, 1, 0x210101c, 0x200},
+ {1, 1, 0x210101b, 0x400},
+ {1, 1, 0x210101c, 0x0},
+ {1, 1, 0x210101b, 0x800},
+ {1, 1, 0x210101c, 0x04a3},
+ {1, 1, 0x210101b, 0x8000},
+ {1, 1, 0x210101c, 0x0402},
+ {1, 1, 0x210101b, 0x8000},
+ {1, 1, 0x210101c, 0x2703},
+ {1, 1, 0x210101b, 0x8000},
+ {1, 1, 0x210101c, 0xd902},
+ {1, 1, 0x210101b, 0x8000},
+ {1, 1, 0x210101c, 0xeb09},
+ {1, 1, 0x210101b, 0x8000},
+ {1, 1, 0x210101c, 0x17b7},
+ {1, 1, 0x210101b, 0x8000},
+ {1, 1, 0x210101c, 0x0300},
+ {1, 1, 0x210101b, 0x8000},
+ {1, 1, 0x210101c, 0x670d},
+ {1, 1, 0x210101b, 0x8000},
+ {1, 1, 0x210101c, 0xa023},
+ {1, 1, 0x210101b, 0x8000},
+ {1, 1, 0x210101c, 0xc4e7},
+ {1, 1, 0x210101b, 0x8000},
+ {1, 1, 0x210101c, 0x476d},
+ {1, 1, 0x210101b, 0x8000},
+ {1, 1, 0x210101c, 0xac23},
+ {1, 1, 0x210101b, 0x8000},
+ {1, 1, 0x210101c, 0xc4e7},
+ {1, 1, 0x210101b, 0x8000},
+ {1, 1, 0x210101c, 0x4501},
+ {1, 1, 0x210101b, 0x8000},
+ {1, 1, 0x210101c, 0x106f},
+ {1, 1, 0x210101b, 0x8000},
+ {1, 1, 0x210101c, 0x3182},
+ {1, 1, 0x210101b, 0x8000},
+ {1, 1, 0x2101077, 0xa0b9},
+ {1, 1, 0x2101078, 0x808b},
+ {1, 1, 0x2101079, 0x20},
+ {1, 1, 0x2100318, 0xa0},
+ {1, 1, 0x130101b, 0x1000},
+ {1, 1, 0x170101b, 0x1000},
+ {1, 1, 0x1b0101b, 0x1000},
+ {1, 1, 0x1f0101b, 0x1000},
+ {1, 1, 0x150101b, 0x1000},
+ {1, 1, 0x190101b, 0x1000},
+ {1, 1, 0x1d0101b, 0x1000},
+ {1, 1, 0x210101b, 0x1000},
+ {1, 0, 0x79, 0x0},
+ {1, 1, 0x200012, 0xffff},
+ {1, 1, 0x200112, 0xffff},
+ {1, 1, 0x200212, 0xffff},
+ {1, 1, 0x200312, 0xffff},
+ {1, 1, 0x200412, 0xffff},
+ {1, 1, 0x200512, 0xffff},
+ {1, 1, 0x200612, 0xffff},
+ {1, 1, 0x200712, 0xffff},
+ {1, 1, 0x200912, 0xffff},
+ {1, 1, 0x20000a, 0x401001},
+ {1, 1, 0x20010a, 0x401001},
+ {1, 1, 0x20020a, 0x401001},
+ {1, 1, 0x20030a, 0x401001},
+ {1, 1, 0x20040a, 0x401001},
+ {1, 1, 0x20050a, 0x401001},
+ {1, 1, 0x20060a, 0x401001},
+ {1, 1, 0x20070a, 0x401001},
+ {1, 1, 0x20090a, 0x401001},
+ {1, 1, 0x100002, 0x2800a},
+ {1, 1, 0x100078, 0x7735940},
+ {1, 1, 0x100079, 0x0},
+ {1, 1, 0x102adb, 0x0},
+ {1, 1, 0x102af3, 0x0},
+ {1, 0, 0x4, 0xde1},
+ {1, 0, 0x200004, 0xde1},
+ {1, 0, 0x400004, 0xde1},
+ {1, 0, 0x600004, 0xde1},
+ {1, 0, 0x800004, 0xde1},
+ {1, 0, 0xa00004, 0xde1},
+ {1, 0, 0xc00004, 0xde1},
+ {1, 0, 0xe00004, 0xde1},
+ {1, 0, 0x0, 0x3300},
+ {1, 0, 0x200000, 0x3300},
+ {1, 0, 0x400000, 0x3300},
+ {1, 0, 0x600000, 0x3300},
+ {1, 0, 0x800000, 0x3300},
+ {1, 0, 0xa00000, 0x3300},
+ {1, 0, 0xc00000, 0x3300},
+ {1, 0, 0xe00000, 0x3300}
+};
+#else
+struct jl_cmd_line_s g_cmd_line_set_5105_ver0[] = {};
+#endif
+
+
+#if ((defined CONFIG_JLFE_CHIP_ID_5106) || (defined CONFIG_JLFE_CHIP_ID_51XX) \
+ && (defined CONFIG_JLFE_LOAD_PATCH_VER0))
+struct jl_cmd_line_s g_cmd_line_set_5106_ver0[] = {
+ {1, 1, 0x800000, 0x6e6f},
+ {3, 0, 0, 10000},
+ {1, 1, 0x1200000, 0x21},
+ {1, 1, 0x500006, 0x20188700},
+ {1, 1, 0x500007, 0x80000008},
+ {3, 0, 0, 10000},
+ {1, 1, 0x500016, 0x4000},
+ {1, 1, 0x500017, 0x113},
+ {1, 1, 0x500015, 0x800f},
+ {1, 1, 0x800001, 0x0},
+ {1, 1, 0x800002, 0xeeee},
+ {1, 1, 0x800003, 0xeeee},
+ {1, 1, 0x800001, 0x1f},
+ {1, 1, 0x130101b, 0x2000},
+ {1, 1, 0x150101b, 0x2000},
+ {1, 1, 0x170101b, 0x2000},
+ {1, 1, 0x190101b, 0x2000},
+ {1, 1, 0x1b0101b, 0x2000},
+ {1, 1, 0x1d0101b, 0x2000},
+ {1, 1, 0x1f0101b, 0x2000},
+ {1, 1, 0x210101b, 0x2000},
+ {1, 1, 0x800002, 0xffff},
+ {1, 1, 0x800003, 0xeeef},
+ {1, 1, 0x500016, 0xcd1d},
+ {1, 1, 0x500017, 0xe06f},
+ {1, 1, 0x500015, 0x854c},
+ {1, 1, 0x130101c, 0x200},
+ {1, 1, 0x130101b, 0x400},
+ {1, 1, 0x130101c, 0x0},
+ {1, 1, 0x130101b, 0x800},
+ {1, 1, 0x130101c, 0x04a3},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0x0402},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0x2703},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0xd902},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0xeb09},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0x17b7},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0x0300},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0x670d},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0xa023},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0xc4e7},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0x476d},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0xac23},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0xc4e7},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0x4501},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0x106f},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0x3182},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x1301077, 0xa0b9},
+ {1, 1, 0x1301078, 0x808b},
+ {1, 1, 0x1301079, 0x20},
+ {1, 1, 0x1300318, 0xa0},
+ {1, 1, 0x150101c, 0x200},
+ {1, 1, 0x150101b, 0x400},
+ {1, 1, 0x150101c, 0x0},
+ {1, 1, 0x150101b, 0x800},
+ {1, 1, 0x150101c, 0x04a3},
+ {1, 1, 0x150101b, 0x8000},
+ {1, 1, 0x150101c, 0x0402},
+ {1, 1, 0x150101b, 0x8000},
+ {1, 1, 0x150101c, 0x2703},
+ {1, 1, 0x150101b, 0x8000},
+ {1, 1, 0x150101c, 0xd902},
+ {1, 1, 0x150101b, 0x8000},
+ {1, 1, 0x150101c, 0xeb09},
+ {1, 1, 0x150101b, 0x8000},
+ {1, 1, 0x150101c, 0x17b7},
+ {1, 1, 0x150101b, 0x8000},
+ {1, 1, 0x150101c, 0x0300},
+ {1, 1, 0x150101b, 0x8000},
+ {1, 1, 0x150101c, 0x670d},
+ {1, 1, 0x150101b, 0x8000},
+ {1, 1, 0x150101c, 0xa023},
+ {1, 1, 0x150101b, 0x8000},
+ {1, 1, 0x150101c, 0xc4e7},
+ {1, 1, 0x150101b, 0x8000},
+ {1, 1, 0x150101c, 0x476d},
+ {1, 1, 0x150101b, 0x8000},
+ {1, 1, 0x150101c, 0xac23},
+ {1, 1, 0x150101b, 0x8000},
+ {1, 1, 0x150101c, 0xc4e7},
+ {1, 1, 0x150101b, 0x8000},
+ {1, 1, 0x150101c, 0x4501},
+ {1, 1, 0x150101b, 0x8000},
+ {1, 1, 0x150101c, 0x106f},
+ {1, 1, 0x150101b, 0x8000},
+ {1, 1, 0x150101c, 0x3182},
+ {1, 1, 0x150101b, 0x8000},
+ {1, 1, 0x1501077, 0xa0b9},
+ {1, 1, 0x1501078, 0x808b},
+ {1, 1, 0x1501079, 0x20},
+ {1, 1, 0x1500318, 0xa0},
+ {1, 1, 0x170101c, 0x200},
+ {1, 1, 0x170101b, 0x400},
+ {1, 1, 0x170101c, 0x0},
+ {1, 1, 0x170101b, 0x800},
+ {1, 1, 0x170101c, 0x04a3},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x170101c, 0x0402},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x170101c, 0x2703},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x170101c, 0xd902},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x170101c, 0xeb09},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x170101c, 0x17b7},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x170101c, 0x0300},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x170101c, 0x670d},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x170101c, 0xa023},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x170101c, 0xc4e7},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x170101c, 0x476d},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x170101c, 0xac23},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x170101c, 0xc4e7},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x170101c, 0x4501},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x170101c, 0x106f},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x170101c, 0x3182},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x1701077, 0xa0b9},
+ {1, 1, 0x1701078, 0x808b},
+ {1, 1, 0x1701079, 0x20},
+ {1, 1, 0x1700318, 0xa0},
+ {1, 1, 0x190101c, 0x200},
+ {1, 1, 0x190101b, 0x400},
+ {1, 1, 0x190101c, 0x0},
+ {1, 1, 0x190101b, 0x800},
+ {1, 1, 0x190101c, 0x04a3},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x190101c, 0x0402},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x190101c, 0x2703},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x190101c, 0xd902},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x190101c, 0xeb09},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x190101c, 0x17b7},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x190101c, 0x0300},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x190101c, 0x670d},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x190101c, 0xa023},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x190101c, 0xc4e7},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x190101c, 0x476d},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x190101c, 0xac23},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x190101c, 0xc4e7},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x190101c, 0x4501},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x190101c, 0x106f},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x190101c, 0x3182},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x1901077, 0xa0b9},
+ {1, 1, 0x1901078, 0x808b},
+ {1, 1, 0x1901079, 0x20},
+ {1, 1, 0x1900318, 0xa0},
+ {1, 1, 0x1b0101c, 0x200},
+ {1, 1, 0x1b0101b, 0x400},
+ {1, 1, 0x1b0101c, 0x0},
+ {1, 1, 0x1b0101b, 0x800},
+ {1, 1, 0x1b0101c, 0x04a3},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b0101c, 0x0402},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b0101c, 0x2703},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b0101c, 0xd902},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b0101c, 0xeb09},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b0101c, 0x17b7},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b0101c, 0x0300},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b0101c, 0x670d},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b0101c, 0xa023},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b0101c, 0xc4e7},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b0101c, 0x476d},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b0101c, 0xac23},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b0101c, 0xc4e7},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b0101c, 0x4501},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b0101c, 0x106f},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b0101c, 0x3182},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b01077, 0xa0b9},
+ {1, 1, 0x1b01078, 0x808b},
+ {1, 1, 0x1b01079, 0x20},
+ {1, 1, 0x1b00318, 0xa0},
+ {1, 1, 0x130101b, 0x1000},
+ {1, 1, 0x170101b, 0x1000},
+ {1, 1, 0x1b0101b, 0x1000},
+ {1, 1, 0x1f0101b, 0x1000},
+ {1, 1, 0x150101b, 0x1000},
+ {1, 1, 0x190101b, 0x1000},
+ {1, 1, 0x1d0101b, 0x1000},
+ {1, 1, 0x210101b, 0x1000},
+ {1, 0, 0x79, 0x40b7},
+ {1, 1, 0x200012, 0xffff},
+ {1, 1, 0x200112, 0xffff},
+ {1, 1, 0x200212, 0xffff},
+ {1, 1, 0x200312, 0xffff},
+ {1, 1, 0x200412, 0xffff},
+ {1, 1, 0x200912, 0xffff},
+ {1, 1, 0x20000a, 0x401001},
+ {1, 1, 0x20010a, 0x401001},
+ {1, 1, 0x20020a, 0x401001},
+ {1, 1, 0x20030a, 0x401001},
+ {1, 1, 0x20040a, 0x401001},
+ {1, 1, 0x20050a, 0x401001},
+ {1, 1, 0x20060a, 0x401001},
+ {1, 1, 0x20070a, 0x401001},
+ {1, 1, 0x20090a, 0x401001},
+ {1, 1, 0x100002, 0x2800a},
+ {1, 1, 0x100078, 0x7735940},
+ {1, 1, 0x100079, 0x0},
+ {1, 1, 0x102adb, 0x0},
+ {1, 1, 0x102af3, 0x0},
+ {1, 0, 0x4, 0xde1},
+ {1, 0, 0x200004, 0xde1},
+ {1, 0, 0x400004, 0xde1},
+ {1, 0, 0x600004, 0xde1},
+ {1, 0, 0x800004, 0xde1},
+ {1, 0, 0xa00004, 0xde1},
+ {1, 0, 0xc00004, 0xde1},
+ {1, 0, 0xe00004, 0xde1},
+ {1, 0, 0x0, 0x3300},
+ {1, 0, 0x200000, 0x3300},
+ {1, 0, 0x400000, 0x3300},
+ {1, 0, 0x600000, 0x3300},
+ {1, 0, 0x800000, 0x3300},
+ {1, 0, 0xa00000, 0x3300},
+ {1, 0, 0xc00000, 0x3300},
+ {1, 0, 0xe00000, 0x3300}
+};
+#else
+struct jl_cmd_line_s g_cmd_line_set_5106_ver0[] = {};
+#endif
+
+
+#if ((defined CONFIG_JLFE_CHIP_ID_5108) || (defined CONFIG_JLFE_CHIP_ID_51XX) \
+ && (defined CONFIG_JLFE_LOAD_PATCH_VER0))
+struct jl_cmd_line_s g_cmd_line_set_5108_ver0[] = {
+ {1, 1, 0x800000, 0x6e6f},
+ {3, 0, 0, 10000},
+ {1, 1, 0x1200000, 0x40},
+ {1, 1, 0x500006, 0x30188700},
+ {1, 1, 0x500007, 0x80000008},
+ {3, 0, 0, 10000},
+ {1, 1, 0x500016, 0x4000},
+ {1, 1, 0x500017, 0x113},
+ {1, 1, 0x500015, 0x800f},
+ {1, 1, 0x800001, 0x0},
+ {1, 1, 0x800002, 0xeeee},
+ {1, 1, 0x800003, 0xeeee},
+ {1, 1, 0x800001, 0xff},
+ {1, 1, 0x130101b, 0x2000},
+ {1, 1, 0x150101b, 0x2000},
+ {1, 1, 0x170101b, 0x2000},
+ {1, 1, 0x190101b, 0x2000},
+ {1, 1, 0x1b0101b, 0x2000},
+ {1, 1, 0x1d0101b, 0x2000},
+ {1, 1, 0x1f0101b, 0x2000},
+ {1, 1, 0x210101b, 0x2000},
+ {1, 1, 0x800002, 0xffff},
+ {1, 1, 0x800003, 0xffff},
+ {1, 1, 0x500016, 0xcd1d},
+ {1, 1, 0x500017, 0xe06f},
+ {1, 1, 0x500015, 0x854c},
+ {1, 1, 0x130101c, 0x200},
+ {1, 1, 0x130101b, 0x400},
+ {1, 1, 0x130101c, 0x0},
+ {1, 1, 0x130101b, 0x800},
+ {1, 1, 0x130101c, 0x04a3},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0x0402},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0x2703},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0xd902},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0xeb09},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0x17b7},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0x0300},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0x670d},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0xa023},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0xc4e7},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0x476d},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0xac23},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0xc4e7},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0x4501},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0x106f},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0x3182},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x1301077, 0xa0b9},
+ {1, 1, 0x1301078, 0x808b},
+ {1, 1, 0x1301079, 0x20},
+ {1, 1, 0x1300318, 0xa0},
+ {1, 1, 0x150101c, 0x200},
+ {1, 1, 0x150101b, 0x400},
+ {1, 1, 0x150101c, 0x0},
+ {1, 1, 0x150101b, 0x800},
+ {1, 1, 0x150101c, 0x04a3},
+ {1, 1, 0x150101b, 0x8000},
+ {1, 1, 0x150101c, 0x0402},
+ {1, 1, 0x150101b, 0x8000},
+ {1, 1, 0x150101c, 0x2703},
+ {1, 1, 0x150101b, 0x8000},
+ {1, 1, 0x150101c, 0xd902},
+ {1, 1, 0x150101b, 0x8000},
+ {1, 1, 0x150101c, 0xeb09},
+ {1, 1, 0x150101b, 0x8000},
+ {1, 1, 0x150101c, 0x17b7},
+ {1, 1, 0x150101b, 0x8000},
+ {1, 1, 0x150101c, 0x0300},
+ {1, 1, 0x150101b, 0x8000},
+ {1, 1, 0x150101c, 0x670d},
+ {1, 1, 0x150101b, 0x8000},
+ {1, 1, 0x150101c, 0xa023},
+ {1, 1, 0x150101b, 0x8000},
+ {1, 1, 0x150101c, 0xc4e7},
+ {1, 1, 0x150101b, 0x8000},
+ {1, 1, 0x150101c, 0x476d},
+ {1, 1, 0x150101b, 0x8000},
+ {1, 1, 0x150101c, 0xac23},
+ {1, 1, 0x150101b, 0x8000},
+ {1, 1, 0x150101c, 0xc4e7},
+ {1, 1, 0x150101b, 0x8000},
+ {1, 1, 0x150101c, 0x4501},
+ {1, 1, 0x150101b, 0x8000},
+ {1, 1, 0x150101c, 0x106f},
+ {1, 1, 0x150101b, 0x8000},
+ {1, 1, 0x150101c, 0x3182},
+ {1, 1, 0x150101b, 0x8000},
+ {1, 1, 0x1501077, 0xa0b9},
+ {1, 1, 0x1501078, 0x808b},
+ {1, 1, 0x1501079, 0x20},
+ {1, 1, 0x1500318, 0xa0},
+ {1, 1, 0x170101c, 0x200},
+ {1, 1, 0x170101b, 0x400},
+ {1, 1, 0x170101c, 0x0},
+ {1, 1, 0x170101b, 0x800},
+ {1, 1, 0x170101c, 0x04a3},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x170101c, 0x0402},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x170101c, 0x2703},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x170101c, 0xd902},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x170101c, 0xeb09},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x170101c, 0x17b7},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x170101c, 0x0300},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x170101c, 0x670d},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x170101c, 0xa023},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x170101c, 0xc4e7},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x170101c, 0x476d},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x170101c, 0xac23},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x170101c, 0xc4e7},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x170101c, 0x4501},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x170101c, 0x106f},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x170101c, 0x3182},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x1701077, 0xa0b9},
+ {1, 1, 0x1701078, 0x808b},
+ {1, 1, 0x1701079, 0x20},
+ {1, 1, 0x1700318, 0xa0},
+ {1, 1, 0x190101c, 0x200},
+ {1, 1, 0x190101b, 0x400},
+ {1, 1, 0x190101c, 0x0},
+ {1, 1, 0x190101b, 0x800},
+ {1, 1, 0x190101c, 0x04a3},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x190101c, 0x0402},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x190101c, 0x2703},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x190101c, 0xd902},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x190101c, 0xeb09},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x190101c, 0x17b7},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x190101c, 0x0300},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x190101c, 0x670d},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x190101c, 0xa023},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x190101c, 0xc4e7},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x190101c, 0x476d},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x190101c, 0xac23},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x190101c, 0xc4e7},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x190101c, 0x4501},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x190101c, 0x106f},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x190101c, 0x3182},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x1901077, 0xa0b9},
+ {1, 1, 0x1901078, 0x808b},
+ {1, 1, 0x1901079, 0x20},
+ {1, 1, 0x1900318, 0xa0},
+ {1, 1, 0x1b0101c, 0x200},
+ {1, 1, 0x1b0101b, 0x400},
+ {1, 1, 0x1b0101c, 0x0},
+ {1, 1, 0x1b0101b, 0x800},
+ {1, 1, 0x1b0101c, 0x04a3},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b0101c, 0x0402},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b0101c, 0x2703},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b0101c, 0xd902},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b0101c, 0xeb09},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b0101c, 0x17b7},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b0101c, 0x0300},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b0101c, 0x670d},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b0101c, 0xa023},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b0101c, 0xc4e7},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b0101c, 0x476d},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b0101c, 0xac23},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b0101c, 0xc4e7},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b0101c, 0x4501},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b0101c, 0x106f},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b0101c, 0x3182},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b01077, 0xa0b9},
+ {1, 1, 0x1b01078, 0x808b},
+ {1, 1, 0x1b01079, 0x20},
+ {1, 1, 0x1b00318, 0xa0},
+ {1, 1, 0x1d0101c, 0x200},
+ {1, 1, 0x1d0101b, 0x400},
+ {1, 1, 0x1d0101c, 0x0},
+ {1, 1, 0x1d0101b, 0x800},
+ {1, 1, 0x1d0101c, 0x04a3},
+ {1, 1, 0x1d0101b, 0x8000},
+ {1, 1, 0x1d0101c, 0x0402},
+ {1, 1, 0x1d0101b, 0x8000},
+ {1, 1, 0x1d0101c, 0x2703},
+ {1, 1, 0x1d0101b, 0x8000},
+ {1, 1, 0x1d0101c, 0xd902},
+ {1, 1, 0x1d0101b, 0x8000},
+ {1, 1, 0x1d0101c, 0xeb09},
+ {1, 1, 0x1d0101b, 0x8000},
+ {1, 1, 0x1d0101c, 0x17b7},
+ {1, 1, 0x1d0101b, 0x8000},
+ {1, 1, 0x1d0101c, 0x0300},
+ {1, 1, 0x1d0101b, 0x8000},
+ {1, 1, 0x1d0101c, 0x670d},
+ {1, 1, 0x1d0101b, 0x8000},
+ {1, 1, 0x1d0101c, 0xa023},
+ {1, 1, 0x1d0101b, 0x8000},
+ {1, 1, 0x1d0101c, 0xc4e7},
+ {1, 1, 0x1d0101b, 0x8000},
+ {1, 1, 0x1d0101c, 0x476d},
+ {1, 1, 0x1d0101b, 0x8000},
+ {1, 1, 0x1d0101c, 0xac23},
+ {1, 1, 0x1d0101b, 0x8000},
+ {1, 1, 0x1d0101c, 0xc4e7},
+ {1, 1, 0x1d0101b, 0x8000},
+ {1, 1, 0x1d0101c, 0x4501},
+ {1, 1, 0x1d0101b, 0x8000},
+ {1, 1, 0x1d0101c, 0x106f},
+ {1, 1, 0x1d0101b, 0x8000},
+ {1, 1, 0x1d0101c, 0x3182},
+ {1, 1, 0x1d0101b, 0x8000},
+ {1, 1, 0x1d01077, 0xa0b9},
+ {1, 1, 0x1d01078, 0x808b},
+ {1, 1, 0x1d01079, 0x20},
+ {1, 1, 0x1d00318, 0xa0},
+ {1, 1, 0x1f0101c, 0x200},
+ {1, 1, 0x1f0101b, 0x400},
+ {1, 1, 0x1f0101c, 0x0},
+ {1, 1, 0x1f0101b, 0x800},
+ {1, 1, 0x1f0101c, 0x04a3},
+ {1, 1, 0x1f0101b, 0x8000},
+ {1, 1, 0x1f0101c, 0x0402},
+ {1, 1, 0x1f0101b, 0x8000},
+ {1, 1, 0x1f0101c, 0x2703},
+ {1, 1, 0x1f0101b, 0x8000},
+ {1, 1, 0x1f0101c, 0xd902},
+ {1, 1, 0x1f0101b, 0x8000},
+ {1, 1, 0x1f0101c, 0xeb09},
+ {1, 1, 0x1f0101b, 0x8000},
+ {1, 1, 0x1f0101c, 0x17b7},
+ {1, 1, 0x1f0101b, 0x8000},
+ {1, 1, 0x1f0101c, 0x0300},
+ {1, 1, 0x1f0101b, 0x8000},
+ {1, 1, 0x1f0101c, 0x670d},
+ {1, 1, 0x1f0101b, 0x8000},
+ {1, 1, 0x1f0101c, 0xa023},
+ {1, 1, 0x1f0101b, 0x8000},
+ {1, 1, 0x1f0101c, 0xc4e7},
+ {1, 1, 0x1f0101b, 0x8000},
+ {1, 1, 0x1f0101c, 0x476d},
+ {1, 1, 0x1f0101b, 0x8000},
+ {1, 1, 0x1f0101c, 0xac23},
+ {1, 1, 0x1f0101b, 0x8000},
+ {1, 1, 0x1f0101c, 0xc4e7},
+ {1, 1, 0x1f0101b, 0x8000},
+ {1, 1, 0x1f0101c, 0x4501},
+ {1, 1, 0x1f0101b, 0x8000},
+ {1, 1, 0x1f0101c, 0x106f},
+ {1, 1, 0x1f0101b, 0x8000},
+ {1, 1, 0x1f0101c, 0x3182},
+ {1, 1, 0x1f0101b, 0x8000},
+ {1, 1, 0x1f01077, 0xa0b9},
+ {1, 1, 0x1f01078, 0x808b},
+ {1, 1, 0x1f01079, 0x20},
+ {1, 1, 0x1f00318, 0xa0},
+ {1, 1, 0x210101c, 0x200},
+ {1, 1, 0x210101b, 0x400},
+ {1, 1, 0x210101c, 0x0},
+ {1, 1, 0x210101b, 0x800},
+ {1, 1, 0x210101c, 0x04a3},
+ {1, 1, 0x210101b, 0x8000},
+ {1, 1, 0x210101c, 0x0402},
+ {1, 1, 0x210101b, 0x8000},
+ {1, 1, 0x210101c, 0x2703},
+ {1, 1, 0x210101b, 0x8000},
+ {1, 1, 0x210101c, 0xd902},
+ {1, 1, 0x210101b, 0x8000},
+ {1, 1, 0x210101c, 0xeb09},
+ {1, 1, 0x210101b, 0x8000},
+ {1, 1, 0x210101c, 0x17b7},
+ {1, 1, 0x210101b, 0x8000},
+ {1, 1, 0x210101c, 0x0300},
+ {1, 1, 0x210101b, 0x8000},
+ {1, 1, 0x210101c, 0x670d},
+ {1, 1, 0x210101b, 0x8000},
+ {1, 1, 0x210101c, 0xa023},
+ {1, 1, 0x210101b, 0x8000},
+ {1, 1, 0x210101c, 0xc4e7},
+ {1, 1, 0x210101b, 0x8000},
+ {1, 1, 0x210101c, 0x476d},
+ {1, 1, 0x210101b, 0x8000},
+ {1, 1, 0x210101c, 0xac23},
+ {1, 1, 0x210101b, 0x8000},
+ {1, 1, 0x210101c, 0xc4e7},
+ {1, 1, 0x210101b, 0x8000},
+ {1, 1, 0x210101c, 0x4501},
+ {1, 1, 0x210101b, 0x8000},
+ {1, 1, 0x210101c, 0x106f},
+ {1, 1, 0x210101b, 0x8000},
+ {1, 1, 0x210101c, 0x3182},
+ {1, 1, 0x210101b, 0x8000},
+ {1, 1, 0x2101077, 0xa0b9},
+ {1, 1, 0x2101078, 0x808b},
+ {1, 1, 0x2101079, 0x20},
+ {1, 1, 0x2100318, 0xa0},
+ {1, 1, 0x130101b, 0x1000},
+ {1, 1, 0x170101b, 0x1000},
+ {1, 1, 0x1b0101b, 0x1000},
+ {1, 1, 0x1f0101b, 0x1000},
+ {1, 1, 0x150101b, 0x1000},
+ {1, 1, 0x190101b, 0x1000},
+ {1, 1, 0x1d0101b, 0x1000},
+ {1, 1, 0x210101b, 0x1000},
+ {1, 0, 0x79, 0x0},
+ {1, 1, 0x200012, 0xffff},
+ {1, 1, 0x200112, 0xffff},
+ {1, 1, 0x200212, 0xffff},
+ {1, 1, 0x200312, 0xffff},
+ {1, 1, 0x200412, 0xffff},
+ {1, 1, 0x200512, 0xffff},
+ {1, 1, 0x200612, 0xffff},
+ {1, 1, 0x200712, 0xffff},
+ {1, 1, 0x20000a, 0x401001},
+ {1, 1, 0x20010a, 0x401001},
+ {1, 1, 0x20020a, 0x401001},
+ {1, 1, 0x20030a, 0x401001},
+ {1, 1, 0x20040a, 0x401001},
+ {1, 1, 0x20050a, 0x401001},
+ {1, 1, 0x20060a, 0x401001},
+ {1, 1, 0x20070a, 0x401001},
+ {1, 1, 0x20090a, 0x401001},
+ {1, 1, 0x100002, 0x2800a},
+ {1, 1, 0x100078, 0x7735940},
+ {1, 1, 0x100079, 0x0},
+ {1, 1, 0x102adb, 0x0},
+ {1, 1, 0x102af3, 0x0},
+ {1, 0, 0x4, 0xde1},
+ {1, 0, 0x200004, 0xde1},
+ {1, 0, 0x400004, 0xde1},
+ {1, 0, 0x600004, 0xde1},
+ {1, 0, 0x800004, 0xde1},
+ {1, 0, 0xa00004, 0xde1},
+ {1, 0, 0xc00004, 0xde1},
+ {1, 0, 0xe00004, 0xde1},
+ {1, 0, 0x0, 0x3300},
+ {1, 0, 0x200000, 0x3300},
+ {1, 0, 0x400000, 0x3300},
+ {1, 0, 0x600000, 0x3300},
+ {1, 0, 0x800000, 0x3300},
+ {1, 0, 0xa00000, 0x3300},
+ {1, 0, 0xc00000, 0x3300},
+ {1, 0, 0xe00000, 0x3300}
+};
+#else
+struct jl_cmd_line_s g_cmd_line_set_5108_ver0[] = {};
+#endif
+
+
+#if ((defined CONFIG_JLFE_CHIP_ID_5109) || (defined CONFIG_JLFE_CHIP_ID_51XX) \
+ && (defined CONFIG_JLFE_LOAD_PATCH_VER0))
+struct jl_cmd_line_s g_cmd_line_set_5109_ver0[] = {
+ {1, 1, 0x800000, 0x6e6f},
+ {3, 0, 0, 10000},
+ {1, 1, 0x1200000, 0x50},
+ {1, 1, 0x500006, 0x40188700},
+ {1, 1, 0x500007, 0x80000008},
+ {3, 0, 0, 10000},
+ {1, 1, 0x500016, 0x4000},
+ {1, 1, 0x500017, 0x113},
+ {1, 1, 0x500015, 0x800f},
+ {1, 1, 0x800001, 0x0},
+ {1, 1, 0x800002, 0xeeee},
+ {1, 1, 0x800003, 0xeeee},
+ {1, 1, 0x800001, 0xff},
+ {1, 1, 0x130101b, 0x2000},
+ {1, 1, 0x150101b, 0x2000},
+ {1, 1, 0x170101b, 0x2000},
+ {1, 1, 0x190101b, 0x2000},
+ {1, 1, 0x1b0101b, 0x2000},
+ {1, 1, 0x1d0101b, 0x2000},
+ {1, 1, 0x1f0101b, 0x2000},
+ {1, 1, 0x210101b, 0x2000},
+ {1, 1, 0x800002, 0xffff},
+ {1, 1, 0x800003, 0xffff},
+ {1, 1, 0x500016, 0xcd1d},
+ {1, 1, 0x500017, 0xe06f},
+ {1, 1, 0x500015, 0x854c},
+ {1, 1, 0x130101c, 0x200},
+ {1, 1, 0x130101b, 0x400},
+ {1, 1, 0x130101c, 0x0},
+ {1, 1, 0x130101b, 0x800},
+ {1, 1, 0x130101c, 0x04a3},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0x0402},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0x2703},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0xd902},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0xeb09},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0x17b7},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0x0300},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0x670d},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0xa023},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0xc4e7},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0x476d},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0xac23},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0xc4e7},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0x4501},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0x106f},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0x3182},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x1301077, 0xa0b9},
+ {1, 1, 0x1301078, 0x808b},
+ {1, 1, 0x1301079, 0x20},
+ {1, 1, 0x1300318, 0xa0},
+ {1, 1, 0x150101c, 0x200},
+ {1, 1, 0x150101b, 0x400},
+ {1, 1, 0x150101c, 0x0},
+ {1, 1, 0x150101b, 0x800},
+ {1, 1, 0x150101c, 0x04a3},
+ {1, 1, 0x150101b, 0x8000},
+ {1, 1, 0x150101c, 0x0402},
+ {1, 1, 0x150101b, 0x8000},
+ {1, 1, 0x150101c, 0x2703},
+ {1, 1, 0x150101b, 0x8000},
+ {1, 1, 0x150101c, 0xd902},
+ {1, 1, 0x150101b, 0x8000},
+ {1, 1, 0x150101c, 0xeb09},
+ {1, 1, 0x150101b, 0x8000},
+ {1, 1, 0x150101c, 0x17b7},
+ {1, 1, 0x150101b, 0x8000},
+ {1, 1, 0x150101c, 0x0300},
+ {1, 1, 0x150101b, 0x8000},
+ {1, 1, 0x150101c, 0x670d},
+ {1, 1, 0x150101b, 0x8000},
+ {1, 1, 0x150101c, 0xa023},
+ {1, 1, 0x150101b, 0x8000},
+ {1, 1, 0x150101c, 0xc4e7},
+ {1, 1, 0x150101b, 0x8000},
+ {1, 1, 0x150101c, 0x476d},
+ {1, 1, 0x150101b, 0x8000},
+ {1, 1, 0x150101c, 0xac23},
+ {1, 1, 0x150101b, 0x8000},
+ {1, 1, 0x150101c, 0xc4e7},
+ {1, 1, 0x150101b, 0x8000},
+ {1, 1, 0x150101c, 0x4501},
+ {1, 1, 0x150101b, 0x8000},
+ {1, 1, 0x150101c, 0x106f},
+ {1, 1, 0x150101b, 0x8000},
+ {1, 1, 0x150101c, 0x3182},
+ {1, 1, 0x150101b, 0x8000},
+ {1, 1, 0x1501077, 0xa0b9},
+ {1, 1, 0x1501078, 0x808b},
+ {1, 1, 0x1501079, 0x20},
+ {1, 1, 0x1500318, 0xa0},
+ {1, 1, 0x170101c, 0x200},
+ {1, 1, 0x170101b, 0x400},
+ {1, 1, 0x170101c, 0x0},
+ {1, 1, 0x170101b, 0x800},
+ {1, 1, 0x170101c, 0x04a3},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x170101c, 0x0402},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x170101c, 0x2703},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x170101c, 0xd902},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x170101c, 0xeb09},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x170101c, 0x17b7},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x170101c, 0x0300},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x170101c, 0x670d},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x170101c, 0xa023},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x170101c, 0xc4e7},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x170101c, 0x476d},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x170101c, 0xac23},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x170101c, 0xc4e7},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x170101c, 0x4501},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x170101c, 0x106f},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x170101c, 0x3182},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x1701077, 0xa0b9},
+ {1, 1, 0x1701078, 0x808b},
+ {1, 1, 0x1701079, 0x20},
+ {1, 1, 0x1700318, 0xa0},
+ {1, 1, 0x190101c, 0x200},
+ {1, 1, 0x190101b, 0x400},
+ {1, 1, 0x190101c, 0x0},
+ {1, 1, 0x190101b, 0x800},
+ {1, 1, 0x190101c, 0x04a3},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x190101c, 0x0402},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x190101c, 0x2703},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x190101c, 0xd902},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x190101c, 0xeb09},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x190101c, 0x17b7},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x190101c, 0x0300},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x190101c, 0x670d},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x190101c, 0xa023},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x190101c, 0xc4e7},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x190101c, 0x476d},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x190101c, 0xac23},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x190101c, 0xc4e7},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x190101c, 0x4501},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x190101c, 0x106f},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x190101c, 0x3182},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x1901077, 0xa0b9},
+ {1, 1, 0x1901078, 0x808b},
+ {1, 1, 0x1901079, 0x20},
+ {1, 1, 0x1900318, 0xa0},
+ {1, 1, 0x1b0101c, 0x200},
+ {1, 1, 0x1b0101b, 0x400},
+ {1, 1, 0x1b0101c, 0x0},
+ {1, 1, 0x1b0101b, 0x800},
+ {1, 1, 0x1b0101c, 0x04a3},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b0101c, 0x0402},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b0101c, 0x2703},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b0101c, 0xd902},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b0101c, 0xeb09},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b0101c, 0x17b7},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b0101c, 0x0300},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b0101c, 0x670d},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b0101c, 0xa023},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b0101c, 0xc4e7},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b0101c, 0x476d},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b0101c, 0xac23},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b0101c, 0xc4e7},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b0101c, 0x4501},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b0101c, 0x106f},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b0101c, 0x3182},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b01077, 0xa0b9},
+ {1, 1, 0x1b01078, 0x808b},
+ {1, 1, 0x1b01079, 0x20},
+ {1, 1, 0x1b00318, 0xa0},
+ {1, 1, 0x1d0101c, 0x200},
+ {1, 1, 0x1d0101b, 0x400},
+ {1, 1, 0x1d0101c, 0x0},
+ {1, 1, 0x1d0101b, 0x800},
+ {1, 1, 0x1d0101c, 0x04a3},
+ {1, 1, 0x1d0101b, 0x8000},
+ {1, 1, 0x1d0101c, 0x0402},
+ {1, 1, 0x1d0101b, 0x8000},
+ {1, 1, 0x1d0101c, 0x2703},
+ {1, 1, 0x1d0101b, 0x8000},
+ {1, 1, 0x1d0101c, 0xd902},
+ {1, 1, 0x1d0101b, 0x8000},
+ {1, 1, 0x1d0101c, 0xeb09},
+ {1, 1, 0x1d0101b, 0x8000},
+ {1, 1, 0x1d0101c, 0x17b7},
+ {1, 1, 0x1d0101b, 0x8000},
+ {1, 1, 0x1d0101c, 0x0300},
+ {1, 1, 0x1d0101b, 0x8000},
+ {1, 1, 0x1d0101c, 0x670d},
+ {1, 1, 0x1d0101b, 0x8000},
+ {1, 1, 0x1d0101c, 0xa023},
+ {1, 1, 0x1d0101b, 0x8000},
+ {1, 1, 0x1d0101c, 0xc4e7},
+ {1, 1, 0x1d0101b, 0x8000},
+ {1, 1, 0x1d0101c, 0x476d},
+ {1, 1, 0x1d0101b, 0x8000},
+ {1, 1, 0x1d0101c, 0xac23},
+ {1, 1, 0x1d0101b, 0x8000},
+ {1, 1, 0x1d0101c, 0xc4e7},
+ {1, 1, 0x1d0101b, 0x8000},
+ {1, 1, 0x1d0101c, 0x4501},
+ {1, 1, 0x1d0101b, 0x8000},
+ {1, 1, 0x1d0101c, 0x106f},
+ {1, 1, 0x1d0101b, 0x8000},
+ {1, 1, 0x1d0101c, 0x3182},
+ {1, 1, 0x1d0101b, 0x8000},
+ {1, 1, 0x1d01077, 0xa0b9},
+ {1, 1, 0x1d01078, 0x808b},
+ {1, 1, 0x1d01079, 0x20},
+ {1, 1, 0x1d00318, 0xa0},
+ {1, 1, 0x1f0101c, 0x200},
+ {1, 1, 0x1f0101b, 0x400},
+ {1, 1, 0x1f0101c, 0x0},
+ {1, 1, 0x1f0101b, 0x800},
+ {1, 1, 0x1f0101c, 0x04a3},
+ {1, 1, 0x1f0101b, 0x8000},
+ {1, 1, 0x1f0101c, 0x0402},
+ {1, 1, 0x1f0101b, 0x8000},
+ {1, 1, 0x1f0101c, 0x2703},
+ {1, 1, 0x1f0101b, 0x8000},
+ {1, 1, 0x1f0101c, 0xd902},
+ {1, 1, 0x1f0101b, 0x8000},
+ {1, 1, 0x1f0101c, 0xeb09},
+ {1, 1, 0x1f0101b, 0x8000},
+ {1, 1, 0x1f0101c, 0x17b7},
+ {1, 1, 0x1f0101b, 0x8000},
+ {1, 1, 0x1f0101c, 0x0300},
+ {1, 1, 0x1f0101b, 0x8000},
+ {1, 1, 0x1f0101c, 0x670d},
+ {1, 1, 0x1f0101b, 0x8000},
+ {1, 1, 0x1f0101c, 0xa023},
+ {1, 1, 0x1f0101b, 0x8000},
+ {1, 1, 0x1f0101c, 0xc4e7},
+ {1, 1, 0x1f0101b, 0x8000},
+ {1, 1, 0x1f0101c, 0x476d},
+ {1, 1, 0x1f0101b, 0x8000},
+ {1, 1, 0x1f0101c, 0xac23},
+ {1, 1, 0x1f0101b, 0x8000},
+ {1, 1, 0x1f0101c, 0xc4e7},
+ {1, 1, 0x1f0101b, 0x8000},
+ {1, 1, 0x1f0101c, 0x4501},
+ {1, 1, 0x1f0101b, 0x8000},
+ {1, 1, 0x1f0101c, 0x106f},
+ {1, 1, 0x1f0101b, 0x8000},
+ {1, 1, 0x1f0101c, 0x3182},
+ {1, 1, 0x1f0101b, 0x8000},
+ {1, 1, 0x1f01077, 0xa0b9},
+ {1, 1, 0x1f01078, 0x808b},
+ {1, 1, 0x1f01079, 0x20},
+ {1, 1, 0x1f00318, 0xa0},
+ {1, 1, 0x210101c, 0x200},
+ {1, 1, 0x210101b, 0x400},
+ {1, 1, 0x210101c, 0x0},
+ {1, 1, 0x210101b, 0x800},
+ {1, 1, 0x210101c, 0x04a3},
+ {1, 1, 0x210101b, 0x8000},
+ {1, 1, 0x210101c, 0x0402},
+ {1, 1, 0x210101b, 0x8000},
+ {1, 1, 0x210101c, 0x2703},
+ {1, 1, 0x210101b, 0x8000},
+ {1, 1, 0x210101c, 0xd902},
+ {1, 1, 0x210101b, 0x8000},
+ {1, 1, 0x210101c, 0xeb09},
+ {1, 1, 0x210101b, 0x8000},
+ {1, 1, 0x210101c, 0x17b7},
+ {1, 1, 0x210101b, 0x8000},
+ {1, 1, 0x210101c, 0x0300},
+ {1, 1, 0x210101b, 0x8000},
+ {1, 1, 0x210101c, 0x670d},
+ {1, 1, 0x210101b, 0x8000},
+ {1, 1, 0x210101c, 0xa023},
+ {1, 1, 0x210101b, 0x8000},
+ {1, 1, 0x210101c, 0xc4e7},
+ {1, 1, 0x210101b, 0x8000},
+ {1, 1, 0x210101c, 0x476d},
+ {1, 1, 0x210101b, 0x8000},
+ {1, 1, 0x210101c, 0xac23},
+ {1, 1, 0x210101b, 0x8000},
+ {1, 1, 0x210101c, 0xc4e7},
+ {1, 1, 0x210101b, 0x8000},
+ {1, 1, 0x210101c, 0x4501},
+ {1, 1, 0x210101b, 0x8000},
+ {1, 1, 0x210101c, 0x106f},
+ {1, 1, 0x210101b, 0x8000},
+ {1, 1, 0x210101c, 0x3182},
+ {1, 1, 0x210101b, 0x8000},
+ {1, 1, 0x2101077, 0xa0b9},
+ {1, 1, 0x2101078, 0x808b},
+ {1, 1, 0x2101079, 0x20},
+ {1, 1, 0x2100318, 0xa0},
+ {1, 1, 0x130101b, 0x1000},
+ {1, 1, 0x170101b, 0x1000},
+ {1, 1, 0x1b0101b, 0x1000},
+ {1, 1, 0x1f0101b, 0x1000},
+ {1, 1, 0x150101b, 0x1000},
+ {1, 1, 0x190101b, 0x1000},
+ {1, 1, 0x1d0101b, 0x1000},
+ {1, 1, 0x210101b, 0x1000},
+ {1, 0, 0x79, 0x40b7},
+ {1, 1, 0x200012, 0xffff},
+ {1, 1, 0x200112, 0xffff},
+ {1, 1, 0x200212, 0xffff},
+ {1, 1, 0x200312, 0xffff},
+ {1, 1, 0x200412, 0xffff},
+ {1, 1, 0x200512, 0xffff},
+ {1, 1, 0x200612, 0xffff},
+ {1, 1, 0x200712, 0xffff},
+ {1, 1, 0x200912, 0xffff},
+ {1, 1, 0x20000a, 0x401001},
+ {1, 1, 0x20010a, 0x401001},
+ {1, 1, 0x20020a, 0x401001},
+ {1, 1, 0x20030a, 0x401001},
+ {1, 1, 0x20040a, 0x401001},
+ {1, 1, 0x20050a, 0x401001},
+ {1, 1, 0x20060a, 0x401001},
+ {1, 1, 0x20070a, 0x401001},
+ {1, 1, 0x20090a, 0x401001},
+ {1, 1, 0x100002, 0x2800a},
+ {1, 1, 0x100078, 0x7735940},
+ {1, 1, 0x100079, 0x0},
+ {1, 1, 0x102adb, 0x0},
+ {1, 1, 0x102af3, 0x0},
+ {1, 0, 0x4, 0xde1},
+ {1, 0, 0x200004, 0xde1},
+ {1, 0, 0x400004, 0xde1},
+ {1, 0, 0x600004, 0xde1},
+ {1, 0, 0x800004, 0xde1},
+ {1, 0, 0xa00004, 0xde1},
+ {1, 0, 0xc00004, 0xde1},
+ {1, 0, 0xe00004, 0xde1},
+ {1, 0, 0x0, 0x3300},
+ {1, 0, 0x200000, 0x3300},
+ {1, 0, 0x400000, 0x3300},
+ {1, 0, 0x600000, 0x3300},
+ {1, 0, 0x800000, 0x3300},
+ {1, 0, 0xa00000, 0x3300},
+ {1, 0, 0xc00000, 0x3300},
+ {1, 0, 0xe00000, 0x3300}
+};
+#else
+struct jl_cmd_line_s g_cmd_line_set_5109_ver0[] = {};
+#endif
+
+
+#if ((defined CONFIG_JLFE_CHIP_ID_5110) || (defined CONFIG_JLFE_CHIP_ID_51XX) \
+ && (defined CONFIG_JLFE_LOAD_PATCH_VER0))
+struct jl_cmd_line_s g_cmd_line_set_5110_ver0[] = {
+ {1, 1, 0x800000, 0x6e6f},
+ {3, 0, 0, 10000},
+ {1, 1, 0x1200000, 0x4c},
+ {1, 1, 0x500006, 0x5018b2b3},
+ {1, 1, 0x500007, 0x80000008},
+ {3, 0, 0, 10000},
+ {1, 1, 0x500016, 0x4000},
+ {1, 1, 0x500017, 0x113},
+ {1, 1, 0x500015, 0x800f},
+ {1, 1, 0x800001, 0x0},
+ {1, 1, 0x800002, 0xeeee},
+ {1, 1, 0x800003, 0xeeee},
+ {1, 1, 0x800001, 0xff},
+ {1, 1, 0x130101b, 0x2000},
+ {1, 1, 0x150101b, 0x2000},
+ {1, 1, 0x170101b, 0x2000},
+ {1, 1, 0x190101b, 0x2000},
+ {1, 1, 0x1b0101b, 0x2000},
+ {1, 1, 0x1d0101b, 0x2000},
+ {1, 1, 0x1f0101b, 0x2000},
+ {1, 1, 0x210101b, 0x2000},
+ {1, 1, 0x800002, 0xffff},
+ {1, 1, 0x800003, 0xffff},
+ {1, 1, 0x500016, 0xcd1d},
+ {1, 1, 0x500017, 0xe06f},
+ {1, 1, 0x500015, 0x854c},
+ {1, 1, 0x130101c, 0x200},
+ {1, 1, 0x130101b, 0x400},
+ {1, 1, 0x130101c, 0x0},
+ {1, 1, 0x130101b, 0x800},
+ {1, 1, 0x130101c, 0x04a3},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0x0402},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0x2703},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0xd902},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0xeb09},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0x17b7},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0x0300},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0x670d},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0xa023},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0xc4e7},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0x476d},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0xac23},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0xc4e7},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0x4501},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0x106f},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x130101c, 0x3182},
+ {1, 1, 0x130101b, 0x8000},
+ {1, 1, 0x1301077, 0xa0b9},
+ {1, 1, 0x1301078, 0x808b},
+ {1, 1, 0x1301079, 0x20},
+ {1, 1, 0x1300318, 0xa0},
+ {1, 1, 0x150101c, 0x200},
+ {1, 1, 0x150101b, 0x400},
+ {1, 1, 0x150101c, 0x0},
+ {1, 1, 0x150101b, 0x800},
+ {1, 1, 0x150101c, 0x04a3},
+ {1, 1, 0x150101b, 0x8000},
+ {1, 1, 0x150101c, 0x0402},
+ {1, 1, 0x150101b, 0x8000},
+ {1, 1, 0x150101c, 0x2703},
+ {1, 1, 0x150101b, 0x8000},
+ {1, 1, 0x150101c, 0xd902},
+ {1, 1, 0x150101b, 0x8000},
+ {1, 1, 0x150101c, 0xeb09},
+ {1, 1, 0x150101b, 0x8000},
+ {1, 1, 0x150101c, 0x17b7},
+ {1, 1, 0x150101b, 0x8000},
+ {1, 1, 0x150101c, 0x0300},
+ {1, 1, 0x150101b, 0x8000},
+ {1, 1, 0x150101c, 0x670d},
+ {1, 1, 0x150101b, 0x8000},
+ {1, 1, 0x150101c, 0xa023},
+ {1, 1, 0x150101b, 0x8000},
+ {1, 1, 0x150101c, 0xc4e7},
+ {1, 1, 0x150101b, 0x8000},
+ {1, 1, 0x150101c, 0x476d},
+ {1, 1, 0x150101b, 0x8000},
+ {1, 1, 0x150101c, 0xac23},
+ {1, 1, 0x150101b, 0x8000},
+ {1, 1, 0x150101c, 0xc4e7},
+ {1, 1, 0x150101b, 0x8000},
+ {1, 1, 0x150101c, 0x4501},
+ {1, 1, 0x150101b, 0x8000},
+ {1, 1, 0x150101c, 0x106f},
+ {1, 1, 0x150101b, 0x8000},
+ {1, 1, 0x150101c, 0x3182},
+ {1, 1, 0x150101b, 0x8000},
+ {1, 1, 0x1501077, 0xa0b9},
+ {1, 1, 0x1501078, 0x808b},
+ {1, 1, 0x1501079, 0x20},
+ {1, 1, 0x1500318, 0xa0},
+ {1, 1, 0x170101c, 0x200},
+ {1, 1, 0x170101b, 0x400},
+ {1, 1, 0x170101c, 0x0},
+ {1, 1, 0x170101b, 0x800},
+ {1, 1, 0x170101c, 0x04a3},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x170101c, 0x0402},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x170101c, 0x2703},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x170101c, 0xd902},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x170101c, 0xeb09},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x170101c, 0x17b7},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x170101c, 0x0300},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x170101c, 0x670d},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x170101c, 0xa023},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x170101c, 0xc4e7},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x170101c, 0x476d},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x170101c, 0xac23},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x170101c, 0xc4e7},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x170101c, 0x4501},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x170101c, 0x106f},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x170101c, 0x3182},
+ {1, 1, 0x170101b, 0x8000},
+ {1, 1, 0x1701077, 0xa0b9},
+ {1, 1, 0x1701078, 0x808b},
+ {1, 1, 0x1701079, 0x20},
+ {1, 1, 0x1700318, 0xa0},
+ {1, 1, 0x190101c, 0x200},
+ {1, 1, 0x190101b, 0x400},
+ {1, 1, 0x190101c, 0x0},
+ {1, 1, 0x190101b, 0x800},
+ {1, 1, 0x190101c, 0x04a3},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x190101c, 0x0402},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x190101c, 0x2703},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x190101c, 0xd902},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x190101c, 0xeb09},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x190101c, 0x17b7},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x190101c, 0x0300},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x190101c, 0x670d},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x190101c, 0xa023},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x190101c, 0xc4e7},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x190101c, 0x476d},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x190101c, 0xac23},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x190101c, 0xc4e7},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x190101c, 0x4501},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x190101c, 0x106f},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x190101c, 0x3182},
+ {1, 1, 0x190101b, 0x8000},
+ {1, 1, 0x1901077, 0xa0b9},
+ {1, 1, 0x1901078, 0x808b},
+ {1, 1, 0x1901079, 0x20},
+ {1, 1, 0x1900318, 0xa0},
+ {1, 1, 0x1b0101c, 0x200},
+ {1, 1, 0x1b0101b, 0x400},
+ {1, 1, 0x1b0101c, 0x0},
+ {1, 1, 0x1b0101b, 0x800},
+ {1, 1, 0x1b0101c, 0x04a3},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b0101c, 0x0402},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b0101c, 0x2703},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b0101c, 0xd902},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b0101c, 0xeb09},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b0101c, 0x17b7},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b0101c, 0x0300},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b0101c, 0x670d},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b0101c, 0xa023},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b0101c, 0xc4e7},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b0101c, 0x476d},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b0101c, 0xac23},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b0101c, 0xc4e7},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b0101c, 0x4501},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b0101c, 0x106f},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b0101c, 0x3182},
+ {1, 1, 0x1b0101b, 0x8000},
+ {1, 1, 0x1b01077, 0xa0b9},
+ {1, 1, 0x1b01078, 0x808b},
+ {1, 1, 0x1b01079, 0x20},
+ {1, 1, 0x1b00318, 0xa0},
+ {1, 1, 0x1d0101c, 0x200},
+ {1, 1, 0x1d0101b, 0x400},
+ {1, 1, 0x1d0101c, 0x0},
+ {1, 1, 0x1d0101b, 0x800},
+ {1, 1, 0x1d0101c, 0x04a3},
+ {1, 1, 0x1d0101b, 0x8000},
+ {1, 1, 0x1d0101c, 0x0402},
+ {1, 1, 0x1d0101b, 0x8000},
+ {1, 1, 0x1d0101c, 0x2703},
+ {1, 1, 0x1d0101b, 0x8000},
+ {1, 1, 0x1d0101c, 0xd902},
+ {1, 1, 0x1d0101b, 0x8000},
+ {1, 1, 0x1d0101c, 0xeb09},
+ {1, 1, 0x1d0101b, 0x8000},
+ {1, 1, 0x1d0101c, 0x17b7},
+ {1, 1, 0x1d0101b, 0x8000},
+ {1, 1, 0x1d0101c, 0x0300},
+ {1, 1, 0x1d0101b, 0x8000},
+ {1, 1, 0x1d0101c, 0x670d},
+ {1, 1, 0x1d0101b, 0x8000},
+ {1, 1, 0x1d0101c, 0xa023},
+ {1, 1, 0x1d0101b, 0x8000},
+ {1, 1, 0x1d0101c, 0xc4e7},
+ {1, 1, 0x1d0101b, 0x8000},
+ {1, 1, 0x1d0101c, 0x476d},
+ {1, 1, 0x1d0101b, 0x8000},
+ {1, 1, 0x1d0101c, 0xac23},
+ {1, 1, 0x1d0101b, 0x8000},
+ {1, 1, 0x1d0101c, 0xc4e7},
+ {1, 1, 0x1d0101b, 0x8000},
+ {1, 1, 0x1d0101c, 0x4501},
+ {1, 1, 0x1d0101b, 0x8000},
+ {1, 1, 0x1d0101c, 0x106f},
+ {1, 1, 0x1d0101b, 0x8000},
+ {1, 1, 0x1d0101c, 0x3182},
+ {1, 1, 0x1d0101b, 0x8000},
+ {1, 1, 0x1d01077, 0xa0b9},
+ {1, 1, 0x1d01078, 0x808b},
+ {1, 1, 0x1d01079, 0x20},
+ {1, 1, 0x1d00318, 0xa0},
+ {1, 1, 0x1f0101c, 0x200},
+ {1, 1, 0x1f0101b, 0x400},
+ {1, 1, 0x1f0101c, 0x0},
+ {1, 1, 0x1f0101b, 0x800},
+ {1, 1, 0x1f0101c, 0x04a3},
+ {1, 1, 0x1f0101b, 0x8000},
+ {1, 1, 0x1f0101c, 0x0402},
+ {1, 1, 0x1f0101b, 0x8000},
+ {1, 1, 0x1f0101c, 0x2703},
+ {1, 1, 0x1f0101b, 0x8000},
+ {1, 1, 0x1f0101c, 0xd902},
+ {1, 1, 0x1f0101b, 0x8000},
+ {1, 1, 0x1f0101c, 0xeb09},
+ {1, 1, 0x1f0101b, 0x8000},
+ {1, 1, 0x1f0101c, 0x17b7},
+ {1, 1, 0x1f0101b, 0x8000},
+ {1, 1, 0x1f0101c, 0x0300},
+ {1, 1, 0x1f0101b, 0x8000},
+ {1, 1, 0x1f0101c, 0x670d},
+ {1, 1, 0x1f0101b, 0x8000},
+ {1, 1, 0x1f0101c, 0xa023},
+ {1, 1, 0x1f0101b, 0x8000},
+ {1, 1, 0x1f0101c, 0xc4e7},
+ {1, 1, 0x1f0101b, 0x8000},
+ {1, 1, 0x1f0101c, 0x476d},
+ {1, 1, 0x1f0101b, 0x8000},
+ {1, 1, 0x1f0101c, 0xac23},
+ {1, 1, 0x1f0101b, 0x8000},
+ {1, 1, 0x1f0101c, 0xc4e7},
+ {1, 1, 0x1f0101b, 0x8000},
+ {1, 1, 0x1f0101c, 0x4501},
+ {1, 1, 0x1f0101b, 0x8000},
+ {1, 1, 0x1f0101c, 0x106f},
+ {1, 1, 0x1f0101b, 0x8000},
+ {1, 1, 0x1f0101c, 0x3182},
+ {1, 1, 0x1f0101b, 0x8000},
+ {1, 1, 0x1f01077, 0xa0b9},
+ {1, 1, 0x1f01078, 0x808b},
+ {1, 1, 0x1f01079, 0x20},
+ {1, 1, 0x1f00318, 0xa0},
+ {1, 1, 0x210101c, 0x200},
+ {1, 1, 0x210101b, 0x400},
+ {1, 1, 0x210101c, 0x0},
+ {1, 1, 0x210101b, 0x800},
+ {1, 1, 0x210101c, 0x04a3},
+ {1, 1, 0x210101b, 0x8000},
+ {1, 1, 0x210101c, 0x0402},
+ {1, 1, 0x210101b, 0x8000},
+ {1, 1, 0x210101c, 0x2703},
+ {1, 1, 0x210101b, 0x8000},
+ {1, 1, 0x210101c, 0xd902},
+ {1, 1, 0x210101b, 0x8000},
+ {1, 1, 0x210101c, 0xeb09},
+ {1, 1, 0x210101b, 0x8000},
+ {1, 1, 0x210101c, 0x17b7},
+ {1, 1, 0x210101b, 0x8000},
+ {1, 1, 0x210101c, 0x0300},
+ {1, 1, 0x210101b, 0x8000},
+ {1, 1, 0x210101c, 0x670d},
+ {1, 1, 0x210101b, 0x8000},
+ {1, 1, 0x210101c, 0xa023},
+ {1, 1, 0x210101b, 0x8000},
+ {1, 1, 0x210101c, 0xc4e7},
+ {1, 1, 0x210101b, 0x8000},
+ {1, 1, 0x210101c, 0x476d},
+ {1, 1, 0x210101b, 0x8000},
+ {1, 1, 0x210101c, 0xac23},
+ {1, 1, 0x210101b, 0x8000},
+ {1, 1, 0x210101c, 0xc4e7},
+ {1, 1, 0x210101b, 0x8000},
+ {1, 1, 0x210101c, 0x4501},
+ {1, 1, 0x210101b, 0x8000},
+ {1, 1, 0x210101c, 0x106f},
+ {1, 1, 0x210101b, 0x8000},
+ {1, 1, 0x210101c, 0x3182},
+ {1, 1, 0x210101b, 0x8000},
+ {1, 1, 0x2101077, 0xa0b9},
+ {1, 1, 0x2101078, 0x808b},
+ {1, 1, 0x2101079, 0x20},
+ {1, 1, 0x2100318, 0xa0},
+ {1, 1, 0x130101b, 0x1000},
+ {1, 1, 0x170101b, 0x1000},
+ {1, 1, 0x1b0101b, 0x1000},
+ {1, 1, 0x1f0101b, 0x1000},
+ {1, 1, 0x150101b, 0x1000},
+ {1, 1, 0x190101b, 0x1000},
+ {1, 1, 0x1d0101b, 0x1000},
+ {1, 1, 0x210101b, 0x1000},
+ {1, 0, 0x78, 0x40b7},
+ {1, 0, 0x79, 0x40b7},
+ {1, 1, 0x200012, 0xffff},
+ {1, 1, 0x200112, 0xffff},
+ {1, 1, 0x200212, 0xffff},
+ {1, 1, 0x200312, 0xffff},
+ {1, 1, 0x200412, 0xffff},
+ {1, 1, 0x200512, 0xffff},
+ {1, 1, 0x200612, 0xffff},
+ {1, 1, 0x200712, 0xffff},
+ {1, 1, 0x200812, 0xffff},
+ {1, 1, 0x200912, 0xffff},
+ {1, 1, 0x20000a, 0x401001},
+ {1, 1, 0x20010a, 0x401001},
+ {1, 1, 0x20020a, 0x401001},
+ {1, 1, 0x20030a, 0x401001},
+ {1, 1, 0x20040a, 0x401001},
+ {1, 1, 0x20050a, 0x401001},
+ {1, 1, 0x20060a, 0x401001},
+ {1, 1, 0x20070a, 0x401001},
+ {1, 1, 0x20080a, 0x401001},
+ {1, 1, 0x20090a, 0x401001},
+ {1, 1, 0x100002, 0x2800a},
+ {1, 1, 0x100078, 0x7735940},
+ {1, 1, 0x100079, 0x0},
+ {1, 1, 0x102adb, 0x0},
+ {1, 1, 0x102af3, 0x0},
+ {1, 0, 0x4, 0xde1},
+ {1, 0, 0x200004, 0xde1},
+ {1, 0, 0x400004, 0xde1},
+ {1, 0, 0x600004, 0xde1},
+ {1, 0, 0x800004, 0xde1},
+ {1, 0, 0xa00004, 0xde1},
+ {1, 0, 0xc00004, 0xde1},
+ {1, 0, 0xe00004, 0xde1},
+ {1, 0, 0x0, 0x3300},
+ {1, 0, 0x200000, 0x3300},
+ {1, 0, 0x400000, 0x3300},
+ {1, 0, 0x600000, 0x3300},
+ {1, 0, 0x800000, 0x3300},
+ {1, 0, 0xa00000, 0x3300},
+ {1, 0, 0xc00000, 0x3300},
+ {1, 0, 0xe00000, 0x3300}
+};
+#else
+struct jl_cmd_line_s g_cmd_line_set_5110_ver0[] = {};
+#endif
+
+
+#if ((defined CONFIG_JLFE_CHIP_ID_5104) || (defined CONFIG_JLFE_CHIP_ID_51XX) \
+ && (defined CONFIG_JLFE_LOAD_PATCH_VER1))
+struct jl_cmd_line_s g_cmd_line_set_5104_ver1[] = {
+
+};
+#else
+struct jl_cmd_line_s g_cmd_line_set_5104_ver1[] = {};
+#endif
+
+
+#if ((defined CONFIG_JLFE_CHIP_ID_5105) || (defined CONFIG_JLFE_CHIP_ID_51XX) \
+ && (defined CONFIG_JLFE_LOAD_PATCH_VER1))
+struct jl_cmd_line_s g_cmd_line_set_5105_ver1[] = {
+
+};
+#else
+struct jl_cmd_line_s g_cmd_line_set_5105_ver1[] = {};
+#endif
+
+
+#if ((defined CONFIG_JLFE_CHIP_ID_5106) || (defined CONFIG_JLFE_CHIP_ID_51XX) \
+ && (defined CONFIG_JLFE_LOAD_PATCH_VER1))
+struct jl_cmd_line_s g_cmd_line_set_5106_ver1[] = {
+
+};
+#else
+struct jl_cmd_line_s g_cmd_line_set_5106_ver1[] = {};
+#endif
+
+
+#if ((defined CONFIG_JLFE_CHIP_ID_5108) || (defined CONFIG_JLFE_CHIP_ID_51XX) \
+ && (defined CONFIG_JLFE_LOAD_PATCH_VER1))
+struct jl_cmd_line_s g_cmd_line_set_5108_ver1[] = {
+
+};
+#else
+struct jl_cmd_line_s g_cmd_line_set_5108_ver1[] = {};
+#endif
+
+
+#if ((defined CONFIG_JLFE_CHIP_ID_5109) || (defined CONFIG_JLFE_CHIP_ID_51XX) \
+ && (defined CONFIG_JLFE_LOAD_PATCH_VER1))
+struct jl_cmd_line_s g_cmd_line_set_5109_ver1[] = {
+
+};
+#else
+struct jl_cmd_line_s g_cmd_line_set_5109_ver1[] = {};
+#endif
+
+
+#if ((defined CONFIG_JLFE_CHIP_ID_5110) || (defined CONFIG_JLFE_CHIP_ID_51XX) \
+ && (defined CONFIG_JLFE_LOAD_PATCH_VER1))
+struct jl_cmd_line_s g_cmd_line_set_5110_ver1[] = {
+
+};
+#else
+struct jl_cmd_line_s g_cmd_line_set_5110_ver1[] = {};
+#endif
+
+
+#if ((defined CONFIG_JLFE_CHIP_ID_5104) || (defined CONFIG_JLFE_CHIP_ID_51XX) \
+ && (defined CONFIG_JLFE_LOAD_PATCH_VER2))
+struct jl_cmd_line_s g_cmd_line_set_5104_ver2[] = {
+
+};
+#else
+struct jl_cmd_line_s g_cmd_line_set_5104_ver2[] = {};
+#endif
+
+
+#if ((defined CONFIG_JLFE_CHIP_ID_5105) || (defined CONFIG_JLFE_CHIP_ID_51XX) \
+ && (defined CONFIG_JLFE_LOAD_PATCH_VER2))
+struct jl_cmd_line_s g_cmd_line_set_5105_ver2[] = {
+
+};
+#else
+struct jl_cmd_line_s g_cmd_line_set_5105_ver2[] = {};
+#endif
+
+
+#if ((defined CONFIG_JLFE_CHIP_ID_5106) || (defined CONFIG_JLFE_CHIP_ID_51XX) \
+ && (defined CONFIG_JLFE_LOAD_PATCH_VER2))
+struct jl_cmd_line_s g_cmd_line_set_5106_ver2[] = {
+
+};
+#else
+struct jl_cmd_line_s g_cmd_line_set_5106_ver2[] = {};
+#endif
+
+
+#if ((defined CONFIG_JLFE_CHIP_ID_5108) || (defined CONFIG_JLFE_CHIP_ID_51XX) \
+ && (defined CONFIG_JLFE_LOAD_PATCH_VER2))
+struct jl_cmd_line_s g_cmd_line_set_5108_ver2[] = {
+
+};
+#else
+struct jl_cmd_line_s g_cmd_line_set_5108_ver2[] = {};
+#endif
+
+
+#if ((defined CONFIG_JLFE_CHIP_ID_5109) || (defined CONFIG_JLFE_CHIP_ID_51XX) \
+ && (defined CONFIG_JLFE_LOAD_PATCH_VER2))
+struct jl_cmd_line_s g_cmd_line_set_5109_ver2[] = {
+
+};
+#else
+struct jl_cmd_line_s g_cmd_line_set_5109_ver2[] = {};
+#endif
+
+
+#if ((defined CONFIG_JLFE_CHIP_ID_5110) || (defined CONFIG_JLFE_CHIP_ID_51XX) \
+ && (defined CONFIG_JLFE_LOAD_PATCH_VER2))
+struct jl_cmd_line_s g_cmd_line_set_5110_ver2[] = {
+
+};
+#else
+struct jl_cmd_line_s g_cmd_line_set_5110_ver2[] = {};
+#endif
+
+
+#if ((defined CONFIG_JLFE_CHIP_ID_5104) || (defined CONFIG_JLFE_CHIP_ID_51XX) \
+ && (defined CONFIG_JLFE_LOAD_PATCH_VER3))
+struct jl_cmd_line_s g_cmd_line_set_5104_ver3[] = {
+
+};
+#else
+struct jl_cmd_line_s g_cmd_line_set_5104_ver3[] = {};
+#endif
+
+
+#if ((defined CONFIG_JLFE_CHIP_ID_5105) || (defined CONFIG_JLFE_CHIP_ID_51XX) \
+ && (defined CONFIG_JLFE_LOAD_PATCH_VER3))
+struct jl_cmd_line_s g_cmd_line_set_5105_ver3[] = {
+
+};
+#else
+struct jl_cmd_line_s g_cmd_line_set_5105_ver3[] = {};
+#endif
+
+
+#if ((defined CONFIG_JLFE_CHIP_ID_5106) || (defined CONFIG_JLFE_CHIP_ID_51XX) \
+ && (defined CONFIG_JLFE_LOAD_PATCH_VER3))
+struct jl_cmd_line_s g_cmd_line_set_5106_ver3[] = {
+
+};
+#else
+struct jl_cmd_line_s g_cmd_line_set_5106_ver3[] = {};
+#endif
+
+
+#if ((defined CONFIG_JLFE_CHIP_ID_5108) || (defined CONFIG_JLFE_CHIP_ID_51XX) \
+ && (defined CONFIG_JLFE_LOAD_PATCH_VER3))
+struct jl_cmd_line_s g_cmd_line_set_5108_ver3[] = {
+
+};
+#else
+struct jl_cmd_line_s g_cmd_line_set_5108_ver3[] = {};
+#endif
+
+
+#if ((defined CONFIG_JLFE_CHIP_ID_5109) || (defined CONFIG_JLFE_CHIP_ID_51XX) \
+ && (defined CONFIG_JLFE_LOAD_PATCH_VER3))
+struct jl_cmd_line_s g_cmd_line_set_5109_ver3[] = {
+
+};
+#else
+struct jl_cmd_line_s g_cmd_line_set_5109_ver3[] = {};
+#endif
+
+
+#if ((defined CONFIG_JLFE_CHIP_ID_5110) || (defined CONFIG_JLFE_CHIP_ID_51XX) \
+ && (defined CONFIG_JLFE_LOAD_PATCH_VER3))
+struct jl_cmd_line_s g_cmd_line_set_5110_ver3[] = {
+
+};
+#else
+struct jl_cmd_line_s g_cmd_line_set_5110_ver3[] = {};
+#endif
+
+
+struct jl_cmd_line_desc_s {
+ struct jl_cmd_line_s *p_line_set;
+ jl_uint32 lines;
+};
+
+struct jl_cmd_line_desc_s g_cmd_line_desc = {
+ .p_line_set = NULL,
+ .lines = 0
+};
+
+struct jl_eco_patch_tbl_s {
+ jl_uint32 pkg_ver;
+ jl_uint32 eco_ver;
+ jl_uint8 eco_ver_str[8];
+ struct jl_cmd_line_s *peco_patch;
+ jl_uint32 eco_patch_size;
+};
+
+struct jl_eco_patch_tbl_s g_eco_patch_tbl[] = {
+ {
+ .pkg_ver = CHIP_ID_JL5104,
+ .eco_ver = ECO_R0P0,
+ .eco_ver_str = "r0p0",
+ .peco_patch = g_cmd_line_set_5104_ver0,
+ .eco_patch_size = JL_ARRAY_SIZE(g_cmd_line_set_5104_ver0)
+ },
+ {
+ .pkg_ver = CHIP_ID_JL5105,
+ .eco_ver = ECO_R0P0,
+ .eco_ver_str = "r0p0",
+ .peco_patch = g_cmd_line_set_5105_ver0,
+ .eco_patch_size = JL_ARRAY_SIZE(g_cmd_line_set_5105_ver0)
+ },
+ {
+ .pkg_ver = CHIP_ID_JL5106,
+ .eco_ver = ECO_R0P0,
+ .eco_ver_str = "r0p0",
+ .peco_patch = g_cmd_line_set_5106_ver0,
+ .eco_patch_size = JL_ARRAY_SIZE(g_cmd_line_set_5106_ver0)
+ },
+ {
+ .pkg_ver = CHIP_ID_JL5108,
+ .eco_ver = ECO_R0P0,
+ .eco_ver_str = "r0p0",
+ .peco_patch = g_cmd_line_set_5108_ver0,
+ .eco_patch_size = JL_ARRAY_SIZE(g_cmd_line_set_5108_ver0)
+ },
+ {
+ .pkg_ver = CHIP_ID_JL5109,
+ .eco_ver = ECO_R0P0,
+ .eco_ver_str = "r0p0",
+ .peco_patch = g_cmd_line_set_5109_ver0,
+ .eco_patch_size = JL_ARRAY_SIZE(g_cmd_line_set_5109_ver0)
+ },
+ {
+ .pkg_ver = CHIP_ID_JL5110,
+ .eco_ver = ECO_R0P0,
+ .eco_ver_str = "r0p0",
+ .peco_patch = g_cmd_line_set_5110_ver0,
+ .eco_patch_size = JL_ARRAY_SIZE(g_cmd_line_set_5110_ver0)
+ },
+ {
+ .pkg_ver = CHIP_ID_JL5104,
+ .eco_ver = ECO_R0P1,
+ .eco_ver_str = "r0p1",
+ .peco_patch = g_cmd_line_set_5104_ver1,
+ .eco_patch_size = JL_ARRAY_SIZE(g_cmd_line_set_5104_ver1)
+ },
+ {
+ .pkg_ver = CHIP_ID_JL5105,
+ .eco_ver = ECO_R0P1,
+ .eco_ver_str = "r0p1",
+ .peco_patch = g_cmd_line_set_5105_ver1,
+ .eco_patch_size = JL_ARRAY_SIZE(g_cmd_line_set_5105_ver1)
+ },
+ {
+ .pkg_ver = CHIP_ID_JL5106,
+ .eco_ver = ECO_R0P1,
+ .eco_ver_str = "r0p1",
+ .peco_patch = g_cmd_line_set_5106_ver1,
+ .eco_patch_size = JL_ARRAY_SIZE(g_cmd_line_set_5106_ver1)
+ },
+ {
+ .pkg_ver = CHIP_ID_JL5108,
+ .eco_ver = ECO_R0P1,
+ .eco_ver_str = "r0p1",
+ .peco_patch = g_cmd_line_set_5108_ver1,
+ .eco_patch_size = JL_ARRAY_SIZE(g_cmd_line_set_5108_ver1)
+ },
+ {
+ .pkg_ver = CHIP_ID_JL5109,
+ .eco_ver = ECO_R0P1,
+ .eco_ver_str = "r0p1",
+ .peco_patch = g_cmd_line_set_5109_ver1,
+ .eco_patch_size = JL_ARRAY_SIZE(g_cmd_line_set_5109_ver1)
+ },
+ {
+ .pkg_ver = CHIP_ID_JL5110,
+ .eco_ver = ECO_R0P1,
+ .eco_ver_str = "r0p1",
+ .peco_patch = g_cmd_line_set_5110_ver1,
+ .eco_patch_size = JL_ARRAY_SIZE(g_cmd_line_set_5110_ver1)
+ },
+ {
+ .pkg_ver = CHIP_ID_JL5104,
+ .eco_ver = ECO_R0P2,
+ .eco_ver_str = "r0p2",
+ .peco_patch = g_cmd_line_set_5104_ver2,
+ .eco_patch_size = JL_ARRAY_SIZE(g_cmd_line_set_5104_ver2)
+ },
+ {
+ .pkg_ver = CHIP_ID_JL5105,
+ .eco_ver = ECO_R0P2,
+ .eco_ver_str = "r0p2",
+ .peco_patch = g_cmd_line_set_5105_ver2,
+ .eco_patch_size = JL_ARRAY_SIZE(g_cmd_line_set_5105_ver2)
+ },
+ {
+ .pkg_ver = CHIP_ID_JL5106,
+ .eco_ver = ECO_R0P2,
+ .eco_ver_str = "r0p2",
+ .peco_patch = g_cmd_line_set_5106_ver2,
+ .eco_patch_size = JL_ARRAY_SIZE(g_cmd_line_set_5106_ver2)
+ },
+ {
+ .pkg_ver = CHIP_ID_JL5108,
+ .eco_ver = ECO_R0P2,
+ .eco_ver_str = "r0p2",
+ .peco_patch = g_cmd_line_set_5108_ver2,
+ .eco_patch_size = JL_ARRAY_SIZE(g_cmd_line_set_5108_ver2)
+ },
+ {
+ .pkg_ver = CHIP_ID_JL5109,
+ .eco_ver = ECO_R0P2,
+ .eco_ver_str = "r0p2",
+ .peco_patch = g_cmd_line_set_5109_ver2,
+ .eco_patch_size = JL_ARRAY_SIZE(g_cmd_line_set_5109_ver2)
+ },
+ {
+ .pkg_ver = CHIP_ID_JL5110,
+ .eco_ver = ECO_R0P2,
+ .eco_ver_str = "r0p2",
+ .peco_patch = g_cmd_line_set_5110_ver2,
+ .eco_patch_size = JL_ARRAY_SIZE(g_cmd_line_set_5110_ver2)
+ },
+ {
+ .pkg_ver = CHIP_ID_JL5104,
+ .eco_ver = ECO_R1P0,
+ .eco_ver_str = "r1p0",
+ .peco_patch = g_cmd_line_set_5104_ver3,
+ .eco_patch_size = JL_ARRAY_SIZE(g_cmd_line_set_5104_ver3)
+ },
+ {
+ .pkg_ver = CHIP_ID_JL5105,
+ .eco_ver = ECO_R1P0,
+ .eco_ver_str = "r1p0",
+ .peco_patch = g_cmd_line_set_5105_ver3,
+ .eco_patch_size = JL_ARRAY_SIZE(g_cmd_line_set_5105_ver3)
+ },
+ {
+ .pkg_ver = CHIP_ID_JL5106,
+ .eco_ver = ECO_R1P0,
+ .eco_ver_str = "r1p0",
+ .peco_patch = g_cmd_line_set_5106_ver3,
+ .eco_patch_size = JL_ARRAY_SIZE(g_cmd_line_set_5106_ver3)
+ },
+ {
+ .pkg_ver = CHIP_ID_JL5108,
+ .eco_ver = ECO_R1P0,
+ .eco_ver_str = "r1p0",
+ .peco_patch = g_cmd_line_set_5108_ver3,
+ .eco_patch_size = JL_ARRAY_SIZE(g_cmd_line_set_5108_ver3)
+ },
+ {
+ .pkg_ver = CHIP_ID_JL5109,
+ .eco_ver = ECO_R1P0,
+ .eco_ver_str = "r1p0",
+ .peco_patch = g_cmd_line_set_5109_ver3,
+ .eco_patch_size = JL_ARRAY_SIZE(g_cmd_line_set_5109_ver3)
+ },
+ {
+ .pkg_ver = CHIP_ID_JL5110,
+ .eco_ver = ECO_R1P0,
+ .eco_ver_str = "r1p0",
+ .peco_patch = g_cmd_line_set_5110_ver3,
+ .eco_patch_size = JL_ARRAY_SIZE(g_cmd_line_set_5110_ver3)
+ },
+ /* the end of the table */
+ {
+ .pkg_ver = 0xff
+ }
+};
+
+#endif /* CONFIG_JLFE_LOAD_FORMAL_PATCH */
+#endif /* __JL51XX_DRV_FORMAL_PATCH_H__ */
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/jl51xx_drv_l2.h b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/jl51xx_drv_l2.h
new file mode 100644
index 0000000..a1776f1
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/jl51xx_drv_l2.h
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+
+#ifndef __JL51XX_DRV_L2_H__
+#define __JL51XX_DRV_L2_H__
+
+#include "jl_types.h"
+#include "jl51xx/reg_swcore.h"
+#include "l2.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define SWCORE_L2_REG_ADDR(ofs) (SWCORE_BASE + ofs)
+#define SWCORE_L2_REG_ENTRY_ADDR(ofs, idx, width) (SWCORE_BASE + ofs + idx * width)
+
+typedef jl_uint32 reg_addr_t;
+
+JL_API jl_ret_t jl51xx_l2_aging_learning_get(jl_enable_t *penable_aging, jl_enable_t *penable_learning);
+jl_ret_t jl51xx_l2_aging_learning_set(jl_enable_t enable_aging, jl_enable_t enable_learning);
+
+jl_ret_t jl51xx_l2_mc_port_mask_get(jl_uint32 index, jl_uint32 *pregval);
+jl_ret_t jl51xx_l2_mc_port_mask_set(jl_uint32 index, jl_uint32 regval);
+
+jl_ret_t jl51xx_l2_mc_port_learning_get(jl_port_t port, jl_enable_t *pen_learning);
+jl_ret_t jl51xx_l2_mc_port_learning_set(jl_port_t port, jl_enable_t en_learning);
+
+jl_ret_t jl51xx_l2_fib_config_set_auto(jl_l2_fib_key_t *key, jl_l2_fib_config_t *cfg);
+
+JL_API jl_ret_t jl51xx_l2_fib_config_get(jl_l2_fib_key_t *key, jl_l2_fib_config_t *cfg);
+JL_API jl_ret_t jl51xx_l2_fib_config_get_by_index(jl_uint32 entry_index, jl_l2_fib_key_t *pkey, jl_l2_fib_config_t *cfg);
+
+jl_ret_t jl51xx_l2_fib_hash_clear(void);
+jl_ret_t jl51xx_l2_fib_col_clear(void);
+
+jl_ret_t jl51xx_l2_aging_time_set(jl_uint32 time, jl_uint8 unit);
+JL_API jl_ret_t jl51xx_l2_aging_time_get(jl_uint32 *ptime, jl_uint8 *punit);
+
+jl_ret_t jl51xx_l2_tick_configuration_get(jl_uint16 *pdiv, jl_uint8 *pstep);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __JL51XX_DRV_L2_H__ */
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/jl51xx_drv_led.h b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/jl51xx_drv_led.h
new file mode 100644
index 0000000..67571d4
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/jl51xx_drv_led.h
@@ -0,0 +1,41 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+
+#ifndef __JL51XX_DRV_LED_H__
+#define __JL51XX_DRV_LED_H__
+
+#include "jl_types.h"
+#include "led.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+jl_ret_t jl51xx_led_enable_set(jl_led_group_t group, jl_portmask_t portmask);
+jl_ret_t jl51xx_led_enable_get(jl_led_group_t group, jl_portmask_t *portmask);
+
+jl_ret_t jl51xx_led_group_config_set(jl_led_group_t group, jl_led_config_t config);
+jl_ret_t jl51xx_led_group_config_get(jl_led_group_t group, jl_led_config_t *pconfig);
+
+jl_ret_t jl51xx_led_blink_rate_set(jl_led_blink_rate_t blink_rate);
+jl_ret_t jl51xx_led_blink_rate_get(jl_led_blink_rate_t *blink_rate);
+
+jl_ret_t jl51xx_led_group_active_high_set(jl_led_group_t group, jl_portmask_t portmask);
+
+jl_ret_t jl51xx_led_group_active_high_get(jl_led_group_t group, jl_portmask_t *portmask);
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __JL51XX_DRV_LED_H__ */
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/jl51xx_drv_lpd.h b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/jl51xx_drv_lpd.h
new file mode 100644
index 0000000..669e616
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/jl51xx_drv_lpd.h
@@ -0,0 +1,37 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+
+#ifndef __JL51XX_DRV_LPD_H__
+#define __JL51XX_DRV_LPD_H__
+
+#include "jl_error.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+jl_ret_t jl51xx_lpd_ctrl_get(void *lpd_config);
+jl_ret_t jl51xx_lpd_ctrl_set(void *lpd_config);
+jl_ret_t jl51xx_lpd_disable(void);
+jl_ret_t jl51xx_lpd_enable(void);
+jl_ret_t jl51xx_lpd_lp_stat_clear(void);
+jl_ret_t jl51xx_lpd_ports_get(jl_portmask_t *port_mask);
+jl_ret_t jl51xx_lpd_trigger_check(void);
+jl_ret_t jl51xx_lpd_trigger_once(jl_port_t port);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __JL51XX_DRV_LPD_H__ */
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/jl51xx_drv_mib.h b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/jl51xx_drv_mib.h
new file mode 100644
index 0000000..e94f3e4
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/jl51xx_drv_mib.h
@@ -0,0 +1,38 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+
+#ifndef __JL51XX_DRV_MIB_H__
+#define __JL51XX_DRV_MIB_H__
+
+#include "jl_error.h"
+#include "mib.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+jl_ret_t jl51xx_mib_port_rc_mode_get(jl_port_t port, jl_enable_t *pregval);
+jl_ret_t jl51xx_mib_port_rc_mode_set(jl_port_t port, jl_uint32 regval);
+jl_ret_t jl51xx_mib_port_clear(jl_port_t port, jl_uint16 type);
+jl_ret_t jl51xx_mib_port_get(jl_port_t port, jl_uint16 type, jl_uint64 *pregval);
+jl_ret_t jl51xx_mib_swc_global_drop_get(jl_mib_swc_glb_drop_t *pport_cnt);
+jl_ret_t jl51xx_mib_swc_global_drop_clear(void);
+jl_ret_t jl51xx_mib_swc_port_drop_get(jl_port_t port, jl_mib_swc_port_drop_t *pport_cnt);
+jl_ret_t jl51xx_mib_swc_port_drop_clear(jl_port_t port);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __JL51XX_DRV_MIB_H__ */
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/jl51xx_drv_mirror.h b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/jl51xx_drv_mirror.h
new file mode 100644
index 0000000..5b207f0
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/jl51xx_drv_mirror.h
@@ -0,0 +1,38 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+
+#ifndef __JL51XX_DRV_MIRROR_H__
+#define __JL51XX_DRV_MIRROR_H__
+
+#include "jl_error.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+jl_ret_t jl51xx_mirror_input_mr_get(jl_port_t mirrored_port,
+ jl_port_t *mirroring_port);
+jl_ret_t jl51xx_mirror_output_mr_get(jl_port_t mirrored_port,
+ jl_port_t *mirroring_port);
+jl_ret_t jl51xx_mirror_input_mr_set(jl_port_t mirrored_port,
+ jl_port_t mirroring_port);
+jl_ret_t jl51xx_mirror_output_mr_set(jl_port_t mirrored_port,
+ jl_port_t mirroring_port);
+jl_ret_t jl51xx_mirror_input_mr_clear(jl_port_t mirrored_port);
+jl_ret_t jl51xx_mirror_output_mr_clear(jl_port_t mirrored_port);
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __JL51XX_DRV_MIRROR_H__ */
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/jl51xx_drv_phy.h b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/jl51xx_drv_phy.h
new file mode 100644
index 0000000..b13d7e9
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/jl51xx_drv_phy.h
@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+
+#ifndef __JL51XX_DRV_PHY_H__
+#define __JL51XX_DRV_PHY_H__
+
+#include "jl_types.h"
+#include "jl51xx/reg_phy.h"
+#include "jl51xx/reg_fephy.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define PHY_DATA_MASK ((jl_uint32)0x0000FFFFU)
+#define PHY_REG_MASK ((jl_uint8)0x1FU)
+#define PHY_ID_MASK ((jl_uint8)0x0FU)
+
+jl_ret_t jl51xx_phy_indirect_read(jl_uint32 phy, jl_uint32 regaddr, jl_uint32 *pregval);
+
+jl_ret_t jl51xx_phy_indirect_write(jl_uint32 phy, jl_uint32 regaddr, jl_uint32 regval);
+
+jl_ret_t jl51xx_phy_direct_read_ext(jl_uint32 phy, jl_uint32 page, jl_uint32 reg, jl_uint32 *pregval);
+
+jl_ret_t jl51xx_phy_direct_write_ext(jl_uint32 phy, jl_uint32 page, jl_uint32 reg, jl_uint32 regval);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __JL51XX_DRV_PHY_H__ */
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/jl51xx_drv_port.h b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/jl51xx_drv_port.h
new file mode 100644
index 0000000..cbd9dd3
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/jl51xx_drv_port.h
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+#ifndef __JL51XX_DRV_PORT_H__
+#define __JL51XX_DRV_PORT_H__
+
+#include "jl51xx/jl51xx_drv_phy.h"
+#include "jl51xx/reg_phy.h"
+#include "port.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+jl_ret_t jl51xx_port_phy_control_reg_set(jl_port_t port, jl_uint32 regval);
+jl_ret_t jl51xx_port_phy_control_reg_get(jl_port_t port, jl_uint32 *pregval);
+jl_ret_t jl51xx_port_phy_an_adv_reg_set(jl_port_t port, jl_uint32 pregval);
+jl_ret_t jl51xx_port_phy_an_adv_reg_get(jl_port_t port, jl_uint32 *pregval);
+jl_ret_t jl51xx_port_phy_linkp_an_reg_get(jl_port_t port, jl_uint32 *pregval);
+jl_ret_t jl51xx_port_phy_status_reg_get(jl_port_t port, jl_uint32 *regval);
+jl_ret_t jl51xx_port_phy_isolate_set(jl_port_t port, jl_enable_t enable);
+jl_ret_t jl51xx_port_phy_isolate_get(jl_port_t port, jl_enable_t *penable);
+jl_ret_t jl51xx_port_phy_enable_set(jl_port_t port, jl_enable_t enable);
+jl_ret_t jl51xx_port_phy_enable_get(jl_port_t port, jl_enable_t *penable);
+jl_ret_t jl51xx_port_phy_loopback_get(jl_port_t port, jl_enable_t *pen_loopback);
+jl_ret_t jl51xx_port_phy_loopback_set(jl_port_t port, jl_enable_t en_loopback);
+
+jl_ret_t jl51xx_port_mac_force_link_set(jl_port_t port, jl_port_mac_ability_t *pability);
+jl_ret_t jl51xx_port_mac_force_link_get(jl_port_t port, jl_port_mac_ability_t *pability);
+
+jl_ret_t jl51xx_port_mac_force_link_ext_set(jl_port_t port, jl_port_ext_mac_ability_t *pability);
+jl_ret_t jl51xx_port_mac_force_link_ext_get(jl_port_t port, jl_port_ext_mac_ability_t *pability);
+
+jl_ret_t jl51xx_port_mac_loopback_set(jl_port_t port, jl_enable_t en_loopback);
+jl_ret_t jl51xx_port_mac_loopback_get(jl_port_t port, jl_enable_t *pen_loopback);
+#ifdef __cplusplus
+}
+#endif
+#endif /* __JL51XX_DRV_PORT_H */
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/jl51xx_drv_qos.h b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/jl51xx_drv_qos.h
new file mode 100644
index 0000000..133de0c
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/jl51xx_drv_qos.h
@@ -0,0 +1,88 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+
+#ifndef __JL51XX_DRV_QOS_H__
+#define __JL51XX_DRV_QOS_H__
+
+#include "jl_error.h"
+#include "qos.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+typedef struct jl_qos_res_mng_s{
+ jl_uint8 mng_mode[11]; /**< Management mode on each port*/
+ jl_uint8 grt_pointer[11]; /**< Guarantee pointer on each port*/
+ jl_uint8 guarantee[4]; /**< Guarantee resource setting */
+ jl_uint16 global_margin; /**< Global margin resource */
+ jl_uint16 ffa_margin; /**< FFA margin resource */
+ jl_uint8 en_mask[JL_PORT_MAX]; /**< Enabled queue bitmask */
+} jl_qos_res_mng_t;
+
+
+jl_ret_t jl51xx_qos_l3_get(struct qos_l3_config *config);
+jl_ret_t jl51xx_qos_l3_set(struct qos_l3_config *config);
+jl_ret_t jl51xx_qos_l3_port_enable_get(jl_port_t port, jl_uint8 *enable);
+jl_ret_t jl51xx_qos_l3_port_enable_set(jl_port_t port, jl_uint8 enable);
+
+jl_ret_t jl51xx_qos_port_get(jl_port_t port, struct qos_port_config *config);
+jl_ret_t jl51xx_qos_port_set(jl_port_t port, struct qos_port_config *config);
+jl_ret_t jl51xx_qos_vlan_get(struct qos_vlan_config *config);
+jl_ret_t jl51xx_qos_vlan_set(struct qos_vlan_config *config);
+
+/*new qos api*/
+jl_ret_t jl51xx_qos_table_init(void);
+jl_ret_t jl51xx_qos_init(void);
+jl_ret_t jl51xx_qos_deinit(void);
+
+jl_ret_t jl51xx_qos_buf_manage_set(jl_port_t port, jl_uint32 mode);
+jl_ret_t jl51xx_qos_buf_manage_get(jl_port_t port, jl_uint32 *pmode);
+jl_ret_t jl51xx_qos_queue_guarantee_set(jl_uint32 index, jl_uint32 cells);
+jl_ret_t jl51xx_qos_queue_guarantee_get(jl_uint32 index, jl_uint32 *pcells);
+
+jl_ret_t jl51xx_qos_l3_queue_assign_enable_set(jl_port_t port, jl_enable_t enable);
+jl_ret_t jl51xx_qos_l3_queue_assign_enable_get(jl_port_t port, jl_enable_t *penable);
+
+jl_ret_t jl51xx_qos_l3_dscp2queue_map_set(jl_uint32 dscp, jl_uint32 queue);
+jl_ret_t jl51xx_qos_l3_dscp2queue_map_get(jl_uint32 dscp, jl_uint32 *pqueue);
+
+jl_ret_t jl51xx_qos_l3_exp2queue_map_set(jl_uint32 exp, jl_uint32 queue);
+jl_ret_t jl51xx_qos_l3_exp2queue_map_get(jl_uint32 exp, jl_uint32 *pqueue);
+
+jl_ret_t jl51xx_qos_l2_pcp2queue_map_set(jl_uint32 vlan_pcp, jl_uint32 queue);
+jl_ret_t jl51xx_qos_l2_pcp2queue_map_get(jl_uint32 vlan_pcp, jl_uint32 *pqueue);
+
+jl_ret_t jl51xx_qos_l2_port_pcp_set(jl_port_t port, jl_uint32 pcp);
+jl_ret_t jl51xx_qos_l2_port_pcp_get(jl_port_t port, jl_uint32 *ppcp);
+
+jl_ret_t jl51xx_qos_queue_pri_set(jl_port_t port, jl_uint32 queue, jl_uint32 priority);
+jl_ret_t jl51xx_qos_queue_pri_get(jl_port_t port, jl_uint32 queue, jl_uint32 *ppriority);
+
+jl_ret_t jl51xx_qos_queue_dwrr_set(jl_port_t port, jl_uint32 queue, jl_uint32 weight);
+jl_ret_t jl51xx_qos_queue_dwrr_get(jl_port_t port, jl_uint32 queue, jl_uint32 *pweight);
+
+
+jl_ret_t jl51xx_qos_schedule_set(jl_uint8 port, jl_qos_schedule_t *psche);
+jl_ret_t jl51xx_qos_schedule_get(jl_uint8 port, jl_qos_schedule_t *psche);
+
+jl_ret_t jl51xx_qos_enqueue_set(jl_uint8 port, jl_uint8 enmask);
+jl_ret_t jl51xx_qos_enqueue_get(jl_uint8 port, jl_uint8 *penmask);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __JL51XX_DRV_QOS_H__ */
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/jl51xx_drv_sram_load.h b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/jl51xx_drv_sram_load.h
new file mode 100644
index 0000000..c06d7e1
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/jl51xx_drv_sram_load.h
@@ -0,0 +1,33 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+
+#ifndef __JL51XX_DRV_SRAM_LOAD_H__
+#define __JL51XX_DRV_SRAM_LOAD_H__
+
+#include "jl_base.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define SRAM_START_ADDR (0x800)
+#define BLOCK_SIZE (12)
+
+jl_ret_t jl51xx_drv_sram_load(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __JL51XX_DRV_SRAM_LOAD_H__ */
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/jl51xx_drv_sram_load_patch.h b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/jl51xx_drv_sram_load_patch.h
new file mode 100644
index 0000000..17bc667
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/jl51xx_drv_sram_load_patch.h
@@ -0,0 +1,322 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+
+#ifndef __JL51XX_DRV_SRAM_LOAD_PATCH_H__
+#define __JL51XX_DRV_SRAM_LOAD_PATCH_H__
+
+#include "jl_base.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+/*v1.3*/
+jl_uint8 sram_firmware_bin[] = {
+ 0x93, 0x00, 0x00, 0x00, 0x93, 0x01, 0x00, 0x00, 0x13, 0x02, 0x00, 0x00, 0x93, 0x02, 0x00, 0x00,
+ 0x13, 0x03, 0x00, 0x00, 0x93, 0x03, 0x00, 0x00, 0x13, 0x04, 0x00, 0x00, 0x93, 0x04, 0x00, 0x00,
+ 0x13, 0x05, 0x00, 0x00, 0x93, 0x05, 0x00, 0x00, 0x13, 0x06, 0x00, 0x00, 0x93, 0x06, 0x00, 0x00,
+ 0x13, 0x07, 0x00, 0x00, 0x93, 0x07, 0x00, 0x00, 0x37, 0x31, 0x00, 0x00, 0x6f, 0x10, 0x60, 0x1c,
+ 0x01, 0xa0, 0x00, 0x00, 0x0f, 0x00, 0x00, 0x00, 0xfe, 0x00, 0x00, 0x00, 0x3d, 0x00, 0x00, 0x00,
+ 0x0b, 0x00, 0x00, 0x00, 0x56, 0x15, 0x00, 0x00, 0x30, 0x16, 0x00, 0x00, 0x72, 0x16, 0x00, 0x00,
+ 0xa0, 0x16, 0x00, 0x00, 0xc4, 0x16, 0x00, 0x00, 0xe4, 0x16, 0x00, 0x00, 0x51, 0x11, 0xf3, 0x27,
+ 0x00, 0xc8, 0x3e, 0xc0, 0xf3, 0x27, 0x00, 0xc0, 0x3e, 0xc2, 0xf3, 0x27, 0x00, 0xc8, 0x3e, 0xc4,
+ 0x02, 0x47, 0xa2, 0x47, 0x63, 0x05, 0xf7, 0x00, 0xf3, 0x27, 0x00, 0xc0, 0x3e, 0xc2, 0xa2, 0x45,
+ 0x12, 0x45, 0x31, 0x01, 0x82, 0x80, 0xb7, 0x07, 0x30, 0x01, 0x93, 0x87, 0x97, 0x0f, 0x13, 0x17,
+ 0x55, 0x01, 0x3e, 0x97, 0x0a, 0x07, 0xb7, 0x07, 0x00, 0x90, 0x3e, 0x97, 0x1c, 0x43, 0x03, 0x26,
+ 0xc0, 0x22, 0x85, 0x8b, 0xb3, 0x97, 0xa7, 0x00, 0x05, 0x47, 0xb1, 0x8f, 0x33, 0x17, 0xa7, 0x00,
+ 0xf9, 0x8f, 0xb1, 0x8f, 0x23, 0x26, 0xf0, 0x22, 0x82, 0x80, 0x13, 0x01, 0x81, 0xfd, 0xa5, 0x47,
+ 0x06, 0xd2, 0x22, 0xd0, 0x26, 0xce, 0x37, 0x04, 0x00, 0x80, 0x23, 0x2a, 0xf4, 0x3c, 0x9d, 0x2a,
+ 0xad, 0x2a, 0xad, 0x47, 0x23, 0x2a, 0xf4, 0x3c, 0x37, 0x17, 0x00, 0x80, 0x83, 0x27, 0xc7, 0xbc,
+ 0xc1, 0x76, 0xf5, 0x8f, 0x93, 0xe7, 0x37, 0x10, 0x23, 0x26, 0xf7, 0xbc, 0x03, 0x25, 0x07, 0xbd,
+ 0x93, 0x06, 0x20, 0x03, 0x93, 0x17, 0x05, 0x01, 0x63, 0xd5, 0x07, 0x00, 0x46, 0x05, 0x93, 0x56,
+ 0x15, 0x01, 0x01, 0x45, 0x36, 0xc0, 0x41, 0x37, 0x05, 0x45, 0xb5, 0x3f, 0x09, 0x45, 0xa5, 0x3f,
+ 0x0d, 0x45, 0x95, 0x3f, 0x11, 0x45, 0x85, 0x3f, 0xb7, 0x07, 0x80, 0x94, 0x98, 0x43, 0x83, 0x24,
+ 0xc0, 0x22, 0x79, 0x9b, 0x98, 0xc3, 0xd8, 0x43, 0x7d, 0x76, 0x7d, 0x16, 0x13, 0x67, 0x07, 0x02,
+ 0xd8, 0xc3, 0xd8, 0x43, 0x82, 0x46, 0x13, 0x77, 0xf7, 0xfb, 0xd8, 0xc3, 0xd8, 0x47, 0x75, 0x9b,
+ 0xd8, 0xc7, 0xd8, 0x47, 0x71, 0x8f, 0xd8, 0xc7, 0x37, 0x06, 0x00, 0x91, 0x58, 0x42, 0x93, 0x17,
+ 0x07, 0x01, 0x63, 0xc8, 0x07, 0x00, 0x93, 0x47, 0xf7, 0xff, 0xa1, 0x65, 0xed, 0x8f, 0xb9, 0x8f,
+ 0x5c, 0xc2, 0x99, 0x65, 0x93, 0x85, 0x85, 0x1a, 0x36, 0x85, 0xef, 0x10, 0x20, 0x07, 0x2a, 0xca,
+ 0x02, 0xc6, 0x02, 0xc8, 0x85, 0x47, 0x02, 0xc2, 0x02, 0xc0, 0x02, 0xc4, 0x3e, 0xcc, 0xd9, 0x20,
+ 0xd5, 0x28, 0xe2, 0x47, 0xc1, 0xe7, 0x03, 0x27, 0xc0, 0x22, 0x63, 0x10, 0x97, 0x0a, 0xa1, 0xef,
+ 0xf1, 0x35, 0xb2, 0x47, 0x42, 0x47, 0xb3, 0x07, 0xf5, 0x40, 0x33, 0x35, 0xf5, 0x00, 0x99, 0x8d,
+ 0x89, 0x8d, 0x63, 0x44, 0xb0, 0x00, 0xc1, 0xe1, 0xbd, 0xcf, 0x01, 0x45, 0xe9, 0x3d, 0x05, 0x45,
+ 0xd9, 0x3d, 0x09, 0x45, 0xc9, 0x3d, 0x0d, 0x45, 0xf9, 0x35, 0x11, 0x45, 0xe9, 0x35, 0x83, 0x27,
+ 0xc0, 0x22, 0x12, 0x47, 0x63, 0x8d, 0xe7, 0x00, 0xb7, 0x06, 0x00, 0x91, 0xdc, 0x42, 0x13, 0x97,
+ 0x07, 0x01, 0x63, 0x56, 0x07, 0x00, 0x61, 0x77, 0x7d, 0x17, 0xf9, 0x8f, 0xdc, 0xc2, 0x83, 0x24,
+ 0xc0, 0x22, 0x85, 0x47, 0x26, 0xc2, 0x02, 0x47, 0x93, 0x06, 0x17, 0x00, 0x33, 0xb6, 0xe6, 0x00,
+ 0x22, 0x47, 0x93, 0x15, 0x87, 0x01, 0x02, 0x47, 0x21, 0x83, 0x4d, 0x8f, 0xb7, 0x05, 0x40, 0x91,
+ 0xf8, 0xdd, 0x22, 0x47, 0x36, 0xc0, 0x32, 0x97, 0x3a, 0xc4, 0x8d, 0xbf, 0x01, 0x45, 0x3e, 0xcc,
+ 0x9d, 0x3d, 0x05, 0x45, 0x8d, 0x3d, 0x09, 0x45, 0xbd, 0x35, 0x0d, 0x45, 0xad, 0x35, 0x11, 0x45,
+ 0x9d, 0x35, 0xe2, 0x47, 0x8d, 0xb7, 0x81, 0x47, 0x7d, 0xbf, 0x3a, 0xcc, 0x05, 0x3d, 0xd2, 0x47,
+ 0x62, 0x47, 0x26, 0xc2, 0x3e, 0x95, 0xb3, 0x37, 0xf5, 0x00, 0xae, 0x97, 0x2a, 0xc6, 0x3e, 0xc8,
+ 0xba, 0x84, 0xb9, 0xb7, 0x13, 0x05, 0x00, 0x00, 0x82, 0x80, 0x41, 0x11, 0x06, 0xc6, 0x22, 0xc4,
+ 0x23, 0x22, 0x05, 0x00, 0x2a, 0x84, 0x0a, 0x85, 0x02, 0xc0, 0xef, 0x00, 0xb0, 0x53, 0x8a, 0x85,
+ 0x13, 0x05, 0x04, 0x03, 0xef, 0x00, 0xb0, 0x29, 0xb2, 0x40, 0x23, 0x20, 0x04, 0x00, 0x22, 0x44,
+ 0x41, 0x01, 0x82, 0x80, 0xb7, 0x07, 0x40, 0x91, 0xdc, 0x4f, 0x41, 0x11, 0x22, 0xc4, 0x06, 0xc6,
+ 0x26, 0xc2, 0x13, 0x97, 0x27, 0x00, 0x2a, 0x84, 0x63, 0x54, 0x07, 0x02, 0x89, 0x47, 0x1c, 0xc0,
+ 0xb7, 0x07, 0x40, 0x91, 0xd4, 0x4f, 0x1c, 0x40, 0x05, 0x47, 0x63, 0x81, 0xe7, 0x02, 0x89, 0xcf,
+ 0x11, 0x46, 0x63, 0x8c, 0xc7, 0x02, 0xb2, 0x40, 0x22, 0x44, 0x92, 0x44, 0x41, 0x01, 0x82, 0x80,
+ 0xe3, 0xd0, 0x07, 0xfe, 0x8d, 0x47, 0xe1, 0xbf, 0x18, 0xc0, 0xf5, 0xb7, 0x13, 0x97, 0x16, 0x00,
+ 0x63, 0x56, 0x07, 0x00, 0x5c, 0xc0, 0x91, 0x47, 0x1c, 0xc0, 0xf1, 0xbf, 0x13, 0x05, 0x04, 0x03,
+ 0xef, 0x00, 0x10, 0x4a, 0xef, 0x00, 0x50, 0x57, 0xf9, 0xb7, 0x93, 0x97, 0x16, 0x00, 0xe3, 0xc4,
+ 0x07, 0xfc, 0x44, 0x40, 0x99, 0xc4, 0x95, 0x47, 0x63, 0x9e, 0xf4, 0x00, 0x23, 0x04, 0xe4, 0x00,
+ 0x11, 0xa8, 0x0a, 0x85, 0x02, 0xc0, 0xef, 0x00, 0xf0, 0x49, 0x8a, 0x85, 0x13, 0x05, 0x04, 0x03,
+ 0xef, 0x00, 0xf0, 0x1f, 0x04, 0xc0, 0x45, 0xb7, 0x37, 0x07, 0x00, 0x91, 0x54, 0x43, 0x71, 0x11,
+ 0x36, 0xc0, 0x23, 0x10, 0xa1, 0x00, 0x93, 0xd7, 0x06, 0x01, 0x41, 0x81, 0x05, 0x89, 0xf9, 0x9b,
+ 0xc9, 0x8f, 0x23, 0x01, 0xf1, 0x00, 0x82, 0x47, 0x5c, 0xc3, 0x11, 0x01, 0x82, 0x80, 0xb7, 0x07,
+ 0x00, 0x91, 0xc8, 0x43, 0x71, 0x11, 0x3e, 0x05, 0x3d, 0x81, 0x11, 0x01, 0x82, 0x80, 0x37, 0x07,
+ 0x00, 0x91, 0x14, 0x43, 0x71, 0x11, 0x13, 0x45, 0xf5, 0xff, 0x36, 0xc0, 0x23, 0x10, 0xa1, 0x00,
+ 0x93, 0xd7, 0x06, 0x01, 0x41, 0x81, 0x05, 0x89, 0xf9, 0x9b, 0xc9, 0x8f, 0x23, 0x01, 0xf1, 0x00,
+ 0x82, 0x47, 0x1c, 0xc3, 0x11, 0x01, 0x82, 0x80, 0x8d, 0x47, 0x63, 0xe6, 0xc7, 0x02, 0xb7, 0x07,
+ 0x40, 0x00, 0x91, 0x07, 0xbe, 0x95, 0x93, 0x17, 0x26, 0x00, 0x05, 0x66, 0x13, 0x06, 0x46, 0x84,
+ 0x3e, 0x96, 0x1c, 0x42, 0x0e, 0x05, 0x2e, 0x95, 0x0a, 0x05, 0x37, 0x07, 0x00, 0x90, 0x93, 0xf7,
+ 0xf7, 0x1f, 0x3a, 0x95, 0x1c, 0xc1, 0x82, 0x80, 0xa1, 0x47, 0x63, 0x00, 0xf5, 0x02, 0xa5, 0x47,
+ 0x63, 0x1c, 0xf5, 0x00, 0x85, 0x47, 0x86, 0x07, 0x85, 0x89, 0x05, 0x8a, 0xdd, 0x8d, 0x0a, 0x06,
+ 0xd1, 0x8d, 0xb7, 0x07, 0x44, 0x90, 0xcc, 0xc7, 0x82, 0x80, 0x81, 0x47, 0xed, 0xb7, 0x9d, 0x47,
+ 0x63, 0xe8, 0xa7, 0x04, 0x85, 0x47, 0xb3, 0x97, 0xa7, 0x00, 0x13, 0xf7, 0x07, 0x0c, 0x15, 0xef,
+ 0x13, 0xf7, 0x87, 0x03, 0x09, 0xe7, 0x9d, 0x8b, 0x85, 0xcf, 0x81, 0x47, 0x19, 0xa0, 0x75, 0x15,
+ 0x85, 0x47, 0x13, 0x17, 0x25, 0x00, 0x93, 0x87, 0x47, 0x19, 0x3a, 0x95, 0x8a, 0x07, 0x37, 0x07,
+ 0x00, 0x80, 0xba, 0x97, 0x94, 0x43, 0xb3, 0x95, 0xa5, 0x00, 0x7d, 0x47, 0xb5, 0x8d, 0x33, 0x15,
+ 0xa7, 0x00, 0xe9, 0x8d, 0xb5, 0x8d, 0x8c, 0xc3, 0x82, 0x80, 0x69, 0x15, 0x89, 0x47, 0xd1, 0xbf,
+ 0x01, 0x45, 0xe1, 0xb7, 0xb7, 0x06, 0xc0, 0x91, 0xfc, 0x4e, 0x37, 0x07, 0x00, 0xc0, 0x05, 0x89,
+ 0x7d, 0x17, 0x7a, 0x05, 0xf9, 0x8f, 0xc9, 0x8f, 0xfc, 0xce, 0x82, 0x80, 0xb7, 0x07, 0x40, 0x91,
+ 0xa8, 0x53, 0x05, 0x89, 0x82, 0x80, 0xb7, 0x07, 0x00, 0x92, 0x03, 0x47, 0x95, 0x00, 0x9c, 0x57,
+ 0xa1, 0x46, 0x93, 0xc5, 0x15, 0x00, 0x63, 0x1e, 0xd7, 0x00, 0x58, 0x41, 0x85, 0x46, 0x71, 0x17,
+ 0x63, 0xe5, 0xe6, 0x00, 0x85, 0x89, 0xf9, 0x9b, 0xcd, 0x8f, 0x37, 0x07, 0x00, 0x92, 0x1c, 0xd7,
+ 0x82, 0x80, 0xa5, 0x46, 0xe3, 0x1b, 0xd7, 0xfe, 0x85, 0x89, 0x86, 0x05, 0xf5, 0x9b, 0xed, 0xb7,
+ 0x9d, 0x47, 0x63, 0xe4, 0xa7, 0x02, 0x8d, 0x47, 0x06, 0x05, 0x33, 0x95, 0xa7, 0x00, 0xb7, 0x07,
+ 0x00, 0x92, 0x98, 0x4b, 0xb3, 0x67, 0xe5, 0x00, 0x89, 0xc5, 0x13, 0x45, 0xf5, 0xff, 0xb3, 0x77,
+ 0xe5, 0x00, 0x37, 0x07, 0x00, 0x92, 0x1c, 0xcb, 0x82, 0x80, 0xa1, 0x47, 0x93, 0xc5, 0x15, 0x00,
+ 0x63, 0x1d, 0xf5, 0x00, 0x37, 0x07, 0x00, 0x92, 0x1c, 0x5b, 0x85, 0x89, 0x93, 0x96, 0x15, 0x00,
+ 0xf1, 0x9b, 0xd5, 0x8f, 0xdd, 0x8d, 0x0c, 0xdb, 0x82, 0x80, 0xa5, 0x47, 0x63, 0x1c, 0xf5, 0x00,
+ 0x37, 0x07, 0x00, 0x92, 0x1c, 0x5f, 0x85, 0x89, 0x93, 0x96, 0x15, 0x00, 0xf1, 0x9b, 0xd5, 0x8f,
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+ 0x23, 0x08, 0xf4, 0x00, 0x63, 0x04, 0xf5, 0x00, 0x8d, 0x47, 0xd5, 0xb7, 0x05, 0x89, 0x61, 0xd1,
+ 0x83, 0x47, 0x14, 0x00, 0xb7, 0x05, 0x00, 0x80, 0x03, 0x47, 0x94, 0x00, 0x93, 0x87, 0x07, 0x07,
+ 0x8a, 0x07, 0xae, 0x97, 0x9c, 0x43, 0x1d, 0x45, 0x03, 0x46, 0x24, 0x01, 0x83, 0x46, 0x34, 0x01,
+ 0x63, 0x66, 0xe5, 0x00, 0x13, 0xd5, 0x77, 0x00, 0x05, 0x89, 0x1d, 0xc1, 0x13, 0xd7, 0x47, 0x00,
+ 0x95, 0x83, 0x05, 0x8b, 0x85, 0x8b, 0x83, 0x45, 0x64, 0x01, 0xa3, 0x09, 0xf4, 0x00, 0x23, 0x09,
+ 0xe4, 0x00, 0xb9, 0xe9, 0x22, 0x85, 0x79, 0x3a, 0x85, 0x47, 0x23, 0x0b, 0xf4, 0x00, 0x85, 0xbf,
+ 0x93, 0x17, 0x57, 0x01, 0x5e, 0x07, 0x2e, 0x97, 0x18, 0x43, 0x13, 0x15, 0x37, 0x01, 0x63, 0x45,
+ 0x05, 0x00, 0x01, 0x47, 0x81, 0x47, 0xc1, 0xbf, 0x95, 0x07, 0x8a, 0x07, 0xae, 0x97, 0x8c, 0x43,
+ 0x03, 0x45, 0x44, 0x01, 0x13, 0xd3, 0xa5, 0x00, 0x93, 0x77, 0x13, 0x00, 0xe9, 0x8f, 0x3e, 0x87,
+ 0xdd, 0xfb, 0x83, 0x47, 0x54, 0x01, 0xad, 0x81, 0x85, 0x89, 0xed, 0x8f, 0x01, 0x47, 0xc5, 0xd7,
+ 0x13, 0x77, 0x13, 0x00, 0xaa, 0x87, 0x45, 0xb7, 0x63, 0x14, 0xe6, 0x00, 0xe3, 0x81, 0xf6, 0xf2,
+ 0x22, 0x85, 0x12, 0x44, 0xa2, 0x40, 0x82, 0x44, 0x31, 0x01, 0x2d, 0xba, 0x23, 0x26, 0x05, 0x00,
+ 0x39, 0xb7, 0x82, 0x80, 0x8d, 0x47, 0x5c, 0xc5, 0x82, 0x80, 0x83, 0x47, 0x05, 0x00, 0x91, 0xc7,
+ 0x48, 0x45, 0x79, 0x15, 0x13, 0x35, 0x15, 0x00, 0x82, 0x80, 0x01, 0x45, 0x82, 0x80, 0x13, 0x01,
+ 0xc1, 0xfd, 0x93, 0x07, 0x45, 0x00, 0x22, 0xce, 0x26, 0xcc, 0x06, 0xd0, 0x2a, 0x84, 0x2e, 0xc2,
+ 0x3e, 0xc0, 0x3e, 0x87, 0x81, 0x44, 0x93, 0xf5, 0xf4, 0x0f, 0x3a, 0x85, 0x3a, 0xc4, 0x91, 0x35,
+ 0x22, 0x47, 0x85, 0x04, 0xa9, 0x46, 0x61, 0x07, 0xe3, 0x97, 0xd4, 0xfe, 0x92, 0x47, 0x15, 0x47,
+ 0x9c, 0x43, 0xf1, 0x83, 0x63, 0x6c, 0xf7, 0x1e, 0x05, 0x67, 0x8a, 0x07, 0x13, 0x07, 0x47, 0x85,
+ 0xba, 0x97, 0x9c, 0x43, 0x82, 0x87, 0x02, 0x45, 0x81, 0x46, 0x01, 0x46, 0x81, 0x45, 0x35, 0x3d,
+ 0x8d, 0x46, 0x0d, 0x46, 0x85, 0x45, 0x13, 0x05, 0xc4, 0x01, 0x05, 0x3d, 0x91, 0x46, 0x11, 0x46,
+ 0x89, 0x45, 0x13, 0x05, 0x44, 0x03, 0x15, 0x35, 0xa1, 0x46, 0x21, 0x46, 0xa5, 0x45, 0x13, 0x05,
+ 0xc4, 0x0d, 0x21, 0x3d, 0x05, 0x47, 0x81, 0x46, 0x8d, 0x44, 0x82, 0x42, 0x01, 0x43, 0x63, 0x1b,
+ 0x93, 0x1a, 0x85, 0xc2, 0x92, 0x47, 0x13, 0x05, 0x44, 0x0c, 0x3a, 0xc4, 0x90, 0x43, 0x93, 0x55,
+ 0x76, 0x00, 0x13, 0x76, 0x06, 0x02, 0x33, 0x36, 0xc0, 0x00, 0x11, 0x06, 0x85, 0x89, 0xd5, 0x33,
+ 0x22, 0x47, 0x15, 0xc3, 0x92, 0x47, 0x09, 0x66, 0x13, 0x05, 0xc4, 0x0d, 0x98, 0x43, 0x93, 0x55,
+ 0xf7, 0x00, 0x79, 0x8e, 0x93, 0x17, 0x37, 0x01, 0x85, 0x89, 0x33, 0x36, 0xc0, 0x00, 0x63, 0xda,
+ 0x07, 0x18, 0x11, 0x06, 0x7d, 0x3b, 0x23, 0x00, 0x94, 0x00, 0x13, 0x07, 0xf0, 0x0f, 0x81, 0x46,
+ 0x01, 0x46, 0x85, 0x45, 0x29, 0x45, 0x82, 0x47, 0x83, 0xc7, 0x07, 0x00, 0x63, 0x9d, 0x07, 0x16,
+ 0xb3, 0x97, 0xc5, 0x00, 0xdd, 0x8e, 0x82, 0x47, 0x05, 0x06, 0xe1, 0x07, 0x3e, 0xc0, 0xe3, 0x14,
+ 0xa6, 0xfe, 0x37, 0x06, 0x40, 0x91, 0x1c, 0x52, 0x93, 0xf6, 0xf6, 0x3f, 0x13, 0x77, 0xf7, 0x0f,
+ 0x93, 0xf7, 0x07, 0xc0, 0xd5, 0x8f, 0xb7, 0x16, 0xf0, 0xff, 0xfd, 0x16, 0x82, 0x50, 0x72, 0x44,
+ 0x32, 0x07, 0xf5, 0x8f, 0xd9, 0x8f, 0x1c, 0xd2, 0xe2, 0x44, 0x13, 0x01, 0x41, 0x02, 0x82, 0x80,
+ 0x02, 0x45, 0x81, 0x46, 0x01, 0x46, 0x81, 0x45, 0x8d, 0x33, 0x89, 0x46, 0x09, 0x46, 0x85, 0x45,
+ 0x13, 0x05, 0xc4, 0x01, 0x99, 0x3b, 0x95, 0x46, 0x15, 0x46, 0x89, 0x45, 0x13, 0x05, 0x44, 0x03,
+ 0xa9, 0x33, 0x99, 0x46, 0x19, 0x46, 0x8d, 0x45, 0x13, 0x05, 0xc4, 0x04, 0x3d, 0x3b, 0x9d, 0x46,
+ 0x1d, 0x46, 0x91, 0x45, 0x13, 0x05, 0x44, 0x06, 0x0d, 0x3b, 0x01, 0x47, 0x81, 0x46, 0x95, 0x44,
+ 0x29, 0xbf, 0x02, 0x47, 0x81, 0x44, 0x93, 0xf6, 0xf4, 0x0f, 0x36, 0x86, 0xb6, 0x85, 0x3a, 0x85,
+ 0x3a, 0xc4, 0x21, 0x3b, 0x22, 0x47, 0x85, 0x04, 0x95, 0x46, 0x61, 0x07, 0xe3, 0x95, 0xd4, 0xfe,
+ 0xa1, 0x46, 0x21, 0x46, 0xa5, 0x45, 0x13, 0x05, 0xc4, 0x0d, 0x01, 0x33, 0x05, 0x47, 0x0d, 0xa0,
+ 0x02, 0x47, 0x81, 0x44, 0x93, 0xf6, 0xf4, 0x0f, 0x36, 0x86, 0xb6, 0x85, 0x3a, 0x85, 0x3a, 0xc4,
+ 0xed, 0x31, 0x22, 0x47, 0x85, 0x04, 0xa1, 0x46, 0x61, 0x07, 0xe3, 0x95, 0xd4, 0xfe, 0x01, 0x47,
+ 0x81, 0x46, 0xe1, 0xb5, 0x02, 0x47, 0x81, 0x44, 0x93, 0xf6, 0xf4, 0x0f, 0x36, 0x86, 0xb6, 0x85,
+ 0x3a, 0x85, 0x3a, 0xc4, 0xd9, 0x31, 0x22, 0x47, 0x85, 0x04, 0xa1, 0x46, 0x61, 0x07, 0xe3, 0x95,
+ 0xd4, 0xfe, 0x45, 0xbf, 0x02, 0x47, 0x81, 0x44, 0x93, 0xf6, 0xf4, 0x0f, 0x36, 0x86, 0xb6, 0x85,
+ 0x3a, 0x85, 0x3a, 0xc4, 0x5d, 0x31, 0x22, 0x47, 0x85, 0x04, 0xa1, 0x46, 0x61, 0x07, 0xe3, 0x95,
+ 0xd4, 0xfe, 0x92, 0x47, 0x13, 0x07, 0xc4, 0x0d, 0x94, 0x43, 0x93, 0x97, 0x16, 0x01, 0x63, 0xd7,
+ 0x07, 0x00, 0xa1, 0x46, 0x21, 0x46, 0xa5, 0x45, 0x3a, 0x85, 0x41, 0xb7, 0xa1, 0x46, 0x21, 0x46,
+ 0xa1, 0x45, 0x13, 0x05, 0x44, 0x0c, 0x3a, 0xc4, 0x8d, 0x39, 0x22, 0x47, 0xa5, 0x46, 0x25, 0x46,
+ 0x3a, 0x85, 0xa5, 0x45, 0x9d, 0x31, 0x05, 0x47, 0x85, 0x46, 0x81, 0xbd, 0x01, 0x47, 0x81, 0x46,
+ 0x81, 0x44, 0xa1, 0xb5, 0x16, 0x85, 0x05, 0x46, 0x85, 0x45, 0x3a, 0xca, 0x36, 0xc8, 0x1a, 0xc6,
+ 0x16, 0xc4, 0x81, 0x31, 0x32, 0x43, 0xa2, 0x42, 0x52, 0x47, 0x05, 0x03, 0xe1, 0x02, 0xc2, 0x46,
+ 0x3d, 0xb5, 0x09, 0x06, 0x85, 0xbd, 0x82, 0x47, 0xdc, 0x43, 0xe3, 0x96, 0xb7, 0xe8, 0x82, 0x47,
+ 0x83, 0xc7, 0xa7, 0x00, 0xb3, 0x97, 0xf5, 0x00, 0x93, 0xc7, 0xf7, 0xff, 0x7d, 0x8f, 0xa5, 0xbd,
+ 0x51, 0x11, 0x22, 0xc2, 0x26, 0xc0, 0x06, 0xc4, 0x93, 0x04, 0x45, 0x00, 0x13, 0x04, 0x45, 0x0f,
+ 0x26, 0x85, 0xe1, 0x04, 0x89, 0x31, 0xe3, 0x9d, 0x84, 0xfe, 0xa2, 0x40, 0x12, 0x44, 0x82, 0x44,
+ 0x31, 0x01, 0x82, 0x80, 0xb7, 0x07, 0x40, 0x91, 0x9c, 0x4f, 0x1c, 0xc1, 0x82, 0x80, 0xb7, 0x07,
+ 0x40, 0x91, 0xdc, 0x4f, 0x09, 0x47, 0x05, 0x45, 0xb9, 0x83, 0x8d, 0x8b, 0x63, 0x87, 0xe7, 0x00,
+ 0x0d, 0x47, 0x09, 0x45, 0x63, 0x83, 0xe7, 0x00, 0x01, 0x45, 0x82, 0x80, 0x37, 0x07, 0x00, 0x80,
+ 0x83, 0x27, 0x07, 0x74, 0xc1, 0x76, 0xf5, 0x8f, 0x5d, 0x8d, 0x23, 0x20, 0xa7, 0x74, 0x82, 0x80,
+ 0x89, 0x47, 0x63, 0x0a, 0xf5, 0x02, 0x51, 0x11, 0xb7, 0x07, 0x00, 0x80, 0x22, 0xc2, 0x03, 0xa4,
+ 0x07, 0x74, 0x06, 0xc4, 0x42, 0x04, 0x41, 0x80, 0x06, 0x04, 0x11, 0xe9, 0xef, 0xf0, 0x0f, 0xc4,
+ 0x41, 0x8d, 0x12, 0x44, 0xa2, 0x40, 0x42, 0x05, 0x41, 0x81, 0x31, 0x01, 0xc1, 0xb7, 0x29, 0x80,
+ 0x13, 0x75, 0x14, 0x00, 0xfd, 0xb7, 0x82, 0x80, 0xb7, 0x07, 0x00, 0x80, 0x03, 0xa5, 0x07, 0x74,
+ 0x42, 0x05, 0x41, 0x81, 0x82, 0x80, 0x51, 0x11, 0x22, 0xc2, 0x2d, 0x64, 0x26, 0xc0, 0x06, 0xc4,
+ 0x13, 0x04, 0x04, 0xaa, 0x81, 0x44, 0xef, 0xf0, 0x6f, 0xc0, 0x33, 0x15, 0x95, 0x00, 0x49, 0x8c,
+ 0x42, 0x04, 0x85, 0x04, 0x95, 0x47, 0x41, 0x80, 0xe3, 0x97, 0xf4, 0xfe, 0x22, 0x85, 0x12, 0x44,
+ 0xa2, 0x40, 0x82, 0x44, 0x31, 0x01, 0x9d, 0xbf, 0x51, 0x11, 0x06, 0xc4, 0x89, 0x3f, 0xa2, 0x40,
+ 0x31, 0x01, 0xbd, 0xbf, 0x93, 0x07, 0x80, 0x15, 0x13, 0x86, 0x87, 0x0c, 0xa9, 0x45, 0xbe, 0x86,
+ 0x01, 0x47, 0x23, 0x90, 0x06, 0x00, 0x05, 0x07, 0x89, 0x06, 0xe3, 0x1c, 0xb7, 0xfe, 0xd1, 0x07,
+ 0xe3, 0x97, 0xc7, 0xfe, 0x82, 0x80, 0xb7, 0x07, 0x00, 0x80, 0x83, 0xa7, 0x07, 0x54, 0x93, 0x96,
+ 0x07, 0x01, 0xc1, 0x82, 0x93, 0xd5, 0x56, 0x00, 0x13, 0xd6, 0x76, 0x00, 0x85, 0x89, 0x13, 0xf7,
+ 0xf7, 0x00, 0x05, 0x8a, 0x91, 0xc1, 0x39, 0xc6, 0x91, 0x82, 0x85, 0x8a, 0xa9, 0xe6, 0xa5, 0x46,
+ 0x63, 0xe8, 0xe6, 0x02, 0x93, 0x16, 0x27, 0x00, 0x36, 0x97, 0x93, 0x16, 0x27, 0x00, 0x13, 0x07,
+ 0x80, 0x15, 0x36, 0x97, 0xb7, 0x06, 0x00, 0x80, 0x13, 0x85, 0x46, 0x54, 0x93, 0x86, 0xc6, 0x56,
+ 0x03, 0x53, 0x07, 0x00, 0x11, 0x05, 0x09, 0x07, 0x23, 0x2e, 0x65, 0xfe, 0xe3, 0x1a, 0xd5, 0xfe,
+ 0x91, 0xc9, 0x09, 0xca, 0x93, 0xf7, 0xf7, 0xf7, 0xc2, 0x07, 0xc1, 0x83, 0x37, 0x07, 0x00, 0x80,
+ 0x23, 0x20, 0xf7, 0x54, 0x82, 0x80, 0xa5, 0x46, 0xe3, 0xe4, 0xe6, 0xfe, 0x93, 0x16, 0x17, 0x00,
+ 0x13, 0x07, 0x80, 0x15, 0x36, 0x97, 0xb7, 0x06, 0x00, 0x80, 0x13, 0x85, 0x46, 0x54, 0x93, 0x86,
+ 0xc6, 0x56, 0x03, 0x53, 0x07, 0x00, 0x11, 0x05, 0x51, 0x07, 0x23, 0x2e, 0x65, 0xfe, 0xe3, 0x1a,
+ 0xd5, 0xfe, 0x7d, 0xbf, 0x93, 0x17, 0x25, 0x00, 0x3e, 0x95, 0x06, 0x05, 0xaa, 0x95, 0x86, 0x05,
+ 0x13, 0x05, 0x80, 0x15, 0xaa, 0x95, 0x23, 0x90, 0xc5, 0x00, 0x82, 0x80, 0x93, 0x17, 0x25, 0x00,
+ 0x3e, 0x95, 0x06, 0x05, 0xaa, 0x95, 0x13, 0x05, 0x80, 0x15, 0x86, 0x05, 0xaa, 0x95, 0x03, 0xd5,
+ 0x05, 0x00, 0x82, 0x80, 0x63, 0x53, 0x05, 0x00, 0x82, 0x80, 0x01, 0x00, 0x7d, 0x15, 0xdd, 0xbf,
+ 0xb7, 0x07, 0x00, 0x92, 0x90, 0x43, 0xe1, 0x76, 0x93, 0x86, 0xf6, 0x76, 0xf1, 0x8e, 0xc1, 0x75,
+ 0xc2, 0x06, 0x6d, 0x8e, 0xc1, 0x82, 0xd1, 0x8e, 0x94, 0xc3, 0x23, 0xa2, 0x07, 0x00, 0x23, 0xa8,
+ 0x07, 0x00, 0x23, 0xa8, 0x07, 0x02, 0x23, 0xac, 0x07, 0x02, 0x23, 0xa4, 0x07, 0x02, 0x23, 0xae,
+ 0x07, 0x00, 0x94, 0x43, 0x93, 0x85, 0xf5, 0x0f, 0x13, 0xd7, 0x86, 0x00, 0x13, 0x77, 0x77, 0x09,
+ 0x13, 0x67, 0x87, 0x06, 0x22, 0x07, 0xed, 0x8e, 0x55, 0x8f, 0x98, 0xc3, 0x37, 0x07, 0x00, 0x91,
+ 0x83, 0x27, 0xc7, 0x0c, 0x93, 0xe7, 0x47, 0x00, 0x23, 0x26, 0xf7, 0x0c, 0x82, 0x80, 0xb7, 0x07,
+ 0x00, 0x91, 0x83, 0xa7, 0xc7, 0x0c, 0x85, 0x8b, 0x91, 0xc3, 0x59, 0xbf, 0x82, 0x80, 0xb7, 0x07,
+ 0x40, 0x91, 0xdc, 0x4f, 0x93, 0xf7, 0x07, 0x0c, 0x89, 0xeb, 0xb7, 0x07, 0x00, 0x40, 0x9c, 0x43,
+ 0x37, 0x07, 0xfc, 0x03, 0xf9, 0x8f, 0x91, 0xc3, 0xa5, 0xbf, 0x82, 0x80, 0x2a, 0x86, 0x01, 0x45,
+ 0x93, 0xf6, 0x15, 0x00, 0x91, 0xc2, 0x32, 0x95, 0x85, 0x81, 0x06, 0x06, 0xf5, 0xf9, 0x82, 0x80,
+ 0x00, 0x00, 0x51, 0x11, 0x06, 0xc4, 0xb7, 0x07, 0x00, 0x80, 0x05, 0x47, 0x23, 0xaa, 0xe7, 0x3c,
+ 0x15, 0x47, 0x23, 0xaa, 0xe7, 0x3c, 0xef, 0xe0, 0x5f, 0xeb, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x09, 0xe0, 0xff, 0x2f, 0x00, 0xf0, 0xff, 0x0f, 0x09, 0x40, 0xfe, 0xff, 0x02, 0x00, 0xff, 0xff
+};
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __JL51XX_DRV_SRAM_LOAD_PATCH_H__ */
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/jl51xx_drv_storm.h b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/jl51xx_drv_storm.h
new file mode 100644
index 0000000..48ff0c4
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/jl51xx_drv_storm.h
@@ -0,0 +1,36 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+
+#ifndef __JL51XX_DRV_STORM_H__
+#define __JL51XX_DRV_STORM_H__
+
+#include "jl_types.h"
+#include "storm.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+jl_ret_t jl51xx_storm_control_enable_set(jl_port_t egress_port, jl_storm_type_t type, jl_enable_t enable);
+jl_ret_t jl51xx_storm_control_enable_get(jl_port_t egress_port, jl_storm_type_t type, jl_enable_t *penable);
+
+jl_ret_t jl51xx_storm_control_rate_set(jl_port_t egress_port, jl_storm_type_t type, jl_rate_unit_t unit, jl_rate_t rate);
+jl_ret_t jl51xx_storm_control_rate_get(jl_port_t egress_port, jl_storm_type_t type, jl_rate_unit_t *punit, jl_rate_t *prate);
+
+jl_ret_t jl51xx_storm_control_drop_counter_get(jl_port_t egress_port, jl_uint32 *pcntr);
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __JL51XX_DRV_STORM_H__ */
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/jl51xx_drv_stp.h b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/jl51xx_drv_stp.h
new file mode 100644
index 0000000..ebe90b0
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/jl51xx_drv_stp.h
@@ -0,0 +1,37 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+
+#ifndef __JL51XX_DRV_STP_H__
+#define __JL51XX_DRV_STP_H__
+
+#include "jl_types.h"
+#include "stp.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+jl_ret_t jl51xx_stp_port_ingress_state_set(jl_port_t port, jl_stp_state_t stp_state);
+jl_ret_t jl51xx_stp_port_ingress_state_get(jl_port_t port, jl_stp_state_t *pstp_state);
+
+jl_ret_t jl51xx_stp_port_egress_state_set(jl_port_t port, jl_stp_state_t stp_state);
+jl_ret_t jl51xx_stp_port_egress_state_get(jl_port_t port, jl_stp_state_t *pstp_state);
+
+jl_ret_t jl51xx_stp_ingress_drop_counter_get(jl_stp_state_t stp_state, jl_uint32 *pcntr);
+jl_ret_t jl51xx_stp_port_egress_drop_counter_get(jl_port_t port, jl_uint32 *pcntr);
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __JL51XX_DRV_STP_H__ */
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/jl51xx_drv_switch.h b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/jl51xx_drv_switch.h
new file mode 100644
index 0000000..9f33e57
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/jl51xx_drv_switch.h
@@ -0,0 +1,32 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+
+#ifndef __JL51XX_DRV_SWITCH_H__
+#define __JL51XX_DRV_SWITCH_H__
+
+#include "jl_error.h"
+#include "jl_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+jl_ret_t jl51xx_sw_core_init(void);
+jl_ret_t jl51xx_sw_core_deinit(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __JL51XX_DRV_SWITCH_H__ */
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/jl51xx_drv_vlan.h b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/jl51xx_drv_vlan.h
new file mode 100644
index 0000000..f3f599c
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/jl51xx_drv_vlan.h
@@ -0,0 +1,45 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+
+#ifndef __JL51XX_DRV_VLAN_H__
+#define __JL51XX_DRV_VLAN_H__
+
+#include "jl_base.h"
+#include "vlan.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+jl_ret_t jl51xx_vlan_init(void);
+jl_ret_t jl51xx_vlan_deinit(void);
+jl_ret_t jl51xx_port_vlan_assignment_get(jl_port_t port, enum vlan_assignment *opt);
+jl_ret_t jl51xx_port_vlan_assignment_set(jl_port_t port, enum vlan_assignment opt);
+jl_ret_t jl51xx_port_vlan_ingress_operation_get(jl_uint32 port, enum vlan_operation *opt);
+jl_ret_t jl51xx_port_vlan_ingress_operation_set(jl_uint32 port, enum vlan_operation opt);
+jl_ret_t jl51xx_port_vlan_egress_operation_get(jl_uint32 port, enum vlan_operation *opt);
+jl_ret_t jl51xx_port_vlan_egress_operation_set(jl_uint32 port, enum vlan_operation opt);
+jl_ret_t jl51xx_port_vlan_get(jl_port_t port, jl_uint32 *vid);
+jl_ret_t jl51xx_port_vlan_set(jl_port_t port, jl_uint32 vid);
+jl_ret_t jl51xx_vlan_get(jl_uint32 vlan_index, struct vlan_config *config);
+jl_ret_t jl51xx_vlan_set(jl_uint32 vlan_index, struct vlan_config *config);
+jl_ret_t jl51xx_vlan_set_batch(struct vlan_item *v_list, uint16_t size);
+jl_ret_t jl51xx_vlan_acpt_frmt_set(jl_uint32 port, jl_vlan_acpt_frmt_t frmt);
+jl_ret_t jl51xx_vlan_acpt_frmt_get(jl_uint32 port, jl_vlan_acpt_frmt_t *pfrmt);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __JL51XX_DRV_VLAN_H__ */
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/jl51xx_mac_uctrl.h b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/jl51xx_mac_uctrl.h
new file mode 100644
index 0000000..7845856
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/jl51xx_mac_uctrl.h
@@ -0,0 +1,48 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+
+#ifndef __JL51XX_MAC_UCTRL_H__
+#define __JL51XX_MAC_UCTRL_H__
+
+#include "jl_types.h"
+#include "driver/jl_reg_io.h"
+#include "jl51xx/reg_top.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define MAC_UCTRL_DATA_MASK ((jl_uint16)(0xFFFFU))
+#define MAC_UCTRL_PAGE_ID (MAC0_USER_CTRL_OFFSET >> 5)
+#define MAC_UCTRL_REG_ID(id) ((MAC0_USER_CTRL_OFFSET & 0x1F) + id)
+#define MAC_UCTRL_LINK_UP BIT(0)
+#define MAC_UCTRL_FULL_DUPLEX BIT(1)
+#define MAC_UCTRL_100M_SPEED BIT(2)
+
+#define SW_RSVD_DATA_MASK ((jl_uint16)(0xFFFFU))
+#define SW_RSVD_PAGE_ID (SW_RSVD1_OFFSET >> 5)
+#define SW_RSVD_REG_ID(id) ((SW_RSVD1_OFFSET & 0x1F) + id)
+jl_ret_t jl51xx_mac_uctrl_read(jl_port_t phyid, jl_uint32 *pregval);
+
+jl_ret_t jl51xx_mac_uctrl_write(jl_port_t phyid, jl_uint32 regval);
+
+jl_ret_t jl51xx_sw_rsvd_read(jl_port_t phyid, jl_uint32 *pregval);
+
+jl_ret_t jl51xx_sw_rsvd_write(jl_port_t phyid, jl_uint32 regval);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __JL51XX_MAC_UCTRL_H__ */
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/reg_apb_frontend.h b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/reg_apb_frontend.h
new file mode 100644
index 0000000..2ca66d0
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/reg_apb_frontend.h
@@ -0,0 +1,406 @@
+//reg_apb_frontend.h
+/*
+* Automatically generated by gen_c_api.py, don't edit it
+*/
+#ifndef __JL_REG_APB_FRONTEND_H__
+#define __JL_REG_APB_FRONTEND_H__
+
+#include <jl_types.h>
+
+#define APB_FRONTEND_BASE ((jl_uint32)0x00500000U)
+#define APB_FRONTEND_BLOCK_SIZE ((jl_uint32)0x00000100U)
+
+#define CVTER_OFFSET ((jl_uint32)0x00000000U)
+#define CVTER_NUM ((jl_uint32)0x00000001U)
+typedef union CVTER_u {
+ struct {
+ jl_uint32 p8_rmii_rx_lpi_en:1; //[ 0: 0]
+ jl_uint32 p8_rmii_rxd_bad_ssd_en:1; //[ 1: 1]
+ jl_uint32 p8_speed:1; //[ 2: 2]
+ jl_uint32 p8_mii_tx_lpi_en:1; //[ 3: 3]
+ jl_uint32 p9_rmii_rx_lpi_en:1; //[ 4: 4]
+ jl_uint32 p9_rmii_rxd_bad_ssd_en:1; //[ 5: 5]
+ jl_uint32 p9_speed:1; //[ 6: 6]
+ jl_uint32 p9_mii_tx_lpi_en:1; //[ 7: 7]
+ jl_uint32 p8_rmii_rx_negedge_en:1; //[ 8: 8]
+ jl_uint32 p8_rmii_tx_posedge_en:1; //[ 9: 9]
+ jl_uint32 p8_mii_rx_negedge_en:1; //[10:10]
+ jl_uint32 p8_mii_tx_posedge_en:1; //[11:11]
+ jl_uint32 p9_rmii_rx_negedge_en:1; //[12:12]
+ jl_uint32 p9_rmii_tx_posedge_en:1; //[13:13]
+ jl_uint32 p8_rmii_half_duplex_en:1; //[14:14]
+ jl_uint32 p9_rmii_half_duplex_en:1; //[15:15]
+ } bf;
+ jl_uint32 val[1];
+} CVTER_t;
+
+#define FRONT_END_CFG_OFFSET ((jl_uint32)0x00000001U)
+#define FRONT_END_CFG_NUM ((jl_uint32)0x00000001U)
+typedef union FRONT_END_CFG_u {
+ struct {
+ jl_uint32 half_duplex_mode:1; //[ 0: 0]
+ } bf;
+ jl_uint32 val[1];
+} FRONT_END_CFG_t;
+
+#define SLEEP_WAKE_OFFSET ((jl_uint32)0x00000002U)
+#define SLEEP_WAKE_NUM ((jl_uint32)0x00000001U)
+typedef union SLEEP_WAKE_u {
+ struct {
+ jl_uint32 sleep_wake:1; //[ 0: 0]
+ } bf;
+ jl_uint32 val[1];
+} SLEEP_WAKE_t;
+
+#define PHY_DBG_OUT_SEL_OFFSET ((jl_uint32)0x00000003U)
+#define PHY_DBG_OUT_SEL_NUM ((jl_uint32)0x00000001U)
+typedef union PHY_DBG_OUT_SEL_u {
+ struct {
+ jl_uint32 phy_dbg_out_sel:7; //[ 6: 0]
+ } bf;
+ jl_uint32 val[1];
+} PHY_DBG_OUT_SEL_t;
+
+#define RESERVED_CFG0_OFFSET ((jl_uint32)0x00000004U)
+#define RESERVED_CFG0_NUM ((jl_uint32)0x00000001U)
+typedef union RESERVED_CFG0_u {
+ struct {
+ jl_uint32 reserved_config0:32; //[31: 0]
+ } bf;
+ jl_uint32 val[1];
+} RESERVED_CFG0_t;
+
+#define RESERVED_CFG1_OFFSET ((jl_uint32)0x00000005U)
+#define RESERVED_CFG1_NUM ((jl_uint32)0x00000001U)
+typedef union RESERVED_CFG1_u {
+ struct {
+ jl_uint32 reserved_config1:32; //[31: 0]
+ } bf;
+ jl_uint32 val[1];
+} RESERVED_CFG1_t;
+
+#define CPU_RESERVED0_OFFSET ((jl_uint32)0x00000006U)
+#define CPU_RESERVED0_NUM ((jl_uint32)0x00000001U)
+typedef union CPU_RESERVED0_u {
+ struct {
+ jl_uint32 cpu_mem_access_reserved0:32; //[31: 0]
+ } bf;
+ jl_uint32 val[1];
+} CPU_RESERVED0_t;
+
+#define CPU_RESERVED1_OFFSET ((jl_uint32)0x00000007U)
+#define CPU_RESERVED1_NUM ((jl_uint32)0x00000001U)
+typedef union CPU_RESERVED1_u {
+ struct {
+ jl_uint32 cpu_mem_access_reserved1:32; //[31: 0]
+ } bf;
+ jl_uint32 val[1];
+} CPU_RESERVED1_t;
+
+#define CPU_RESERVED2_OFFSET ((jl_uint32)0x00000008U)
+#define CPU_RESERVED2_NUM ((jl_uint32)0x00000001U)
+typedef union CPU_RESERVED2_u {
+ struct {
+ jl_uint32 cpu_mem_access_reserved2:32; //[31: 0]
+ } bf;
+ jl_uint32 val[1];
+} CPU_RESERVED2_t;
+
+#define CPU_RESERVED3_OFFSET ((jl_uint32)0x00000009U)
+#define CPU_RESERVED3_NUM ((jl_uint32)0x00000001U)
+typedef union CPU_RESERVED3_u {
+ struct {
+ jl_uint32 cpu_mem_access_reserved3:32; //[31: 0]
+ } bf;
+ jl_uint32 val[1];
+} CPU_RESERVED3_t;
+
+#define CPU_RESERVED4_OFFSET ((jl_uint32)0x0000000AU)
+#define CPU_RESERVED4_NUM ((jl_uint32)0x00000001U)
+typedef union CPU_RESERVED4_u {
+ struct {
+ jl_uint32 cpu_mem_access_reserved4:32; //[31: 0]
+ } bf;
+ jl_uint32 val[1];
+} CPU_RESERVED4_t;
+
+#define CPU_RESERVED5_OFFSET ((jl_uint32)0x0000000BU)
+#define CPU_RESERVED5_NUM ((jl_uint32)0x00000001U)
+typedef union CPU_RESERVED5_u {
+ struct {
+ jl_uint32 cpu_mem_access_reserved5:32; //[31: 0]
+ } bf;
+ jl_uint32 val[1];
+} CPU_RESERVED5_t;
+
+#define CPU_RESERVED6_OFFSET ((jl_uint32)0x0000000CU)
+#define CPU_RESERVED6_NUM ((jl_uint32)0x00000001U)
+typedef union CPU_RESERVED6_u {
+ struct {
+ jl_uint32 cpu_mem_access_reserved6:32; //[31: 0]
+ } bf;
+ jl_uint32 val[1];
+} CPU_RESERVED6_t;
+
+#define CPU_RESERVED7_OFFSET ((jl_uint32)0x0000000DU)
+#define CPU_RESERVED7_NUM ((jl_uint32)0x00000001U)
+typedef union CPU_RESERVED7_u {
+ struct {
+ jl_uint32 cpu_mem_access_reserved7:32; //[31: 0]
+ } bf;
+ jl_uint32 val[1];
+} CPU_RESERVED7_t;
+
+#define CPU_RESERVED8_OFFSET ((jl_uint32)0x0000000EU)
+#define CPU_RESERVED8_NUM ((jl_uint32)0x00000001U)
+typedef union CPU_RESERVED8_u {
+ struct {
+ jl_uint32 cpu_mem_access_reserved8:32; //[31: 0]
+ } bf;
+ jl_uint32 val[1];
+} CPU_RESERVED8_t;
+
+#define CPU_RESERVED9_OFFSET ((jl_uint32)0x0000000FU)
+#define CPU_RESERVED9_NUM ((jl_uint32)0x00000001U)
+typedef union CPU_RESERVED9_u {
+ struct {
+ jl_uint32 cpu_mem_access_reserved9:32; //[31: 0]
+ } bf;
+ jl_uint32 val[1];
+} CPU_RESERVED9_t;
+
+#define CPU_RESERVED10_OFFSET ((jl_uint32)0x00000010U)
+#define CPU_RESERVED10_NUM ((jl_uint32)0x00000001U)
+typedef union CPU_RESERVED10_u {
+ struct {
+ jl_uint32 cpu_mem_access_reserved10:32; //[31: 0]
+ } bf;
+ jl_uint32 val[1];
+} CPU_RESERVED10_t;
+
+#define STRAP_PIN_STATUS_OFFSET ((jl_uint32)0x00000011U)
+#define STRAP_PIN_STATUS_NUM ((jl_uint32)0x00000001U)
+typedef union STRAP_PIN_STATUS_u {
+ struct {
+ jl_uint32 p8_dup_sta:1; //[ 0: 0]
+ jl_uint32 p8_spd_sta:1; //[ 1: 1]
+ jl_uint32 p8_if_mode:1; //[ 2: 2]
+ jl_uint32 p8_if_sel:2; //[ 4: 3]
+ jl_uint32 en_led1:1; //[ 5: 5]
+ jl_uint32 dis_loop_ind:1; //[ 6: 6]
+ jl_uint32 dis_eee:1; //[ 7: 7]
+ jl_uint32 led_mode1:1; //[ 8: 8]
+ jl_uint32 led_mode2:1; //[ 9: 9]
+ jl_uint32 rma_mode:1; //[10:10]
+ jl_uint32 unknow_multi:1; //[11:11]
+ jl_uint32 dis_rst_blnk:1; //[12:12]
+ jl_uint32 p8_fctrl_sta:1; //[13:13]
+ jl_uint32 p9_dup_sta:1; //[14:14]
+ jl_uint32 p9_spd_sta:1; //[15:15]
+ jl_uint32 p9_if_sel:1; //[16:16]
+ jl_uint32 p9_fcrtl_sta:1; //[17:17]
+ jl_uint32 p9_if_mode:1; //[18:18]
+ jl_uint32 strap_rsv0:1; //[19:19]
+ jl_uint32 strap_rsv1:1; //[20:20]
+ jl_uint32 strap_rsv2:1; //[21:21]
+ jl_uint32 strap_rsv3:1; //[22:22]
+ jl_uint32 strap_rsv4:1; //[23:23]
+ jl_uint32 strap_rsv5:1; //[24:24]
+ jl_uint32 strap_rsv6:1; //[25:25]
+ } bf;
+ jl_uint32 val[1];
+} STRAP_PIN_STATUS_t;
+
+#define TOP_INTN_OFFSET ((jl_uint32)0x00000012U)
+#define TOP_INTN_NUM ((jl_uint32)0x00000001U)
+typedef union TOP_INTN_u {
+ struct {
+ jl_uint32 intn_cfg:1; //[ 0: 0]
+ jl_uint32 intn_sel:1; //[ 1: 1]
+ } bf;
+ jl_uint32 val[1];
+} TOP_INTN_t;
+
+#define MDC_IO_CFG_OFFSET ((jl_uint32)0x00000013U)
+#define MDC_IO_CFG_NUM ((jl_uint32)0x00000001U)
+typedef union MDC_IO_CFG_u {
+ struct {
+ jl_uint32 mdc_io_mode:1; //[ 0: 0]
+ } bf;
+ jl_uint32 val[1];
+} MDC_IO_CFG_t;
+
+#define TSEN_CFG_OFFSET ((jl_uint32)0x00000014U)
+#define TSEN_CFG_NUM ((jl_uint32)0x00000001U)
+typedef union TSEN_CFG_u {
+ struct {
+ jl_uint32 tsen_dout:12; //[11: 0]
+ jl_uint32 tsen_done:1; //[12:12]
+ jl_uint32 trng:1; //[13:13]
+ jl_uint32 tsen_dig_resetb:1; //[14:14]
+ jl_uint32 tsen_avg:1; //[15:15]
+ } bf;
+ jl_uint32 val[1];
+} TSEN_CFG_t;
+
+#define FIXUP_ADDR_OFFSET ((jl_uint32)0x00000015U)
+#define FIXUP_ADDR_NUM ((jl_uint32)0x00000001U)
+typedef union FIXUP_ADDR_u {
+ struct {
+ jl_uint32 fixup_addr:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} FIXUP_ADDR_t;
+
+#define FIXUP_DATA_HI_OFFSET ((jl_uint32)0x00000016U)
+#define FIXUP_DATA_HI_NUM ((jl_uint32)0x00000001U)
+typedef union FIXUP_DATA_HI_u {
+ struct {
+ jl_uint32 fixup_data_hi:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} FIXUP_DATA_HI_t;
+
+#define FIXUP_DATA_LO_OFFSET ((jl_uint32)0x00000017U)
+#define FIXUP_DATA_LO_NUM ((jl_uint32)0x00000001U)
+typedef union FIXUP_DATA_LO_u {
+ struct {
+ jl_uint32 fixup_data_lo:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} FIXUP_DATA_LO_t;
+
+#define PHY_RANDOM_OUT_OFFSET ((jl_uint32)0x00000018U)
+#define PHY_RANDOM_OUT_NUM ((jl_uint32)0x00000001U)
+typedef union PHY_RANDOM_OUT_u {
+ struct {
+ jl_uint32 random_out:1; //[ 0: 0]
+ } bf;
+ jl_uint32 val[1];
+} PHY_RANDOM_OUT_t;
+
+#define INNER_I2C_FW_MODE_OFFSET ((jl_uint32)0x00000019U)
+#define INNER_I2C_FW_MODE_NUM ((jl_uint32)0x00000001U)
+typedef union INNER_I2C_FW_MODE_u {
+ struct {
+ jl_uint32 inner_i2c_od_mode:1; //[ 0: 0]
+ jl_uint32 inner_i2c_fw_mode:1; //[ 1: 1]
+ jl_uint32 inner_i2c_scl_oen_cfg:1; //[ 2: 2]
+ jl_uint32 inner_i2c_scl_out_cfg:1; //[ 3: 3]
+ jl_uint32 inner_i2c_sda_in_cfg:1; //[ 4: 4]
+ jl_uint32 inner_i2c_sda_out_cfg:1; //[ 5: 5]
+ jl_uint32 inner_i2c_sda_oen_cfg:1; //[ 6: 6]
+ } bf;
+ jl_uint32 val[1];
+} INNER_I2C_FW_MODE_t;
+
+#define PIN_DEBUG_OUT_OFFSET ((jl_uint32)0x0000001AU)
+#define PIN_DEBUG_OUT_NUM ((jl_uint32)0x00000001U)
+typedef union PIN_DEBUG_OUT_u {
+ struct {
+ jl_uint32 dbg_p7_led0_out:1; //[ 0: 0]
+ jl_uint32 dbg_p6_led0_out:1; //[ 1: 1]
+ jl_uint32 dbg_p5_led0_out:1; //[ 2: 2]
+ jl_uint32 dbg_p4_led0_out:1; //[ 3: 3]
+ jl_uint32 dbg_p3_led0_out:1; //[ 4: 4]
+ jl_uint32 dbg_p2_led0_out:1; //[ 5: 5]
+ jl_uint32 dbg_p1_led0_out:1; //[ 6: 6]
+ jl_uint32 dbg_p0_led0_out:1; //[ 7: 7]
+ jl_uint32 dbg_loop_ind_out:1; //[ 8: 8]
+ jl_uint32 dbg_sleep_wake_out:1; //[ 9: 9]
+ jl_uint32 dbg_intn_out:1; //[10:10]
+ jl_uint32 dbg_p8_link_stat_out:1; //[11:11]
+ jl_uint32 dbg_p8_mii_rxd3_out:1; //[12:12]
+ jl_uint32 dbg_p8_mii_rxd2_out:1; //[13:13]
+ jl_uint32 dbg_p8_mii_rxd1_out:1; //[14:14]
+ jl_uint32 dbg_p8_mii_rxd0_out:1; //[15:15]
+ jl_uint32 dbg_p8_mii_rx_dv_out:1; //[16:16]
+ jl_uint32 dbg_p8_mii_rx_clk_out:1; //[17:17]
+ jl_uint32 dbg_p8_mii_rx_er_out:1; //[18:18]
+ jl_uint32 dbg_p8_mii_col_out:1; //[19:19]
+ jl_uint32 dbg_p8_mii_crs_out:1; //[20:20]
+ jl_uint32 dbg_p8_mii_tx_er_out:1; //[21:21]
+ jl_uint32 dbg_p8_mii_tx_clk_out:1; //[22:22]
+ jl_uint32 dbg_p8_mii_tx_en_out:1; //[23:23]
+ jl_uint32 dbg_p8_mii_txd0_out:1; //[24:24]
+ jl_uint32 dbg_p8_mii_txd1_out:1; //[25:25]
+ jl_uint32 dbg_p8_mii_txd2_out:1; //[26:26]
+ jl_uint32 dbg_p8_mii_txd3_out:1; //[27:27]
+ } bf;
+ jl_uint32 val[1];
+} PIN_DEBUG_OUT_t;
+
+#define PIN_DEBUG_IN_OFFSET ((jl_uint32)0x0000001BU)
+#define PIN_DEBUG_IN_NUM ((jl_uint32)0x00000001U)
+typedef union PIN_DEBUG_IN_u {
+ struct {
+ jl_uint32 dbg_p7_led0_in:1; //[ 0: 0]
+ jl_uint32 dbg_p6_led0_in:1; //[ 1: 1]
+ jl_uint32 dbg_p5_led0_in:1; //[ 2: 2]
+ jl_uint32 dbg_p4_led0_in:1; //[ 3: 3]
+ jl_uint32 dbg_p3_led0_in:1; //[ 4: 4]
+ jl_uint32 dbg_p2_led0_in:1; //[ 5: 5]
+ jl_uint32 dbg_p1_led0_in:1; //[ 6: 6]
+ jl_uint32 dbg_p0_led0_in:1; //[ 7: 7]
+ jl_uint32 dbg_loop_ind_in:1; //[ 8: 8]
+ jl_uint32 dbg_sleep_wake_in:1; //[ 9: 9]
+ jl_uint32 dbg_intn_in:1; //[10:10]
+ jl_uint32 dbg_p8_link_stat_in:1; //[11:11]
+ jl_uint32 dbg_p8_mii_rxd3_in:1; //[12:12]
+ jl_uint32 dbg_p8_mii_rxd2_in:1; //[13:13]
+ jl_uint32 dbg_p8_mii_rxd1_in:1; //[14:14]
+ jl_uint32 dbg_p8_mii_rxd0_in:1; //[15:15]
+ jl_uint32 dbg_p8_mii_rx_dv_in:1; //[16:16]
+ jl_uint32 dbg_p8_mii_rx_clk_in:1; //[17:17]
+ jl_uint32 dbg_p8_mii_rx_er_in:1; //[18:18]
+ jl_uint32 dbg_p8_mii_col_in:1; //[19:19]
+ jl_uint32 dbg_p8_mii_crs_in:1; //[20:20]
+ jl_uint32 dbg_p8_mii_tx_er_in:1; //[21:21]
+ jl_uint32 dbg_p8_mii_tx_clk_in:1; //[22:22]
+ jl_uint32 dbg_p8_mii_tx_en_in:1; //[23:23]
+ jl_uint32 dbg_p8_mii_txd0_in:1; //[24:24]
+ jl_uint32 dbg_p8_mii_txd1_in:1; //[25:25]
+ jl_uint32 dbg_p8_mii_txd2_in:1; //[26:26]
+ jl_uint32 dbg_p8_mii_txd3_in:1; //[27:27]
+ } bf;
+ jl_uint32 val[1];
+} PIN_DEBUG_IN_t;
+
+#define PIN_DEBUG_OEN_OFFSET ((jl_uint32)0x0000001CU)
+#define PIN_DEBUG_OEN_NUM ((jl_uint32)0x00000001U)
+typedef union PIN_DEBUG_OEN_u {
+ struct {
+ jl_uint32 dbg_p7_led0_oen:1; //[ 0: 0]
+ jl_uint32 dbg_p6_led0_oen:1; //[ 1: 1]
+ jl_uint32 dbg_p5_led0_oen:1; //[ 2: 2]
+ jl_uint32 dbg_p4_led0_oen:1; //[ 3: 3]
+ jl_uint32 dbg_p3_led0_oen:1; //[ 4: 4]
+ jl_uint32 dbg_p2_led0_oen:1; //[ 5: 5]
+ jl_uint32 dbg_p1_led0_oen:1; //[ 6: 6]
+ jl_uint32 dbg_p0_led0_oen:1; //[ 7: 7]
+ jl_uint32 dbg_loop_ind_oen:1; //[ 8: 8]
+ jl_uint32 dbg_sleep_wake_oen:1; //[ 9: 9]
+ jl_uint32 dbg_intn_oen:1; //[10:10]
+ jl_uint32 dbg_p8_link_stat_oen:1; //[11:11]
+ jl_uint32 dbg_p8_mii_rxd3_oen:1; //[12:12]
+ jl_uint32 dbg_p8_mii_rxd2_oen:1; //[13:13]
+ jl_uint32 dbg_p8_mii_rxd1_oen:1; //[14:14]
+ jl_uint32 dbg_p8_mii_rxd0_oen:1; //[15:15]
+ jl_uint32 dbg_p8_mii_rx_dv_oen:1; //[16:16]
+ jl_uint32 dbg_p8_mii_rx_clk_oen:1; //[17:17]
+ jl_uint32 dbg_p8_mii_rx_er_oen:1; //[18:18]
+ jl_uint32 dbg_p8_mii_col_oen:1; //[19:19]
+ jl_uint32 dbg_p8_mii_crs_oen:1; //[20:20]
+ jl_uint32 dbg_p8_mii_tx_er_oen:1; //[21:21]
+ jl_uint32 dbg_p8_mii_tx_clk_oen:1; //[22:22]
+ jl_uint32 dbg_p8_mii_tx_en_oen:1; //[23:23]
+ jl_uint32 dbg_p8_mii_txd0_oen:1; //[24:24]
+ jl_uint32 dbg_p8_mii_txd1_oen:1; //[25:25]
+ jl_uint32 dbg_p8_mii_txd2_oen:1; //[26:26]
+ jl_uint32 dbg_p8_mii_txd3_oen:1; //[27:27]
+ } bf;
+ jl_uint32 val[1];
+} PIN_DEBUG_OEN_t;
+
+#endif /* __JL_REG_APB_FRONTEND_H__ */
+
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/reg_apb_top.h b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/reg_apb_top.h
new file mode 100644
index 0000000..23121ec
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/reg_apb_top.h
@@ -0,0 +1,448 @@
+//reg_apb_top.h
+/*
+* Automatically generated by gen_c_api.py, don't edit it
+*/
+#ifndef __JL_REG_APB_TOP_H__
+#define __JL_REG_APB_TOP_H__
+
+#include <jl_types.h>
+
+#define APB_TOP_BASE ((jl_uint32)0x00400000U)
+#define APB_TOP_BLOCK_SIZE ((jl_uint32)0x00000100U)
+
+#define LED_CFG_0_OFFSET ((jl_uint32)0x00000000U)
+#define LED_CFG_0_NUM ((jl_uint32)0x00000001U)
+typedef union LED_CFG_0_u {
+ struct {
+ jl_uint32 cfg_led_disable:17; //[16: 0]
+ } bf;
+ jl_uint32 val[1];
+} LED_CFG_0_t;
+
+#define LED_CFG_1_OFFSET ((jl_uint32)0x00000001U)
+#define LED_CFG_1_NUM ((jl_uint32)0x00000001U)
+typedef union LED_CFG_1_u {
+ struct {
+ jl_uint32 cfg_led_polarity:17; //[16: 0]
+ } bf;
+ jl_uint32 val[1];
+} LED_CFG_1_t;
+
+#define LED_CFG_2_OFFSET ((jl_uint32)0x00000002U)
+#define LED_CFG_2_NUM ((jl_uint32)0x00000001U)
+typedef union LED_CFG_2_u {
+ struct {
+ jl_uint32 cfg_led_off_time:7; //[ 6: 0]
+ jl_uint32 cfg_led_on_time:7; //[13: 7]
+ } bf;
+ jl_uint32 val[1];
+} LED_CFG_2_t;
+
+#define LED_CFG_3_OFFSET ((jl_uint32)0x00000003U)
+#define LED_CFG_3_NUM ((jl_uint32)0x00000001U)
+typedef union LED_CFG_3_u {
+ struct {
+ jl_uint32 cfg_loop_off_time:7; //[ 6: 0]
+ jl_uint32 cfg_loop_on_time:7; //[13: 7]
+ } bf;
+ jl_uint32 val[1];
+} LED_CFG_3_t;
+
+#define LED_CFG_4_OFFSET ((jl_uint32)0x00000004U)
+#define LED_CFG_4_NUM ((jl_uint32)0x00000001U)
+typedef union LED_CFG_4_u {
+ struct {
+ jl_uint32 cfg_led0_src_mask0:9; //[ 8: 0]
+ } bf;
+ jl_uint32 val[1];
+} LED_CFG_4_t;
+
+#define LED_CFG_5_OFFSET ((jl_uint32)0x00000005U)
+#define LED_CFG_5_NUM ((jl_uint32)0x00000001U)
+typedef union LED_CFG_5_u {
+ struct {
+ jl_uint32 cfg_led0_src_mask1:9; //[ 8: 0]
+ } bf;
+ jl_uint32 val[1];
+} LED_CFG_5_t;
+
+#define LED_CFG_6_OFFSET ((jl_uint32)0x00000006U)
+#define LED_CFG_6_NUM ((jl_uint32)0x00000001U)
+typedef union LED_CFG_6_u {
+ struct {
+ jl_uint32 cfg_led0_src_mask2:9; //[ 8: 0]
+ } bf;
+ jl_uint32 val[1];
+} LED_CFG_6_t;
+
+#define LED_CFG_7_OFFSET ((jl_uint32)0x00000007U)
+#define LED_CFG_7_NUM ((jl_uint32)0x00000001U)
+typedef union LED_CFG_7_u {
+ struct {
+ jl_uint32 cfg_led0_src_mask3:9; //[ 8: 0]
+ } bf;
+ jl_uint32 val[1];
+} LED_CFG_7_t;
+
+#define LED_CFG_8_OFFSET ((jl_uint32)0x00000008U)
+#define LED_CFG_8_NUM ((jl_uint32)0x00000001U)
+typedef union LED_CFG_8_u {
+ struct {
+ jl_uint32 cfg_led0_src_mask4:9; //[ 8: 0]
+ } bf;
+ jl_uint32 val[1];
+} LED_CFG_8_t;
+
+#define LED_CFG_9_OFFSET ((jl_uint32)0x00000009U)
+#define LED_CFG_9_NUM ((jl_uint32)0x00000001U)
+typedef union LED_CFG_9_u {
+ struct {
+ jl_uint32 cfg_led0_src_mask5:9; //[ 8: 0]
+ } bf;
+ jl_uint32 val[1];
+} LED_CFG_9_t;
+
+#define LED_CFG_10_OFFSET ((jl_uint32)0x0000000AU)
+#define LED_CFG_10_NUM ((jl_uint32)0x00000001U)
+typedef union LED_CFG_10_u {
+ struct {
+ jl_uint32 cfg_led0_src_mask6:9; //[ 8: 0]
+ } bf;
+ jl_uint32 val[1];
+} LED_CFG_10_t;
+
+#define LED_CFG_11_OFFSET ((jl_uint32)0x0000000BU)
+#define LED_CFG_11_NUM ((jl_uint32)0x00000001U)
+typedef union LED_CFG_11_u {
+ struct {
+ jl_uint32 cfg_led0_src_mask7:9; //[ 8: 0]
+ } bf;
+ jl_uint32 val[1];
+} LED_CFG_11_t;
+
+#define LED_CFG_12_OFFSET ((jl_uint32)0x0000000CU)
+#define LED_CFG_12_NUM ((jl_uint32)0x00000001U)
+typedef union LED_CFG_12_u {
+ struct {
+ jl_uint32 cfg_led1_src_mask0:9; //[ 8: 0]
+ } bf;
+ jl_uint32 val[1];
+} LED_CFG_12_t;
+
+#define LED_CFG_13_OFFSET ((jl_uint32)0x0000000DU)
+#define LED_CFG_13_NUM ((jl_uint32)0x00000001U)
+typedef union LED_CFG_13_u {
+ struct {
+ jl_uint32 cfg_led1_src_mask1:9; //[ 8: 0]
+ } bf;
+ jl_uint32 val[1];
+} LED_CFG_13_t;
+
+#define LED_CFG_14_OFFSET ((jl_uint32)0x0000000EU)
+#define LED_CFG_14_NUM ((jl_uint32)0x00000001U)
+typedef union LED_CFG_14_u {
+ struct {
+ jl_uint32 cfg_led1_src_mask2:9; //[ 8: 0]
+ } bf;
+ jl_uint32 val[1];
+} LED_CFG_14_t;
+
+#define LED_CFG_15_OFFSET ((jl_uint32)0x0000000FU)
+#define LED_CFG_15_NUM ((jl_uint32)0x00000001U)
+typedef union LED_CFG_15_u {
+ struct {
+ jl_uint32 cfg_led1_src_mask3:9; //[ 8: 0]
+ } bf;
+ jl_uint32 val[1];
+} LED_CFG_15_t;
+
+#define LED_CFG_16_OFFSET ((jl_uint32)0x00000010U)
+#define LED_CFG_16_NUM ((jl_uint32)0x00000001U)
+typedef union LED_CFG_16_u {
+ struct {
+ jl_uint32 cfg_led1_src_mask4:9; //[ 8: 0]
+ } bf;
+ jl_uint32 val[1];
+} LED_CFG_16_t;
+
+#define LED_CFG_17_OFFSET ((jl_uint32)0x00000011U)
+#define LED_CFG_17_NUM ((jl_uint32)0x00000001U)
+typedef union LED_CFG_17_u {
+ struct {
+ jl_uint32 cfg_led1_src_mask5:9; //[ 8: 0]
+ } bf;
+ jl_uint32 val[1];
+} LED_CFG_17_t;
+
+#define LED_CFG_18_OFFSET ((jl_uint32)0x00000012U)
+#define LED_CFG_18_NUM ((jl_uint32)0x00000001U)
+typedef union LED_CFG_18_u {
+ struct {
+ jl_uint32 cfg_led1_src_mask6:9; //[ 8: 0]
+ } bf;
+ jl_uint32 val[1];
+} LED_CFG_18_t;
+
+#define LED_CFG_19_OFFSET ((jl_uint32)0x00000013U)
+#define LED_CFG_19_NUM ((jl_uint32)0x00000001U)
+typedef union LED_CFG_19_u {
+ struct {
+ jl_uint32 cfg_led1_src_mask7:9; //[ 8: 0]
+ } bf;
+ jl_uint32 val[1];
+} LED_CFG_19_t;
+
+#define RF_TIMEOUT_OFFSET ((jl_uint32)0x00000014U)
+#define RF_TIMEOUT_NUM ((jl_uint32)0x00000001U)
+typedef union RF_TIMEOUT_u {
+ struct {
+ jl_uint32 rf_timeout:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} RF_TIMEOUT_t;
+
+#define SWC_DBG_OFFSET ((jl_uint32)0x00000015U)
+#define SWC_DBG_NUM ((jl_uint32)0x00000001U)
+typedef union SWC_DBG_u {
+ struct {
+ jl_uint32 swc_debug:4; //[ 3: 0]
+ } bf;
+ jl_uint32 val[1];
+} SWC_DBG_t;
+
+#define ADAPTER_EXPIRE_0_OFFSET ((jl_uint32)0x00000020U)
+#define ADAPTER_EXPIRE_0_NUM ((jl_uint32)0x00000001U)
+typedef union ADAPTER_EXPIRE_0_u {
+ struct {
+ jl_uint32 expire_p0:5; //[ 4: 0]
+ jl_uint32 trigger_p0:5; //[ 9: 5]
+ jl_uint32 clr_p0:1; //[10:10]
+ jl_uint32 rx_dout_en_p0:1; //[11:11]
+ jl_uint32 tx_dout_en_p0:1; //[12:12]
+ } bf;
+ jl_uint32 val[1];
+} ADAPTER_EXPIRE_0_t;
+
+#define ADAPTER_EXPIRE_1_OFFSET ((jl_uint32)0x00000021U)
+#define ADAPTER_EXPIRE_1_NUM ((jl_uint32)0x00000001U)
+typedef union ADAPTER_EXPIRE_1_u {
+ struct {
+ jl_uint32 expire_p1:5; //[ 4: 0]
+ jl_uint32 trigger_p1:5; //[ 9: 5]
+ jl_uint32 clr_p1:1; //[10:10]
+ jl_uint32 rx_dout_en_p1:1; //[11:11]
+ jl_uint32 tx_dout_en_p1:1; //[12:12]
+ } bf;
+ jl_uint32 val[1];
+} ADAPTER_EXPIRE_1_t;
+
+#define ADAPTER_EXPIRE_2_OFFSET ((jl_uint32)0x00000022U)
+#define ADAPTER_EXPIRE_2_NUM ((jl_uint32)0x00000001U)
+typedef union ADAPTER_EXPIRE_2_u {
+ struct {
+ jl_uint32 expire_p2:5; //[ 4: 0]
+ jl_uint32 trigger_p2:5; //[ 9: 5]
+ jl_uint32 clr_p2:1; //[10:10]
+ jl_uint32 rx_dout_en_p2:1; //[11:11]
+ jl_uint32 tx_dout_en_p2:1; //[12:12]
+ } bf;
+ jl_uint32 val[1];
+} ADAPTER_EXPIRE_2_t;
+
+#define ADAPTER_EXPIRE_3_OFFSET ((jl_uint32)0x00000023U)
+#define ADAPTER_EXPIRE_3_NUM ((jl_uint32)0x00000001U)
+typedef union ADAPTER_EXPIRE_3_u {
+ struct {
+ jl_uint32 expire_p3:5; //[ 4: 0]
+ jl_uint32 trigger_p3:5; //[ 9: 5]
+ jl_uint32 clr_p3:1; //[10:10]
+ jl_uint32 rx_dout_en_p3:1; //[11:11]
+ jl_uint32 tx_dout_en_p3:1; //[12:12]
+ } bf;
+ jl_uint32 val[1];
+} ADAPTER_EXPIRE_3_t;
+
+#define ADAPTER_TRIGGER_0_OFFSET ((jl_uint32)0x00000024U)
+#define ADAPTER_TRIGGER_0_NUM ((jl_uint32)0x00000001U)
+typedef union ADAPTER_TRIGGER_0_u {
+ struct {
+ jl_uint32 expire_p4:5; //[ 4: 0]
+ jl_uint32 trigger_p4:5; //[ 9: 5]
+ jl_uint32 clr_p4:1; //[10:10]
+ jl_uint32 rx_dout_en_p4:1; //[11:11]
+ jl_uint32 tx_dout_en_p4:1; //[12:12]
+ } bf;
+ jl_uint32 val[1];
+} ADAPTER_TRIGGER_0_t;
+
+#define ADAPTER_TRIGGER_1_OFFSET ((jl_uint32)0x00000025U)
+#define ADAPTER_TRIGGER_1_NUM ((jl_uint32)0x00000001U)
+typedef union ADAPTER_TRIGGER_1_u {
+ struct {
+ jl_uint32 expire_p5:5; //[ 4: 0]
+ jl_uint32 trigger_p5:5; //[ 9: 5]
+ jl_uint32 clr_p5:1; //[10:10]
+ jl_uint32 rx_dout_en_p5:1; //[11:11]
+ jl_uint32 tx_dout_en_p5:1; //[12:12]
+ } bf;
+ jl_uint32 val[1];
+} ADAPTER_TRIGGER_1_t;
+
+#define ADAPTER_TRIGGER_2_OFFSET ((jl_uint32)0x00000026U)
+#define ADAPTER_TRIGGER_2_NUM ((jl_uint32)0x00000001U)
+typedef union ADAPTER_TRIGGER_2_u {
+ struct {
+ jl_uint32 expire_p6:5; //[ 4: 0]
+ jl_uint32 trigger_p6:5; //[ 9: 5]
+ jl_uint32 clr_p6:1; //[10:10]
+ jl_uint32 rx_dout_en_p6:1; //[11:11]
+ jl_uint32 tx_dout_en_p6:1; //[12:12]
+ } bf;
+ jl_uint32 val[1];
+} ADAPTER_TRIGGER_2_t;
+
+#define ADAPTER_TRIGGER_3_OFFSET ((jl_uint32)0x00000027U)
+#define ADAPTER_TRIGGER_3_NUM ((jl_uint32)0x00000001U)
+typedef union ADAPTER_TRIGGER_3_u {
+ struct {
+ jl_uint32 expire_p7:5; //[ 4: 0]
+ jl_uint32 trigger_p7:5; //[ 9: 5]
+ jl_uint32 clr_p7:1; //[10:10]
+ jl_uint32 rx_dout_en_p7:1; //[11:11]
+ jl_uint32 tx_dout_en_p7:1; //[12:12]
+ } bf;
+ jl_uint32 val[1];
+} ADAPTER_TRIGGER_3_t;
+
+#define ADAPTER_CLR_OFFSET ((jl_uint32)0x00000028U)
+#define ADAPTER_CLR_NUM ((jl_uint32)0x00000001U)
+typedef union ADAPTER_CLR_u {
+ struct {
+ jl_uint32 expire_p8:5; //[ 4: 0]
+ jl_uint32 trigger_p8:5; //[ 9: 5]
+ jl_uint32 clr_p8:1; //[10:10]
+ jl_uint32 rx_dout_en_p8:1; //[11:11]
+ jl_uint32 tx_dout_en_p8:1; //[12:12]
+ } bf;
+ jl_uint32 val[1];
+} ADAPTER_CLR_t;
+
+#define ADAPTER_CFG_9_OFFSET ((jl_uint32)0x00000029U)
+#define ADAPTER_CFG_9_NUM ((jl_uint32)0x00000001U)
+typedef union ADAPTER_CFG_9_u {
+ struct {
+ jl_uint32 expire_p9:5; //[ 4: 0]
+ jl_uint32 trigger_p9:5; //[ 9: 5]
+ jl_uint32 clr_p9:1; //[10:10]
+ jl_uint32 rx_dout_en_p9:1; //[11:11]
+ jl_uint32 tx_dout_en_p9:1; //[12:12]
+ } bf;
+ jl_uint32 val[1];
+} ADAPTER_CFG_9_t;
+
+#define ADAPTER_QUEUE_TX_CFG_0_OFFSET ((jl_uint32)0x0000002AU)
+#define ADAPTER_QUEUE_TX_CFG_0_NUM ((jl_uint32)0x00000001U)
+typedef union ADAPTER_QUEUE_TX_CFG_0_u {
+ struct {
+ jl_uint32 tx_aremptymask:8; //[ 7: 0]
+ jl_uint32 tx_awfullmask:8; //[15: 8]
+ } bf;
+ jl_uint32 val[1];
+} ADAPTER_QUEUE_TX_CFG_0_t;
+
+#define ADAPTER_QUEUE_TX_CFG_1_OFFSET ((jl_uint32)0x0000002BU)
+#define ADAPTER_QUEUE_TX_CFG_1_NUM ((jl_uint32)0x00000001U)
+typedef union ADAPTER_QUEUE_TX_CFG_1_u {
+ struct {
+ jl_uint32 tx_rthr:5; //[ 4: 0]
+ jl_uint32 tx_wthr:5; //[ 9: 5]
+ jl_uint32 tx_rctrl_mode:1; //[10:10]
+ jl_uint32 tx_wctrl_mode:1; //[11:11]
+ } bf;
+ jl_uint32 val[1];
+} ADAPTER_QUEUE_TX_CFG_1_t;
+
+#define ADAPTER_QUEUE_RX_CFG_0_OFFSET ((jl_uint32)0x0000002CU)
+#define ADAPTER_QUEUE_RX_CFG_0_NUM ((jl_uint32)0x00000001U)
+typedef union ADAPTER_QUEUE_RX_CFG_0_u {
+ struct {
+ jl_uint32 rx_aremptymask:8; //[ 7: 0]
+ jl_uint32 rx_awfullmask:8; //[15: 8]
+ } bf;
+ jl_uint32 val[1];
+} ADAPTER_QUEUE_RX_CFG_0_t;
+
+#define ADAPTER_QUEUE_RX_CFG_1_OFFSET ((jl_uint32)0x0000002DU)
+#define ADAPTER_QUEUE_RX_CFG_1_NUM ((jl_uint32)0x00000001U)
+typedef union ADAPTER_QUEUE_RX_CFG_1_u {
+ struct {
+ jl_uint32 rx_rthr:5; //[ 4: 0]
+ jl_uint32 rx_wthr:5; //[ 9: 5]
+ jl_uint32 rx_rctrl_mode:1; //[10:10]
+ jl_uint32 rx_wctrl_mode:1; //[11:11]
+ } bf;
+ jl_uint32 val[1];
+} ADAPTER_QUEUE_RX_CFG_1_t;
+
+#define ADAPTERS_AFIFO_STATUS_OFFSET ((jl_uint32)0x0000002EU)
+#define ADAPTERS_AFIFO_STATUS_NUM ((jl_uint32)0x00000001U)
+typedef union ADAPTERS_AFIFO_STATUS_u {
+ struct {
+ jl_uint32 rx_afifo_empty:1; //[ 0: 0]
+ jl_uint32 rx_afifo_full:1; //[ 1: 1]
+ jl_uint32 tx_afifo_empty:1; //[ 2: 2]
+ jl_uint32 tx_afifo_full:1; //[ 3: 3]
+ jl_uint32 afifo_select:4; //[ 7: 4]
+ jl_uint32 afifo_state_clr:1; //[ 8: 8]
+ } bf;
+ jl_uint32 val[1];
+} ADAPTERS_AFIFO_STATUS_t;
+
+#define P8_P9_AFIFO_RX_VALID_OFFSET ((jl_uint32)0x0000002FU)
+#define P8_P9_AFIFO_RX_VALID_NUM ((jl_uint32)0x00000001U)
+typedef union P8_P9_AFIFO_RX_VALID_u {
+ struct {
+ jl_uint32 p8_valid_out_en:1; //[ 0: 0]
+ jl_uint32 p9_valid_out_en:1; //[ 1: 1]
+ } bf;
+ jl_uint32 val[1];
+} P8_P9_AFIFO_RX_VALID_t;
+
+#define ADAPTERS_AFIFO_CRS_COL_WIDEN_OFFSET ((jl_uint32)0x00000030U)
+#define ADAPTERS_AFIFO_CRS_COL_WIDEN_NUM ((jl_uint32)0x00000001U)
+typedef union ADAPTERS_AFIFO_CRS_COL_WIDEN_u {
+ struct {
+ jl_uint32 crs_widen_select_p0:2; //[ 1: 0]
+ jl_uint32 crs_widen_select_p1:2; //[ 3: 2]
+ jl_uint32 crs_widen_select_p2:2; //[ 5: 4]
+ jl_uint32 crs_widen_select_p3:2; //[ 7: 6]
+ jl_uint32 crs_widen_select_p4:2; //[ 9: 8]
+ jl_uint32 crs_widen_select_p5:2; //[11:10]
+ jl_uint32 crs_widen_select_p6:2; //[13:12]
+ jl_uint32 crs_widen_select_p7:2; //[15:14]
+ jl_uint32 crs_widen_select_p8:2; //[17:16]
+ jl_uint32 crs_widen_select_p9:2; //[19:18]
+ } bf;
+ jl_uint32 val[1];
+} ADAPTERS_AFIFO_CRS_COL_WIDEN_t;
+
+#define ADAPTERS_AFIFO_COL_WIDEN_OFFSET ((jl_uint32)0x00000031U)
+#define ADAPTERS_AFIFO_COL_WIDEN_NUM ((jl_uint32)0x00000001U)
+typedef union ADAPTERS_AFIFO_COL_WIDEN_u {
+ struct {
+ jl_uint32 col_widen_select_p0:2; //[ 1: 0]
+ jl_uint32 col_widen_select_p1:2; //[ 3: 2]
+ jl_uint32 col_widen_select_p2:2; //[ 5: 4]
+ jl_uint32 col_widen_select_p3:2; //[ 7: 6]
+ jl_uint32 col_widen_select_p4:2; //[ 9: 8]
+ jl_uint32 col_widen_select_p5:2; //[11:10]
+ jl_uint32 col_widen_select_p6:2; //[13:12]
+ jl_uint32 col_widen_select_p7:2; //[15:14]
+ jl_uint32 col_widen_select_p8:2; //[17:16]
+ jl_uint32 col_widen_select_p9:2; //[19:18]
+ } bf;
+ jl_uint32 val[1];
+} ADAPTERS_AFIFO_COL_WIDEN_t;
+
+#endif /* __JL_REG_APB_TOP_H__ */
+
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/reg_clkgen.h b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/reg_clkgen.h
new file mode 100644
index 0000000..58a479c
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/reg_clkgen.h
@@ -0,0 +1,307 @@
+//reg_clkgen.h
+/*
+* Automatically generated by gen_c_api.py, don't edit it
+*/
+#ifndef __JL_REG_CLKGEN_H__
+#define __JL_REG_CLKGEN_H__
+
+#include <jl_types.h>
+
+#define CLKGEN_BASE ((jl_uint32)0x00800000U)
+#define CLKGEN_BLOCK_SIZE ((jl_uint32)0x00000100U)
+
+#define CLKGEN_CTL_0_OFFSET ((jl_uint32)0x00000000U)
+#define CLKGEN_CTL_0_NUM ((jl_uint32)0x00000001U)
+typedef union CLKGEN_CTL_0_u {
+ struct {
+ jl_uint32 osc_rstn:1; //[ 0: 0]
+ jl_uint32 mcu_rstn:1; //[ 1: 1]
+ jl_uint32 mcu_clk_en:1; //[ 2: 2]
+ jl_uint32 core_pre_clk_en:1; //[ 3: 3]
+ jl_uint32 core_6p25_rstn:1; //[ 4: 4]
+ jl_uint32 core_62p5_rstn:1; //[ 5: 5]
+ jl_uint32 core_12p5_rstn:1; //[ 6: 6]
+ jl_uint32 mag_rstn:1; //[ 7: 7]
+ jl_uint32 mag_clk_en:1; //[ 8: 8]
+ jl_uint32 patch_rstn:1; //[ 9: 9]
+ jl_uint32 top_ana_rstn:1; //[10:10]
+ jl_uint32 top_cfg_rstn:1; //[11:11]
+ jl_uint32 led_rstn:1; //[12:12]
+ jl_uint32 inner_i2c_rstn:1; //[13:13]
+ jl_uint32 i2c_rstn:1; //[14:14]
+ } bf;
+ jl_uint32 val[1];
+} CLKGEN_CTL_0_t;
+
+#define CLKGEN_CTL_1_OFFSET ((jl_uint32)0x00000001U)
+#define CLKGEN_CTL_1_NUM ((jl_uint32)0x00000001U)
+typedef union CLKGEN_CTL_1_u {
+ struct {
+ jl_uint32 phy_0_global_rstn:1; //[ 0: 0]
+ jl_uint32 phy_1_global_rstn:1; //[ 1: 1]
+ jl_uint32 phy_2_global_rstn:1; //[ 2: 2]
+ jl_uint32 phy_3_global_rstn:1; //[ 3: 3]
+ jl_uint32 phy_4_global_rstn:1; //[ 4: 4]
+ jl_uint32 phy_5_global_rstn:1; //[ 5: 5]
+ jl_uint32 phy_6_global_rstn:1; //[ 6: 6]
+ jl_uint32 phy_7_global_rstn:1; //[ 7: 7]
+ } bf;
+ jl_uint32 val[1];
+} CLKGEN_CTL_1_t;
+
+#define CLKGEN_CTL_2_OFFSET ((jl_uint32)0x00000002U)
+#define CLKGEN_CTL_2_NUM ((jl_uint32)0x00000001U)
+typedef union CLKGEN_CTL_2_u {
+ struct {
+ jl_uint32 phy_mcu_0_clk_en:1; //[ 0: 0]
+ jl_uint32 phy_osc_0_clk_en:1; //[ 1: 1]
+ jl_uint32 phy_tx_0_clk_en:1; //[ 2: 2]
+ jl_uint32 phy_rx_0_clk_en:1; //[ 3: 3]
+ jl_uint32 phy_mcu_1_clk_en:1; //[ 4: 4]
+ jl_uint32 phy_osc_1_clk_en:1; //[ 5: 5]
+ jl_uint32 phy_tx_1_clk_en:1; //[ 6: 6]
+ jl_uint32 phy_rx_1_clk_en:1; //[ 7: 7]
+ jl_uint32 phy_mcu_2_clk_en:1; //[ 8: 8]
+ jl_uint32 phy_osc_2_clk_en:1; //[ 9: 9]
+ jl_uint32 phy_tx_2_clk_en:1; //[10:10]
+ jl_uint32 phy_rx_2_clk_en:1; //[11:11]
+ jl_uint32 phy_mcu_3_clk_en:1; //[12:12]
+ jl_uint32 phy_osc_3_clk_en:1; //[13:13]
+ jl_uint32 phy_tx_3_clk_en:1; //[14:14]
+ jl_uint32 phy_rx_3_clk_en:1; //[15:15]
+ } bf;
+ jl_uint32 val[1];
+} CLKGEN_CTL_2_t;
+
+#define CLKGEN_CTL_3_OFFSET ((jl_uint32)0x00000003U)
+#define CLKGEN_CTL_3_NUM ((jl_uint32)0x00000001U)
+typedef union CLKGEN_CTL_3_u {
+ struct {
+ jl_uint32 phy_mcu_4_clk_en:1; //[ 0: 0]
+ jl_uint32 phy_osc_4_clk_en:1; //[ 1: 1]
+ jl_uint32 phy_tx_4_clk_en:1; //[ 2: 2]
+ jl_uint32 phy_rx_4_clk_en:1; //[ 3: 3]
+ jl_uint32 phy_mcu_5_clk_en:1; //[ 4: 4]
+ jl_uint32 phy_osc_5_clk_en:1; //[ 5: 5]
+ jl_uint32 phy_tx_5_clk_en:1; //[ 6: 6]
+ jl_uint32 phy_rx_5_clk_en:1; //[ 7: 7]
+ jl_uint32 phy_mcu_6_clk_en:1; //[ 8: 8]
+ jl_uint32 phy_osc_6_clk_en:1; //[ 9: 9]
+ jl_uint32 phy_tx_6_clk_en:1; //[10:10]
+ jl_uint32 phy_rx_6_clk_en:1; //[11:11]
+ jl_uint32 phy_mcu_7_clk_en:1; //[12:12]
+ jl_uint32 phy_osc_7_clk_en:1; //[13:13]
+ jl_uint32 phy_tx_7_clk_en:1; //[14:14]
+ jl_uint32 phy_rx_7_clk_en:1; //[15:15]
+ } bf;
+ jl_uint32 val[1];
+} CLKGEN_CTL_3_t;
+
+#define CLKGEN_CTL_4_OFFSET ((jl_uint32)0x00000004U)
+#define CLKGEN_CTL_4_NUM ((jl_uint32)0x00000001U)
+typedef union CLKGEN_CTL_4_u {
+ struct {
+ jl_uint32 phy_tx_0_rstn:1; //[ 0: 0]
+ jl_uint32 phy_rx_0_rstn:1; //[ 1: 1]
+ jl_uint32 phy_tx_1_rstn:1; //[ 2: 2]
+ jl_uint32 phy_rx_1_rstn:1; //[ 3: 3]
+ jl_uint32 phy_tx_2_rstn:1; //[ 4: 4]
+ jl_uint32 phy_rx_2_rstn:1; //[ 5: 5]
+ jl_uint32 phy_tx_3_rstn:1; //[ 6: 6]
+ jl_uint32 phy_rx_3_rstn:1; //[ 7: 7]
+ jl_uint32 phy_tx_4_rstn:1; //[ 8: 8]
+ jl_uint32 phy_rx_4_rstn:1; //[ 9: 9]
+ jl_uint32 phy_tx_5_rstn:1; //[10:10]
+ jl_uint32 phy_rx_5_rstn:1; //[11:11]
+ jl_uint32 phy_tx_6_rstn:1; //[12:12]
+ jl_uint32 phy_rx_6_rstn:1; //[13:13]
+ jl_uint32 phy_tx_7_rstn:1; //[14:14]
+ jl_uint32 phy_rx_7_rstn:1; //[15:15]
+ } bf;
+ jl_uint32 val[1];
+} CLKGEN_CTL_4_t;
+
+#define CLKGEN_CTL_5_OFFSET ((jl_uint32)0x00000005U)
+#define CLKGEN_CTL_5_NUM ((jl_uint32)0x00000001U)
+typedef union CLKGEN_CTL_5_u {
+ struct {
+ jl_uint32 phy_tx_mux_0_clk_sel:1; //[ 0: 0]
+ jl_uint32 phy_rx_mux_0_clk_sel:1; //[ 1: 1]
+ jl_uint32 phy_tx_mux_1_clk_sel:1; //[ 2: 2]
+ jl_uint32 phy_rx_mux_1_clk_sel:1; //[ 3: 3]
+ jl_uint32 phy_tx_mux_2_clk_sel:1; //[ 4: 4]
+ jl_uint32 phy_rx_mux_2_clk_sel:1; //[ 5: 5]
+ jl_uint32 phy_tx_mux_3_clk_sel:1; //[ 6: 6]
+ jl_uint32 phy_rx_mux_3_clk_sel:1; //[ 7: 7]
+ jl_uint32 phy_tx_mux_4_clk_sel:1; //[ 8: 8]
+ jl_uint32 phy_rx_mux_4_clk_sel:1; //[ 9: 9]
+ jl_uint32 phy_tx_mux_5_clk_sel:1; //[10:10]
+ jl_uint32 phy_rx_mux_5_clk_sel:1; //[11:11]
+ jl_uint32 phy_tx_mux_6_clk_sel:1; //[12:12]
+ jl_uint32 phy_rx_mux_6_clk_sel:1; //[13:13]
+ jl_uint32 phy_tx_mux_7_clk_sel:1; //[14:14]
+ jl_uint32 phy_rx_mux_7_clk_sel:1; //[15:15]
+ } bf;
+ jl_uint32 val[1];
+} CLKGEN_CTL_5_t;
+
+#define CLKGEN_CTL_6_OFFSET ((jl_uint32)0x00000006U)
+#define CLKGEN_CTL_6_NUM ((jl_uint32)0x00000001U)
+typedef union CLKGEN_CTL_6_u {
+ struct {
+ jl_uint32 mac_0_clk_en:1; //[ 0: 0]
+ jl_uint32 mac_1_clk_en:1; //[ 1: 1]
+ jl_uint32 mac_2_clk_en:1; //[ 2: 2]
+ jl_uint32 mac_3_clk_en:1; //[ 3: 3]
+ jl_uint32 mac_4_clk_en:1; //[ 4: 4]
+ jl_uint32 mac_5_clk_en:1; //[ 5: 5]
+ jl_uint32 mac_6_clk_en:1; //[ 6: 6]
+ jl_uint32 mac_7_clk_en:1; //[ 7: 7]
+ jl_uint32 mac_8_clk_en:1; //[ 8: 8]
+ jl_uint32 mac_9_clk_en:1; //[ 9: 9]
+ } bf;
+ jl_uint32 val[1];
+} CLKGEN_CTL_6_t;
+
+#define CLKGEN_CTL_7_OFFSET ((jl_uint32)0x00000007U)
+#define CLKGEN_CTL_7_NUM ((jl_uint32)0x00000001U)
+typedef union CLKGEN_CTL_7_u {
+ struct {
+ jl_uint32 mac_0_rstn:1; //[ 0: 0]
+ jl_uint32 mac_1_rstn:1; //[ 1: 1]
+ jl_uint32 mac_2_rstn:1; //[ 2: 2]
+ jl_uint32 mac_3_rstn:1; //[ 3: 3]
+ jl_uint32 mac_4_rstn:1; //[ 4: 4]
+ jl_uint32 mac_5_rstn:1; //[ 5: 5]
+ jl_uint32 mac_6_rstn:1; //[ 6: 6]
+ jl_uint32 mac_7_rstn:1; //[ 7: 7]
+ jl_uint32 mac_8_rstn:1; //[ 8: 8]
+ jl_uint32 mac_9_rstn:1; //[ 9: 9]
+ } bf;
+ jl_uint32 val[1];
+} CLKGEN_CTL_7_t;
+
+#define CLKGEN_CTL_8_OFFSET ((jl_uint32)0x00000008U)
+#define CLKGEN_CTL_8_NUM ((jl_uint32)0x00000001U)
+typedef union CLKGEN_CTL_8_u {
+ struct {
+ jl_uint32 mac_mux_0_clk_sel:1; //[ 0: 0]
+ jl_uint32 mac_mux_1_clk_sel:1; //[ 1: 1]
+ jl_uint32 mac_mux_2_clk_sel:1; //[ 2: 2]
+ jl_uint32 mac_mux_3_clk_sel:1; //[ 3: 3]
+ jl_uint32 mac_mux_4_clk_sel:1; //[ 4: 4]
+ jl_uint32 mac_mux_5_clk_sel:1; //[ 5: 5]
+ jl_uint32 mac_mux_6_clk_sel:1; //[ 6: 6]
+ jl_uint32 mac_mux_7_clk_sel:1; //[ 7: 7]
+ jl_uint32 mac_mux_8_clk_sel:1; //[ 8: 8]
+ jl_uint32 mac_mux_9_clk_sel:1; //[ 9: 9]
+ } bf;
+ jl_uint32 val[1];
+} CLKGEN_CTL_8_t;
+
+#define CLKGEN_CTL_9_OFFSET ((jl_uint32)0x00000009U)
+#define CLKGEN_CTL_9_NUM ((jl_uint32)0x00000001U)
+typedef union CLKGEN_CTL_9_u {
+ struct {
+ jl_uint32 ext_rmii_refclk_out_8_clk_en:1; //[ 0: 0]
+ jl_uint32 inner_rmii_refclk_8_clk_en:1; //[ 1: 1]
+ jl_uint32 ext_rmii_refclk_out_9_clk_en:1; //[ 2: 2]
+ jl_uint32 inner_rmii_refclk_9_clk_en:1; //[ 3: 3]
+ } bf;
+ jl_uint32 val[1];
+} CLKGEN_CTL_9_t;
+
+#define CLKGEN_CTL_10_OFFSET ((jl_uint32)0x0000000AU)
+#define CLKGEN_CTL_10_NUM ((jl_uint32)0x00000001U)
+typedef union CLKGEN_CTL_10_u {
+ struct {
+ jl_uint32 inner_rmii_refclk_8_rstn:1; //[ 0: 0]
+ jl_uint32 inner_rmii_refclk_9_rstn:1; //[ 1: 1]
+ } bf;
+ jl_uint32 val[1];
+} CLKGEN_CTL_10_t;
+
+#define CLKGEN_CTL_11_OFFSET ((jl_uint32)0x0000000BU)
+#define CLKGEN_CTL_11_NUM ((jl_uint32)0x00000001U)
+typedef union CLKGEN_CTL_11_u {
+ struct {
+ jl_uint32 ext_mii_txclk_out_8_clk_en:1; //[ 0: 0]
+ jl_uint32 ext_mii_rxclk_out_8_clk_en:1; //[ 1: 1]
+ jl_uint32 inner_mii_txclk_8_clk_en:1; //[ 2: 2]
+ jl_uint32 inner_mii_rxclk_8_clk_en:1; //[ 3: 3]
+ } bf;
+ jl_uint32 val[1];
+} CLKGEN_CTL_11_t;
+
+#define CLKGEN_CTL_12_OFFSET ((jl_uint32)0x0000000CU)
+#define CLKGEN_CTL_12_NUM ((jl_uint32)0x00000001U)
+typedef union CLKGEN_CTL_12_u {
+ struct {
+ jl_uint32 inner_mii_txclk_8_rstn:1; //[ 0: 0]
+ jl_uint32 inner_mii_rxclk_8_rstn:1; //[ 1: 1]
+ } bf;
+ jl_uint32 val[1];
+} CLKGEN_CTL_12_t;
+
+#define CLKGEN_CTL_13_OFFSET ((jl_uint32)0x0000000DU)
+#define CLKGEN_CTL_13_NUM ((jl_uint32)0x00000001U)
+typedef union CLKGEN_CTL_13_u {
+ struct {
+ jl_uint32 inner_mii_txclk_9_clk_en:1; //[ 0: 0]
+ jl_uint32 inner_mii_rxclk_9_clk_en:1; //[ 1: 1]
+ } bf;
+ jl_uint32 val[1];
+} CLKGEN_CTL_13_t;
+
+#define CLKGEN_CTL_14_OFFSET ((jl_uint32)0x0000000EU)
+#define CLKGEN_CTL_14_NUM ((jl_uint32)0x00000001U)
+typedef union CLKGEN_CTL_14_u {
+ struct {
+ jl_uint32 inner_mii_txclk_9_rstn:1; //[ 0: 0]
+ jl_uint32 inner_mii_rxclk_9_rstn:1; //[ 1: 1]
+ } bf;
+ jl_uint32 val[1];
+} CLKGEN_CTL_14_t;
+
+#define CLKGEN_CTL_15_OFFSET ((jl_uint32)0x0000000FU)
+#define CLKGEN_CTL_15_NUM ((jl_uint32)0x00000001U)
+typedef union CLKGEN_CTL_15_u {
+ struct {
+ jl_uint32 phy_dbg_int_rstn:1; //[ 0: 0]
+ jl_uint32 phy_dbg_ext_rstn:1; //[ 1: 1]
+ } bf;
+ jl_uint32 val[1];
+} CLKGEN_CTL_15_t;
+
+#define CLKGEN_CTL_16_OFFSET ((jl_uint32)0x00000010U)
+#define CLKGEN_CTL_16_NUM ((jl_uint32)0x00000001U)
+typedef union CLKGEN_CTL_16_u {
+ struct {
+ jl_uint32 phy_dbg_0_1_mux_clk_sel:1; //[ 0: 0]
+ jl_uint32 phy_dbg_2_3_mux_clk_sel:1; //[ 1: 1]
+ jl_uint32 phy_dbg_4_5_mux_clk_sel:1; //[ 2: 2]
+ jl_uint32 phy_dbg_6_7_mux_clk_sel:1; //[ 3: 3]
+ jl_uint32 phy_dbg_01_23_mux_clk_sel:1; //[ 4: 4]
+ jl_uint32 phy_dbg_45_67_mux_clk_sel:1; //[ 5: 5]
+ jl_uint32 phy_dbg_0123_4567_mux_clk_sel:1; //[ 6: 6]
+ } bf;
+ jl_uint32 val[1];
+} CLKGEN_CTL_16_t;
+
+#define CLKGEN_CTL_17_OFFSET ((jl_uint32)0x00000011U)
+#define CLKGEN_CTL_17_NUM ((jl_uint32)0x00000001U)
+typedef union CLKGEN_CTL_17_u {
+ struct {
+ jl_uint32 p8_mii_mac_phy_sel:1; //[ 0: 0]
+ jl_uint32 p8_mii_rmii_sel:1; //[ 1: 1]
+ jl_uint32 p5_mode:1; //[ 2: 2]
+ jl_uint32 p4_mode:1; //[ 3: 3]
+ jl_uint32 mac9_to_p8_mode:1; //[ 4: 4]
+ jl_uint32 p8_rmii_refclk_sel:1; //[ 5: 5]
+ jl_uint32 p9_rmii_refclk_sel:1; //[ 6: 6]
+ } bf;
+ jl_uint32 val[1];
+} CLKGEN_CTL_17_t;
+
+#endif /* __JL_REG_CLKGEN_H__ */
+
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/reg_ethmac.h b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/reg_ethmac.h
new file mode 100644
index 0000000..0c2e841
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/reg_ethmac.h
@@ -0,0 +1,576 @@
+//reg_ethmac.h
+/*
+* Automatically generated by gen_c_api.py, don't edit it
+*/
+#ifndef __JL_REG_ETHMAC_H__
+#define __JL_REG_ETHMAC_H__
+
+#include <jl_types.h>
+#include "jl51xx/jl51xx_drv_switch.h"
+
+#define ETHMAC9_BASE ((jl_uint32)0x00200900U)
+#define ETHMAC9_BLOCK_SIZE ((jl_uint32)0x00000100U)
+#define ETHMAC8_BASE ((jl_uint32)0x00200800U)
+#define ETHMAC8_BLOCK_SIZE ((jl_uint32)0x00000100U)
+#define ETHMAC7_BASE ((jl_uint32)0x00200700U)
+#define ETHMAC7_BLOCK_SIZE ((jl_uint32)0x00000100U)
+#define ETHMAC6_BASE ((jl_uint32)0x00200600U)
+#define ETHMAC6_BLOCK_SIZE ((jl_uint32)0x00000100U)
+#define ETHMAC5_BASE ((jl_uint32)0x00200500U)
+#define ETHMAC5_BLOCK_SIZE ((jl_uint32)0x00000100U)
+#define ETHMAC4_BASE ((jl_uint32)0x00200400U)
+#define ETHMAC4_BLOCK_SIZE ((jl_uint32)0x00000100U)
+#define ETHMAC3_BASE ((jl_uint32)0x00200300U)
+#define ETHMAC3_BLOCK_SIZE ((jl_uint32)0x00000100U)
+#define ETHMAC2_BASE ((jl_uint32)0x00200200U)
+#define ETHMAC2_BLOCK_SIZE ((jl_uint32)0x00000100U)
+#define ETHMAC1_BASE ((jl_uint32)0x00200100U)
+#define ETHMAC1_BLOCK_SIZE ((jl_uint32)0x00000100U)
+#define ETHMAC0_BASE ((jl_uint32)0x00200000U)
+#define ETHMAC0_BLOCK_SIZE ((jl_uint32)0x00000100U)
+
+#define MAC_MODER_OFFSET ((jl_uint32)0x00000000U)
+#define MAC_MODER_NUM ((jl_uint32)0x00000001U)
+typedef union MAC_MODER_u {
+ struct {
+ jl_uint32 rx_en:1; //[ 0: 0]
+ jl_uint32 tx_en:1; //[ 1: 1]
+ jl_uint32 full_duplex:1; //[ 2: 2]
+ jl_uint32 loopback:1; //[ 3: 3]
+ jl_uint32 rx_ifg_chk_en:1; //[ 4: 4]
+ jl_uint32 rx_crc_chk_en:1; //[ 5: 5]
+ jl_uint32 rx_crc_strip_en:1; //[ 6: 6]
+ jl_uint32 rx_small_en:1; //[ 7: 7]
+ jl_uint32 rx_long_en:1; //[ 8: 8]
+ jl_uint32 rx_hug_en:1; //[ 9: 9]
+ jl_uint32 rx_bro_en:1; //[10:10]
+ jl_uint32 rsvd:1; //[11:11]
+ jl_uint32 rx_pro_en:1; //[12:12]
+ jl_uint32 rx_fci_en:1; //[13:13]
+ jl_uint32 rsvd1:2; //[15:14]
+ jl_uint32 tx_no_bckoff:1; //[16:16]
+ jl_uint32 tx_ex_dfr_en:1; //[17:17]
+ jl_uint32 tx_no_pre:1; //[18:18]
+ jl_uint32 tx_dly_crc_en:1; //[19:19]
+ jl_uint32 tx_crc_gen_en:1; //[20:20]
+ jl_uint32 tx_pad_en:1; //[21:21]
+ jl_uint32 tx_csl_en:1; //[22:22]
+ jl_uint32 tx_crs_ignore:1; //[23:23]
+ jl_uint32 tx_en_flush_en:1; //[24:24]
+ } bf;
+ jl_uint32 val[1];
+} MAC_MODER_t;
+
+#define INT_STATUS_OFFSET ((jl_uint32)0x00000001U)
+#define INT_STATUS_NUM ((jl_uint32)0x00000001U)
+typedef union INT_STATUS_u {
+ struct {
+ jl_uint32 tx_overflow:1; //[ 0: 0]
+ jl_uint32 tx_underflow:1; //[ 1: 1]
+ jl_uint32 tx_abrt:1; //[ 2: 2]
+ jl_uint32 tx_err:1; //[ 3: 3]
+ jl_uint32 rx_err:1; //[ 4: 4]
+ jl_uint32 tx_ctrl_frame:1; //[ 5: 5]
+ jl_uint32 rx_ctrl_frame:1; //[ 6: 6]
+ jl_uint32 rx_overflow:1; //[ 7: 7]
+ jl_uint32 rx_ipg_drp:1; //[ 8: 8]
+ jl_uint32 link_down:1; //[ 9: 9]
+ jl_uint32 link_up:1; //[10:10]
+ } bf;
+ jl_uint32 val[1];
+} INT_STATUS_t;
+
+#define INT_ENABLE_OFFSET ((jl_uint32)0x00000002U)
+#define INT_ENABLE_NUM ((jl_uint32)0x00000001U)
+typedef union INT_ENABLE_u {
+ struct {
+ jl_uint32 tx_overflow_en:1; //[ 0: 0]
+ jl_uint32 tx_underflow_en:1; //[ 1: 1]
+ jl_uint32 tx_abrt_en:1; //[ 2: 2]
+ jl_uint32 tx_err_en:1; //[ 3: 3]
+ jl_uint32 rx_err_en:1; //[ 4: 4]
+ jl_uint32 tx_ctrl_frame_en:1; //[ 5: 5]
+ jl_uint32 rx_ctrl_frame_en:1; //[ 6: 6]
+ jl_uint32 rx_overflow_en:1; //[ 7: 7]
+ jl_uint32 rx_ipg_drp_en:1; //[ 8: 8]
+ jl_uint32 link_down_en:1; //[ 9: 9]
+ jl_uint32 link_up_en:1; //[10:10]
+ } bf;
+ jl_uint32 val[1];
+} INT_ENABLE_t;
+
+#define INT_SET_OFFSET ((jl_uint32)0x00000003U)
+#define INT_SET_NUM ((jl_uint32)0x00000001U)
+typedef union INT_SET_u {
+ struct {
+ jl_uint32 tx_overflow_set:1; //[ 0: 0]
+ jl_uint32 tx_underflow_set:1; //[ 1: 1]
+ jl_uint32 tx_abrt_set:1; //[ 2: 2]
+ jl_uint32 tx_err_set:1; //[ 3: 3]
+ jl_uint32 rx_err_set:1; //[ 4: 4]
+ jl_uint32 tx_ctrl_frame_set:1; //[ 5: 5]
+ jl_uint32 rx_ctrl_frame_set:1; //[ 6: 6]
+ jl_uint32 rx_overflow_set:1; //[ 7: 7]
+ jl_uint32 rx_ipg_drp_set:1; //[ 8: 8]
+ jl_uint32 link_down_set:1; //[ 9: 9]
+ jl_uint32 link_up_set:1; //[10:10]
+ } bf;
+ jl_uint32 val[1];
+} INT_SET_t;
+
+#define RX_ERR_INFO_OFFSET ((jl_uint32)0x00000004U)
+#define RX_ERR_INFO_NUM ((jl_uint32)0x00000001U)
+typedef union RX_ERR_INFO_u {
+ struct {
+ jl_uint32 rx_addr_violation:1; //[ 0: 0]
+ jl_uint32 rx_mii_err:1; //[ 1: 1]
+ jl_uint32 rx_pause_frame:1; //[ 2: 2]
+ jl_uint32 rx_short_pkt:1; //[ 3: 3]
+ jl_uint32 rx_invalid_symbol:1; //[ 4: 4]
+ jl_uint32 rx_dribble_nibble:1; //[ 5: 5]
+ jl_uint32 rx_jumbo_pkt:1; //[ 6: 6]
+ jl_uint32 rx_crc_err:1; //[ 7: 7]
+ jl_uint32 rx_late_collision:1; //[ 8: 8]
+ } bf;
+ jl_uint32 val[1];
+} RX_ERR_INFO_t;
+
+#define TX_ERR_INFO_OFFSET ((jl_uint32)0x00000005U)
+#define TX_ERR_INFO_NUM ((jl_uint32)0x00000001U)
+typedef union TX_ERR_INFO_u {
+ struct {
+ jl_uint32 tx_csr_loss:1; //[ 0: 0]
+ jl_uint32 tx_app_err:1; //[ 1: 1]
+ } bf;
+ jl_uint32 val[1];
+} TX_ERR_INFO_t;
+
+#define TX_ABORT_INFO_OFFSET ((jl_uint32)0x00000006U)
+#define TX_ABORT_INFO_NUM ((jl_uint32)0x00000001U)
+typedef union TX_ABORT_INFO_u {
+ struct {
+ jl_uint32 tx_exdefer:1; //[ 0: 0]
+ jl_uint32 tx_max_collision:1; //[ 1: 1]
+ jl_uint32 tx_late_collision:1; //[ 2: 2]
+ } bf;
+ jl_uint32 val[1];
+} TX_ABORT_INFO_t;
+
+#define IPG_OFFSET ((jl_uint32)0x00000007U)
+#define IPG_NUM ((jl_uint32)0x00000001U)
+typedef union IPG_u {
+ struct {
+ jl_uint32 ipgt:7; //[ 6: 0]
+ jl_uint32 rsvd:1; //[ 7: 7]
+ jl_uint32 ipgr:5; //[12: 8]
+ } bf;
+ jl_uint32 val[1];
+} IPG_t;
+
+#define IPGR1_OFFSET ((jl_uint32)0x00000008U)
+#define IPGR1_NUM ((jl_uint32)0x00000001U)
+typedef union IPGR1_u {
+ struct {
+ jl_uint32 ipgr1:7; //[ 6: 0]
+ } bf;
+ jl_uint32 val[1];
+} IPGR1_t;
+
+#define IPGR2_OFFSET ((jl_uint32)0x00000009U)
+#define IPGR2_NUM ((jl_uint32)0x00000001U)
+typedef union IPGR2_u {
+ struct {
+ jl_uint32 ipgr2:7; //[ 6: 0]
+ } bf;
+ jl_uint32 val[1];
+} IPGR2_t;
+
+#define PACKET_LEN_OFFSET ((jl_uint32)0x0000000AU)
+#define PACKET_LEN_NUM ((jl_uint32)0x00000001U)
+typedef union PACKET_LEN_u {
+ struct {
+ jl_uint32 max_frame_length:16; //[15: 0]
+ jl_uint32 min_frame_length:16; //[31:16]
+ } bf;
+ jl_uint32 val[1];
+} PACKET_LEN_t;
+
+#define HALF_DUPLEX_CFG_OFFSET ((jl_uint32)0x0000000BU)
+#define HALF_DUPLEX_CFG_NUM ((jl_uint32)0x00000001U)
+typedef union HALF_DUPLEX_CFG_u {
+ struct {
+ jl_uint32 coll_valid:6; //[ 5: 0]
+ jl_uint32 rsvd:2; //[ 7: 6]
+ jl_uint32 max_retry:4; //[11: 8]
+ jl_uint32 max_defer:14; //[25:12]
+ jl_uint32 rsvd1:2; //[27:26]
+ jl_uint32 tx_en_dly_mask:3; //[30:28]
+ } bf;
+ jl_uint32 val[1];
+} HALF_DUPLEX_CFG_t;
+
+#define MAC_ADDR_OFFSET ((jl_uint32)0x0000000CU)
+#define MAC_ADDR_NUM ((jl_uint32)0x00000001U)
+typedef union MAC_ADDR_u {
+ struct {
+ jl_uint64 mac_addr:48; //[47: 0]
+ } bf;
+ jl_uint32 val[2];
+} MAC_ADDR_t;
+
+#define RMA_DROP_MASK_OFFSET ((jl_uint32)0x0000000EU)
+#define RMA_DROP_MASK_NUM ((jl_uint32)0x00000001U)
+typedef union RMA_DROP_MASK_u {
+ struct {
+ jl_uint64 rma_drp_mask:64; //[63: 0]
+ } bf;
+ jl_uint32 val[2];
+} RMA_DROP_MASK_t;
+
+#define TX_FIFO_THRESHOLD_OFFSET ((jl_uint32)0x00000010U)
+#define TX_FIFO_THRESHOLD_NUM ((jl_uint32)0x00000001U)
+typedef union TX_FIFO_THRESHOLD_u {
+ struct {
+ jl_uint32 tx_fifo_thrd:6; //[ 5: 0]
+ } bf;
+ jl_uint32 val[1];
+} TX_FIFO_THRESHOLD_t;
+
+#define CTRL_MODER_OFFSET ((jl_uint32)0x00000011U)
+#define CTRL_MODER_NUM ((jl_uint32)0x00000001U)
+typedef union CTRL_MODER_u {
+ struct {
+ jl_uint32 pass_all:1; //[ 0: 0]
+ jl_uint32 rx_flow:1; //[ 1: 1]
+ jl_uint32 tx_flow:1; //[ 2: 2]
+ jl_uint32 tx_bp:1; //[ 3: 3]
+ } bf;
+ jl_uint32 val[1];
+} CTRL_MODER_t;
+
+#define TXPAUSE_FRAME_CONTROL_OFFSET ((jl_uint32)0x00000012U)
+#define TXPAUSE_FRAME_CONTROL_NUM ((jl_uint32)0x00000001U)
+typedef union TXPAUSE_FRAME_CONTROL_u {
+ struct {
+ jl_uint32 tx_pause_tv:16; //[15: 0]
+ jl_uint32 tx_pause_rq:1; //[16:16]
+ jl_uint32 tx_pause_en:1; //[17:17]
+ } bf;
+ jl_uint32 val[1];
+} TXPAUSE_FRAME_CONTROL_t;
+
+#define TXLOOP_FRAME_CONTROL_OFFSET ((jl_uint32)0x00000014U)
+#define TXLOOP_FRAME_CONTROL_NUM ((jl_uint32)0x00000001U)
+typedef union TXLOOP_FRAME_CONTROL_u {
+ struct {
+ jl_uint64 lp_frm_etype:16; //[15: 0]
+ jl_uint64 lp_frm_opcode:16; //[31:16]
+ jl_uint64 lp_frm_ttl:16; //[47:32]
+ jl_uint64 lp_frm_max_ttl:16; //[63:48]
+ } bf;
+ jl_uint32 val[2];
+} TXLOOP_FRAME_CONTROL_t;
+
+#define STATISTIC_MODE_0_OFFSET ((jl_uint32)0x00000016U)
+#define STATISTIC_MODE_0_NUM ((jl_uint32)0x00000001U)
+typedef union STATISTIC_MODE_0_u {
+ struct {
+ jl_uint32 car_en:1; //[ 0: 0]
+ jl_uint32 rsvd:3; //[ 3: 1]
+ jl_uint32 mib_en:28; //[31: 4]
+ } bf;
+ jl_uint32 val[1];
+} STATISTIC_MODE_0_t;
+
+#define STATISTIC_MODE_1_OFFSET ((jl_uint32)0x00000017U)
+#define STATISTIC_MODE_1_NUM ((jl_uint32)0x00000001U)
+typedef union STATISTIC_MODE_1_u {
+ struct {
+ jl_uint32 mib_clear:1; //[ 0: 0]
+ jl_uint32 rsvd:3; //[ 3: 1]
+ jl_uint32 mib_id:8; //[11: 4]
+ } bf;
+ jl_uint32 val[1];
+} STATISTIC_MODE_1_t;
+
+#define TX_PKT_CNT_OFFSET ((jl_uint32)0x00000018U)
+#define TX_PKT_CNT_NUM ((jl_uint32)0x00000001U)
+typedef union TX_PKT_CNT_u {
+ struct {
+ jl_uint64 tx_pkt_cnt:64; //[63: 0]
+ } bf;
+ jl_uint32 val[2];
+} TX_PKT_CNT_t;
+
+#define TX_PKT_BYTE_CNT_OFFSET ((jl_uint32)0x0000001AU)
+#define TX_PKT_BYTE_CNT_NUM ((jl_uint32)0x00000001U)
+typedef union TX_PKT_BYTE_CNT_u {
+ struct {
+ jl_uint64 tx_pkt_byte_cnt:64; //[63: 0]
+ } bf;
+ jl_uint32 val[2];
+} TX_PKT_BYTE_CNT_t;
+
+#define TX_PKT_UC_CNT_OFFSET ((jl_uint32)0x0000001CU)
+#define TX_PKT_UC_CNT_NUM ((jl_uint32)0x00000001U)
+typedef union TX_PKT_UC_CNT_u {
+ struct {
+ jl_uint64 tx_pkt_uc_cnt:64; //[63: 0]
+ } bf;
+ jl_uint32 val[2];
+} TX_PKT_UC_CNT_t;
+
+#define TX_PKT_UC_BYTE_CNT_OFFSET ((jl_uint32)0x0000001EU)
+#define TX_PKT_UC_BYTE_CNT_NUM ((jl_uint32)0x00000001U)
+typedef union TX_PKT_UC_BYTE_CNT_u {
+ struct {
+ jl_uint64 tx_pkt_uc_byte_cnt:64; //[63: 0]
+ } bf;
+ jl_uint32 val[2];
+} TX_PKT_UC_BYTE_CNT_t;
+
+#define TX_PKT_MC_CNT_OFFSET ((jl_uint32)0x00000020U)
+#define TX_PKT_MC_CNT_NUM ((jl_uint32)0x00000001U)
+typedef union TX_PKT_MC_CNT_u {
+ struct {
+ jl_uint64 tx_pkt_mc_cnt:64; //[63: 0]
+ } bf;
+ jl_uint32 val[2];
+} TX_PKT_MC_CNT_t;
+
+#define TX_PKT_MC_BYTE_CNT_OFFSET ((jl_uint32)0x00000022U)
+#define TX_PKT_MC_BYTE_CNT_NUM ((jl_uint32)0x00000001U)
+typedef union TX_PKT_MC_BYTE_CNT_u {
+ struct {
+ jl_uint64 tx_pkt_mc_byte_cnt:64; //[63: 0]
+ } bf;
+ jl_uint32 val[2];
+} TX_PKT_MC_BYTE_CNT_t;
+
+#define TX_PKT_BC_CNT_OFFSET ((jl_uint32)0x00000024U)
+#define TX_PKT_BC_CNT_NUM ((jl_uint32)0x00000001U)
+typedef union TX_PKT_BC_CNT_u {
+ struct {
+ jl_uint64 tx_pkt_bc_cnt:64; //[63: 0]
+ } bf;
+ jl_uint32 val[2];
+} TX_PKT_BC_CNT_t;
+
+#define TX_PKT_BC_BYTE_CNT_OFFSET ((jl_uint32)0x00000026U)
+#define TX_PKT_BC_BYTE_CNT_NUM ((jl_uint32)0x00000001U)
+typedef union TX_PKT_BC_BYTE_CNT_u {
+ struct {
+ jl_uint64 tx_pkt_bc_byte_cnt:64; //[63: 0]
+ } bf;
+ jl_uint32 val[2];
+} TX_PKT_BC_BYTE_CNT_t;
+
+#define TX_PKT_DRP_CNT_OFFSET ((jl_uint32)0x00000028U)
+#define TX_PKT_DRP_CNT_NUM ((jl_uint32)0x00000001U)
+typedef union TX_PKT_DRP_CNT_u {
+ struct {
+ jl_uint32 tx_pkt_drp_cnt:32; //[31: 0]
+ } bf;
+ jl_uint32 val[1];
+} TX_PKT_DRP_CNT_t;
+
+#define TX_PKT_ERR_CNT_OFFSET ((jl_uint32)0x00000029U)
+#define TX_PKT_ERR_CNT_NUM ((jl_uint32)0x00000001U)
+typedef union TX_PKT_ERR_CNT_u {
+ struct {
+ jl_uint32 tx_pkt_err_cnt:32; //[31: 0]
+ } bf;
+ jl_uint32 val[1];
+} TX_PKT_ERR_CNT_t;
+
+#define RX_PKT_CNT_OFFSET ((jl_uint32)0x0000002AU)
+#define RX_PKT_CNT_NUM ((jl_uint32)0x00000001U)
+typedef union RX_PKT_CNT_u {
+ struct {
+ jl_uint64 rx_pkt_cnt:64; //[63: 0]
+ } bf;
+ jl_uint32 val[2];
+} RX_PKT_CNT_t;
+
+#define RX_PKT_BYTE_CNT_OFFSET ((jl_uint32)0x0000002CU)
+#define RX_PKT_BYTE_CNT_NUM ((jl_uint32)0x00000001U)
+typedef union RX_PKT_BYTE_CNT_u {
+ struct {
+ jl_uint64 rx_pkt_byte_cnt:64; //[63: 0]
+ } bf;
+ jl_uint32 val[2];
+} RX_PKT_BYTE_CNT_t;
+
+#define RX_PKT_UC_CNT_OFFSET ((jl_uint32)0x0000002EU)
+#define RX_PKT_UC_CNT_NUM ((jl_uint32)0x00000001U)
+typedef union RX_PKT_UC_CNT_u {
+ struct {
+ jl_uint64 rx_pkt_uc_cnt:64; //[63: 0]
+ } bf;
+ jl_uint32 val[2];
+} RX_PKT_UC_CNT_t;
+
+#define RX_PKT_UC_BYTE_CNT_OFFSET ((jl_uint32)0x00000030U)
+#define RX_PKT_UC_BYTE_CNT_NUM ((jl_uint32)0x00000001U)
+typedef union RX_PKT_UC_BYTE_CNT_u {
+ struct {
+ jl_uint64 rx_pkt_uc_byte_cnt:64; //[63: 0]
+ } bf;
+ jl_uint32 val[2];
+} RX_PKT_UC_BYTE_CNT_t;
+
+#define RX_PKT_MC_CNT_OFFSET ((jl_uint32)0x00000032U)
+#define RX_PKT_MC_CNT_NUM ((jl_uint32)0x00000001U)
+typedef union RX_PKT_MC_CNT_u {
+ struct {
+ jl_uint64 rx_pkt_mc_cnt:64; //[63: 0]
+ } bf;
+ jl_uint32 val[2];
+} RX_PKT_MC_CNT_t;
+
+#define RX_PKT_MC_BYTE_CNT_OFFSET ((jl_uint32)0x00000034U)
+#define RX_PKT_MC_BYTE_CNT_NUM ((jl_uint32)0x00000001U)
+typedef union RX_PKT_MC_BYTE_CNT_u {
+ struct {
+ jl_uint64 rx_pkt_mc_byte_cnt:64; //[63: 0]
+ } bf;
+ jl_uint32 val[2];
+} RX_PKT_MC_BYTE_CNT_t;
+
+#define RX_PKT_BC_CNT_OFFSET ((jl_uint32)0x00000036U)
+#define RX_PKT_BC_CNT_NUM ((jl_uint32)0x00000001U)
+typedef union RX_PKT_BC_CNT_u {
+ struct {
+ jl_uint64 rx_pkt_bc_cnt:64; //[63: 0]
+ } bf;
+ jl_uint32 val[2];
+} RX_PKT_BC_CNT_t;
+
+#define RX_PKT_BC_BYTE_CNT_OFFSET ((jl_uint32)0x00000038U)
+#define RX_PKT_BC_BYTE_CNT_NUM ((jl_uint32)0x00000001U)
+typedef union RX_PKT_BC_BYTE_CNT_u {
+ struct {
+ jl_uint64 rx_pkt_bc_byte_cnt:64; //[63: 0]
+ } bf;
+ jl_uint32 val[2];
+} RX_PKT_BC_BYTE_CNT_t;
+
+#define RX_PKT_DRP_CNT_OFFSET ((jl_uint32)0x0000003AU)
+#define RX_PKT_DRP_CNT_NUM ((jl_uint32)0x00000001U)
+typedef union RX_PKT_DRP_CNT_u {
+ struct {
+ jl_uint32 rx_pkt_drp_cnt:32; //[31: 0]
+ } bf;
+ jl_uint32 val[1];
+} RX_PKT_DRP_CNT_t;
+
+#define RX_PKT_CRC_ERR_CNT_OFFSET ((jl_uint32)0x0000003BU)
+#define RX_PKT_CRC_ERR_CNT_NUM ((jl_uint32)0x00000001U)
+typedef union RX_PKT_CRC_ERR_CNT_u {
+ struct {
+ jl_uint32 rx_pkt_crc_err_cnt:32; //[31: 0]
+ } bf;
+ jl_uint32 val[1];
+} RX_PKT_CRC_ERR_CNT_t;
+
+#define RX_FRAG_ERR_CNT_OFFSET ((jl_uint32)0x0000003CU)
+#define RX_FRAG_ERR_CNT_NUM ((jl_uint32)0x00000001U)
+typedef union RX_FRAG_ERR_CNT_u {
+ struct {
+ jl_uint32 rx_frag_err_cnt:32; //[31: 0]
+ } bf;
+ jl_uint32 val[1];
+} RX_FRAG_ERR_CNT_t;
+
+#define TX_DATA_IN_CNT_OFFSET ((jl_uint32)0x0000003DU)
+#define TX_DATA_IN_CNT_NUM ((jl_uint32)0x00000001U)
+typedef union TX_DATA_IN_CNT_u {
+ struct {
+ jl_uint32 dp2mac_eop_cnt:4; //[ 3: 0]
+ jl_uint32 dp2mac_sop_cnt:4; //[ 7: 4]
+ jl_uint32 dp2mac_valid_cnt:8; //[15: 8]
+ } bf;
+ jl_uint32 val[1];
+} TX_DATA_IN_CNT_t;
+
+#define RX_DATA_OUT_CNT_OFFSET ((jl_uint32)0x0000003EU)
+#define RX_DATA_OUT_CNT_NUM ((jl_uint32)0x00000001U)
+typedef union RX_DATA_OUT_CNT_u {
+ struct {
+ jl_uint32 mac2dp_eop_cnt:4; //[ 3: 0]
+ jl_uint32 mac2dp_sop_cnt:4; //[ 7: 4]
+ jl_uint32 mac2dp_valid_cnt:8; //[15: 8]
+ } bf;
+ jl_uint32 val[1];
+} RX_DATA_OUT_CNT_t;
+
+#define TX_FIFO_MAX_DEPTH_OFFSET ((jl_uint32)0x0000003FU)
+#define TX_FIFO_MAX_DEPTH_NUM ((jl_uint32)0x00000001U)
+typedef union TX_FIFO_MAX_DEPTH_u {
+ struct {
+ jl_uint32 cfg_retry_buff_max_depth:7; //[ 6: 0]
+ } bf;
+ jl_uint32 val[1];
+} TX_FIFO_MAX_DEPTH_t;
+
+#define TX_FIFO_DEPTH_OFFSET ((jl_uint32)0x00000040U)
+#define TX_FIFO_DEPTH_NUM ((jl_uint32)0x00000001U)
+typedef union TX_FIFO_DEPTH_u {
+ struct {
+ jl_uint32 dbg_mactx_fifo_depth:7; //[ 6: 0]
+ jl_uint32 rsvd:1; //[ 7: 7]
+ jl_uint32 dbg_retry_buff_waddr:7; //[14: 8]
+ jl_uint32 rsvd1:1; //[15:15]
+ jl_uint32 dbg_retry_buff_raddr:7; //[22:16]
+ } bf;
+ jl_uint32 val[1];
+} TX_FIFO_DEPTH_t;
+
+#define HALF_DUPLEX_STATUS_OFFSET ((jl_uint32)0x00000041U)
+#define HALF_DUPLEX_STATUS_NUM ((jl_uint32)0x00000001U)
+typedef union HALF_DUPLEX_STATUS_u {
+ struct {
+ jl_uint32 dbg_rx_abort_cnt:8; //[ 7: 0]
+ jl_uint32 dbg_tx_abort_cnt:8; //[15: 8]
+ jl_uint32 dbg_tx_retry_cnt:8; //[23:16]
+ jl_uint32 dbg_deplex_state:2; //[25:24]
+ jl_uint32 rsvd:2; //[27:26]
+ jl_uint32 dbg_retry_cnt:4; //[31:28]
+ } bf;
+ jl_uint32 val[1];
+} HALF_DUPLEX_STATUS_t;
+
+#define TX_LINK_CONTROL_OFFSET ((jl_uint32)0x00000042U)
+#define TX_LINK_CONTROL_NUM ((jl_uint32)0x00000001U)
+typedef union TX_LINK_CONTROL_u {
+ struct {
+ jl_uint64 mac_link_ignore:1; //[ 0: 0]
+ jl_uint64 mac_flush_en:1; //[ 1: 1]
+ jl_uint64 mac_link_filter_en:1; //[ 2: 2]
+ jl_uint64 rsvd:29; //[31: 3]
+ jl_uint64 mac_link_filter_time:32; //[63:32]
+ } bf;
+ jl_uint32 val[2];
+} TX_LINK_CONTROL_t;
+
+#define TX_LINK_STATUS_OFFSET ((jl_uint32)0x00000044U)
+#define TX_LINK_STATUS_NUM ((jl_uint32)0x00000001U)
+typedef union TX_LINK_STATUS_u {
+ struct {
+ jl_uint32 dbg_link_status:1; //[ 0: 0]
+ jl_uint32 rsvd:3; //[ 3: 1]
+ jl_uint32 dbg_defer_latch:1; //[ 4: 4]
+ jl_uint32 rsvd1:3; //[ 7: 5]
+ jl_uint32 dbg_mii_txen:1; //[ 8: 8]
+ jl_uint32 rsvd2:3; //[11: 9]
+ jl_uint32 dbg_mii_rxdv:1; //[12:12]
+ jl_uint32 rsvd3:3; //[15:13]
+ jl_uint32 dbg_mii_crs:1; //[16:16]
+ jl_uint32 rsvd4:3; //[19:17]
+ jl_uint32 dbg_mii_col:1; //[20:20]
+ } bf;
+ jl_uint32 val[1];
+} TX_LINK_STATUS_t;
+
+#endif /* __JL_REG_ETHMAC_H__ */
+
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/reg_fephy.h b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/reg_fephy.h
new file mode 100644
index 0000000..021c49c
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/reg_fephy.h
@@ -0,0 +1,755 @@
+//reg_fephy.h
+/*
+* Automatically generated by gen_c_api.py, don't edit it
+*/
+#ifndef __JL_REG_FEPHY_H__
+#define __JL_REG_FEPHY_H__
+
+#include <jl_types.h>
+#include "jl51xx/jl51xx_drv_switch.h"
+
+#define FEPHY7_BASE ((jl_uint32)0x02100000U)
+#define FEPHY7_BLOCK_SIZE ((jl_uint32)0x00200000U)
+#define FEPHY6_BASE ((jl_uint32)0x01F00000U)
+#define FEPHY6_BLOCK_SIZE ((jl_uint32)0x00200000U)
+#define FEPHY5_BASE ((jl_uint32)0x01D00000U)
+#define FEPHY5_BLOCK_SIZE ((jl_uint32)0x00200000U)
+#define FEPHY4_BASE ((jl_uint32)0x01B00000U)
+#define FEPHY4_BLOCK_SIZE ((jl_uint32)0x00200000U)
+#define FEPHY3_BASE ((jl_uint32)0x01900000U)
+#define FEPHY3_BLOCK_SIZE ((jl_uint32)0x00200000U)
+#define FEPHY2_BASE ((jl_uint32)0x01700000U)
+#define FEPHY2_BLOCK_SIZE ((jl_uint32)0x00200000U)
+#define FEPHY1_BASE ((jl_uint32)0x01500000U)
+#define FEPHY1_BLOCK_SIZE ((jl_uint32)0x00200000U)
+#define FEPHY0_BASE ((jl_uint32)0x01300000U)
+#define FEPHY0_BLOCK_SIZE ((jl_uint32)0x00200000U)
+
+#define FEPHY0_TXISOEL_OFFSET ((jl_uint32)0x000000F4U)
+#define FEPHY0_TXISOEL_NUM ((jl_uint32)0x00000001U)
+typedef union FEPHY0_TXISOEL_u {
+ struct {
+ jl_uint32 link_status_realtime:1; //[ 0: 0]
+ jl_uint32 ethercat_mode:1; //[ 1: 1]
+ jl_uint32 rsvd:13; //[14: 2]
+ jl_uint32 tx_isolate_en:1; //[15:15]
+ } bf;
+ jl_uint32 val[1];
+} FEPHY0_TXISOEL_t;
+
+#define FEPHY0_LSI_OFFSET ((jl_uint32)0x000000F9U)
+#define FEPHY0_LSI_NUM ((jl_uint32)0x00000001U)
+typedef union FEPHY0_LSI_u {
+ struct {
+ jl_uint32 link_status_ll:1; //[ 0: 0]
+ jl_uint32 speed_internal:1; //[ 1: 1]
+ jl_uint32 duplex_internal:1; //[ 2: 2]
+ } bf;
+ jl_uint32 val[1];
+} FEPHY0_LSI_t;
+
+#define FEPHY0_RSVD0_OFFSET ((jl_uint32)0x000000FAU)
+#define FEPHY0_RSVD0_NUM ((jl_uint32)0x00000001U)
+typedef union FEPHY0_RSVD0_u {
+ struct {
+ jl_uint32 top_rsvd:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} FEPHY0_RSVD0_t;
+
+#define FEPHY0_TX1_OFFSET ((jl_uint32)0x00000310U)
+#define FEPHY0_TX1_NUM ((jl_uint32)0x00000001U)
+typedef union FEPHY0_TX1_u {
+ struct {
+ jl_uint32 tx_cbuf_gc:3; //[ 2: 0]
+ jl_uint32 tx_cbuf_ccen:1; //[ 3: 3]
+ jl_uint32 tx_cbuf_cal:4; //[ 7: 4]
+ jl_uint32 tx_cbuf_bm:2; //[ 9: 8]
+ jl_uint32 tx_amp_mode:2; //[11:10]
+ jl_uint32 tx_amp_cfen:1; //[12:12]
+ jl_uint32 tx_amp_bm:2; //[14:13]
+ } bf;
+ jl_uint32 val[1];
+} FEPHY0_TX1_t;
+
+#define FEPHY0_PITX2_OFFSET ((jl_uint32)0x00000313U)
+#define FEPHY0_PITX2_NUM ((jl_uint32)0x00000001U)
+typedef union FEPHY0_PITX2_u {
+ struct {
+ jl_uint32 tx_rsvd:3; //[ 2: 0]
+ jl_uint32 tx_echo_en:1; //[ 3: 3]
+ jl_uint32 tx_dac_srn:1; //[ 4: 4]
+ jl_uint32 tx_dac_currx2:1; //[ 5: 5]
+ jl_uint32 tx_dac_bm:4; //[ 9: 6]
+ jl_uint32 tx_cmfb_en:2; //[11:10]
+ jl_uint32 tx_cbuf_gcaux:3; //[14:12]
+ jl_uint32 cktree_selb_10base:1; //[15:15]
+ } bf;
+ jl_uint32 val[1];
+} FEPHY0_PITX2_t;
+
+#define FEPHY0_PU_OFFSET ((jl_uint32)0x00000314U)
+#define FEPHY0_PU_NUM ((jl_uint32)0x00000001U)
+typedef union FEPHY0_PU_u {
+ struct {
+ jl_uint32 pu_amp:1; //[ 0: 0]
+ jl_uint32 pu_sar:1; //[ 1: 1]
+ jl_uint32 pu_rx:1; //[ 2: 2]
+ jl_uint32 rsvd:1; //[ 3: 3]
+ jl_uint32 pu_pi:1; //[ 4: 4]
+ jl_uint32 pu_dac_dly:1; //[ 5: 5]
+ jl_uint32 pu_dac:1; //[ 6: 6]
+ jl_uint32 pu_10m_clktree:1; //[ 7: 7]
+ } bf;
+ jl_uint32 val[1];
+} FEPHY0_PU_t;
+
+#define FEPHY0_RX_OFFSET ((jl_uint32)0x00000315U)
+#define FEPHY0_RX_NUM ((jl_uint32)0x00000001U)
+typedef union FEPHY0_RX_u {
+ struct {
+ jl_uint32 rx_vcm_sel:1; //[ 0: 0]
+ jl_uint32 rx_s2d_rdeg:2; //[ 2: 1]
+ jl_uint32 rx_rterm:1; //[ 3: 3]
+ jl_uint32 rx_mode_sel:1; //[ 4: 4]
+ jl_uint32 rx_lp_en:1; //[ 5: 5]
+ jl_uint32 rx_echo_en:1; //[ 6: 6]
+ jl_uint32 rx_csel:4; //[10: 7]
+ jl_uint32 rx_cp_start:1; //[11:11]
+ jl_uint32 rx_boost_en:1; //[12:12]
+ jl_uint32 rx_bm_cp:1; //[13:13]
+ } bf;
+ jl_uint32 val[1];
+} FEPHY0_RX_t;
+
+#define FEPHY0_SAR_OFFSET ((jl_uint32)0x00000316U)
+#define FEPHY0_SAR_NUM ((jl_uint32)0x00000001U)
+typedef union FEPHY0_SAR_u {
+ struct {
+ jl_uint32 sar_rstn:1; //[ 0: 0]
+ jl_uint32 sar_reverse:1; //[ 1: 1]
+ jl_uint32 sar_isel:2; //[ 3: 2]
+ jl_uint32 sar_delay:1; //[ 4: 4]
+ jl_uint32 sar_cksel_mode:1; //[ 5: 5]
+ } bf;
+ jl_uint32 val[1];
+} FEPHY0_SAR_t;
+
+#define FEPHY0_RX2_OFFSET ((jl_uint32)0x00000317U)
+#define FEPHY0_RX2_NUM ((jl_uint32)0x00000001U)
+typedef union FEPHY0_RX2_u {
+ struct {
+ jl_uint32 rx_rsel:8; //[ 7: 0]
+ jl_uint32 rx_rsvd:3; //[10: 8]
+ } bf;
+ jl_uint32 val[1];
+} FEPHY0_RX2_t;
+
+#define FEPHY0_ANAMISC_OFFSET ((jl_uint32)0x00000318U)
+#define FEPHY0_ANAMISC_NUM ((jl_uint32)0x00000001U)
+typedef union FEPHY0_ANAMISC_u {
+ struct {
+ jl_uint32 tx_enb_1p8v_ldo_slave:1; //[ 0: 0]
+ jl_uint32 rsvd:2; //[ 2: 1]
+ jl_uint32 sar_reg_prech_hv:1; //[ 3: 3]
+ jl_uint32 sar_reg_1v_en:1; //[ 4: 4]
+ jl_uint32 sar_avdd18v_sel:1; //[ 5: 5]
+ jl_uint32 rsvd1:1; //[ 6: 6]
+ jl_uint32 rx_reg18_sel:1; //[ 7: 7]
+ jl_uint32 rx_reg10_sel:1; //[ 8: 8]
+ jl_uint32 rx_reg_prech:1; //[ 9: 9]
+ jl_uint32 rx_ldo18_slave_en:1; //[10:10]
+ jl_uint32 rx_ldo10_slave_en:1; //[11:11]
+ } bf;
+ jl_uint32 val[1];
+} FEPHY0_ANAMISC_t;
+
+#define FEPHY0_RXDSPACA_OFFSET ((jl_uint32)0x00001010U)
+#define FEPHY0_RXDSPACA_NUM ((jl_uint32)0x00000001U)
+typedef union FEPHY0_RXDSPACA_u {
+ struct {
+ jl_uint32 dsp100t_ctrl:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} FEPHY0_RXDSPACA_t;
+
+#define FEPHY0_RXDSPAR_OFFSET ((jl_uint32)0x00001011U)
+#define FEPHY0_RXDSPAR_NUM ((jl_uint32)0x00000001U)
+typedef union FEPHY0_RXDSPAR_u {
+ struct {
+ jl_uint32 dsp100t_rd:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} FEPHY0_RXDSPAR_t;
+
+#define FEPHY0_RXDSPAW_OFFSET ((jl_uint32)0x00001012U)
+#define FEPHY0_RXDSPAW_NUM ((jl_uint32)0x00000001U)
+typedef union FEPHY0_RXDSPAW_u {
+ struct {
+ jl_uint32 dsp100t_wd:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} FEPHY0_RXDSPAW_t;
+
+#define FEPHY0_ANRXLCW_OFFSET ((jl_uint32)0x00001014U)
+#define FEPHY0_ANRXLCW_NUM ((jl_uint32)0x00000001U)
+typedef union FEPHY0_ANRXLCW_u {
+ struct {
+ jl_uint32 an_rx_lcw_0:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} FEPHY0_ANRXLCW_t;
+
+#define FEPHY0_ANTXLCW_OFFSET ((jl_uint32)0x00001015U)
+#define FEPHY0_ANTXLCW_NUM ((jl_uint32)0x00000001U)
+typedef union FEPHY0_ANTXLCW_u {
+ struct {
+ jl_uint32 an_tx_lcw_0:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} FEPHY0_ANTXLCW_t;
+
+#define FEPHY0_ANS1_OFFSET ((jl_uint32)0x00001016U)
+#define FEPHY0_ANS1_NUM ((jl_uint32)0x00000001U)
+typedef union FEPHY0_ANS1_u {
+ struct {
+ jl_uint32 an_rx_bit_cnt:6; //[ 5: 0]
+ jl_uint32 an_rx_done:1; //[ 6: 6]
+ jl_uint32 an_flp_receive_idle:1; //[ 7: 7]
+ jl_uint32 an_nlp_link_status:2; //[ 9: 8]
+ jl_uint32 an_nlp_test_sigdet_src:1; //[10:10]
+ jl_uint32 an_nlp_t_pulse_done:1; //[11:11]
+ jl_uint32 an_nlp_t_pulse_pending:1; //[12:12]
+ jl_uint32 an_nlp_link_det_clr:1; //[13:13]
+ jl_uint32 an_nlp_link_det:1; //[14:14]
+ jl_uint32 an_ack_finished:1; //[15:15]
+ } bf;
+ jl_uint32 val[1];
+} FEPHY0_ANS1_t;
+
+#define FEPHY0_ANC0_OFFSET ((jl_uint32)0x00001017U)
+#define FEPHY0_ANC0_NUM ((jl_uint32)0x00000001U)
+typedef union FEPHY0_ANC0_u {
+ struct {
+ jl_uint32 an_rx_bit_cnt_chk:6; //[ 5: 0]
+ jl_uint32 rsvd:1; //[ 6: 6]
+ jl_uint32 an_rx_en:1; //[ 7: 7]
+ jl_uint32 an_tx_ack_cnt_done:6; //[13: 8]
+ jl_uint32 rsvd1:1; //[14:14]
+ jl_uint32 an_tx_en:1; //[15:15]
+ } bf;
+ jl_uint32 val[1];
+} FEPHY0_ANC0_t;
+
+#define FEPHY0_ANCANIRQC_OFFSET ((jl_uint32)0x00001018U)
+#define FEPHY0_ANCANIRQC_NUM ((jl_uint32)0x00000001U)
+typedef union FEPHY0_ANCANIRQC_u {
+ struct {
+ jl_uint32 an_tx_bit_cnt:6; //[ 5: 0]
+ jl_uint32 an_complete_ack:1; //[ 6: 6]
+ jl_uint32 an_transmit_ability:1; //[ 7: 7]
+ jl_uint32 rsvd:1; //[ 8: 8]
+ jl_uint32 an_nlp_link_control:2; //[10: 9]
+ jl_uint32 rsvd1:2; //[12:11]
+ jl_uint32 an_ack_finished_clr:1; //[13:13]
+ jl_uint32 an_rx_done_clr:1; //[14:14]
+ jl_uint32 an_flp_receive_idle_clr:1; //[15:15]
+ } bf;
+ jl_uint32 val[1];
+} FEPHY0_ANCANIRQC_t;
+
+#define FEPHY0_TIMER_OFFSET ((jl_uint32)0x00001019U)
+#define FEPHY0_TIMER_NUM ((jl_uint32)0x00000001U)
+typedef union FEPHY0_TIMER_u {
+ struct {
+ jl_uint32 an_timer0_match:4; //[ 3: 0]
+ jl_uint32 an_timer0_cnt:4; //[ 7: 4]
+ jl_uint32 an_timer0_clr:1; //[ 8: 8]
+ jl_uint32 an_timer0_en:1; //[ 9: 9]
+ jl_uint32 an_timer0_done:1; //[10:10]
+ } bf;
+ jl_uint32 val[1];
+} FEPHY0_TIMER_t;
+
+#define FEPHY0_ANMISCCFG_OFFSET ((jl_uint32)0x0000101AU)
+#define FEPHY0_ANMISCCFG_NUM ((jl_uint32)0x00000001U)
+typedef union FEPHY0_ANMISCCFG_u {
+ struct {
+ jl_uint32 an_flp_cnt_done:6; //[ 5: 0]
+ jl_uint32 an_tx_pls_width:5; //[10: 6]
+ } bf;
+ jl_uint32 val[1];
+} FEPHY0_ANMISCCFG_t;
+
+#define FEPHY0_LOADERGO_OFFSET ((jl_uint32)0x0000101BU)
+#define FEPHY0_LOADERGO_NUM ((jl_uint32)0x00000001U)
+typedef union FEPHY0_LOADERGO_u {
+ struct {
+ jl_uint32 loader_go:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} FEPHY0_LOADERGO_t;
+
+#define FEPHY0_LOADERDATA_OFFSET ((jl_uint32)0x0000101CU)
+#define FEPHY0_LOADERDATA_NUM ((jl_uint32)0x00000001U)
+typedef union FEPHY0_LOADERDATA_u {
+ struct {
+ jl_uint32 loader_data_0:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} FEPHY0_LOADERDATA_t;
+
+#define FEPHY0_PINMUXMODE_OFFSET ((jl_uint32)0x0000101DU)
+#define FEPHY0_PINMUXMODE_NUM ((jl_uint32)0x00000001U)
+typedef union FEPHY0_PINMUXMODE_u {
+ struct {
+ jl_uint32 rsvd:4; //[ 3: 0]
+ jl_uint32 intn_mcu_val:1; //[ 4: 4]
+ jl_uint32 intn_mcu_force:1; //[ 5: 5]
+ } bf;
+ jl_uint32 val[1];
+} FEPHY0_PINMUXMODE_t;
+
+#define FEPHY0_DIGPU0_OFFSET ((jl_uint32)0x00001031U)
+#define FEPHY0_DIGPU0_NUM ((jl_uint32)0x00000001U)
+typedef union FEPHY0_DIGPU0_u {
+ struct {
+ jl_uint32 dac_out_sel:2; //[ 1: 0]
+ jl_uint32 rsvd:10; //[11: 2]
+ jl_uint32 auto_polarity:1; //[12:12]
+ jl_uint32 rand:1; //[13:13]
+ jl_uint32 nlp_disable:1; //[14:14]
+ jl_uint32 force_link:1; //[15:15]
+ } bf;
+ jl_uint32 val[1];
+} FEPHY0_DIGPU0_t;
+
+#define FEPHY0_DIGPU1_OFFSET ((jl_uint32)0x00001032U)
+#define FEPHY0_DIGPU1_NUM ((jl_uint32)0x00000001U)
+typedef union FEPHY0_DIGPU1_u {
+ struct {
+ jl_uint32 clk_en_10t_rx_dsp:1; //[ 0: 0]
+ jl_uint32 clk_en_100x_pi:1; //[ 1: 1]
+ jl_uint32 clk_en_100x_rx:1; //[ 2: 2]
+ jl_uint32 clk_en_10t_tx_dsp:1; //[ 3: 3]
+ jl_uint32 clk_en_100x_tx:1; //[ 4: 4]
+ jl_uint32 clk_en_mcu:1; //[ 5: 5]
+ jl_uint32 clk_en_10t_rx_pcspma:1; //[ 6: 6]
+ jl_uint32 clk_en_10t_tx_pcspma:1; //[ 7: 7]
+ jl_uint32 rstn_ctrl_mcu:1; //[ 8: 8]
+ jl_uint32 rstn_ctrl_10t_rx_pcspma:1; //[ 9: 9]
+ jl_uint32 rstn_ctrl_10t_rx_dsp:1; //[10:10]
+ jl_uint32 rstn_ctrl_100x_pi:1; //[11:11]
+ jl_uint32 rstn_ctrl_100x_rx:1; //[12:12]
+ jl_uint32 rstn_ctrl_10t_tx_pcspma:1; //[13:13]
+ jl_uint32 rstn_ctrl_10t_tx_dsp:1; //[14:14]
+ jl_uint32 rstn_ctrl_100x_tx:1; //[15:15]
+ } bf;
+ jl_uint32 val[1];
+} FEPHY0_DIGPU1_t;
+
+#define FEPHY0_PCSU0_OFFSET ((jl_uint32)0x00001033U)
+#define FEPHY0_PCSU0_NUM ((jl_uint32)0x00000001U)
+typedef union FEPHY0_PCSU0_u {
+ struct {
+ jl_uint32 link_control_u:2; //[ 1: 0]
+ jl_uint32 sig_stat_src:1; //[ 2: 2]
+ jl_uint32 tx_pma_fiber_en:1; //[ 3: 3]
+ jl_uint32 rx_pma_fiber_en:1; //[ 4: 4]
+ jl_uint32 tx_pcs_eee_en:1; //[ 5: 5]
+ jl_uint32 rx_pcs_eee_en:1; //[ 6: 6]
+ jl_uint32 descrambler_locked:1; //[ 7: 7]
+ jl_uint32 descr_testmode:1; //[ 8: 8]
+ jl_uint32 descr_load_cfg:1; //[ 9: 9]
+ jl_uint32 descr_sdcd_ctrl:1; //[10:10]
+ jl_uint32 descr_sdcd_force:1; //[11:11]
+ jl_uint32 descr_rstn:1; //[12:12]
+ jl_uint32 descr_sdcd_rx_quiet:1; //[13:13]
+ jl_uint32 link_status_force:1; //[14:14]
+ jl_uint32 link_status_force_val:1; //[15:15]
+ } bf;
+ jl_uint32 val[1];
+} FEPHY0_PCSU0_t;
+
+#define FEPHY0_PCSU1_OFFSET ((jl_uint32)0x00001034U)
+#define FEPHY0_PCSU1_NUM ((jl_uint32)0x00000001U)
+typedef union FEPHY0_PCSU1_u {
+ struct {
+ jl_uint32 link_status_u:2; //[ 1: 0]
+ jl_uint32 pu_pi_force:1; //[ 2: 2]
+ jl_uint32 pu_pi_val:1; //[ 3: 3]
+ jl_uint32 link_monitor_period_sel:2; //[ 5: 4]
+ jl_uint32 speed:1; //[ 6: 6]
+ jl_uint32 duplex:1; //[ 7: 7]
+ jl_uint32 rx_far_end_faulting:1; //[ 8: 8]
+ jl_uint32 rx_far_end_faulting_clr:1; //[ 9: 9]
+ jl_uint32 rx_far_end_fault_detect_en:1; //[10:10]
+ jl_uint32 tx_far_end_fault_gen_en:1; //[11:11]
+ jl_uint32 link_mon_sig_stat_src:1; //[12:12]
+ } bf;
+ jl_uint32 val[1];
+} FEPHY0_PCSU1_t;
+
+#define FEPHY0_DSPI0_OFFSET ((jl_uint32)0x00001035U)
+#define FEPHY0_DSPI0_NUM ((jl_uint32)0x00000001U)
+typedef union FEPHY0_DSPI0_u {
+ struct {
+ jl_uint32 dsp_rx_f1_sel:2; //[ 1: 0]
+ jl_uint32 dsp_tx_fir_sel:2; //[ 3: 2]
+ jl_uint32 dsp_rx_fg_polar:1; //[ 4: 4]
+ jl_uint32 dsp_rx_polar_sel:1; //[ 5: 5]
+ jl_uint32 dsp_rx_amp2:6; //[11: 6]
+ jl_uint32 dsp_rx_amp1:4; //[15:12]
+ } bf;
+ jl_uint32 val[1];
+} FEPHY0_DSPI0_t;
+
+#define FEPHY0_PCS0_OFFSET ((jl_uint32)0x00001036U)
+#define FEPHY0_PCS0_NUM ((jl_uint32)0x00000001U)
+typedef union FEPHY0_PCS0_u {
+ struct {
+ jl_uint32 tpidl_width:4; //[ 3: 0]
+ jl_uint32 nlp_width:4; //[ 7: 4]
+ jl_uint32 sqe_test_enable:1; //[ 8: 8]
+ jl_uint32 jabber_enable:1; //[ 9: 9]
+ jl_uint32 crs_tx_enable:1; //[10:10]
+ jl_uint32 crs_rx_enable:1; //[11:11]
+ jl_uint32 lpbk_enable:1; //[12:12]
+ jl_uint32 force_loopback:1; //[13:13]
+ jl_uint32 tpidl_autowidth:1; //[14:14]
+ jl_uint32 link_mon_force_link_stat_ok:1; //[15:15]
+ } bf;
+ jl_uint32 val[1];
+} FEPHY0_PCS0_t;
+
+#define FEPHY0_PCS1_OFFSET ((jl_uint32)0x00001037U)
+#define FEPHY0_PCS1_NUM ((jl_uint32)0x00000001U)
+typedef union FEPHY0_PCS1_u {
+ struct {
+ jl_uint32 err_cnt_10m:6; //[ 5: 0]
+ jl_uint32 err_cnt_10m_clr:1; //[ 6: 6]
+ jl_uint32 rsvd:2; //[ 8: 7]
+ jl_uint32 sig_det_thr_10m:4; //[12: 9]
+ jl_uint32 carrier_sense_rx_en:1; //[13:13]
+ jl_uint32 carrier_sense_tx_en:1; //[14:14]
+ jl_uint32 pmd_loopback_u:1; //[15:15]
+ } bf;
+ jl_uint32 val[1];
+} FEPHY0_PCS1_t;
+
+#define FEPHY0_LED_OFFSET ((jl_uint32)0x00001038U)
+#define FEPHY0_LED_NUM ((jl_uint32)0x00000001U)
+typedef union FEPHY0_LED_u {
+ struct {
+ jl_uint32 pi_sync_mode:2; //[ 1: 0]
+ jl_uint32 pi_sync_init:8; //[ 9: 2]
+ jl_uint32 rsvd:1; //[10:10]
+ jl_uint32 dsp_tx_u_amp:4; //[14:11]
+ jl_uint32 tx_fiber_scrambler_en:1; //[15:15]
+ } bf;
+ jl_uint32 val[1];
+} FEPHY0_LED_t;
+
+#define FEPHY0_DSPI1_OFFSET ((jl_uint32)0x0000103DU)
+#define FEPHY0_DSPI1_NUM ((jl_uint32)0x00000001U)
+typedef union FEPHY0_DSPI1_u {
+ struct {
+ jl_uint32 dsp_rx_sig_cnt:6; //[ 5: 0]
+ jl_uint32 dsp_rx_prea_cnt:6; //[11: 6]
+ jl_uint32 dsp_rx_mu_sel:1; //[12:12]
+ jl_uint32 dsp_rx_f2_sel:2; //[14:13]
+ jl_uint32 dsp_rx_fir_en:1; //[15:15]
+ } bf;
+ jl_uint32 val[1];
+} FEPHY0_DSPI1_t;
+
+#define FEPHY0_DSPI2_OFFSET ((jl_uint32)0x0000103EU)
+#define FEPHY0_DSPI2_NUM ((jl_uint32)0x00000001U)
+typedef union FEPHY0_DSPI2_u {
+ struct {
+ jl_uint32 dsp_rx_eye_err_cnt:4; //[ 3: 0]
+ jl_uint32 dsp_rx_thre_sel:2; //[ 5: 4]
+ jl_uint32 signal_status_u_latch_low:1; //[ 6: 6]
+ jl_uint32 signal_status_u_latch_low_src:1; //[ 7: 7]
+ jl_uint32 rx_pcs_idle_n_descr_lock:1; //[ 8: 8]
+ jl_uint32 rsvd:5; //[13: 9]
+ jl_uint32 rx_quiet:1; //[14:14]
+ jl_uint32 tx_quiet:1; //[15:15]
+ } bf;
+ jl_uint32 val[1];
+} FEPHY0_DSPI2_t;
+
+#define FEPHY0_EEE_OFFSET ((jl_uint32)0x00001050U)
+#define FEPHY0_EEE_NUM ((jl_uint32)0x00000001U)
+typedef union FEPHY0_EEE_u {
+ struct {
+ jl_uint32 dsp_u_rx_partial_freeze_force:1; //[ 0: 0]
+ jl_uint32 dsp_u_rx_partial_freeze_force_val:1; //[ 1: 1]
+ jl_uint32 dsp_u_rx_lpi_force:1; //[ 2: 2]
+ jl_uint32 dsp_u_rx_lpi_force_val:1; //[ 3: 3]
+ jl_uint32 dsp_u_rx_freeze:1; //[ 4: 4]
+ jl_uint32 tx_fef_sig_stat_force_val:1; //[ 5: 5]
+ jl_uint32 tx_fef_sig_stat_force:1; //[ 6: 6]
+ jl_uint32 tx_clk_inv_100m:1; //[ 7: 7]
+ jl_uint32 tx_clk_phase_100m:3; //[10: 8]
+ jl_uint32 rx_clk_inv_100m:1; //[11:11]
+ jl_uint32 rx_clk_phase_100m:3; //[14:12]
+ jl_uint32 tx_fef_rx_rpi_en:1; //[15:15]
+ } bf;
+ jl_uint32 val[1];
+} FEPHY0_EEE_t;
+
+#define FEPHY0_PCS2_OFFSET ((jl_uint32)0x00001051U)
+#define FEPHY0_PCS2_NUM ((jl_uint32)0x00000001U)
+typedef union FEPHY0_PCS2_u {
+ struct {
+ jl_uint32 lc_max_10m:4; //[ 3: 0]
+ jl_uint32 fg_lp_cnt_thr_10m:4; //[ 7: 4]
+ jl_uint32 tx_clk_phase_10m:3; //[10: 8]
+ jl_uint32 dsp_rx_strategy_sel:1; //[11:11]
+ jl_uint32 rx_clk_phase_10m:3; //[14:12]
+ jl_uint32 col_enable:1; //[15:15]
+ } bf;
+ jl_uint32 val[1];
+} FEPHY0_PCS2_t;
+
+#define FEPHY0_MIIISOLATE_OFFSET ((jl_uint32)0x00001052U)
+#define FEPHY0_MIIISOLATE_NUM ((jl_uint32)0x00000001U)
+typedef union FEPHY0_MIIISOLATE_u {
+ struct {
+ jl_uint32 lpi_rx_tw_timer_cnt:6; //[ 5: 0]
+ jl_uint32 mii_crs_isolate:1; //[ 6: 6]
+ jl_uint32 mii_col_isolate:1; //[ 7: 7]
+ jl_uint32 mii_rx_isolate:1; //[ 8: 8]
+ jl_uint32 mii_tx_isolate:1; //[ 9: 9]
+ jl_uint32 mii_rx_clk_isolate:1; //[10:10]
+ jl_uint32 mii_tx_clk_isolate:1; //[11:11]
+ jl_uint32 dbg_out_sel:3; //[14:12]
+ } bf;
+ jl_uint32 val[1];
+} FEPHY0_MIIISOLATE_t;
+
+#define FEPHY0_CPUPC_OFFSET ((jl_uint32)0x00001053U)
+#define FEPHY0_CPUPC_NUM ((jl_uint32)0x00000001U)
+typedef union FEPHY0_CPUPC_u {
+ struct {
+ jl_uint32 cpu_enc_addr:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} FEPHY0_CPUPC_t;
+
+#define FEPHY0_DSPI3_OFFSET ((jl_uint32)0x00001054U)
+#define FEPHY0_DSPI3_NUM ((jl_uint32)0x00000001U)
+typedef union FEPHY0_DSPI3_u {
+ struct {
+ jl_uint32 dsp_rx_adc_rd_init:6; //[ 5: 0]
+ jl_uint32 dsp_rx_fg_lp_cnt:5; //[10: 6]
+ jl_uint32 tx_clk_force_in:1; //[11:11]
+ jl_uint32 rsvd:1; //[12:12]
+ jl_uint32 dsp_rx_overflow_flag:2; //[14:13]
+ jl_uint32 dsp_rx_overflow_clr:1; //[15:15]
+ } bf;
+ jl_uint32 val[1];
+} FEPHY0_DSPI3_t;
+
+#define FEPHY0_BCMRINT_OFFSET ((jl_uint32)0x00001055U)
+#define FEPHY0_BCMRINT_NUM ((jl_uint32)0x00000001U)
+typedef union FEPHY0_BCMRINT_u {
+ struct {
+ jl_uint32 rsvd:9; //[ 8: 0]
+ jl_uint32 linkstatuschg_set:1; //[ 9: 9]
+ jl_uint32 duplexchg_set:1; //[10:10]
+ jl_uint32 spdchg_set:1; //[11:11]
+ jl_uint32 anerr_set:1; //[12:12]
+ jl_uint32 autoneg_restart_clr:1; //[13:13]
+ jl_uint32 sw_rst_bmcr:1; //[14:14]
+ jl_uint32 sw_rst_clr:1; //[15:15]
+ } bf;
+ jl_uint32 val[1];
+} FEPHY0_BCMRINT_t;
+
+#define FEPHY0_RSVD1_OFFSET ((jl_uint32)0x00001056U)
+#define FEPHY0_RSVD1_NUM ((jl_uint32)0x00000001U)
+typedef union FEPHY0_RSVD1_u {
+ struct {
+ jl_uint32 digital_rsvd0:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} FEPHY0_RSVD1_t;
+
+#define FEPHY0_BYPASS0_OFFSET ((jl_uint32)0x00001057U)
+#define FEPHY0_BYPASS0_NUM ((jl_uint32)0x00000001U)
+typedef union FEPHY0_BYPASS0_u {
+ struct {
+ jl_uint32 sd_jabber_detect:1; //[ 0: 0]
+ jl_uint32 sd_link_status:1; //[ 1: 1]
+ jl_uint32 sd_an_ability:1; //[ 2: 2]
+ jl_uint32 sd_remote_fault:1; //[ 3: 3]
+ jl_uint32 sd_autoneg_complete:1; //[ 4: 4]
+ jl_uint32 sd_undir_en:1; //[ 5: 5]
+ jl_uint32 sd_speed_sel_lo:1; //[ 6: 6]
+ jl_uint32 sd_col_test:1; //[ 7: 7]
+ jl_uint32 sd_duplex_mode:1; //[ 8: 8]
+ jl_uint32 sd_autoneg_restart:1; //[ 9: 9]
+ jl_uint32 sd_isolate:1; //[10:10]
+ jl_uint32 sd_power_down:1; //[11:11]
+ jl_uint32 sd_autoneg_en:1; //[12:12]
+ jl_uint32 sd_speed_sel_hi:1; //[13:13]
+ jl_uint32 sd_loopback:1; //[14:14]
+ jl_uint32 sd_sw_reset:1; //[15:15]
+ } bf;
+ jl_uint32 val[1];
+} FEPHY0_BYPASS0_t;
+
+#define FEPHY0_BYPASS1_OFFSET ((jl_uint32)0x00001058U)
+#define FEPHY0_BYPASS1_NUM ((jl_uint32)0x00000001U)
+typedef union FEPHY0_BYPASS1_u {
+ struct {
+ jl_uint32 rsvd:2; //[ 1: 0]
+ jl_uint32 sd_eee_100_cap:1; //[ 2: 2]
+ jl_uint32 sd_rx_quiet_en:1; //[ 3: 3]
+ jl_uint32 sd_tx_quiet_en:1; //[ 4: 4]
+ jl_uint32 sd_eee_nway_en:1; //[ 5: 5]
+ jl_uint32 rsvd1:1; //[ 6: 6]
+ jl_uint32 sd_force_mdi:1; //[ 7: 7]
+ jl_uint32 sd_en_automdix:1; //[ 8: 8]
+ jl_uint32 sd_fxmode:1; //[ 9: 9]
+ jl_uint32 rsvd2:1; //[10:10]
+ jl_uint32 sd_link_partner_auto_neg_ability:1; //[11:11]
+ jl_uint32 sd_page_received:1; //[12:12]
+ jl_uint32 sd_local_next_page_ability:1; //[13:13]
+ jl_uint32 sd_link_partner_next_page_ability:1; //[14:14]
+ jl_uint32 sd_parallel_detection_fault:1; //[15:15]
+ } bf;
+ jl_uint32 val[1];
+} FEPHY0_BYPASS1_t;
+
+#define FEPHY0_DSPI4_OFFSET ((jl_uint32)0x00001070U)
+#define FEPHY0_DSPI4_NUM ((jl_uint32)0x00000001U)
+typedef union FEPHY0_DSPI4_u {
+ struct {
+ jl_uint32 dsp_rx_me_valid_thre:8; //[ 7: 0]
+ } bf;
+ jl_uint32 val[1];
+} FEPHY0_DSPI4_t;
+
+#define FEPHY0_DSPI5_OFFSET ((jl_uint32)0x00001071U)
+#define FEPHY0_DSPI5_NUM ((jl_uint32)0x00000001U)
+typedef union FEPHY0_DSPI5_u {
+ struct {
+ jl_uint32 dsp_rx_adc_peak:7; //[ 6: 0]
+ jl_uint32 rsvd:2; //[ 8: 7]
+ jl_uint32 dsp_rx_adc_sigdet_th:7; //[15: 9]
+ } bf;
+ jl_uint32 val[1];
+} FEPHY0_DSPI5_t;
+
+#define FEPHY0_CFG0_OFFSET ((jl_uint32)0x00001072U)
+#define FEPHY0_CFG0_NUM ((jl_uint32)0x00000001U)
+typedef union FEPHY0_CFG0_u {
+ struct {
+ jl_uint32 energy_thre_lo:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} FEPHY0_CFG0_t;
+
+#define FEPHY0_CFG1_OFFSET ((jl_uint32)0x00001073U)
+#define FEPHY0_CFG1_NUM ((jl_uint32)0x00000001U)
+typedef union FEPHY0_CFG1_u {
+ struct {
+ jl_uint32 energy_thre_hi:4; //[ 3: 0]
+ jl_uint32 adc_in_offset:4; //[ 7: 4]
+ jl_uint32 rsvd:6; //[13: 8]
+ jl_uint32 detect_tx:1; //[14:14]
+ jl_uint32 pd_detect_tx_en:1; //[15:15]
+ } bf;
+ jl_uint32 val[1];
+} FEPHY0_CFG1_t;
+
+#define FEPHY0_DSPU0_OFFSET ((jl_uint32)0x00001074U)
+#define FEPHY0_DSPU0_NUM ((jl_uint32)0x00000001U)
+typedef union FEPHY0_DSPU0_u {
+ struct {
+ jl_uint32 sigdet2_y_thre:7; //[ 6: 0]
+ jl_uint32 rsvd:1; //[ 7: 7]
+ jl_uint32 sigdet2_c_thre:6; //[13: 8]
+ jl_uint32 sigdet_link_good_sel:2; //[15:14]
+ } bf;
+ jl_uint32 val[1];
+} FEPHY0_DSPU0_t;
+
+#define FEPHY0_DSPU1_OFFSET ((jl_uint32)0x00001075U)
+#define FEPHY0_DSPU1_NUM ((jl_uint32)0x00000001U)
+typedef union FEPHY0_DSPU1_u {
+ struct {
+ jl_uint32 dsp_tx_f1_sel:6; //[ 5: 0]
+ jl_uint32 dsp_tx_f2_sel:6; //[11: 6]
+ jl_uint32 dsp_rx_noise_thre:4; //[15:12]
+ } bf;
+ jl_uint32 val[1];
+} FEPHY0_DSPU1_t;
+
+#define FEPHY0_DSPI6_OFFSET ((jl_uint32)0x00001076U)
+#define FEPHY0_DSPI6_NUM ((jl_uint32)0x00000001U)
+typedef union FEPHY0_DSPI6_u {
+ struct {
+ jl_uint32 dsp_tx_f3_sel:6; //[ 5: 0]
+ jl_uint32 dsp_rx_amp3:4; //[ 9: 6]
+ jl_uint32 dsp_rx_amp4:4; //[13:10]
+ jl_uint32 sigdet_sel:2; //[15:14]
+ } bf;
+ jl_uint32 val[1];
+} FEPHY0_DSPI6_t;
+
+#define FEPHY0_DIGRSVD0_OFFSET ((jl_uint32)0x00001077U)
+#define FEPHY0_DIGRSVD0_NUM ((jl_uint32)0x00000001U)
+typedef union FEPHY0_DIGRSVD0_u {
+ struct {
+ jl_uint32 digital_rsvd1:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} FEPHY0_DIGRSVD0_t;
+
+#define FEPHY0_DIGRSVD1_OFFSET ((jl_uint32)0x00001078U)
+#define FEPHY0_DIGRSVD1_NUM ((jl_uint32)0x00000001U)
+typedef union FEPHY0_DIGRSVD1_u {
+ struct {
+ jl_uint32 digital_rsvd2:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} FEPHY0_DIGRSVD1_t;
+
+#define FEPHY0_DIGRSVD2_OFFSET ((jl_uint32)0x00001079U)
+#define FEPHY0_DIGRSVD2_NUM ((jl_uint32)0x00000001U)
+typedef union FEPHY0_DIGRSVD2_u {
+ struct {
+ jl_uint32 digital_rsvd3:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} FEPHY0_DIGRSVD2_t;
+
+#define FEPHY0_DSPI7_OFFSET ((jl_uint32)0x0000107AU)
+#define FEPHY0_DSPI7_NUM ((jl_uint32)0x00000001U)
+typedef union FEPHY0_DSPI7_u {
+ struct {
+ jl_uint32 dsp_rx_max_break:8; //[ 7: 0]
+ jl_uint32 dsp_rx_sig_thre:8; //[15: 8]
+ } bf;
+ jl_uint32 val[1];
+} FEPHY0_DSPI7_t;
+
+#define FEPHY0_DSPI8_OFFSET ((jl_uint32)0x0000107BU)
+#define FEPHY0_DSPI8_NUM ((jl_uint32)0x00000001U)
+typedef union FEPHY0_DSPI8_u {
+ struct {
+ jl_uint32 dsp_rx_fifo_rd_val:5; //[ 4: 0]
+ jl_uint32 dsp_rx_is_diff_detect:1; //[ 5: 5]
+ jl_uint32 dsp_rx_amp_sig_thre:4; //[ 9: 6]
+ jl_uint32 rsvd:5; //[14:10]
+ jl_uint32 dsp_rx_fifo_rd_en:1; //[15:15]
+ } bf;
+ jl_uint32 val[1];
+} FEPHY0_DSPI8_t;
+
+#endif /* __JL_REG_FEPHY_H__ */
+
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/reg_mag.h b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/reg_mag.h
new file mode 100644
index 0000000..59d1329
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/reg_mag.h
@@ -0,0 +1,72 @@
+//reg_mag.h
+/*
+* Automatically generated by gen_c_api.py, don't edit it
+*/
+#ifndef __JL_REG_MAG_H__
+#define __JL_REG_MAG_H__
+
+#include <jl_types.h>
+#include "jl51xx/jl51xx_drv_switch.h"
+
+#define MAG_BASE ((jl_uint32)0x00200A00U)
+#define MAG_BLOCK_SIZE ((jl_uint32)0x00000100U)
+
+#define MAG_INT_OFFSET ((jl_uint32)0x00000000U)
+#define MAG_INT_NUM ((jl_uint32)0x00000001U)
+typedef union MAG_INT_u {
+ struct {
+ jl_uint32 mac_int:10; //[ 9: 0]
+ } bf;
+ jl_uint32 val[1];
+} MAG_INT_t;
+
+#define VERSION_INFO_OFFSET ((jl_uint32)0x00000001U)
+#define VERSION_INFO_NUM ((jl_uint32)0x00000001U)
+typedef union VERSION_INFO_u {
+ struct {
+ jl_uint32 date:16; //[15: 0]
+ jl_uint32 version:16; //[31:16]
+ } bf;
+ jl_uint32 val[1];
+} VERSION_INFO_t;
+
+#define LOOP_DETECT_CONTROL_OFFSET ((jl_uint32)0x00000002U)
+#define LOOP_DETECT_CONTROL_NUM ((jl_uint32)0x00000001U)
+typedef union LOOP_DETECT_CONTROL_u {
+ struct {
+ jl_uint32 lp_detect_en:10; //[ 9: 0]
+ jl_uint32 rsvd:2; //[11:10]
+ jl_uint32 lp_detect_chk:1; //[12:12]
+ } bf;
+ jl_uint32 val[1];
+} LOOP_DETECT_CONTROL_t;
+
+#define LOOP_DETECT_STATUS_OFFSET ((jl_uint32)0x00000003U)
+#define LOOP_DETECT_STATUS_NUM ((jl_uint32)0x00000001U)
+typedef union LOOP_DETECT_STATUS_u {
+ struct {
+ jl_uint32 lp_detect:10; //[ 9: 0]
+ } bf;
+ jl_uint32 val[1];
+} LOOP_DETECT_STATUS_t;
+
+#define LOOP_DETECT_HISTORY_OFFSET ((jl_uint32)0x00000004U)
+#define LOOP_DETECT_HISTORY_NUM ((jl_uint32)0x00000001U)
+typedef union LOOP_DETECT_HISTORY_u {
+ struct {
+ jl_uint32 lp_detect_0:1; //[ 0: 0]
+ jl_uint32 lp_detect_1:1; //[ 1: 1]
+ jl_uint32 lp_detect_2:1; //[ 2: 2]
+ jl_uint32 lp_detect_3:1; //[ 3: 3]
+ jl_uint32 lp_detect_4:1; //[ 4: 4]
+ jl_uint32 lp_detect_5:1; //[ 5: 5]
+ jl_uint32 lp_detect_6:1; //[ 6: 6]
+ jl_uint32 lp_detect_7:1; //[ 7: 7]
+ jl_uint32 lp_detect_8:1; //[ 8: 8]
+ jl_uint32 lp_detect_9:1; //[ 9: 9]
+ } bf;
+ jl_uint32 val[1];
+} LOOP_DETECT_HISTORY_t;
+
+#endif /* __JL_REG_MAG_H__ */
+
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/reg_phy.h b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/reg_phy.h
new file mode 100644
index 0000000..4b422df
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/reg_phy.h
@@ -0,0 +1,212 @@
+//reg_phy.h
+/*
+* Automatically generated by gen_c_api.py, don't edit it
+*/
+#ifndef __JL_REG_PHY_H__
+#define __JL_REG_PHY_H__
+
+#include <jl_types.h>
+#include "jl51xx/jl51xx_drv_switch.h"
+
+#define PHY7_BASE ((jl_uint32)0x00E00000U)
+#define PHY7_BLOCK_SIZE ((jl_uint32)0x00200000U)
+#define PHY6_BASE ((jl_uint32)0x00C00000U)
+#define PHY6_BLOCK_SIZE ((jl_uint32)0x00200000U)
+#define PHY5_BASE ((jl_uint32)0x00A00000U)
+#define PHY5_BLOCK_SIZE ((jl_uint32)0x00200000U)
+#define PHY4_BASE ((jl_uint32)0x00800000U)
+#define PHY4_BLOCK_SIZE ((jl_uint32)0x00200000U)
+#define PHY3_BASE ((jl_uint32)0x00600000U)
+#define PHY3_BLOCK_SIZE ((jl_uint32)0x00200000U)
+#define PHY2_BASE ((jl_uint32)0x00400000U)
+#define PHY2_BLOCK_SIZE ((jl_uint32)0x00200000U)
+#define PHY1_BASE ((jl_uint32)0x00200000U)
+#define PHY1_BLOCK_SIZE ((jl_uint32)0x00200000U)
+#define PHY0_BASE ((jl_uint32)0x00000000U + JL_RF_BASE)
+#define PHY0_BLOCK_SIZE ((jl_uint32)0x00200000U)
+
+#define BMCR_OFFSET ((jl_uint32)0x00000000U)
+#define BMCR_NUM ((jl_uint32)0x00000001U)
+/* Basic Mode Control Register */
+typedef union BMCR_u {
+ struct {
+ jl_uint32 rsvd:6;
+ jl_uint32 speed_sel1:1;
+ jl_uint32 collision_test:1;
+ jl_uint32 duplex_mode:1;
+ jl_uint32 restart_autoneg:1;
+ jl_uint32 isolate:1;
+ jl_uint32 power_down:1;
+ jl_uint32 autoneg_enable:1;
+ jl_uint32 speed_sel0:1;
+ jl_uint32 loopback:1;
+ jl_uint32 reset:1;
+ } bf;
+ jl_uint32 val[1];
+} BMCR_t;
+
+#define BMSR_OFFSET ((jl_uint32)0x00000001U)
+#define BMSR_NUM ((jl_uint32)0x00000001U)
+/* Basic Mode Status Register, RO */
+typedef union BMSR_u {
+ struct {
+ jl_uint32 ext_cap:1;
+ jl_uint32 jabber:1;
+ jl_uint32 link_status:1;
+ jl_uint32 autoneg:1; //0x1
+ jl_uint32 remote_fault:1;
+ jl_uint32 autoneg_complete:1;
+ jl_uint32 mdio_mfps:1;
+ jl_uint32 :4;
+ jl_uint32 base_10_t:1;
+ jl_uint32 base_10_t_fd:1;
+ jl_uint32 base_100_tx:1;
+ jl_uint32 base_100_tx_fd:1;
+ jl_uint32 base_100_t4:1;
+ } bf;
+ jl_uint32 val[1];
+} BMSR_t;
+
+#define PHYID1_OFFSET ((jl_uint32)0x00000002U)
+#define PHYID1_NUM ((jl_uint32)0x00000001U)
+/* PHYID1 */
+typedef union PHYID1_u {
+ struct {
+ jl_uint32 oui_msb:16;
+ } bf;
+ jl_uint32 val[1];
+} PHYID1_t;
+
+#define PHYID2_OFFSET ((jl_uint32)0x00000003U)
+#define PHYID2_NUM ((jl_uint32)0x00000001U)
+/* PHYID2 */
+typedef union PHYID2_u {
+ struct {
+ jl_uint32 revision_num:4;
+ jl_uint32 model_num:6;
+ jl_uint32 oui_lsb:6;
+ } bf;
+ jl_uint32 val[1];
+} PHYID2_t;
+
+#define ANAR_OFFSET ((jl_uint32)0x00000004U)
+#define ANAR_NUM ((jl_uint32)0x00000001U)
+/* Auto-Negotitation Advertisement Register */
+typedef union ANAR_u {
+ struct {
+ jl_uint32 sel:5;
+ jl_uint32 base_10_t:1;/*RW*/
+ jl_uint32 base_10_t_fd:1;/*RW*/
+ jl_uint32 base_100_tx:1;/*RW*/
+ jl_uint32 base_100_tx_fd:1; /*RW*/
+ jl_uint32 base_100_t4:1;
+ jl_uint32 pause:1;
+ jl_uint32 asym_pause:1;
+ jl_uint32 rsvd:1;
+ jl_uint32 remote_fault:1;
+ jl_uint32 ack:1;
+ jl_uint32 next_page:1; /*RW*/
+ } bf;
+ jl_uint32 val[1];
+} ANAR_t;
+
+#define ANLPAR_OFFSET ((jl_uint32)0x00000005U)
+#define ANLPAR_NUM ((jl_uint32)0x00000001U)
+/* Auto-Negotiation Link Partner Ability Register, RO */
+typedef union ANLPAR_u {
+ struct {
+ jl_uint32 sel:5;
+ jl_uint32 base_10_t:1;
+ jl_uint32 base_10_t_fd:1;
+ jl_uint32 base_100_tx:1;
+ jl_uint32 base_100_tx_fd:1;
+ jl_uint32 base_100_t4:1;
+ jl_uint32 pause:1;
+ jl_uint32 asym_pause:1;
+ jl_uint32 rsvd:1;
+ jl_uint32 remote_fault:1;
+ jl_uint32 ack:1;
+ jl_uint32 next_page:1;
+ } bf;
+ jl_uint32 val[1];
+} ANLPAR_t;
+
+#define ANER_OFFSET ((jl_uint32)0x00000006U)
+#define ANER_NUM ((jl_uint32)0x00000001U)
+/* Auto-Negotiation Expansion Register, RO */
+typedef union ANER_u {
+ struct {
+ jl_uint32 linkp_autoneg:1;
+ jl_uint32 page_recv:1;
+ jl_uint32 local_next_page:1;
+ jl_uint32 linkp_next_page:1;
+ jl_uint32 para_detect_fault:1;
+ jl_uint32 rsvd:11;
+ } bf;
+ jl_uint32 val[1];
+} ANER_t;
+
+#define FMLR_OFFSET ((jl_uint32)0x00000090U)
+#define FMLR_NUM ((jl_uint32)0x00000001U)
+/* Fiber Mode and Loopback Register */
+typedef union FMLR_u {
+ struct {
+ jl_uint32 :1;
+ jl_uint32 mdi_mode:1; /*RW*/
+ jl_uint32 auto_mdix_enable:1; /*RW*/
+ jl_uint32 :2;
+ jl_uint32 fiber_mode:1; /*RW*/
+ } bf;
+ jl_uint32 val[1];
+} FMLR_t;
+
+#define IISDR_OFFSET ((jl_uint32)0x00000091U)
+#define IISDR_NUM ((jl_uint32)0x00000001U)
+/* Interrupt Indicators and SNR Display Register, RO */
+typedef union IISDR_u {
+ struct {
+ jl_uint32 signal_quality_ind:5;
+ jl_uint32 link_status_change:1;
+ jl_uint32 duplex_change:1;
+ jl_uint32 speed_change:1;
+ jl_uint32 auto_neg_err:1;
+ } bf;
+ jl_uint32 val[1];
+} IISDR_t;
+
+#define EEECER_OFFSET ((jl_uint32)0x00000092U)
+#define EEECER_NUM ((jl_uint32)0x00000001U)
+/* EEE Capability Enable Register */
+typedef union EEECER_u {
+ struct {
+ jl_uint32 :8;
+ jl_uint32 rx_quiet_enable:1;
+ jl_uint32 tx_quiet_enable:1;
+ jl_uint32 :2;
+ jl_uint32 eee_nway_enable:1;
+ } bf;
+ jl_uint32 val[1];
+} EEECER_t;
+
+#define EEECR_OFFSET ((jl_uint32)0x00000093U)
+#define EEECR_NUM ((jl_uint32)0x00000001U)
+/* EEE Capability Enable Register, RO */
+typedef union EEECR_u {
+ struct {
+ jl_uint32 fe_eeecr:16;
+ } bf;
+ jl_uint32 val[1];
+} EEECR_t;
+
+#define IWELFR_OFFSET ((jl_uint32)0x00000094U)
+#define IWELFR_NUM ((jl_uint32)0x00000001U)
+/* Interrupt WOL Enable and LEDs Function Register */
+typedef union IWELFR_u {
+ struct {
+ jl_uint32 fe_iwelfr:16;
+ } bf;
+ jl_uint32 val[1];
+} IWELFR_t;
+
+#endif /* __JL_REG_PHY_H__ */
+
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/reg_pinmux.h b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/reg_pinmux.h
new file mode 100644
index 0000000..2ca714e
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/reg_pinmux.h
@@ -0,0 +1,107 @@
+//reg_pinmux.h
+/*
+* Automatically generated by gen_c_api.py, don't edit it
+*/
+#ifndef __JL_REG_PINMUX_H__
+#define __JL_REG_PINMUX_H__
+
+#include <jl_types.h>
+
+#define PINMUX_BASE ((jl_uint32)0x01200000U)
+#define PINMUX_BLOCK_SIZE ((jl_uint32)0x00000100U)
+
+#define PIN_MUX_0_OFFSET ((jl_uint32)0x00000000U)
+#define PIN_MUX_0_NUM ((jl_uint32)0x00000001U)
+typedef union PIN_MUX_0_u {
+ struct {
+ jl_uint32 p8_mii_mode:1; //[ 0: 0]
+ jl_uint32 p8_mii_phy_mode:1; //[ 1: 1]
+ jl_uint32 p9_rmii_refclk_local:1; //[ 2: 2]
+ jl_uint32 p8_rmii_refclk_local:1; //[ 3: 3]
+ jl_uint32 sel_sleep_wake:1; //[ 4: 4]
+ jl_uint32 sel_sleep_wake_mode1:1; //[ 5: 5]
+ jl_uint32 sel_loop_ind:1; //[ 6: 6]
+ jl_uint32 p0_led0_sel:1; //[ 7: 7]
+ jl_uint32 p1_led0_sel:1; //[ 8: 8]
+ jl_uint32 p2_led0_sel:1; //[ 9: 9]
+ jl_uint32 p3_led0_sel:1; //[10:10]
+ jl_uint32 p4_led0_sel:1; //[11:11]
+ jl_uint32 p5_led0_sel:1; //[12:12]
+ jl_uint32 p6_led0_sel:1; //[13:13]
+ jl_uint32 p7_led0_sel:1; //[14:14]
+ jl_uint32 p0_led1_sel:1; //[15:15]
+ } bf;
+ jl_uint32 val[1];
+} PIN_MUX_0_t;
+
+#define PIN_MUX_1_OFFSET ((jl_uint32)0x00000001U)
+#define PIN_MUX_1_NUM ((jl_uint32)0x00000001U)
+typedef union PIN_MUX_1_u {
+ struct {
+ jl_uint32 p1_led1_sel:1; //[ 0: 0]
+ jl_uint32 p2_led1_sel:1; //[ 1: 1]
+ jl_uint32 p3_led1_sel:1; //[ 2: 2]
+ jl_uint32 p4_led1_sel:1; //[ 3: 3]
+ jl_uint32 p5_led1_sel:1; //[ 4: 4]
+ jl_uint32 p6_led1_sel:1; //[ 5: 5]
+ jl_uint32 p9_rmii_mode:1; //[ 6: 6]
+ jl_uint32 p8_rmii_mode:1; //[ 7: 7]
+ jl_uint32 sel_swc_debug:1; //[ 8: 8]
+ jl_uint32 sel_phy_dbg_out_local_clk:1; //[ 9: 9]
+ jl_uint32 sel_phy_dbg_out:1; //[10:10]
+ jl_uint32 sel_intn:1; //[11:11]
+ jl_uint32 sel_i2c_mode:1; //[12:12]
+ jl_uint32 sel_smi_mode:1; //[13:13]
+ jl_uint32 p8_mii_mac_mode:1; //[14:14]
+ jl_uint32 p8_rmii_refclk_extenal:1; //[15:15]
+ } bf;
+ jl_uint32 val[1];
+} PIN_MUX_1_t;
+
+#define PIN_MUX_2_OFFSET ((jl_uint32)0x00000002U)
+#define PIN_MUX_2_NUM ((jl_uint32)0x00000001U)
+typedef union PIN_MUX_2_u {
+ struct {
+ jl_uint32 p9_rmii_refclk_extenal:1; //[ 0: 0]
+ jl_uint32 sel_p8_link_stat:1; //[ 1: 1]
+ jl_uint32 sel_p9_link_stat:1; //[ 2: 2]
+ jl_uint32 sel_phy_dbg_out_ext_clk:1; //[ 3: 3]
+ jl_uint32 sel_p8_dup_sta:1; //[ 4: 4]
+ jl_uint32 sel_p8_spd_sta:1; //[ 5: 5]
+ jl_uint32 sel_p8_if_mode:1; //[ 6: 6]
+ jl_uint32 sel_p8_if_sel:1; //[ 7: 7]
+ jl_uint32 sel_en_led1:1; //[ 8: 8]
+ jl_uint32 sel_dis_loop_ind:1; //[ 9: 9]
+ jl_uint32 sel_dis_eee:1; //[10:10]
+ jl_uint32 sel_led_mode:1; //[11:11]
+ jl_uint32 sel_rma_mode:1; //[12:12]
+ jl_uint32 sel_unknow_multi:1; //[13:13]
+ jl_uint32 sel_dis_rst_blnk:1; //[14:14]
+ jl_uint32 sel_p8_fctrl_sta:1; //[15:15]
+ } bf;
+ jl_uint32 val[1];
+} PIN_MUX_2_t;
+
+#define PIN_MUX_3_OFFSET ((jl_uint32)0x00000003U)
+#define PIN_MUX_3_NUM ((jl_uint32)0x00000001U)
+typedef union PIN_MUX_3_u {
+ struct {
+ jl_uint32 sel_p9_dup_sta:1; //[ 0: 0]
+ jl_uint32 sel_p9_spd_sta:1; //[ 1: 1]
+ jl_uint32 sel_p9_if_sel:1; //[ 2: 2]
+ jl_uint32 sel_p9_fctrl_sta:1; //[ 3: 3]
+ jl_uint32 sel_p9_if_mode:1; //[ 4: 4]
+ jl_uint32 sel_gpio19_rsv:1; //[ 5: 5]
+ jl_uint32 sel_gpio20_rsv:1; //[ 6: 6]
+ jl_uint32 sel_gpio21_rsv:1; //[ 7: 7]
+ jl_uint32 sel_gpio22_rsv:1; //[ 8: 8]
+ jl_uint32 sel_gpio23_rsv:1; //[ 9: 9]
+ jl_uint32 sel_gpio24_rsv:1; //[10:10]
+ jl_uint32 sel_gpio25_rsv:1; //[11:11]
+ jl_uint32 pin_dbg_mode:1; //[12:12]
+ } bf;
+ jl_uint32 val[1];
+} PIN_MUX_3_t;
+
+#endif /* __JL_REG_PINMUX_H__ */
+
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/reg_swcore.h b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/reg_swcore.h
new file mode 100644
index 0000000..307cd1c
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/reg_swcore.h
@@ -0,0 +1,1266 @@
+//reg_swcore.h
+/*
+* Automatically generated by gen_c_api.py, don't edit it
+*/
+#ifndef __JL_REG_SWCORE_H__
+#define __JL_REG_SWCORE_H__
+
+#include <jl_types.h>
+#include "jl51xx/jl51xx_drv_switch.h"
+
+#define SWCORE_BASE ((jl_uint32)0x00100000U)
+#define SWCORE_BLOCK_SIZE ((jl_uint32)0x00010000U)
+
+#define CORE_VERSION_OFFSET ((jl_uint32)0x00000000U)
+#define CORE_VERSION_NUM ((jl_uint32)0x00000001U)
+typedef union CORE_VERSION_u {
+ struct {
+ jl_uint32 version:32; //[31: 0]
+ } bf;
+ jl_uint32 val[1];
+} CORE_VERSION_t;
+
+#define BUFFER_FREE_OFFSET ((jl_uint32)0x00000001U)
+#define BUFFER_FREE_NUM ((jl_uint32)0x00000001U)
+typedef union BUFFER_FREE_u {
+ struct {
+ jl_uint32 cells:10; //[ 9: 0]
+ } bf;
+ jl_uint32 val[1];
+} BUFFER_FREE_t;
+
+#define TICK_CONFIGURATION_OFFSET ((jl_uint32)0x00000002U)
+#define TICK_CONFIGURATION_NUM ((jl_uint32)0x00000001U)
+typedef union TICK_CONFIGURATION_u {
+ struct {
+ jl_uint32 clk_divider:14; //[13: 0]
+ jl_uint32 step_divider:4; //[17:14]
+ } bf;
+ jl_uint32 val[1];
+} TICK_CONFIGURATION_t;
+
+#define SCRATCH_OFFSET ((jl_uint32)0x00000003U)
+#define SCRATCH_NUM ((jl_uint32)0x00000001U)
+typedef union SCRATCH_u {
+ struct {
+ jl_uint64 scratch:64; //[63: 0]
+ } bf;
+ jl_uint32 val[2];
+} SCRATCH_t;
+
+#define MAC_RX_BROKEN_PACKETS_OFFSET ((jl_uint32)0x00000005U)
+#define MAC_RX_BROKEN_PACKETS_NUM ((jl_uint32)0x0000000AU)
+typedef union MAC_RX_BROKEN_PACKETS_u {
+ struct {
+ jl_uint32 packets:24; //[23: 0]
+ } bf;
+ jl_uint32 val[1];
+} MAC_RX_BROKEN_PACKETS_t;
+
+#define MAC_RX_SHORT_PACKET_DROP_OFFSET ((jl_uint32)0x0000000FU)
+#define MAC_RX_SHORT_PACKET_DROP_NUM ((jl_uint32)0x0000000AU)
+typedef union MAC_RX_SHORT_PACKET_DROP_u {
+ struct {
+ jl_uint32 packets:24; //[23: 0]
+ } bf;
+ jl_uint32 val[1];
+} MAC_RX_SHORT_PACKET_DROP_t;
+
+#define L2_BROADCAST_STORM_CONTROL_RATE_CONFIGURATION_OFFSET ((jl_uint32)0x00000019U)
+#define L2_BROADCAST_STORM_CONTROL_RATE_CONFIGURATION_NUM ((jl_uint32)0x0000000AU)
+typedef union L2_BROADCAST_STORM_CONTROL_RATE_CONFIGURATION_u {
+ struct {
+ jl_uint32 packets_not_bytes:1; //[ 0: 0]
+ jl_uint32 tokens:12; //[12: 1]
+ jl_uint32 tick:3; //[15:13]
+ jl_uint32 ifg_correction:8; //[23:16]
+ } bf;
+ jl_uint32 val[1];
+} L2_BROADCAST_STORM_CONTROL_RATE_CONFIGURATION_t;
+
+#define L2_BROADCAST_STORM_CONTROL_BUCKET_CAPACITY_CONFIGURATION_OFFSET ((jl_uint32)0x00000023U)
+#define L2_BROADCAST_STORM_CONTROL_BUCKET_CAPACITY_CONFIGURATION_NUM ((jl_uint32)0x0000000AU)
+typedef union L2_BROADCAST_STORM_CONTROL_BUCKET_CAPACITY_CONFIGURATION_u {
+ struct {
+ jl_uint32 bucket_capacity:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} L2_BROADCAST_STORM_CONTROL_BUCKET_CAPACITY_CONFIGURATION_t;
+
+#define L2_BROADCAST_STORM_CONTROL_BUCKET_THRESHOLD_CONFIGURATION_OFFSET ((jl_uint32)0x0000002DU)
+#define L2_BROADCAST_STORM_CONTROL_BUCKET_THRESHOLD_CONFIGURATION_NUM ((jl_uint32)0x0000000AU)
+typedef union L2_BROADCAST_STORM_CONTROL_BUCKET_THRESHOLD_CONFIGURATION_u {
+ struct {
+ jl_uint32 threshold:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} L2_BROADCAST_STORM_CONTROL_BUCKET_THRESHOLD_CONFIGURATION_t;
+
+#define L2_BROADCAST_STORM_CONTROL_ENABLE_OFFSET ((jl_uint32)0x00000037U)
+#define L2_BROADCAST_STORM_CONTROL_ENABLE_NUM ((jl_uint32)0x00000001U)
+typedef union L2_BROADCAST_STORM_CONTROL_ENABLE_u {
+ struct {
+ jl_uint32 enable:10; //[ 9: 0]
+ } bf;
+ jl_uint32 val[1];
+} L2_BROADCAST_STORM_CONTROL_ENABLE_t;
+
+#define L2_MULTICAST_STORM_CONTROL_RATE_CONFIGURATION_OFFSET ((jl_uint32)0x00000038U)
+#define L2_MULTICAST_STORM_CONTROL_RATE_CONFIGURATION_NUM ((jl_uint32)0x0000000AU)
+typedef union L2_MULTICAST_STORM_CONTROL_RATE_CONFIGURATION_u {
+ struct {
+ jl_uint32 packets_not_bytes:1; //[ 0: 0]
+ jl_uint32 tokens:12; //[12: 1]
+ jl_uint32 tick:3; //[15:13]
+ jl_uint32 ifg_correction:8; //[23:16]
+ } bf;
+ jl_uint32 val[1];
+} L2_MULTICAST_STORM_CONTROL_RATE_CONFIGURATION_t;
+
+#define L2_MULTICAST_STORM_CONTROL_BUCKET_CAPACITY_CONFIGURATION_OFFSET ((jl_uint32)0x00000042U)
+#define L2_MULTICAST_STORM_CONTROL_BUCKET_CAPACITY_CONFIGURATION_NUM ((jl_uint32)0x0000000AU)
+typedef union L2_MULTICAST_STORM_CONTROL_BUCKET_CAPACITY_CONFIGURATION_u {
+ struct {
+ jl_uint32 bucket_capacity:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} L2_MULTICAST_STORM_CONTROL_BUCKET_CAPACITY_CONFIGURATION_t;
+
+#define L2_MULTICAST_STORM_CONTROL_BUCKET_THRESHOLD_CONFIGURATION_OFFSET ((jl_uint32)0x0000004CU)
+#define L2_MULTICAST_STORM_CONTROL_BUCKET_THRESHOLD_CONFIGURATION_NUM ((jl_uint32)0x0000000AU)
+typedef union L2_MULTICAST_STORM_CONTROL_BUCKET_THRESHOLD_CONFIGURATION_u {
+ struct {
+ jl_uint32 threshold:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} L2_MULTICAST_STORM_CONTROL_BUCKET_THRESHOLD_CONFIGURATION_t;
+
+#define L2_MULTICAST_STORM_CONTROL_ENABLE_OFFSET ((jl_uint32)0x00000056U)
+#define L2_MULTICAST_STORM_CONTROL_ENABLE_NUM ((jl_uint32)0x00000001U)
+typedef union L2_MULTICAST_STORM_CONTROL_ENABLE_u {
+ struct {
+ jl_uint32 enable:10; //[ 9: 0]
+ } bf;
+ jl_uint32 val[1];
+} L2_MULTICAST_STORM_CONTROL_ENABLE_t;
+
+#define L2_FLOODING_STORM_CONTROL_RATE_CONFIGURATION_OFFSET ((jl_uint32)0x00000057U)
+#define L2_FLOODING_STORM_CONTROL_RATE_CONFIGURATION_NUM ((jl_uint32)0x0000000AU)
+typedef union L2_FLOODING_STORM_CONTROL_RATE_CONFIGURATION_u {
+ struct {
+ jl_uint32 packets_not_bytes:1; //[ 0: 0]
+ jl_uint32 tokens:12; //[12: 1]
+ jl_uint32 tick:3; //[15:13]
+ jl_uint32 ifg_correction:8; //[23:16]
+ } bf;
+ jl_uint32 val[1];
+} L2_FLOODING_STORM_CONTROL_RATE_CONFIGURATION_t;
+
+#define L2_FLOODING_STORM_CONTROL_BUCKET_CAPACITY_CONFIGURATION_OFFSET ((jl_uint32)0x00000061U)
+#define L2_FLOODING_STORM_CONTROL_BUCKET_CAPACITY_CONFIGURATION_NUM ((jl_uint32)0x0000000AU)
+typedef union L2_FLOODING_STORM_CONTROL_BUCKET_CAPACITY_CONFIGURATION_u {
+ struct {
+ jl_uint32 bucket_capacity:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} L2_FLOODING_STORM_CONTROL_BUCKET_CAPACITY_CONFIGURATION_t;
+
+#define L2_FLOODING_STORM_CONTROL_BUCKET_THRESHOLD_CONFIGURATION_OFFSET ((jl_uint32)0x0000006BU)
+#define L2_FLOODING_STORM_CONTROL_BUCKET_THRESHOLD_CONFIGURATION_NUM ((jl_uint32)0x0000000AU)
+typedef union L2_FLOODING_STORM_CONTROL_BUCKET_THRESHOLD_CONFIGURATION_u {
+ struct {
+ jl_uint32 threshold:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} L2_FLOODING_STORM_CONTROL_BUCKET_THRESHOLD_CONFIGURATION_t;
+
+#define L2_FLOODING_STORM_CONTROL_ENABLE_OFFSET ((jl_uint32)0x00000075U)
+#define L2_FLOODING_STORM_CONTROL_ENABLE_NUM ((jl_uint32)0x00000001U)
+typedef union L2_FLOODING_STORM_CONTROL_ENABLE_u {
+ struct {
+ jl_uint32 enable:10; //[ 9: 0]
+ } bf;
+ jl_uint32 val[1];
+} L2_FLOODING_STORM_CONTROL_ENABLE_t;
+
+#define LEARNING_AND_AGING_ENABLE_OFFSET ((jl_uint32)0x00000076U)
+#define LEARNING_AND_AGING_ENABLE_NUM ((jl_uint32)0x00000001U)
+typedef union LEARNING_AND_AGING_ENABLE_u {
+ struct {
+ jl_uint32 learning_enable:1; //[ 0: 0]
+ jl_uint32 aging_enable:1; //[ 1: 1]
+ } bf;
+ jl_uint32 val[1];
+} LEARNING_AND_AGING_ENABLE_t;
+
+#define DEFAULT_LEARNING_STATUS_OFFSET ((jl_uint32)0x00000077U)
+#define DEFAULT_LEARNING_STATUS_NUM ((jl_uint32)0x00000001U)
+typedef union DEFAULT_LEARNING_STATUS_u {
+ struct {
+ jl_uint32 valid:1; //[ 0: 0]
+ jl_uint32 statics:1; //[ 1: 1]
+ jl_uint32 hit:1; //[ 2: 2]
+ } bf;
+ jl_uint32 val[1];
+} DEFAULT_LEARNING_STATUS_t;
+
+#define TIME_TO_AGE_OFFSET ((jl_uint32)0x00000078U)
+#define TIME_TO_AGE_NUM ((jl_uint32)0x00000001U)
+typedef union TIME_TO_AGE_u {
+ struct {
+ jl_uint64 tick_cnt:32; //[31: 0]
+ jl_uint64 tick:3; //[34:32]
+ } bf;
+ jl_uint32 val[2];
+} TIME_TO_AGE_t;
+
+#define L2_AGING_COLLISION_SHADOW_TABLE_OFFSET ((jl_uint32)0x0000007AU)
+#define L2_AGING_COLLISION_SHADOW_TABLE_NUM ((jl_uint32)0x00000010U)
+typedef union L2_AGING_COLLISION_SHADOW_TABLE_u {
+ struct {
+ jl_uint32 valid:1; //[ 0: 0]
+ jl_uint32 stat:1; //[ 1: 1]
+ jl_uint32 hit:1; //[ 2: 2]
+ } bf;
+ jl_uint32 val[1];
+} L2_AGING_COLLISION_SHADOW_TABLE_t;
+
+#define L2_AGING_STATUS_SHADOW_TABLE_OFFSET ((jl_uint32)0x0000008AU)
+#define L2_AGING_STATUS_SHADOW_TABLE_NUM ((jl_uint32)0x00000800U)
+typedef union L2_AGING_STATUS_SHADOW_TABLE_u {
+ struct {
+ jl_uint32 valid:1; //[ 0: 0]
+ } bf;
+ jl_uint32 val[1];
+} L2_AGING_STATUS_SHADOW_TABLE_t;
+
+#define SP_OVERFLOW_DROP_OFFSET ((jl_uint32)0x0000088AU)
+#define SP_OVERFLOW_DROP_NUM ((jl_uint32)0x0000000AU)
+typedef union SP_OVERFLOW_DROP_u {
+ struct {
+ jl_uint32 packets:24; //[23: 0]
+ } bf;
+ jl_uint32 val[1];
+} SP_OVERFLOW_DROP_t;
+
+#define IPP_BROKEN_PACKETS_OFFSET ((jl_uint32)0x00000894U)
+#define IPP_BROKEN_PACKETS_NUM ((jl_uint32)0x00000001U)
+typedef union IPP_BROKEN_PACKETS_u {
+ struct {
+ jl_uint32 packets:24; //[23: 0]
+ } bf;
+ jl_uint32 val[1];
+} IPP_BROKEN_PACKETS_t;
+
+#define IPP_PM_DROP_OFFSET ((jl_uint32)0x00000895U)
+#define IPP_PM_DROP_NUM ((jl_uint32)0x00000001U)
+typedef union IPP_PM_DROP_u {
+ struct {
+ jl_uint32 packets:24; //[23: 0]
+ } bf;
+ jl_uint32 val[1];
+} IPP_PM_DROP_t;
+
+#define UNKNOWN_INGRESS_DROP_OFFSET ((jl_uint32)0x00000896U)
+#define UNKNOWN_INGRESS_DROP_NUM ((jl_uint32)0x00000001U)
+typedef union UNKNOWN_INGRESS_DROP_u {
+ struct {
+ jl_uint32 packets:24; //[23: 0]
+ } bf;
+ jl_uint32 val[1];
+} UNKNOWN_INGRESS_DROP_t;
+
+#define EMPTY_MASK_DROP_OFFSET ((jl_uint32)0x00000897U)
+#define EMPTY_MASK_DROP_NUM ((jl_uint32)0x00000001U)
+typedef union EMPTY_MASK_DROP_u {
+ struct {
+ jl_uint32 packets:24; //[23: 0]
+ } bf;
+ jl_uint32 val[1];
+} EMPTY_MASK_DROP_t;
+
+#define INGRESS_SPANNING_TREE_DROP_LISTEN_OFFSET ((jl_uint32)0x00000898U)
+#define INGRESS_SPANNING_TREE_DROP_LISTEN_NUM ((jl_uint32)0x00000001U)
+typedef union INGRESS_SPANNING_TREE_DROP_LISTEN_u {
+ struct {
+ jl_uint32 packets:24; //[23: 0]
+ } bf;
+ jl_uint32 val[1];
+} INGRESS_SPANNING_TREE_DROP_LISTEN_t;
+
+#define INGRESS_SPANNING_TREE_DROP_LEARNING_OFFSET ((jl_uint32)0x00000899U)
+#define INGRESS_SPANNING_TREE_DROP_LEARNING_NUM ((jl_uint32)0x00000001U)
+typedef union INGRESS_SPANNING_TREE_DROP_LEARNING_u {
+ struct {
+ jl_uint32 packets:24; //[23: 0]
+ } bf;
+ jl_uint32 val[1];
+} INGRESS_SPANNING_TREE_DROP_LEARNING_t;
+
+#define INGRESS_SPANNING_TREE_DROP_BLOCKING_OFFSET ((jl_uint32)0x0000089AU)
+#define INGRESS_SPANNING_TREE_DROP_BLOCKING_NUM ((jl_uint32)0x00000001U)
+typedef union INGRESS_SPANNING_TREE_DROP_BLOCKING_u {
+ struct {
+ jl_uint32 packets:24; //[23: 0]
+ } bf;
+ jl_uint32 val[1];
+} INGRESS_SPANNING_TREE_DROP_BLOCKING_t;
+
+#define L2_FLAG_DROP_OFFSET ((jl_uint32)0x0000089BU)
+#define L2_FLAG_DROP_NUM ((jl_uint32)0x00000001U)
+typedef union L2_FLAG_DROP_u {
+ struct {
+ jl_uint32 packets:24; //[23: 0]
+ } bf;
+ jl_uint32 val[1];
+} L2_FLAG_DROP_t;
+
+#define INGRESS_L2_ACL_DROP_OFFSET ((jl_uint32)0x0000089CU)
+#define INGRESS_L2_ACL_DROP_NUM ((jl_uint32)0x00000001U)
+typedef union INGRESS_L2_ACL_DROP_u {
+ struct {
+ jl_uint32 packets:24; //[23: 0]
+ } bf;
+ jl_uint32 val[1];
+} INGRESS_L2_ACL_DROP_t;
+
+#define VLAN_MEMBER_DROP_OFFSET ((jl_uint32)0x0000089DU)
+#define VLAN_MEMBER_DROP_NUM ((jl_uint32)0x00000001U)
+typedef union VLAN_MEMBER_DROP_u {
+ struct {
+ jl_uint32 packets:24; //[23: 0]
+ } bf;
+ jl_uint32 val[1];
+} VLAN_MEMBER_DROP_t;
+
+#define MINIMUM_ALLOWED_VLAN_DROP_OFFSET ((jl_uint32)0x0000089EU)
+#define MINIMUM_ALLOWED_VLAN_DROP_NUM ((jl_uint32)0x00000001U)
+typedef union MINIMUM_ALLOWED_VLAN_DROP_u {
+ struct {
+ jl_uint32 packets:24; //[23: 0]
+ } bf;
+ jl_uint32 val[1];
+} MINIMUM_ALLOWED_VLAN_DROP_t;
+
+#define MAXIMUM_ALLOWED_VLAN_DROP_OFFSET ((jl_uint32)0x0000089FU)
+#define MAXIMUM_ALLOWED_VLAN_DROP_NUM ((jl_uint32)0x00000001U)
+typedef union MAXIMUM_ALLOWED_VLAN_DROP_u {
+ struct {
+ jl_uint32 packets:24; //[23: 0]
+ } bf;
+ jl_uint32 val[1];
+} MAXIMUM_ALLOWED_VLAN_DROP_t;
+
+#define IPP_PACKET_HEAD_COUNTER_OFFSET ((jl_uint32)0x000008A0U)
+#define IPP_PACKET_HEAD_COUNTER_NUM ((jl_uint32)0x00000001U)
+typedef union IPP_PACKET_HEAD_COUNTER_u {
+ struct {
+ jl_uint32 packets:24; //[23: 0]
+ } bf;
+ jl_uint32 val[1];
+} IPP_PACKET_HEAD_COUNTER_t;
+
+#define IPP_PACKET_TAIL_COUNTER_OFFSET ((jl_uint32)0x000008A1U)
+#define IPP_PACKET_TAIL_COUNTER_NUM ((jl_uint32)0x00000001U)
+typedef union IPP_PACKET_TAIL_COUNTER_u {
+ struct {
+ jl_uint32 packets:24; //[23: 0]
+ } bf;
+ jl_uint32 val[1];
+} IPP_PACKET_TAIL_COUNTER_t;
+
+#define L2_AGING_TABLE_OFFSET ((jl_uint32)0x000008A2U)
+#define L2_AGING_TABLE_NUM ((jl_uint32)0x00000800U)
+typedef union L2_AGING_TABLE_u {
+ struct {
+ jl_uint32 valid:1; //[ 0: 0]
+ jl_uint32 stat:1; //[ 1: 1]
+ jl_uint32 hit:1; //[ 2: 2]
+ } bf;
+ jl_uint32 val[1];
+} L2_AGING_TABLE_t;
+
+#define L2_DA_HASH_LOOKUP_TABLE_OFFSET ((jl_uint32)0x000010A2U)
+#define L2_DA_HASH_LOOKUP_TABLE_NUM ((jl_uint32)0x00000800U)
+typedef union L2_DA_HASH_LOOKUP_TABLE_u {
+ struct {
+ jl_uint64 mac_addr:48; //[47: 0]
+ jl_uint64 gid:4; //[51:48]
+ } bf;
+ jl_uint32 val[2];
+} L2_DA_HASH_LOOKUP_TABLE_t;
+
+#define L2_DESTINATION_TABLE_OFFSET ((jl_uint32)0x000020A2U)
+#define L2_DESTINATION_TABLE_NUM ((jl_uint32)0x00000810U)
+typedef union L2_DESTINATION_TABLE_u {
+ struct {
+ jl_uint32 uc:1; //[ 0: 0]
+ jl_uint32 dest_port_or_mc_addr:6; //[ 6: 1]
+ jl_uint32 pkt_drop:1; //[ 7: 7]
+ } bf;
+ jl_uint32 val[1];
+} L2_DESTINATION_TABLE_t;
+
+#define SOURCE_PORT_TABLE_OFFSET ((jl_uint32)0x000028B2U)
+#define SOURCE_PORT_TABLE_NUM ((jl_uint32)0x0000000AU)
+typedef union SOURCE_PORT_TABLE_u {
+ struct {
+ jl_uint64 prio_from_l3:1; //[ 0: 0]
+ jl_uint64 vlan_single_op:3; //[ 3: 1]
+ jl_uint64 vid_sel:2; //[ 5: 4]
+ jl_uint64 cfi_dei_sel:2; //[ 7: 6]
+ jl_uint64 pcp_sel:2; //[ 9: 8]
+ jl_uint64 type_sel:2; //[11:10]
+ jl_uint64 vlan_assignment:2; //[13:12]
+ jl_uint64 default_vid:12; //[25:14]
+ jl_uint64 default_cfi_dei:1; //[26:26]
+ jl_uint64 default_pcp:3; //[29:27]
+ jl_uint64 min_allowed_vlans:2; //[31:30]
+ jl_uint64 max_allowed_vlans:2; //[33:32]
+ jl_uint64 learn_multicast_sa_mac:1; //[34:34]
+ jl_uint64 input_mirror_enabled:1; //[35:35]
+ jl_uint64 dest_input_mirror:4; //[39:36]
+ jl_uint64 spt:3; //[42:40]
+ } bf;
+ jl_uint32 val[2];
+} SOURCE_PORT_TABLE_t;
+
+#define L2_LOOKUP_COLLISION_TABLE_MASKS_OFFSET ((jl_uint32)0x000028C6U)
+#define L2_LOOKUP_COLLISION_TABLE_MASKS_NUM ((jl_uint32)0x00000004U)
+typedef union L2_LOOKUP_COLLISION_TABLE_MASKS_u {
+ struct {
+ jl_uint64 mac_addr:48; //[47: 0]
+ jl_uint64 gid:4; //[51:48]
+ } bf;
+ jl_uint32 val[2];
+} L2_LOOKUP_COLLISION_TABLE_MASKS_t;
+
+#define L2_LOOKUP_COLLISION_TABLE_OFFSET ((jl_uint32)0x000028CEU)
+#define L2_LOOKUP_COLLISION_TABLE_NUM ((jl_uint32)0x00000010U)
+typedef union L2_LOOKUP_COLLISION_TABLE_u {
+ struct {
+ jl_uint64 mac_addr:48; //[47: 0]
+ jl_uint64 gid:4; //[51:48]
+ } bf;
+ jl_uint32 val[2];
+} L2_LOOKUP_COLLISION_TABLE_t;
+
+#define VLAN_TABLE_OFFSET ((jl_uint32)0x000028EEU)
+#define VLAN_TABLE_NUM ((jl_uint32)0x00000010U)
+typedef union VLAN_TABLE_u {
+ struct {
+ jl_uint64 vlan_port_mask:10; //[ 9: 0]
+ jl_uint64 gid:4; //[13:10]
+ jl_uint64 vlan_single_op:3; //[16:14]
+ jl_uint64 vid_sel:2; //[18:17]
+ jl_uint64 cfi_dei_sel:2; //[20:19]
+ jl_uint64 pcp_sel:2; //[22:21]
+ jl_uint64 type_sel:2; //[24:23]
+ jl_uint64 vid:12; //[36:25]
+ jl_uint64 pcp:3; //[39:37]
+ jl_uint64 cfi_dei:1; //[40:40]
+ } bf;
+ jl_uint32 val[2];
+} VLAN_TABLE_t;
+
+#define INGRESS_L2_ACL_RESULT_OPERATION_ENTRIES_OFFSET ((jl_uint32)0x0000290EU)
+#define INGRESS_L2_ACL_RESULT_OPERATION_ENTRIES_NUM ((jl_uint32)0x00000020U)
+typedef union INGRESS_L2_ACL_RESULT_OPERATION_ENTRIES_u {
+ struct {
+ jl_uint64 drop_enable:1; //[ 0: 0]
+ jl_uint64 send_to_cpu:1; //[ 1: 1]
+ jl_uint64 force_queue:1; //[ 2: 2]
+ jl_uint64 e_queue:2; //[ 4: 3]
+ jl_uint64 send_to_port:1; //[ 5: 5]
+ jl_uint64 dest_port:4; //[ 9: 6]
+ jl_uint64 force_vid_valid:1; //[10:10]
+ jl_uint64 force_vid:5; //[15:11]
+ jl_uint64 update_counter:1; //[16:16]
+ jl_uint64 counter:5; //[21:17]
+ jl_uint64 update_cfi_dei:1; //[22:22]
+ jl_uint64 new_cfi_dei_value:1; //[23:23]
+ jl_uint64 update_pcp:1; //[24:24]
+ jl_uint64 new_pcp_value:3; //[27:25]
+ jl_uint64 update_vid:1; //[28:28]
+ jl_uint64 new_vid_value:12; //[40:29]
+ } bf;
+ jl_uint32 val[2];
+} INGRESS_L2_ACL_RESULT_OPERATION_ENTRIES_t;
+
+#define SEND_TO_CPU_OFFSET ((jl_uint32)0x0000294EU)
+#define SEND_TO_CPU_NUM ((jl_uint32)0x00000001U)
+typedef union SEND_TO_CPU_u {
+ struct {
+ jl_uint64 allow_bpdu:1; //[ 0: 0]
+ jl_uint64 allow_rst_bpdu:1; //[ 1: 1]
+ jl_uint64 unique_cpu_mac:1; //[ 2: 2]
+ jl_uint64 cpu_mac_addr:48; //[50: 3]
+ } bf;
+ jl_uint32 val[2];
+} SEND_TO_CPU_t;
+
+#define INGRESS_ETHERNET_TYPE_FOR_VLAN_TAG_OFFSET ((jl_uint32)0x00002950U)
+#define INGRESS_ETHERNET_TYPE_FOR_VLAN_TAG_NUM ((jl_uint32)0x00000001U)
+typedef union INGRESS_ETHERNET_TYPE_FOR_VLAN_TAG_u {
+ struct {
+ jl_uint32 type_value:16; //[15: 0]
+ jl_uint32 type:1; //[16:16]
+ jl_uint32 valid:1; //[17:17]
+ } bf;
+ jl_uint32 val[1];
+} INGRESS_ETHERNET_TYPE_FOR_VLAN_TAG_t;
+
+#define FORCE_NON_VLAN_PACKET_TO_SPECIFIC_EGRESS_QUEUE_OFFSET ((jl_uint32)0x00002951U)
+#define FORCE_NON_VLAN_PACKET_TO_SPECIFIC_EGRESS_QUEUE_NUM ((jl_uint32)0x00000001U)
+typedef union FORCE_NON_VLAN_PACKET_TO_SPECIFIC_EGRESS_QUEUE_u {
+ struct {
+ jl_uint32 force_queue:1; //[ 0: 0]
+ jl_uint32 e_queue:2; //[ 2: 1]
+ } bf;
+ jl_uint32 val[1];
+} FORCE_NON_VLAN_PACKET_TO_SPECIFIC_EGRESS_QUEUE_t;
+
+#define FORCE_UNKNOWN_L3_PACKET_TO_SPECIFIC_EGRESS_QUEUE_OFFSET ((jl_uint32)0x00002952U)
+#define FORCE_UNKNOWN_L3_PACKET_TO_SPECIFIC_EGRESS_QUEUE_NUM ((jl_uint32)0x00000001U)
+typedef union FORCE_UNKNOWN_L3_PACKET_TO_SPECIFIC_EGRESS_QUEUE_u {
+ struct {
+ jl_uint32 force_queue:1; //[ 0: 0]
+ jl_uint32 e_queue:2; //[ 2: 1]
+ } bf;
+ jl_uint32 val[1];
+} FORCE_UNKNOWN_L3_PACKET_TO_SPECIFIC_EGRESS_QUEUE_t;
+
+#define EGRESS_SPANNING_TREE_STATE_OFFSET ((jl_uint32)0x00002953U)
+#define EGRESS_SPANNING_TREE_STATE_NUM ((jl_uint32)0x00000001U)
+typedef union EGRESS_SPANNING_TREE_STATE_u {
+ struct {
+ jl_uint32 spt_state:30; //[29: 0]
+ } bf;
+ jl_uint32 val[1];
+} EGRESS_SPANNING_TREE_STATE_t;
+
+#define FORWARD_FROM_CPU_OFFSET ((jl_uint32)0x00002954U)
+#define FORWARD_FROM_CPU_NUM ((jl_uint32)0x00000001U)
+typedef union FORWARD_FROM_CPU_u {
+ struct {
+ jl_uint32 enable:1; //[ 0: 0]
+ } bf;
+ jl_uint32 val[1];
+} FORWARD_FROM_CPU_t;
+
+#define L2_MULTICAST_HANDLING_OFFSET ((jl_uint32)0x00002955U)
+#define L2_MULTICAST_HANDLING_NUM ((jl_uint32)0x00000001U)
+typedef union L2_MULTICAST_HANDLING_u {
+ struct {
+ jl_uint32 excl_ipv4_mc:1; //[ 0: 0]
+ jl_uint32 excl_ipv6_mc:1; //[ 1: 1]
+ jl_uint32 incl_l2_mc_lut:1; //[ 2: 2]
+ jl_uint32 incl_multi_ports:1; //[ 3: 3]
+ } bf;
+ jl_uint32 val[1];
+} L2_MULTICAST_HANDLING_t;
+
+#define DEBUG_SRCPORT_OFFSET ((jl_uint32)0x00002956U)
+#define DEBUG_SRCPORT_NUM ((jl_uint32)0x00000001U)
+typedef union DEBUG_SRCPORT_u {
+ struct {
+ jl_uint32 value:32; //[31: 0]
+ } bf;
+ jl_uint32 val[1];
+} DEBUG_SRCPORT_t;
+
+#define DEBUG_DSTPORTMASK_OFFSET ((jl_uint32)0x00002957U)
+#define DEBUG_DSTPORTMASK_NUM ((jl_uint32)0x00000001U)
+typedef union DEBUG_DSTPORTMASK_u {
+ struct {
+ jl_uint32 value:10; //[ 9: 0]
+ } bf;
+ jl_uint32 val[1];
+} DEBUG_DSTPORTMASK_t;
+
+#define ENABLE_ENQUEUE_TO_PORTS_AND_QUEUES_OFFSET ((jl_uint32)0x00002958U)
+#define ENABLE_ENQUEUE_TO_PORTS_AND_QUEUES_NUM ((jl_uint32)0x0000000AU)
+typedef union ENABLE_ENQUEUE_TO_PORTS_AND_QUEUES_u {
+ struct {
+ jl_uint32 q_on:4; //[ 3: 0]
+ } bf;
+ jl_uint32 val[1];
+} ENABLE_ENQUEUE_TO_PORTS_AND_QUEUES_t;
+
+#define L2_MULTICAST_TABLE_OFFSET ((jl_uint32)0x00002962U)
+#define L2_MULTICAST_TABLE_NUM ((jl_uint32)0x00000040U)
+typedef union L2_MULTICAST_TABLE_u {
+ struct {
+ jl_uint32 mc_port_mask:10; //[ 9: 0]
+ } bf;
+ jl_uint32 val[1];
+} L2_MULTICAST_TABLE_t;
+
+#define L2_AGING_COLLISION_TABLE_OFFSET ((jl_uint32)0x000029A2U)
+#define L2_AGING_COLLISION_TABLE_NUM ((jl_uint32)0x00000010U)
+typedef union L2_AGING_COLLISION_TABLE_u {
+ struct {
+ jl_uint32 valid:1; //[ 0: 0]
+ jl_uint32 stat:1; //[ 1: 1]
+ jl_uint32 hit:1; //[ 2: 2]
+ } bf;
+ jl_uint32 val[1];
+} L2_AGING_COLLISION_TABLE_t;
+
+#define MPLS_EXP_FIELD_TO_EGRESS_QUEUE_MAPPING_TABLE_OFFSET ((jl_uint32)0x000029B2U)
+#define MPLS_EXP_FIELD_TO_EGRESS_QUEUE_MAPPING_TABLE_NUM ((jl_uint32)0x00000008U)
+typedef union MPLS_EXP_FIELD_TO_EGRESS_QUEUE_MAPPING_TABLE_u {
+ struct {
+ jl_uint32 p_queue:2; //[ 1: 0]
+ } bf;
+ jl_uint32 val[1];
+} MPLS_EXP_FIELD_TO_EGRESS_QUEUE_MAPPING_TABLE_t;
+
+#define IP_TOS_FIELD_TO_EGRESS_QUEUE_MAPPING_TABLE_OFFSET ((jl_uint32)0x000029BAU)
+#define IP_TOS_FIELD_TO_EGRESS_QUEUE_MAPPING_TABLE_NUM ((jl_uint32)0x00000100U)
+typedef union IP_TOS_FIELD_TO_EGRESS_QUEUE_MAPPING_TABLE_u {
+ struct {
+ jl_uint32 p_queue:2; //[ 1: 0]
+ } bf;
+ jl_uint32 val[1];
+} IP_TOS_FIELD_TO_EGRESS_QUEUE_MAPPING_TABLE_t;
+
+#define VLAN_PCP_TO_EGRESS_QUEUE_MAPPING_TABLE_OFFSET ((jl_uint32)0x00002ABAU)
+#define VLAN_PCP_TO_EGRESS_QUEUE_MAPPING_TABLE_NUM ((jl_uint32)0x00000008U)
+typedef union VLAN_PCP_TO_EGRESS_QUEUE_MAPPING_TABLE_u {
+ struct {
+ jl_uint32 p_queue:2; //[ 1: 0]
+ } bf;
+ jl_uint32 val[1];
+} VLAN_PCP_TO_EGRESS_QUEUE_MAPPING_TABLE_t;
+
+#define INGRESS_VID_TRANSLATION_ACTION_OFFSET ((jl_uint32)0x00002AC2U)
+#define INGRESS_VID_TRANSLATION_ACTION_NUM ((jl_uint32)0x0000000AU)
+typedef union INGRESS_VID_TRANSLATION_ACTION_u {
+ struct {
+ jl_uint32 use_lookup:1; //[ 0: 0]
+ jl_uint32 miss_vid:12; //[12: 1]
+ jl_uint32 force_vid_valid:1; //[13:13]
+ jl_uint32 force_vid:12; //[25:14]
+ } bf;
+ jl_uint32 val[1];
+} INGRESS_VID_TRANSLATION_ACTION_t;
+
+#define VID_TO_VLAN_TABLE_TCAM_ANSWER_OFFSET ((jl_uint32)0x00002ACCU)
+#define VID_TO_VLAN_TABLE_TCAM_ANSWER_NUM ((jl_uint32)0x00000010U)
+typedef union VID_TO_VLAN_TABLE_TCAM_ANSWER_u {
+ struct {
+ jl_uint32 ptr:4; //[ 3: 0]
+ } bf;
+ jl_uint32 val[1];
+} VID_TO_VLAN_TABLE_TCAM_ANSWER_t;
+
+#define VID_TO_VLAN_TABLE_TCAM_OFFSET ((jl_uint32)0x00002ADCU)
+#define VID_TO_VLAN_TABLE_TCAM_NUM ((jl_uint32)0x00000010U)
+typedef union VID_TO_VLAN_TABLE_TCAM_u {
+ struct {
+ jl_uint32 valid:1; //[ 0: 0]
+ jl_uint32 ingress_vid_mask:12; //[12: 1]
+ jl_uint32 ingress_vid:12; //[24:13]
+ } bf;
+ jl_uint32 val[1];
+} VID_TO_VLAN_TABLE_TCAM_t;
+
+#define SMON_SET_SEARCH_OFFSET ((jl_uint32)0x00002AECU)
+#define SMON_SET_SEARCH_NUM ((jl_uint32)0x00000002U)
+typedef union SMON_SET_SEARCH_u {
+ struct {
+ jl_uint32 src_port:4; //[ 3: 0]
+ jl_uint32 vid:12; //[15: 4]
+ } bf;
+ jl_uint32 val[1];
+} SMON_SET_SEARCH_t;
+
+#define LLDP_CONFIGURATION_OFFSET ((jl_uint32)0x00002AEEU)
+#define LLDP_CONFIGURATION_NUM ((jl_uint32)0x00000001U)
+typedef union LLDP_CONFIGURATION_u {
+ struct {
+ jl_uint64 mac1:48; //[47: 0]
+ jl_uint64 mac2:48; //[95:48]
+ jl_uint64 mac3:48; //[143:96]
+ jl_uint64 eth:16; //[159:144]
+ jl_uint64 portmask:10; //[169:160]
+ } bf;
+ jl_uint32 val[8];
+} LLDP_CONFIGURATION_t;
+
+#define INGRESS_L2_ACL_MATCH_DATA_ENTRIES_OFFSET ((jl_uint32)0x00002AF6U)
+#define INGRESS_L2_ACL_MATCH_DATA_ENTRIES_NUM ((jl_uint32)0x00000020U)
+typedef union INGRESS_L2_ACL_MATCH_DATA_ENTRIES_u {
+ struct {
+ jl_uint64 compare_eth_type:1; //[ 0: 0]
+ jl_uint64 type_of_comparison_eth_type:1; //[ 1: 1]
+ jl_uint64 eth_type:16; //[17: 2]
+ jl_uint64 compare_da_mac:1; //[18:18]
+ jl_uint64 type_of_comparison_da_mac:1; //[19:19]
+ jl_uint64 da_mac:48; //[67:20]
+ jl_uint64 compare_sa_mac:1; //[68:68]
+ jl_uint64 type_of_comparison_sa_mac:1; //[69:69]
+ jl_uint64 sa_mac:48; //[117:70]
+ jl_uint64 compare_vid:1; //[118:118]
+ jl_uint64 type_of_comparison_vid:1; //[119:119]
+ jl_uint64 vid:12; //[131:120]
+ jl_uint64 compare_pcp:1; //[132:132]
+ jl_uint64 type_of_comparison_pcp:1; //[133:133]
+ jl_uint64 pcp:3; //[136:134]
+ jl_uint64 compare_dei:1; //[137:137]
+ jl_uint64 type_of_comparison_dei:1; //[138:138]
+ jl_uint64 dei:1; //[139:139]
+ jl_uint64 compare_has_vlans:1; //[140:140]
+ jl_uint64 type_of_comparison_has_vlans:1; //[141:141]
+ jl_uint64 has_vlans:1; //[142:142]
+ jl_uint64 compare_cstag:1; //[143:143]
+ jl_uint64 type_of_comparison_cstag:1; //[144:144]
+ jl_uint64 cstag:1; //[145:145]
+ jl_uint64 ports:10; //[155:146]
+ } bf;
+ jl_uint32 val[8];
+} INGRESS_L2_ACL_MATCH_DATA_ENTRIES_t;
+
+#define SMON_SET_0_PACKET_COUNTER_OFFSET ((jl_uint32)0x00002BF6U)
+#define SMON_SET_0_PACKET_COUNTER_NUM ((jl_uint32)0x00000008U)
+typedef union SMON_SET_0_PACKET_COUNTER_u {
+ struct {
+ jl_uint32 packets:24; //[23: 0]
+ } bf;
+ jl_uint32 val[1];
+} SMON_SET_0_PACKET_COUNTER_t;
+
+#define SMON_SET_1_PACKET_COUNTER_OFFSET ((jl_uint32)0x00002BFEU)
+#define SMON_SET_1_PACKET_COUNTER_NUM ((jl_uint32)0x00000008U)
+typedef union SMON_SET_1_PACKET_COUNTER_u {
+ struct {
+ jl_uint32 packets:24; //[23: 0]
+ } bf;
+ jl_uint32 val[1];
+} SMON_SET_1_PACKET_COUNTER_t;
+
+#define SMON_SET_0_BYTE_COUNTER_OFFSET ((jl_uint32)0x00002C06U)
+#define SMON_SET_0_BYTE_COUNTER_NUM ((jl_uint32)0x00000008U)
+typedef union SMON_SET_0_BYTE_COUNTER_u {
+ struct {
+ jl_uint32 bytes:24; //[23: 0]
+ } bf;
+ jl_uint32 val[1];
+} SMON_SET_0_BYTE_COUNTER_t;
+
+#define SMON_SET_1_BYTE_COUNTER_OFFSET ((jl_uint32)0x00002C0EU)
+#define SMON_SET_1_BYTE_COUNTER_NUM ((jl_uint32)0x00000008U)
+typedef union SMON_SET_1_BYTE_COUNTER_u {
+ struct {
+ jl_uint32 bytes:24; //[23: 0]
+ } bf;
+ jl_uint32 val[1];
+} SMON_SET_1_BYTE_COUNTER_t;
+
+#define INGRESS_L2_ACL_MATCH_COUNTER_OFFSET ((jl_uint32)0x00002C16U)
+#define INGRESS_L2_ACL_MATCH_COUNTER_NUM ((jl_uint32)0x00000020U)
+typedef union INGRESS_L2_ACL_MATCH_COUNTER_u {
+ struct {
+ jl_uint32 packets:24; //[23: 0]
+ } bf;
+ jl_uint32 val[1];
+} INGRESS_L2_ACL_MATCH_COUNTER_t;
+
+#define QUEUE_OFF_DROP_OFFSET ((jl_uint32)0x00002C36U)
+#define QUEUE_OFF_DROP_NUM ((jl_uint32)0x0000000AU)
+typedef union QUEUE_OFF_DROP_u {
+ struct {
+ jl_uint32 packets:24; //[23: 0]
+ } bf;
+ jl_uint32 val[1];
+} QUEUE_OFF_DROP_t;
+
+#define EGRESS_SPANNING_TREE_DROP_OFFSET ((jl_uint32)0x00002C40U)
+#define EGRESS_SPANNING_TREE_DROP_NUM ((jl_uint32)0x0000000AU)
+typedef union EGRESS_SPANNING_TREE_DROP_u {
+ struct {
+ jl_uint32 packets:24; //[23: 0]
+ } bf;
+ jl_uint32 val[1];
+} EGRESS_SPANNING_TREE_DROP_t;
+
+#define MBSC_DROP_OFFSET ((jl_uint32)0x00002C4AU)
+#define MBSC_DROP_NUM ((jl_uint32)0x0000000AU)
+typedef union MBSC_DROP_u {
+ struct {
+ jl_uint32 packets:24; //[23: 0]
+ } bf;
+ jl_uint32 val[1];
+} MBSC_DROP_t;
+
+#define EGRESS_RESOURCE_MANAGEMENT_MARGIN_OFFSET ((jl_uint32)0x00002C54U)
+#define EGRESS_RESOURCE_MANAGEMENT_MARGIN_NUM ((jl_uint32)0x00000001U)
+typedef union EGRESS_RESOURCE_MANAGEMENT_MARGIN_u {
+ struct {
+ jl_uint32 global_margin:10; //[ 9: 0]
+ jl_uint32 ffa_margin:10; //[19:10]
+ } bf;
+ jl_uint32 val[1];
+} EGRESS_RESOURCE_MANAGEMENT_MARGIN_t;
+
+#define EGRESS_RESOURCE_MANAGEMENT_MODE_OFFSET ((jl_uint32)0x00002C55U)
+#define EGRESS_RESOURCE_MANAGEMENT_MODE_NUM ((jl_uint32)0x0000000BU)
+typedef union EGRESS_RESOURCE_MANAGEMENT_MODE_u {
+ struct {
+ jl_uint32 mode:1; //[ 0: 0]
+ jl_uint32 eql_ptr:2; //[ 2: 1]
+ jl_uint32 eqg_ptr:2; //[ 4: 3]
+ } bf;
+ jl_uint32 val[1];
+} EGRESS_RESOURCE_MANAGEMENT_MODE_t;
+
+#define EGRESS_QUEUE_GUARANTEE_SET_OFFSET ((jl_uint32)0x00002C60U)
+#define EGRESS_QUEUE_GUARANTEE_SET_NUM ((jl_uint32)0x00000004U)
+typedef union EGRESS_QUEUE_GUARANTEE_SET_u {
+ struct {
+ jl_uint32 guarantee:10; //[ 9: 0]
+ } bf;
+ jl_uint32 val[1];
+} EGRESS_QUEUE_GUARANTEE_SET_t;
+
+#define RESOURCE_LIMITER_SET_0_OFFSET ((jl_uint32)0x00002C64U)
+#define RESOURCE_LIMITER_SET_0_NUM ((jl_uint32)0x00000004U)
+typedef union RESOURCE_LIMITER_SET_0_u {
+ struct {
+ jl_uint32 xon:10; //[ 9: 0]
+ jl_uint32 threshold:10; //[19:10]
+ } bf;
+ jl_uint32 val[1];
+} RESOURCE_LIMITER_SET_0_t;
+
+#define RESOURCE_LIMITER_SET_1_OFFSET ((jl_uint32)0x00002C68U)
+#define RESOURCE_LIMITER_SET_1_NUM ((jl_uint32)0x00000004U)
+typedef union RESOURCE_LIMITER_SET_1_u {
+ struct {
+ jl_uint32 xon:10; //[ 9: 0]
+ jl_uint32 threshold:10; //[19:10]
+ } bf;
+ jl_uint32 val[1];
+} RESOURCE_LIMITER_SET_1_t;
+
+#define RESOURCE_LIMITER_SET_2_OFFSET ((jl_uint32)0x00002C6CU)
+#define RESOURCE_LIMITER_SET_2_NUM ((jl_uint32)0x00000004U)
+typedef union RESOURCE_LIMITER_SET_2_u {
+ struct {
+ jl_uint32 xon:10; //[ 9: 0]
+ jl_uint32 threshold:10; //[19:10]
+ } bf;
+ jl_uint32 val[1];
+} RESOURCE_LIMITER_SET_2_t;
+
+#define RESOURCE_LIMITER_SET_3_OFFSET ((jl_uint32)0x00002C70U)
+#define RESOURCE_LIMITER_SET_3_NUM ((jl_uint32)0x00000004U)
+typedef union RESOURCE_LIMITER_SET_3_u {
+ struct {
+ jl_uint32 xon:10; //[ 9: 0]
+ jl_uint32 threshold:10; //[19:10]
+ } bf;
+ jl_uint32 val[1];
+} RESOURCE_LIMITER_SET_3_t;
+
+#define EGRESS_RESOURCE_MANAGEMENT_DROP_OFFSET ((jl_uint32)0x00002C74U)
+#define EGRESS_RESOURCE_MANAGEMENT_DROP_NUM ((jl_uint32)0x0000000AU)
+typedef union EGRESS_RESOURCE_MANAGEMENT_DROP_u {
+ struct {
+ jl_uint32 packets:24; //[23: 0]
+ } bf;
+ jl_uint32 val[1];
+} EGRESS_RESOURCE_MANAGEMENT_DROP_t;
+
+#define PACKET_BUFFER_STATUS_OFFSET ((jl_uint32)0x00002C7EU)
+#define PACKET_BUFFER_STATUS_NUM ((jl_uint32)0x00000001U)
+typedef union PACKET_BUFFER_STATUS_u {
+ struct {
+ jl_uint32 empty:10; //[ 9: 0]
+ } bf;
+ jl_uint32 val[1];
+} PACKET_BUFFER_STATUS_t;
+
+#define BUFFER_OVERFLOW_DROP_OFFSET ((jl_uint32)0x00002C7FU)
+#define BUFFER_OVERFLOW_DROP_NUM ((jl_uint32)0x00000001U)
+typedef union BUFFER_OVERFLOW_DROP_u {
+ struct {
+ jl_uint32 packets:24; //[23: 0]
+ } bf;
+ jl_uint32 val[1];
+} BUFFER_OVERFLOW_DROP_t;
+
+#define INGRESS_RESOURCE_MANAGER_DROP_OFFSET ((jl_uint32)0x00002C80U)
+#define INGRESS_RESOURCE_MANAGER_DROP_NUM ((jl_uint32)0x00000001U)
+typedef union INGRESS_RESOURCE_MANAGER_DROP_u {
+ struct {
+ jl_uint32 packets:24; //[23: 0]
+ } bf;
+ jl_uint32 val[1];
+} INGRESS_RESOURCE_MANAGER_DROP_t;
+
+#define MAP_QUEUE_TO_PRIORITY_OFFSET ((jl_uint32)0x00002C81U)
+#define MAP_QUEUE_TO_PRIORITY_NUM ((jl_uint32)0x0000000AU)
+typedef union MAP_QUEUE_TO_PRIORITY_u {
+ struct {
+ jl_uint32 prio0:2; //[ 1: 0]
+ jl_uint32 prio1:2; //[ 3: 2]
+ jl_uint32 prio2:2; //[ 5: 4]
+ jl_uint32 prio3:2; //[ 7: 6]
+ } bf;
+ jl_uint32 val[1];
+} MAP_QUEUE_TO_PRIORITY_t;
+
+#define RE_QUEUE_OVERFLOW_DROP_OFFSET ((jl_uint32)0x00002C8BU)
+#define RE_QUEUE_OVERFLOW_DROP_NUM ((jl_uint32)0x00000001U)
+typedef union RE_QUEUE_OVERFLOW_DROP_u {
+ struct {
+ jl_uint32 packets:24; //[23: 0]
+ } bf;
+ jl_uint32 val[1];
+} RE_QUEUE_OVERFLOW_DROP_t;
+
+#define PORT_RESERVED_OFFSET ((jl_uint32)0x00002C8CU)
+#define PORT_RESERVED_NUM ((jl_uint32)0x0000000AU)
+typedef union PORT_RESERVED_u {
+ struct {
+ jl_uint32 cells:10; //[ 9: 0]
+ } bf;
+ jl_uint32 val[1];
+} PORT_RESERVED_t;
+
+#define PORT_USED_OFFSET ((jl_uint32)0x00002C96U)
+#define PORT_USED_NUM ((jl_uint32)0x0000000AU)
+typedef union PORT_USED_u {
+ struct {
+ jl_uint32 cells:10; //[ 9: 0]
+ } bf;
+ jl_uint32 val[1];
+} PORT_USED_t;
+
+#define FFA_USED_OFFSET ((jl_uint32)0x00002CA0U)
+#define FFA_USED_NUM ((jl_uint32)0x00000001U)
+typedef union FFA_USED_u {
+ struct {
+ jl_uint32 cells:10; //[ 9: 0]
+ } bf;
+ jl_uint32 val[1];
+} FFA_USED_t;
+
+#define PORT_PAUSE_SETTINGS_OFFSET ((jl_uint32)0x00002CA1U)
+#define PORT_PAUSE_SETTINGS_NUM ((jl_uint32)0x0000000AU)
+typedef union PORT_PAUSE_SETTINGS_u {
+ struct {
+ jl_uint32 enable:1; //[ 0: 0]
+ jl_uint32 force:1; //[ 1: 1]
+ jl_uint32 pattern:1; //[ 2: 2]
+ } bf;
+ jl_uint32 val[1];
+} PORT_PAUSE_SETTINGS_t;
+
+#define PORT_TAIL_DROP_SETTINGS_OFFSET ((jl_uint32)0x00002CABU)
+#define PORT_TAIL_DROP_SETTINGS_NUM ((jl_uint32)0x0000000AU)
+typedef union PORT_TAIL_DROP_SETTINGS_u {
+ struct {
+ jl_uint32 enable:1; //[ 0: 0]
+ } bf;
+ jl_uint32 val[1];
+} PORT_TAIL_DROP_SETTINGS_t;
+
+#define XON_FFA_THRESHOLD_OFFSET ((jl_uint32)0x00002CB5U)
+#define XON_FFA_THRESHOLD_NUM ((jl_uint32)0x00000001U)
+typedef union XON_FFA_THRESHOLD_u {
+ struct {
+ jl_uint32 cells:10; //[ 9: 0]
+ } bf;
+ jl_uint32 val[1];
+} XON_FFA_THRESHOLD_t;
+
+#define XOFF_FFA_THRESHOLD_OFFSET ((jl_uint32)0x00002CB6U)
+#define XOFF_FFA_THRESHOLD_NUM ((jl_uint32)0x00000001U)
+typedef union XOFF_FFA_THRESHOLD_u {
+ struct {
+ jl_uint32 cells:10; //[ 9: 0]
+ jl_uint32 enable:1; //[10:10]
+ jl_uint32 trip:1; //[11:11]
+ } bf;
+ jl_uint32 val[1];
+} XOFF_FFA_THRESHOLD_t;
+
+#define TAIL_DROP_FFA_THRESHOLD_OFFSET ((jl_uint32)0x00002CB7U)
+#define TAIL_DROP_FFA_THRESHOLD_NUM ((jl_uint32)0x00000001U)
+typedef union TAIL_DROP_FFA_THRESHOLD_u {
+ struct {
+ jl_uint32 cells:10; //[ 9: 0]
+ jl_uint32 enable:1; //[10:10]
+ jl_uint32 trip:1; //[11:11]
+ } bf;
+ jl_uint32 val[1];
+} TAIL_DROP_FFA_THRESHOLD_t;
+
+#define PORT_XON_FFA_THRESHOLD_OFFSET ((jl_uint32)0x00002CB8U)
+#define PORT_XON_FFA_THRESHOLD_NUM ((jl_uint32)0x0000000AU)
+typedef union PORT_XON_FFA_THRESHOLD_u {
+ struct {
+ jl_uint32 cells:10; //[ 9: 0]
+ } bf;
+ jl_uint32 val[1];
+} PORT_XON_FFA_THRESHOLD_t;
+
+#define PORT_XOFF_FFA_THRESHOLD_OFFSET ((jl_uint32)0x00002CC2U)
+#define PORT_XOFF_FFA_THRESHOLD_NUM ((jl_uint32)0x0000000AU)
+typedef union PORT_XOFF_FFA_THRESHOLD_u {
+ struct {
+ jl_uint32 cells:10; //[ 9: 0]
+ jl_uint32 enable:1; //[10:10]
+ jl_uint32 trip:1; //[11:11]
+ } bf;
+ jl_uint32 val[1];
+} PORT_XOFF_FFA_THRESHOLD_t;
+
+#define PORT_TAIL_DROP_FFA_THRESHOLD_OFFSET ((jl_uint32)0x00002CCCU)
+#define PORT_TAIL_DROP_FFA_THRESHOLD_NUM ((jl_uint32)0x0000000AU)
+typedef union PORT_TAIL_DROP_FFA_THRESHOLD_u {
+ struct {
+ jl_uint32 cells:10; //[ 9: 0]
+ jl_uint32 enable:1; //[10:10]
+ jl_uint32 trip:1; //[11:11]
+ } bf;
+ jl_uint32 val[1];
+} PORT_TAIL_DROP_FFA_THRESHOLD_t;
+
+#define EGRESS_PORT_DEPTH_OFFSET ((jl_uint32)0x00002CD6U)
+#define EGRESS_PORT_DEPTH_NUM ((jl_uint32)0x0000000AU)
+typedef union EGRESS_PORT_DEPTH_u {
+ struct {
+ jl_uint32 packets:10; //[ 9: 0]
+ } bf;
+ jl_uint32 val[1];
+} EGRESS_PORT_DEPTH_t;
+
+#define EGRESS_QUEUE_DEPTH_OFFSET ((jl_uint32)0x00002CE0U)
+#define EGRESS_QUEUE_DEPTH_NUM ((jl_uint32)0x00000028U)
+typedef union EGRESS_QUEUE_DEPTH_u {
+ struct {
+ jl_uint32 packets:10; //[ 9: 0]
+ } bf;
+ jl_uint32 val[1];
+} EGRESS_QUEUE_DEPTH_t;
+
+#define MINIMUM_BUFFER_FREE_OFFSET ((jl_uint32)0x00002D08U)
+#define MINIMUM_BUFFER_FREE_NUM ((jl_uint32)0x00000001U)
+typedef union MINIMUM_BUFFER_FREE_u {
+ struct {
+ jl_uint32 cells:10; //[ 9: 0]
+ } bf;
+ jl_uint32 val[1];
+} MINIMUM_BUFFER_FREE_t;
+
+#define OUTPUT_DISABLE_OFFSET ((jl_uint32)0x00002D09U)
+#define OUTPUT_DISABLE_NUM ((jl_uint32)0x0000000AU)
+typedef union OUTPUT_DISABLE_u {
+ struct {
+ jl_uint32 egress_queue0_disabled:1; //[ 0: 0]
+ jl_uint32 egress_queue1_disabled:1; //[ 1: 1]
+ jl_uint32 egress_queue2_disabled:1; //[ 2: 2]
+ jl_uint32 egress_queue3_disabled:1; //[ 3: 3]
+ } bf;
+ jl_uint32 val[1];
+} OUTPUT_DISABLE_t;
+
+#define DWRR_BUCKET_CAPACITY_CONFIGURATION_OFFSET ((jl_uint32)0x00002D13U)
+#define DWRR_BUCKET_CAPACITY_CONFIGURATION_NUM ((jl_uint32)0x0000000AU)
+typedef union DWRR_BUCKET_CAPACITY_CONFIGURATION_u {
+ struct {
+ jl_uint32 bucket_capacity:18; //[17: 0]
+ } bf;
+ jl_uint32 val[1];
+} DWRR_BUCKET_CAPACITY_CONFIGURATION_t;
+
+#define DWRR_BUCKET_MISC_CONFIGURATION_OFFSET ((jl_uint32)0x00002D1DU)
+#define DWRR_BUCKET_MISC_CONFIGURATION_NUM ((jl_uint32)0x0000000AU)
+typedef union DWRR_BUCKET_MISC_CONFIGURATION_u {
+ struct {
+ jl_uint32 threshold:5; //[ 4: 0]
+ jl_uint32 packets_not_bytes:1; //[ 5: 5]
+ jl_uint32 ifg_correction:8; //[13: 6]
+ } bf;
+ jl_uint32 val[1];
+} DWRR_BUCKET_MISC_CONFIGURATION_t;
+
+#define DWRR_WEIGHT_CONFIGURATION_OFFSET ((jl_uint32)0x00002D27U)
+#define DWRR_WEIGHT_CONFIGURATION_NUM ((jl_uint32)0x00000028U)
+typedef union DWRR_WEIGHT_CONFIGURATION_u {
+ struct {
+ jl_uint32 weight:8; //[ 7: 0]
+ } bf;
+ jl_uint32 val[1];
+} DWRR_WEIGHT_CONFIGURATION_t;
+
+#define PB_PACKET_HEAD_COUNTER_OFFSET ((jl_uint32)0x00002D4FU)
+#define PB_PACKET_HEAD_COUNTER_NUM ((jl_uint32)0x00000001U)
+typedef union PB_PACKET_HEAD_COUNTER_u {
+ struct {
+ jl_uint32 packets:24; //[23: 0]
+ } bf;
+ jl_uint32 val[1];
+} PB_PACKET_HEAD_COUNTER_t;
+
+#define PB_PACKET_TAIL_COUNTER_OFFSET ((jl_uint32)0x00002D50U)
+#define PB_PACKET_TAIL_COUNTER_NUM ((jl_uint32)0x00000001U)
+typedef union PB_PACKET_TAIL_COUNTER_u {
+ struct {
+ jl_uint32 packets:24; //[23: 0]
+ } bf;
+ jl_uint32 val[1];
+} PB_PACKET_TAIL_COUNTER_t;
+
+#define DRAIN_PORT_OFFSET ((jl_uint32)0x00002D51U)
+#define DRAIN_PORT_NUM ((jl_uint32)0x00000001U)
+typedef union DRAIN_PORT_u {
+ struct {
+ jl_uint32 drain_mask:10; //[ 9: 0]
+ } bf;
+ jl_uint32 val[1];
+} DRAIN_PORT_t;
+
+#define DRAIN_PORT_DROP_OFFSET ((jl_uint32)0x00002D52U)
+#define DRAIN_PORT_DROP_NUM ((jl_uint32)0x0000000AU)
+typedef union DRAIN_PORT_DROP_u {
+ struct {
+ jl_uint32 packets:24; //[23: 0]
+ } bf;
+ jl_uint32 val[1];
+} DRAIN_PORT_DROP_t;
+
+#define UNKNOWN_EGRESS_DROP_OFFSET ((jl_uint32)0x00002D5CU)
+#define UNKNOWN_EGRESS_DROP_NUM ((jl_uint32)0x0000000AU)
+typedef union UNKNOWN_EGRESS_DROP_u {
+ struct {
+ jl_uint32 packets:24; //[23: 0]
+ } bf;
+ jl_uint32 val[1];
+} UNKNOWN_EGRESS_DROP_t;
+
+#define EGRESS_PORT_DISABLED_DROP_OFFSET ((jl_uint32)0x00002D66U)
+#define EGRESS_PORT_DISABLED_DROP_NUM ((jl_uint32)0x0000000AU)
+typedef union EGRESS_PORT_DISABLED_DROP_u {
+ struct {
+ jl_uint32 packets:24; //[23: 0]
+ } bf;
+ jl_uint32 val[1];
+} EGRESS_PORT_DISABLED_DROP_t;
+
+#define EPP_PM_DROP_OFFSET ((jl_uint32)0x00002D70U)
+#define EPP_PM_DROP_NUM ((jl_uint32)0x00000001U)
+typedef union EPP_PM_DROP_u {
+ struct {
+ jl_uint32 packets:24; //[23: 0]
+ } bf;
+ jl_uint32 val[1];
+} EPP_PM_DROP_t;
+
+#define EPP_PACKET_HEAD_COUNTER_OFFSET ((jl_uint32)0x00002D71U)
+#define EPP_PACKET_HEAD_COUNTER_NUM ((jl_uint32)0x00000001U)
+typedef union EPP_PACKET_HEAD_COUNTER_u {
+ struct {
+ jl_uint32 packets:24; //[23: 0]
+ } bf;
+ jl_uint32 val[1];
+} EPP_PACKET_HEAD_COUNTER_t;
+
+#define EPP_PACKET_TAIL_COUNTER_OFFSET ((jl_uint32)0x00002D72U)
+#define EPP_PACKET_TAIL_COUNTER_NUM ((jl_uint32)0x00000001U)
+typedef union EPP_PACKET_TAIL_COUNTER_u {
+ struct {
+ jl_uint32 packets:24; //[23: 0]
+ } bf;
+ jl_uint32 val[1];
+} EPP_PACKET_TAIL_COUNTER_t;
+
+#define EGRESS_PORT_CONFIGURATION_OFFSET ((jl_uint32)0x00002D73U)
+#define EGRESS_PORT_CONFIGURATION_NUM ((jl_uint32)0x0000000AU)
+typedef union EGRESS_PORT_CONFIGURATION_u {
+ struct {
+ jl_uint32 vlan_single_op:3; //[ 2: 0]
+ jl_uint32 type_sel:2; //[ 4: 3]
+ jl_uint32 vid_sel:2; //[ 6: 5]
+ jl_uint32 cfi_dei_sel:2; //[ 8: 7]
+ jl_uint32 pcp_sel:2; //[10: 9]
+ jl_uint32 vid:12; //[22:11]
+ jl_uint32 cfi_dei:1; //[23:23]
+ jl_uint32 pcp:3; //[26:24]
+ jl_uint32 disabled:1; //[27:27]
+ } bf;
+ jl_uint32 val[1];
+} EGRESS_PORT_CONFIGURATION_t;
+
+#define EGRESS_QUEUE_TO_PCP_AND_CFI_DEI_MAPPING_TABLE_OFFSET ((jl_uint32)0x00002D7DU)
+#define EGRESS_QUEUE_TO_PCP_AND_CFI_DEI_MAPPING_TABLE_NUM ((jl_uint32)0x00000004U)
+typedef union EGRESS_QUEUE_TO_PCP_AND_CFI_DEI_MAPPING_TABLE_u {
+ struct {
+ jl_uint32 cfi_dei:1; //[ 0: 0]
+ jl_uint32 pcp:3; //[ 3: 1]
+ } bf;
+ jl_uint32 val[1];
+} EGRESS_QUEUE_TO_PCP_AND_CFI_DEI_MAPPING_TABLE_t;
+
+#define OUTPUT_MIRRORING_TABLE_OFFSET ((jl_uint32)0x00002D81U)
+#define OUTPUT_MIRRORING_TABLE_NUM ((jl_uint32)0x0000000AU)
+typedef union OUTPUT_MIRRORING_TABLE_u {
+ struct {
+ jl_uint32 output_mirror_enabled:1; //[ 0: 0]
+ jl_uint32 output_mirror_port:4; //[ 4: 1]
+ } bf;
+ jl_uint32 val[1];
+} OUTPUT_MIRRORING_TABLE_t;
+
+#define EGRESS_ETHERNET_TYPE_FOR_VLAN_TAG_OFFSET ((jl_uint32)0x00002D8BU)
+#define EGRESS_ETHERNET_TYPE_FOR_VLAN_TAG_NUM ((jl_uint32)0x00000001U)
+typedef union EGRESS_ETHERNET_TYPE_FOR_VLAN_TAG_u {
+ struct {
+ jl_uint32 type_value:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} EGRESS_ETHERNET_TYPE_FOR_VLAN_TAG_t;
+
+#define DISABLE_CPU_TAG_ON_CPU_PORT_OFFSET ((jl_uint32)0x00002D8CU)
+#define DISABLE_CPU_TAG_ON_CPU_PORT_NUM ((jl_uint32)0x00000001U)
+typedef union DISABLE_CPU_TAG_ON_CPU_PORT_u {
+ struct {
+ jl_uint32 disable:1; //[ 0: 0]
+ } bf;
+ jl_uint32 val[1];
+} DISABLE_CPU_TAG_ON_CPU_PORT_t;
+
+#define PS_ERROR_COUNTER_OFFSET ((jl_uint32)0x00002D8DU)
+#define PS_ERROR_COUNTER_NUM ((jl_uint32)0x0000000AU)
+typedef union PS_ERROR_COUNTER_u {
+ struct {
+ jl_uint64 underrun:24; //[23: 0]
+ jl_uint64 overflow:24; //[47:24]
+ } bf;
+ jl_uint32 val[2];
+} PS_ERROR_COUNTER_t;
+
+#define PS_PACKET_HEAD_COUNTER_OFFSET ((jl_uint32)0x00002DA1U)
+#define PS_PACKET_HEAD_COUNTER_NUM ((jl_uint32)0x00000001U)
+typedef union PS_PACKET_HEAD_COUNTER_u {
+ struct {
+ jl_uint32 packets:24; //[23: 0]
+ } bf;
+ jl_uint32 val[1];
+} PS_PACKET_HEAD_COUNTER_t;
+
+#define PS_PACKET_TAIL_COUNTER_OFFSET ((jl_uint32)0x00002DA2U)
+#define PS_PACKET_TAIL_COUNTER_NUM ((jl_uint32)0x00000001U)
+typedef union PS_PACKET_TAIL_COUNTER_u {
+ struct {
+ jl_uint32 packets:24; //[23: 0]
+ } bf;
+ jl_uint32 val[1];
+} PS_PACKET_TAIL_COUNTER_t;
+
+#endif /* __JL_REG_SWCORE_H__ */
+
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/reg_top.h b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/reg_top.h
new file mode 100644
index 0000000..452dfb5
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl51xx/reg_top.h
@@ -0,0 +1,732 @@
+//reg_top.h
+/*
+* Automatically generated by gen_c_api.py, don't edit it
+*/
+#ifndef __JL_REG_TOP_H__
+#define __JL_REG_TOP_H__
+
+#include <jl_types.h>
+#include "jl51xx/jl51xx_drv_switch.h"
+
+#define TOP_BASE ((jl_uint32)0x00000000U)
+#define TOP_BLOCK_SIZE ((jl_uint32)0x00200000U)
+
+#define MAC0_USER_CTRL_OFFSET ((jl_uint32)0x00000070U)
+#define MAC0_USER_CTRL_NUM ((jl_uint32)0x00000001U)
+typedef union MAC0_USER_CTRL_u {
+ struct {
+ jl_uint32 mac_is_link:1; //[0: 0]
+ jl_uint32 mac_duplex:1; //[1: 1]
+ jl_uint32 mac_speed:1; //[2: 2]
+ jl_uint32 unused0:1; //[3: 3]
+ jl_uint32 mac_tx_fc_en:1; //[4: 4]
+ jl_uint32 mac_rx_fc_en:1; //[5: 5]
+ jl_uint32 unused1:1; //[6: 6]
+ jl_uint32 mac_force_fc_en:1; //[7: 7]
+ jl_uint32 unused2:5; //[8: 12]
+ jl_uint32 mac_rma_mode:1; //[13: 13]
+ jl_uint32 mac_force_status_en:1; //[14: 14]
+ jl_uint32 mac_sw_rst:1; //[15: 15]
+ jl_uint32 unused3:16; //[16: 31]
+ } bf;
+ jl_uint32 val[1];
+} MAC0_USER_CTRL_t;
+
+#define MAC1_USER_CTRL_OFFSET ((jl_uint32)0x00000071U)
+#define MAC1_USER_CTRL_NUM ((jl_uint32)0x00000001U)
+typedef union MAC1_USER_CTRL_u {
+ struct {
+ jl_uint32 mac1_user_ctrl:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} MAC1_USER_CTRL_t;
+
+#define MAC2_USER_CTRL_OFFSET ((jl_uint32)0x00000072U)
+#define MAC2_USER_CTRL_NUM ((jl_uint32)0x00000001U)
+typedef union MAC2_USER_CTRL_u {
+ struct {
+ jl_uint32 mac2_user_ctrl:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} MAC2_USER_CTRL_t;
+
+#define MAC3_USER_CTRL_OFFSET ((jl_uint32)0x00000073U)
+#define MAC3_USER_CTRL_NUM ((jl_uint32)0x00000001U)
+typedef union MAC3_USER_CTRL_u {
+ struct {
+ jl_uint32 mac3_user_ctrl:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} MAC3_USER_CTRL_t;
+
+#define MAC4_USER_CTRL_OFFSET ((jl_uint32)0x00000074U)
+#define MAC4_USER_CTRL_NUM ((jl_uint32)0x00000001U)
+typedef union MAC4_USER_CTRL_u {
+ struct {
+ jl_uint32 mac4_user_ctrl:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} MAC4_USER_CTRL_t;
+
+#define MAC5_USER_CTRL_OFFSET ((jl_uint32)0x00000075U)
+#define MAC5_USER_CTRL_NUM ((jl_uint32)0x00000001U)
+typedef union MAC5_USER_CTRL_u {
+ struct {
+ jl_uint32 mac5_user_ctrl:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} MAC5_USER_CTRL_t;
+
+#define MAC6_USER_CTRL_OFFSET ((jl_uint32)0x00000076U)
+#define MAC6_USER_CTRL_NUM ((jl_uint32)0x00000001U)
+typedef union MAC6_USER_CTRL_u {
+ struct {
+ jl_uint32 mac6_user_ctrl:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} MAC6_USER_CTRL_t;
+
+#define MAC7_USER_CTRL_OFFSET ((jl_uint32)0x00000077U)
+#define MAC7_USER_CTRL_NUM ((jl_uint32)0x00000001U)
+typedef union MAC7_USER_CTRL_u {
+ struct {
+ jl_uint32 mac7_user_ctrl:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} MAC7_USER_CTRL_t;
+
+#define MAC8_USER_CTRL_OFFSET ((jl_uint32)0x00000078U)
+#define MAC8_USER_CTRL_NUM ((jl_uint32)0x00000001U)
+typedef union MAC8_USER_CTRL_u {
+ struct {
+ jl_uint32 mac8_user_ctrl:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} MAC8_USER_CTRL_t;
+
+#define MAC9_USER_CTRL_OFFSET ((jl_uint32)0x00000079U)
+#define MAC9_USER_CTRL_NUM ((jl_uint32)0x00000001U)
+typedef union MAC9_USER_CTRL_u {
+ struct {
+ jl_uint32 mac9_user_ctrl:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} MAC9_USER_CTRL_t;
+
+#define LOAD_GO_OFFSET ((jl_uint32)0x000000F0U)
+#define LOAD_GO_NUM ((jl_uint32)0x00000001U)
+typedef union LOAD_GO_u {
+ struct {
+ jl_uint32 load_go:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} LOAD_GO_t;
+
+#define LOAD_DATA0_OFFSET ((jl_uint32)0x000000F1U)
+#define LOAD_DATA0_NUM ((jl_uint32)0x00000001U)
+typedef union LOAD_DATA0_u {
+ struct {
+ jl_uint32 load_data0:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} LOAD_DATA0_t;
+
+#define LOAD_DATA1_OFFSET ((jl_uint32)0x000000F2U)
+#define LOAD_DATA1_NUM ((jl_uint32)0x00000001U)
+typedef union LOAD_DATA1_u {
+ struct {
+ jl_uint32 load_data1:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} LOAD_DATA1_t;
+
+#define LOAD_DATA2_OFFSET ((jl_uint32)0x000000F3U)
+#define LOAD_DATA2_NUM ((jl_uint32)0x00000001U)
+typedef union LOAD_DATA2_u {
+ struct {
+ jl_uint32 load_data2:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} LOAD_DATA2_t;
+
+#define LOAD_DATA3_OFFSET ((jl_uint32)0x000000F4U)
+#define LOAD_DATA3_NUM ((jl_uint32)0x00000001U)
+typedef union LOAD_DATA3_u {
+ struct {
+ jl_uint32 load_data3:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} LOAD_DATA3_t;
+
+#define LOAD_DATA4_OFFSET ((jl_uint32)0x000000F5U)
+#define LOAD_DATA4_NUM ((jl_uint32)0x00000001U)
+typedef union LOAD_DATA4_u {
+ struct {
+ jl_uint32 load_data4:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} LOAD_DATA4_t;
+
+#define LOAD_DATA5_OFFSET ((jl_uint32)0x000000F6U)
+#define LOAD_DATA5_NUM ((jl_uint32)0x00000001U)
+typedef union LOAD_DATA5_u {
+ struct {
+ jl_uint32 load_data5:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} LOAD_DATA5_t;
+
+#define LOAD_DATA6_OFFSET ((jl_uint32)0x000000F7U)
+#define LOAD_DATA6_NUM ((jl_uint32)0x00000001U)
+typedef union LOAD_DATA6_u {
+ struct {
+ jl_uint32 load_data6:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} LOAD_DATA6_t;
+
+#define LOAD_DATA7_OFFSET ((jl_uint32)0x000000F8U)
+#define LOAD_DATA7_NUM ((jl_uint32)0x00000001U)
+typedef union LOAD_DATA7_u {
+ struct {
+ jl_uint32 load_data7:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} LOAD_DATA7_t;
+
+#define CPU_ENC_ADDR_OFFSET ((jl_uint32)0x000000FCU)
+#define CPU_ENC_ADDR_NUM ((jl_uint32)0x00000001U)
+typedef union CPU_ENC_ADDR_u {
+ struct {
+ jl_uint32 cpu_enc_addr:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} CPU_ENC_ADDR_t;
+
+#define CPU_PC_HIGH_OFFSET ((jl_uint32)0x000000FDU)
+#define CPU_PC_HIGH_NUM ((jl_uint32)0x00000001U)
+typedef union CPU_PC_HIGH_u {
+ struct {
+ jl_uint32 cpu_pc_hi:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} CPU_PC_HIGH_t;
+
+#define CPU_PC_LOW_OFFSET ((jl_uint32)0x000000FEU)
+#define CPU_PC_LOW_NUM ((jl_uint32)0x00000001U)
+typedef union CPU_PC_LOW_u {
+ struct {
+ jl_uint32 cpu_pc_lo:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} CPU_PC_LOW_t;
+
+#define TIMER_MATCH_OFFSET ((jl_uint32)0x00000110U)
+#define TIMER_MATCH_NUM ((jl_uint32)0x00000001U)
+typedef union TIMER_MATCH_u {
+ struct {
+ jl_uint32 timer_match:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} TIMER_MATCH_t;
+
+#define TIMER_OFFSET ((jl_uint32)0x00000111U)
+#define TIMER_NUM ((jl_uint32)0x00000001U)
+typedef union TIMER_u {
+ struct {
+ jl_uint32 timer:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} TIMER_t;
+
+#define TIMER_CFG_OFFSET ((jl_uint32)0x00000112U)
+#define TIMER_CFG_NUM ((jl_uint32)0x00000001U)
+typedef union TIMER_CFG_u {
+ struct {
+ jl_uint32 timer_interval:2; //[ 1: 0]
+ jl_uint32 timer_clr:1; //[ 2: 2]
+ jl_uint32 timer_en:1; //[ 3: 3]
+ jl_uint32 timer_mode:1; //[ 4: 4]
+ } bf;
+ jl_uint32 val[1];
+} TIMER_CFG_t;
+
+#define WATCH_OFFSET ((jl_uint32)0x00000113U)
+#define WATCH_NUM ((jl_uint32)0x00000001U)
+typedef union WATCH_u {
+ struct {
+ jl_uint32 watchdog_en:1; //[ 0: 0]
+ jl_uint32 cpu_reset:1; //[ 1: 1]
+ } bf;
+ jl_uint32 val[1];
+} WATCH_t;
+
+#define SW_RSVD0_OFFSET ((jl_uint32)0x00000150U)
+#define SW_RSVD0_NUM ((jl_uint32)0x00000001U)
+typedef union SW_RSVD0_u {
+ struct {
+ jl_uint32 sw_rsvd0:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} SW_RSVD0_t;
+
+#define SW_RSVD1_OFFSET ((jl_uint32)0x00000151U)
+#define SW_RSVD1_NUM ((jl_uint32)0x00000001U)
+typedef union SW_RSVD1_u {
+ struct {
+ jl_uint32 sw_rsvd1:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} SW_RSVD1_t;
+
+#define SW_RSVD2_OFFSET ((jl_uint32)0x00000152U)
+#define SW_RSVD2_NUM ((jl_uint32)0x00000001U)
+typedef union SW_RSVD2_u {
+ struct {
+ jl_uint32 sw_rsvd2:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} SW_RSVD2_t;
+
+#define SW_RSVD3_OFFSET ((jl_uint32)0x00000153U)
+#define SW_RSVD3_NUM ((jl_uint32)0x00000001U)
+typedef union SW_RSVD3_u {
+ struct {
+ jl_uint32 sw_rsvd3:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} SW_RSVD3_t;
+
+#define SW_RSVD4_OFFSET ((jl_uint32)0x00000154U)
+#define SW_RSVD4_NUM ((jl_uint32)0x00000001U)
+typedef union SW_RSVD4_u {
+ struct {
+ jl_uint32 sw_rsvd4:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} SW_RSVD4_t;
+
+#define SW_RSVD5_OFFSET ((jl_uint32)0x00000155U)
+#define SW_RSVD5_NUM ((jl_uint32)0x00000001U)
+typedef union SW_RSVD5_u {
+ struct {
+ jl_uint32 sw_rsvd5:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} SW_RSVD5_t;
+
+#define SW_RSVD6_OFFSET ((jl_uint32)0x00000156U)
+#define SW_RSVD6_NUM ((jl_uint32)0x00000001U)
+typedef union SW_RSVD6_u {
+ struct {
+ jl_uint32 sw_rsvd6:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} SW_RSVD6_t;
+
+#define SW_RSVD7_OFFSET ((jl_uint32)0x00000157U)
+#define SW_RSVD7_NUM ((jl_uint32)0x00000001U)
+typedef union SW_RSVD7_u {
+ struct {
+ jl_uint32 sw_rsvd7:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} SW_RSVD7_t;
+
+#define SW_RSVD8_OFFSET ((jl_uint32)0x00000158U)
+#define SW_RSVD8_NUM ((jl_uint32)0x00000001U)
+typedef union SW_RSVD8_u {
+ struct {
+ jl_uint32 sw_rsvd8:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} SW_RSVD8_t;
+
+#define SW_RSVD9_OFFSET ((jl_uint32)0x00000159U)
+#define SW_RSVD9_NUM ((jl_uint32)0x00000001U)
+typedef union SW_RSVD9_u {
+ struct {
+ jl_uint32 sw_rsvd9:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} SW_RSVD9_t;
+
+#define SW_RSVD10_OFFSET ((jl_uint32)0x0000015AU)
+#define SW_RSVD10_NUM ((jl_uint32)0x00000001U)
+typedef union SW_RSVD10_u {
+ struct {
+ jl_uint32 sw_rsvd10:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} SW_RSVD10_t;
+
+#define SW_RSVD11_OFFSET ((jl_uint32)0x0000015BU)
+#define SW_RSVD11_NUM ((jl_uint32)0x00000001U)
+typedef union SW_RSVD11_u {
+ struct {
+ jl_uint32 sw_rsvd11:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} SW_RSVD11_t;
+
+#define SW_RSVD12_OFFSET ((jl_uint32)0x0000015CU)
+#define SW_RSVD12_NUM ((jl_uint32)0x00000001U)
+typedef union SW_RSVD12_u {
+ struct {
+ jl_uint32 sw_rsvd12:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} SW_RSVD12_t;
+
+#define SW_RSVD13_OFFSET ((jl_uint32)0x0000015DU)
+#define SW_RSVD13_NUM ((jl_uint32)0x00000001U)
+typedef union SW_RSVD13_u {
+ struct {
+ jl_uint32 sw_rsvd13:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} SW_RSVD13_t;
+
+#define SW_RSVD14_OFFSET ((jl_uint32)0x0000015EU)
+#define SW_RSVD14_NUM ((jl_uint32)0x00000001U)
+typedef union SW_RSVD14_u {
+ struct {
+ jl_uint32 sw_rsvd14:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} SW_RSVD14_t;
+
+#define EFUSE_0_OFFSET ((jl_uint32)0x00000170U)
+#define EFUSE_0_NUM ((jl_uint32)0x00000001U)
+typedef union EFUSE_0_u {
+ struct {
+ jl_uint32 efuse_q:8; //[ 7: 0]
+ } bf;
+ jl_uint32 val[1];
+} EFUSE_0_t;
+
+#define EFUSE_1_OFFSET ((jl_uint32)0x00000171U)
+#define EFUSE_1_NUM ((jl_uint32)0x00000001U)
+typedef union EFUSE_1_u {
+ struct {
+ jl_uint32 efuse_a:10; //[ 9: 0]
+ jl_uint32 efuse_csb:1; //[10:10]
+ jl_uint32 efuse_strobe:1; //[11:11]
+ jl_uint32 efuse_load:1; //[12:12]
+ jl_uint32 efuse_pgenb:1; //[13:13]
+ } bf;
+ jl_uint32 val[1];
+} EFUSE_1_t;
+
+#define MDIO_PAGE_CFG_0_OFFSET ((jl_uint32)0x00000190U)
+#define MDIO_PAGE_CFG_0_NUM ((jl_uint32)0x00000001U)
+typedef union MDIO_PAGE_CFG_0_u {
+ struct {
+ jl_uint32 page_sel_addr:6; //[ 5: 0]
+ jl_uint32 page_sel_support:1; //[ 6: 6]
+ jl_uint32 page_sel_write:1; //[ 7: 7]
+ } bf;
+ jl_uint32 val[1];
+} MDIO_PAGE_CFG_0_t;
+
+#define MDIO_PAGE_CFG_1_OFFSET ((jl_uint32)0x00000191U)
+#define MDIO_PAGE_CFG_1_NUM ((jl_uint32)0x00000001U)
+typedef union MDIO_PAGE_CFG_1_u {
+ struct {
+ jl_uint32 page_sel_val:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} MDIO_PAGE_CFG_1_t;
+
+#define MDIO_CFG_0_OFFSET ((jl_uint32)0x00000192U)
+#define MDIO_CFG_0_NUM ((jl_uint32)0x00000001U)
+typedef union MDIO_CFG_0_u {
+ struct {
+ jl_uint32 phyid_zero_broadcast:1; //[ 0: 0]
+ jl_uint32 preamble_match_count:8; //[ 8: 1]
+ jl_uint32 preamble_supression:1; //[ 9: 9]
+ jl_uint32 global_access_0_15:1; //[10:10]
+ } bf;
+ jl_uint32 val[1];
+} MDIO_CFG_0_t;
+
+#define MDIO_CFG_1_OFFSET ((jl_uint32)0x00000193U)
+#define MDIO_CFG_1_NUM ((jl_uint32)0x00000001U)
+typedef union MDIO_CFG_1_u {
+ struct {
+ jl_uint32 legal_phy_addr_mask:5; //[ 4: 0]
+ jl_uint32 legal_phy_addr:5; //[ 9: 5]
+ } bf;
+ jl_uint32 val[1];
+} MDIO_CFG_1_t;
+
+#define MDIO_CFG_2_OFFSET ((jl_uint32)0x00000194U)
+#define MDIO_CFG_2_NUM ((jl_uint32)0x00000001U)
+typedef union MDIO_CFG_2_u {
+ struct {
+ jl_uint32 remap_phyaddr0:5; //[ 4: 0]
+ jl_uint32 remap_phyaddr1:5; //[ 9: 5]
+ jl_uint32 remap_phyaddr2:5; //[14:10]
+ } bf;
+ jl_uint32 val[1];
+} MDIO_CFG_2_t;
+
+#define MDIO_CFG_3_OFFSET ((jl_uint32)0x00000195U)
+#define MDIO_CFG_3_NUM ((jl_uint32)0x00000001U)
+typedef union MDIO_CFG_3_u {
+ struct {
+ jl_uint32 remap_phyaddr3:5; //[ 4: 0]
+ jl_uint32 remap_phyaddr4:5; //[ 9: 5]
+ jl_uint32 remap_phyaddr5:5; //[14:10]
+ } bf;
+ jl_uint32 val[1];
+} MDIO_CFG_3_t;
+
+#define MDIO_CFG_4_OFFSET ((jl_uint32)0x00000196U)
+#define MDIO_CFG_4_NUM ((jl_uint32)0x00000001U)
+typedef union MDIO_CFG_4_u {
+ struct {
+ jl_uint32 remap_phyaddr6:5; //[ 4: 0]
+ jl_uint32 remap_phyaddr7:5; //[ 9: 5]
+ } bf;
+ jl_uint32 val[1];
+} MDIO_CFG_4_t;
+
+#define RSV0_OFFSET ((jl_uint32)0x000001B0U)
+#define RSV0_NUM ((jl_uint32)0x00000001U)
+typedef union RSV0_u {
+ struct {
+ jl_uint32 rsv0:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} RSV0_t;
+
+#define RSV1_OFFSET ((jl_uint32)0x000001B1U)
+#define RSV1_NUM ((jl_uint32)0x00000001U)
+typedef union RSV1_u {
+ struct {
+ jl_uint32 rsv1:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} RSV1_t;
+
+#define RSV2_OFFSET ((jl_uint32)0x000001B2U)
+#define RSV2_NUM ((jl_uint32)0x00000001U)
+typedef union RSV2_u {
+ struct {
+ jl_uint32 rsv2:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} RSV2_t;
+
+#define RSV3_OFFSET ((jl_uint32)0x000001B3U)
+#define RSV3_NUM ((jl_uint32)0x00000001U)
+typedef union RSV3_u {
+ struct {
+ jl_uint32 rsv3:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} RSV3_t;
+
+#define RSV4_OFFSET ((jl_uint32)0x000001B4U)
+#define RSV4_NUM ((jl_uint32)0x00000001U)
+typedef union RSV4_u {
+ struct {
+ jl_uint32 rsv4:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} RSV4_t;
+
+#define RSV5_OFFSET ((jl_uint32)0x000001B5U)
+#define RSV5_NUM ((jl_uint32)0x00000001U)
+typedef union RSV5_u {
+ struct {
+ jl_uint32 rsv5:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} RSV5_t;
+
+#define RSV6_OFFSET ((jl_uint32)0x000001B6U)
+#define RSV6_NUM ((jl_uint32)0x00000001U)
+typedef union RSV6_u {
+ struct {
+ jl_uint32 rsv6:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} RSV6_t;
+
+#define RSV7_OFFSET ((jl_uint32)0x000001B7U)
+#define RSV7_NUM ((jl_uint32)0x00000001U)
+typedef union RSV7_u {
+ struct {
+ jl_uint32 rsv7:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} RSV7_t;
+
+#define RSV8_OFFSET ((jl_uint32)0x000001B8U)
+#define RSV8_NUM ((jl_uint32)0x00000001U)
+typedef union RSV8_u {
+ struct {
+ jl_uint32 rsv8:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} RSV8_t;
+
+#define RSV9_OFFSET ((jl_uint32)0x000001B9U)
+#define RSV9_NUM ((jl_uint32)0x00000001U)
+typedef union RSV9_u {
+ struct {
+ jl_uint32 rsv9:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} RSV9_t;
+
+#define RSV10_OFFSET ((jl_uint32)0x000001BAU)
+#define RSV10_NUM ((jl_uint32)0x00000001U)
+typedef union RSV10_u {
+ struct {
+ jl_uint32 rsv10:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} RSV10_t;
+
+#define RSV11_OFFSET ((jl_uint32)0x000001BBU)
+#define RSV11_NUM ((jl_uint32)0x00000001U)
+typedef union RSV11_u {
+ struct {
+ jl_uint32 rsv11:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} RSV11_t;
+
+#define RSV12_OFFSET ((jl_uint32)0x000001BCU)
+#define RSV12_NUM ((jl_uint32)0x00000001U)
+typedef union RSV12_u {
+ struct {
+ jl_uint32 rsv12:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} RSV12_t;
+
+#define RSV13_OFFSET ((jl_uint32)0x000001BDU)
+#define RSV13_NUM ((jl_uint32)0x00000001U)
+typedef union RSV13_u {
+ struct {
+ jl_uint32 rsv13:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} RSV13_t;
+
+#define RSV14_OFFSET ((jl_uint32)0x000001BEU)
+#define RSV14_NUM ((jl_uint32)0x00000001U)
+typedef union RSV14_u {
+ struct {
+ jl_uint32 rsv14:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} RSV14_t;
+
+#define RSV15_OFFSET ((jl_uint32)0x000001D0U)
+#define RSV15_NUM ((jl_uint32)0x00000001U)
+typedef union RSV15_u {
+ struct {
+ jl_uint32 rsv15:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} RSV15_t;
+
+#define I2C_CFG_OFFSET ((jl_uint32)0x000002D0U)
+#define I2C_CFG_NUM ((jl_uint32)0x00000001U)
+typedef union I2C_CFG_u {
+ struct {
+ jl_uint32 i2c_valid:1; //[ 0: 0]
+ jl_uint32 i2c_op:3; //[ 3: 1]
+ } bf;
+ jl_uint32 val[1];
+} I2C_CFG_t;
+
+#define I2C_CTRL_HI_OFFSET ((jl_uint32)0x000002D1U)
+#define I2C_CTRL_HI_NUM ((jl_uint32)0x00000001U)
+typedef union I2C_CTRL_HI_u {
+ struct {
+ jl_uint32 i2c_ctrl_hi:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} I2C_CTRL_HI_t;
+
+#define I2C_CTRL_LO_OFFSET ((jl_uint32)0x000002D2U)
+#define I2C_CTRL_LO_NUM ((jl_uint32)0x00000001U)
+typedef union I2C_CTRL_LO_u {
+ struct {
+ jl_uint32 i2c_ctrl_lo:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} I2C_CTRL_LO_t;
+
+#define I2C_STAT_HI_OFFSET ((jl_uint32)0x000002D3U)
+#define I2C_STAT_HI_NUM ((jl_uint32)0x00000001U)
+typedef union I2C_STAT_HI_u {
+ struct {
+ jl_uint32 i2c_status_hi:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} I2C_STAT_HI_t;
+
+#define I2C_STAT_LO_OFFSET ((jl_uint32)0x000002D4U)
+#define I2C_STAT_LO_NUM ((jl_uint32)0x00000001U)
+typedef union I2C_STAT_LO_u {
+ struct {
+ jl_uint32 i2c_status_lo:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} I2C_STAT_LO_t;
+
+#define I2C_INNER_CFG_OFFSET ((jl_uint32)0x000002D5U)
+#define I2C_INNER_CFG_NUM ((jl_uint32)0x00000001U)
+typedef union I2C_INNER_CFG_u {
+ struct {
+ jl_uint32 i2c_inner_valid:1; //[ 0: 0]
+ jl_uint32 i2c_inner_op:3; //[ 3: 1]
+ } bf;
+ jl_uint32 val[1];
+} I2C_INNER_CFG_t;
+
+#define I2C_INNER_CTRL_HI_OFFSET ((jl_uint32)0x000002D6U)
+#define I2C_INNER_CTRL_HI_NUM ((jl_uint32)0x00000001U)
+typedef union I2C_INNER_CTRL_HI_u {
+ struct {
+ jl_uint32 i2c_inner_ctrl_hi:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} I2C_INNER_CTRL_HI_t;
+
+#define I2C_INNER_CTRL_LO_OFFSET ((jl_uint32)0x000002D7U)
+#define I2C_INNER_CTRL_LO_NUM ((jl_uint32)0x00000001U)
+typedef union I2C_INNER_CTRL_LO_u {
+ struct {
+ jl_uint32 i2c_inner_ctrl_lo:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} I2C_INNER_CTRL_LO_t;
+
+#define I2C_INNER_STAT_HI_OFFSET ((jl_uint32)0x000002D8U)
+#define I2C_INNER_STAT_HI_NUM ((jl_uint32)0x00000001U)
+typedef union I2C_INNER_STAT_HI_u {
+ struct {
+ jl_uint32 i2c_inner_status_hi:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} I2C_INNER_STAT_HI_t;
+
+#define I2C_INNER_STAT_LO_OFFSET ((jl_uint32)0x000002D9U)
+#define I2C_INNER_STAT_LO_NUM ((jl_uint32)0x00000001U)
+typedef union I2C_INNER_STAT_LO_u {
+ struct {
+ jl_uint32 i2c_inner_status_lo:16; //[15: 0]
+ } bf;
+ jl_uint32 val[1];
+} I2C_INNER_STAT_LO_t;
+
+#endif /* __JL_REG_TOP_H__ */
+
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl_base.h b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl_base.h
new file mode 100644
index 0000000..4e8f055
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl_base.h
@@ -0,0 +1,44 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+
+#ifndef __JL_BASE_H__
+#define __JL_BASE_H__
+
+#if __BYTE_ORDER__ != __ORDER_LITTLE_ENDIAN__
+ #error "Don't support big endian in current version"
+#endif
+
+/* Differentiate between built-in compile and out-of-tree compile for
+ * Linux kernel, for normal build, always include jl autoconf */
+#ifdef __KERNEL__
+#ifndef MODULE
+#include <linux/kconfig.h>
+#else
+#include "jl_autoconf.h"
+#endif /* MODULE */
+#else /* KERNEL */
+#include "jl_autoconf.h"
+#endif
+
+#include "jl_config.h"
+#include "jl_types.h"
+#include "jl_debug.h"
+#include "jl_error.h"
+#include "portable/jl_portable.h"
+#include "jl_switch.h"
+#include "driver/jl_reg_io.h"
+
+#define JL_ARRAY_SIZE(x) (sizeof(x)/sizeof((x)[0]))
+
+#endif /* __JL_BASE_H__ */
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl_config.h b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl_config.h
new file mode 100644
index 0000000..d350468
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl_config.h
@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+
+#ifndef __JL_CONFIG_H__
+#define __JL_CONFIG_H__
+
+/* #define CONFIG_JLFE_API_MUTEX */
+/* #define CONFIG_JLFE_PHY_MUTEX */
+/* #define CONFIG_JLFE_APB_MUTEX */
+/* XXX
+ * Pthread mutex is used in jl_portable.c sample code.
+ * But, MinGW not support pthread mutex yet, please comment all mutex options here.
+ * If you are using other available mutex APIs in jl_portable.c just uncomment the mutex as your need.
+ */
+#if (defined WIN32 && (defined CONFIG_JLFE_API_MUTEX || defined CONFIG_JLFE_PHY_MUTEX || defined CONFIG_JLFE_APB_MUTEX))
+//#error "MinGW not support pthread yet"
+#endif
+
+/* uncomment this to printf log info */
+#ifdef CONFIG_JLFE_DEBUG
+#define JL_BIT(n) ((0x1U)<<n)
+#define JL_FLAG_SYS JL_BIT(1)
+#define JL_FLAG_PHY JL_BIT(2)
+#define JL_FLAG_SMI JL_BIT(3)
+#define JL_FLAG_MAC_UCTRL JL_BIT(4)
+#define JL_FLAG_EMAC JL_BIT(5)
+#define JL_FLAG_SWCORE JL_BIT(6)
+#define JL_FLAG_LED JL_BIT(7)
+#define JL_FLAG_ALL (0xFFFFFFFFU)
+enum {
+ _DBG_OFF = 0,
+ _DBG_ERROR,
+ _DBG_WARNING,
+ _DBG_INFO,
+ _DBG_ON,
+};
+#define JL_DBG_FLAG_MASK JL_FLAG_ALL
+#endif
+#endif /* __JL_CONFIG_H__ */
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl_debug.h b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl_debug.h
new file mode 100644
index 0000000..73903c6
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl_debug.h
@@ -0,0 +1,45 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+
+#ifndef __JL_DEBUG_H__
+#define __JL_DEBUG_H__
+
+#ifndef __KERNEL__
+#include <stdio.h>
+#endif
+#include "jl_types.h"
+#include "jl_config.h"
+
+
+#ifdef __KERNEL__
+#include <linux/kernel.h>
+#define JL_PRINT printk
+#else
+#define JL_PRINT printf
+#endif
+
+#ifdef CONFIG_JLFE_DEBUG
+#define JL_DBG_MSG(flag, level, ...) \
+ do { \
+ if (((flag) & JL_DBG_FLAG_MASK) && (level <= CONFIG_JLFE_DBG_LEVEL)) { \
+ JL_PRINT(__VA_ARGS__); \
+ } \
+ } while (0)
+#else
+#define JL_DBG_MSG(flag, level, ...) \
+ do { \
+ } while (0)
+#endif
+
+#endif /* __JL_DEBUG_H__ */
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl_error.h b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl_error.h
new file mode 100644
index 0000000..59c8e25
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl_error.h
@@ -0,0 +1,81 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+
+#ifndef __JL_ERROR_H__
+#define __JL_ERROR_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+#include "jl_types.h"
+
+typedef enum {
+ JL_ERR_OK = 0,
+ JL_ERR_INTERNAL = -1,
+ JL_ERR_MEMORY = -2,
+ JL_ERR_UNIT = -3,
+ JL_ERR_PARAM = -4,
+ JL_ERR_EMPTY = -5,
+ JL_ERR_FULL = -6,
+ JL_ERR_NOT_FOUND = -7,
+ JL_ERR_EXISTS = -8,
+ JL_ERR_OUT_OF_RANGE = -9,
+ JL_ERR_TIMEOUT = -10,
+ JL_ERR_BUSY = -11,
+ JL_ERR_FAIL = -12,
+ JL_ERR_DISABLED = -13,
+ JL_ERR_BADID = -14,
+ JL_ERR_RESOURCE = -15,
+ JL_ERR_CONFIG = -16,
+ JL_ERR_UNAVAIL = -17,
+ JL_ERR_INIT = -18,
+ JL_ERR_PORT = -19,
+ JL_ERR_NOT_READY = -20,
+ JL_ERR_LIMIT = -21 /* Must come last */
+} jl_error_code_t;
+
+#define _JL_ERRMSG_STR { \
+ "Ok", /* ERR_OK */ \
+ "Internal error", /* ERR_INTERNAL */ \
+ "Out of memory", /* ERR_MEMORY */ \
+ "Invalid unit", /* ERR_UNIT */ \
+ "Invalid parameter", /* ERR_PARAM */ \
+ "Table empty", /* ERR_EMPTY */ \
+ "Table full", /* ERR_FULL */ \
+ "Entry not found", /* ERR_NOT_FOUND */ \
+ "Entry exists", /* ERR_EXISTS */ \
+ "Index out of range", /* ERR_OUT_OF_RANGE */ \
+ "Operation timed out", /* ERR_TIMEOUT */ \
+ "Operation still running", /* ERR_BUSY */ \
+ "Operation failed", /* ERR_FAIL */ \
+ "Operation disabled", /* ERR_DISABLED */ \
+ "Invalid identifier", /* ERR_BADID */ \
+ "No resources for operation", /* ERR_RESOURCE */ \
+ "Invalid configuration", /* ERR_CONFIG */ \
+ "Feature unavailable", /* ERR_UNAVAIL */ \
+ "Feature not initialized", /* ERR_INIT */ \
+ "Invalid port", /* ERR_PORT */ \
+ "Device not ready", /* ERR_NOT_READY */ \
+ "Unknown error" /* ERR_LIMIT */ \
+ }
+
+JL_API extern char *_jl_errmsg[];
+
+#define JL_ERRMSG(r) \
+ _jl_errmsg[(((jl_int32)r) <= 0 && ((int)r) > JL_ERR_LIMIT) ? -(r) : -JL_ERR_LIMIT]
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* __JL_ERROR_H__ */
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl_switch.h b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl_switch.h
new file mode 100644
index 0000000..935833a
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl_switch.h
@@ -0,0 +1,548 @@
+/**
+ * @file jl_switch.h
+ * @brief Initialization
+ */
+
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+
+#ifndef __JL_SWITCH_H__
+#define __JL_SWITCH_H__
+
+#include "jl_types.h"
+#include "jl_config.h"
+#include "jl_debug.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define SWITCH_PORT_NUM 10UL /**< SWITCH_PORT_NUM */
+#define UTP_PORT_MASK 0xFFUL /**< UTP_PORT_MASK */
+#define MAX_VLAN_ID 0xFFFUL /**< MAX_VLAN_ID */
+#define MAX_QUEUE_NUM 4UL /**< MAX_QUEUE_NUM */
+#define MAX_PCP 7UL /**< MAX_PCP */
+#define MAX_EXP 7UL /**< MAX_EXP */
+#define MAX_DSCP 63UL /**< MAX_DSCP */
+#define MAX_QUEUE_WEIGHT 127UL /**< MAX_QUEUE_WEIGHT */
+#define MIN_QUEUE_WEIGHT 1UL /**< MIN_QUEUE_WEIGHT */
+
+#define VLAN_IDX_MAX 15UL /**< VLAN_IDX_MAX */
+#define VLAN_IDX_DEFAULT 0UL /**< VLAN_IDX_DEFAULT */
+#define VLAN_IDX_DROP 15UL /**< VLAN_IDX_DROP */
+
+#define DEFAULT_VLAN_ID 1UL /**< DEFAULT_VLAN_ID */
+#define DEFAULT_TICK_NUM 0x7735940UL /**< Number of ticks between aging interval */
+#define DEFAULT_TICK_ID 0UL /**< DEFAULT_TICK_ID */
+
+#ifdef CONFIG_JLFE_API_MUTEX
+#include "portable/jl_portable.h"
+
+/**
+ * JL_API_MUTEX_INIT()
+ */
+#define JL_API_MUTEX_INIT() \
+ do { \
+ g_switch_ctrl.api_mutex = port_mutex_init(); \
+ if (g_switch_ctrl.api_mutex == NULL) \
+ JL_DBG_MSG(JL_FLAG_SYS, _DBG_ERROR, "api mutex init fail\n"); \
+ } while (0)
+
+/**
+ * JL_API_MUTEX_DEINIT()
+ */
+#define JL_API_MUTEX_DEINIT() \
+ do { \
+ if (g_switch_ctrl.api_mutex != NULL) { \
+ port_mutex_deinit(g_switch_ctrl.api_mutex); \
+ g_switch_ctrl.api_mutex = NULL; \
+ } \
+ } while (0)
+
+/**
+ * JL_API_MUTEX_LOCK()
+ */
+#define JL_API_MUTEX_LOCK() \
+ do { \
+ if (g_switch_ctrl.api_mutex != NULL) \
+ port_mutex_lock(g_switch_ctrl.api_mutex); \
+ } while (0)
+
+/**
+ * JL_API_MUTEX_UNLOCK()
+ */
+#define JL_API_MUTEX_UNLOCK() \
+ do { \
+ if (g_switch_ctrl.api_mutex != NULL) \
+ port_mutex_unlock(g_switch_ctrl.api_mutex); \
+ } while (0)
+#else
+#define JL_API_MUTEX_INIT() /**< JL_API_MUTEX_INIT() */
+#define JL_API_MUTEX_DEINIT() /**< JL_API_MUTEX_DEINIT() */
+#define JL_API_MUTEX_LOCK() /**< JL_API_MUTEX_LOCK() */
+#define JL_API_MUTEX_UNLOCK() /**< JL_API_MUTEX_UNLOCK() */
+#endif /* JL_API_MUTEX */
+
+#define JL_STAT_INIT() (g_switch_ctrl.stat = STAT_READY) /**< JL_STAT_INIT() */
+#define JL_STAT_DEINIT() (g_switch_ctrl.stat = STAT_UNINIT) /**< JL_STAT_DEINIT() */
+#define JL_STAT_IS_READY() (g_switch_ctrl.stat == STAT_READY) /**< JL_STAT_IS_READY() */
+#define JL_STAT_IS_UNINIT() (g_switch_ctrl.stat == STAT_UNINIT) /**< JL_STAT_IS_UNINIT() */
+
+/**
+ * JL_CHECK_STAT()
+ */
+#define JL_CHECK_STAT() \
+ do { \
+ if (g_switch_ctrl.stat != STAT_READY) \
+ return JL_ERR_INIT; \
+ } while (0)
+
+/**
+ * JL_CHECK_PORT(x)
+ */
+#define JL_CHECK_PORT(x) \
+ do { \
+ if (jl_switch_phyport_check(x) != JL_ERR_OK) \
+ return JL_ERR_PORT; \
+ } while (0)
+
+/**
+ * JL_CHECK_UTP_PORT(x)
+ */
+#define JL_CHECK_UTP_PORT(x) \
+ do { \
+ if (jl_switch_phyport_check_utp(x) != JL_ERR_OK) \
+ return JL_ERR_PORT; \
+ } while (0)
+
+/**
+ * JL_CHECK_EXT_PORT(x)
+ */
+#define JL_CHECK_EXT_PORT(x) \
+ do { \
+ if (jl_switch_phyport_check_ext(x) != JL_ERR_OK) \
+ return JL_ERR_PORT; \
+ } while (0)
+
+/**
+ * JL_CHECK_PORTMASK(x)
+ */
+#define JL_CHECK_PORTMASK(x) \
+ do { \
+ if ((x) != (gp_switch_dev->phy_portmask & (x))) \
+ return JL_ERR_PORT; \
+ } while (0)
+
+/**
+ * JL_CHECK_POINTER(x)
+ */
+#define JL_CHECK_POINTER(x) \
+ do { \
+ if (x == NULL) \
+ return JL_ERR_PARAM; \
+ } while (0)
+
+/**
+ * JL_ASSERT(expr)
+ */
+#define JL_ASSERT(expr) \
+ do { \
+ if (!(expr)) \
+ return JL_ERR_PARAM; \
+ } while (0)
+
+/**
+ * JL_CHECK_RETURN(ret)
+ */
+#define JL_CHECK_RETURN(ret) \
+ do { \
+ if (ret != JL_ERR_OK) \
+ return ret; \
+ } while (0)
+
+#define JL_PORT_P2M(x) (gp_switch_dev->p2m_port[x]) /**< JL_PORT_P2M(x) */
+#define JL_PORT_M2P(x) (gp_switch_dev->m2p_port[x]) /**< JL_PORT_M2P(x) */
+#define JL_PORT_P2VP(x) (gp_switch_dev->p2vp_port[x]) /**< JL_PORT_P2VP(x) */
+#define JL_PORT_VP2P(x) (gp_switch_dev->vp2p_port[x]) /**< JL_PORT_VP2P(x) */
+#define JL_PORTMASK_P2M(x) jl_switch_portmask_p2m(x) /**< JL_PORTMASK_P2M(x) */
+#define JL_PORTMASK_M2P(x) jl_switch_portmask_m2p(x) /**< JL_PORTMASK_M2P(x) */
+#define JL_PORTMASK_P2VP(x) jl_switch_portmask_p2vp(x) /**< JL_PORTMASK_P2VP(x) */
+#define JL_PORTMASK_VP2P(x) jl_switch_portmask_vp2p(x) /**< JL_PORTMASK_VP2P(x) */
+#define JL_PHY_PORTMASK (gp_switch_dev->phy_portmask) /**< JL_PHY_PORTMASK */
+#define JL_MAC_PORTMASK (gp_switch_dev->mac_portmask) /**< JL_MAC_PORTMASK */
+#define JL_VENDOR_PORTMASK (gp_switch_dev->vendor_portmask) /**< JL_VENDOR_PORTMASK */
+
+/**
+ * JL_FOR_EACH_PHY_PORT(x)
+ */
+#define JL_FOR_EACH_PHY_PORT(x) for (x = 0; x < SWITCH_PORT_NUM; x++) \
+ if (jl_switch_phyport_check(x) == JL_ERR_OK)
+/**
+ * JL_FOR_EACH_PHY_UTP_PORT(x)
+ */
+#define JL_FOR_EACH_PHY_UTP_PORT(x) for (x = 0; x < SWITCH_PORT_NUM; x++) \
+ if (jl_switch_phyport_check_utp(x) == JL_ERR_OK)
+/**
+ * JL_FOR_EACH_VENDOR_PORT(x)
+ */
+#define JL_FOR_EACH_VENDOR_PORT(x) for (x = 0; x < SWITCH_PORT_NUM; x++) \
+ if (jl_switch_vendorport_check(x) == JL_ERR_OK)
+/**
+ * JL_FOR_EACH_MAC_PORT(x)
+ */
+#define JL_FOR_EACH_MAC_PORT(x) for (x = 0; x < SWITCH_PORT_NUM; x++) \
+ if (jl_switch_macport_check(x) == JL_ERR_OK)
+/**
+ * JL_FOR_EACH_PHY_EXT_PORT(x)
+ */
+#define JL_FOR_EACH_PHY_EXT_PORT(x) for (x = 0; x < SWITCH_PORT_NUM; x++) \
+ if ((jl_switch_phyport_check(x) == JL_ERR_OK) \
+ && (gp_switch_dev->phy_port_type[x] == PORT_TYPE_EXT))
+/**
+ * JL_FOR_EACH_MAC_EXT_PORT(x)
+ */
+#define JL_FOR_EACH_MAC_EXT_PORT(x) for (x = 0; x < SWITCH_PORT_NUM; x++) \
+ if ((jl_switch_macport_check(x) == JL_ERR_OK) \
+ && (gp_switch_dev->mac_port_type[x] == PORT_TYPE_EXT))
+
+
+/* Macros for memory access operations */
+#define _REG8P(p, i) ((jl_uint8 *) ((jl_uintptr)((p) + (i)))) /**< _REG8P(p, i) */
+#define _REG16P(p, i) ((jl_uint16 *) ((jl_uintptr)((p) + (i)))) /**< _REG16P(p, i) */
+#define _REG32P(p, i) ((jl_uint32 *) ((jl_uintptr)((p) + (i)))) /**< _REG32P(p, i) */
+#define _REG8(p, i) (*(_REG8P(p, i))) /**< _REG8(p, i) */
+#define _REG16(p, i) (*(_REG16P(p, i))) /**< _REG16(p, i) */
+#define _REG32(p, i) (*(_REG32P(p, i))) /**< _REG32(p, i) */
+#define REG8(addr) _REG8((addr), 0) /**< REG8(addr) */
+#define REG16(addr) _REG16((addr), 0) /**< REG16(addr) */
+#define REG32(addr) _REG32((addr), 0) /**< REG32(addr) */
+
+/* Macros for address type convert and access operations */
+#define ADDR16(addr) ((jl_uint32)(jl_uintptr)(addr)) /**< ADDR16(addr) */
+#define ADDR32(addr) ((jl_uint32)(jl_uintptr)(addr)) /**< ADDR32(addr) */
+#define ADDR8P(addr) ((jl_uint8 *)(jl_uintptr)(addr)) /**< ADDR8P(addr) */
+#define ADDR16P(addr) ((jl_uint16 *)(jl_uintptr)(addr)) /**< ADDR16P(addr) */
+#define ADDR32P(addr) ((jl_uint32 *)(jl_uintptr)(addr)) /**< ADDR32P(addr) */
+
+/* Macros for Bit Operations */
+#define BITMASK_MAX 0xFFFFFFFFUL /**< BITMASK_MAX */
+#define BITOFS_MAX 31 /**< BITOFS_MAX */
+
+// For 32 bit OS, Bit Operation support mask 32 bit wide
+#ifndef BIT
+#define BIT(bitofs) (0x1UL << (bitofs)) /**< BIT(bitofs) */
+#endif
+#define BITS(start, end) ((BITMASK_MAX) << (start) & (BITMASK_MAX) >> (BITOFS_MAX - (end))) /**< BITS(start, end) */
+#define GET_BIT(regval, bitofs) (((regval) >> (bitofs)) & 0x1) /**< GET_BIT(regval, bitofs) */
+#define SET_BIT(regval, bitofs) ((regval) |= BIT(bitofs)) /**< SET_BIT(regval, bitofs) */
+#define CLR_BIT(regval, bitofs) ((regval) &= (~BIT(bitofs))) /**< CLR_BIT(regval, bitofs) */
+#define FLIP_BIT(regval, bitofs) ((regval) ^= BIT(bitofs)) /**< FLIP_BIT(regval, bitofs) */
+/**
+ * WRITE_BIT(regval, bitofs, val)
+ */
+#define WRITE_BIT(regval, bitofs, val) do { CLR_BIT(regval, bitofs); ((regval) |= ((val) << bitofs) & BIT(bitofs)); } while (0)
+#define CHECK_BIT(regval, bitofs) (!!((regval) & (0x1UL<<(bitofs)))) /**< CHECK_BIT(regval, bitofs) */
+#define GET_BITS(regval, start, end) (((regval) & BITS((start), (end))) >> (start)) /**< GET_BITS(regval, start, end) */
+#define SET_BITS(regval, start, end) ((regval) |= BITS((start), (end))) /**< SET_BITS(regval, start, end) */
+#define CLR_BITS(regval, start, end) ((regval) &= (~BITS((start), (end)))) /**< CLR_BITS(regval, start, end) */
+#define FLIP_BITS(regval, start, end) ((regval) ^= BITS((start), (end))) /**< FLIP_BITS(regval, start, end) */
+/**
+ * WRITE_BITS(regval, start, end, val)
+ */
+#define WRITE_BITS(regval, start, end, val) do { CLR_BITS(regval, start, end); ((regval) |= ((val) << start) & BITS((start), (end))); } while (0)
+#define CHECK_BITS_ALL(regval, start, end) (!((~(regval)) & BITS((start), (end)))) /**< CHECK_BITS_ALL(regval, start, end) */
+#define CHECK_BITS_ANY(regval, start, end) ((regval) & BITS((start), (end))) /**< CHECK_BITS_ANY(regval, start, end) */
+
+#define BITMASK_SET(regval, mask) ((regval) |= (mask)) /**< BITMASK_SET(regval, mask) */
+#define BITMASK_CLR(regval, mask) ((regval) &= (~(mask))) /**< BITMASK_CLR(regval, mask) */
+#define BITMASK_FLIP(regval, mask) ((regval) ^= (mask)) /**< BITMASK_FLIP(regval, mask) */
+#define BITMASK_CHECK_ALL(regval, mask) (!((~(regval)) & (mask))) /**< BITMASK_CHECK_ALL(regval, mask) */
+#define BITMASK_CHECK_ANY(regval, mask) ((regval) & (mask)) /**< BITMASK_CHECK_ANY(regval, mask) */
+
+#define ECO_R0P0 0U /**< ECO Version r0p0 */
+#define ECO_R0P1 1U /**< ECO Version r0p1 */
+#define ECO_R0P2 2U /**< ECO Version r0p2 */
+#define ECO_R1P0 3U /**< ECO Version r1p0 */
+#define CORE_VER0 0x547fU /**< Switch Core Version V1 */
+#define CORE_VER1 0x4087U /**< Switch Core Version V2 */
+
+/**
+ * @defgroup initialization_group Initialization
+ * @{
+ */
+
+/**
+ * @union mac_addr
+ * @brief Initialization mac_addr.
+ */
+union mac_addr {
+ jl_uint8 addr[ETHER_ADDR_LEN];/**< Indicates MAC Address */
+ jl_uint64 val:48;/**< Indicates 48 bit MAC Address */
+};
+
+/**
+ * @public typedef jl_mac_addr_t
+ */
+typedef union mac_addr jl_mac_addr_t;
+
+/**
+ * @enum chip_id_e
+ * @brief Initialization chip_id_e.
+ */
+enum chip_id_e {
+ CHIP_ID_JL5104 = 0,/**< JL5104 */
+ CHIP_ID_JL5105,/**< JL5105 */
+ CHIP_ID_JL5106,/**< JL5106 */
+ CHIP_ID_JL5108,/**< JL5108 */
+ CHIP_ID_JL5109,/**< JL5109 */
+ CHIP_ID_JL5110,/**< JL5110 */
+ CHIP_ID_END/**< Invalid */
+};
+
+/**
+ * @public typedef jl_chip_id_t
+ */
+typedef enum chip_id_e jl_chip_id_t;
+
+/**
+ * @public typedef jl_hw_info_t
+ */
+typedef jl_uint32 jl_hw_info_t;
+
+/**
+ * @enum stat_e
+ * @brief Initialization stat_e.
+ */
+enum stat_e {
+ STAT_UNINIT = 0,/**< Uninitialized State */
+ STAT_READY,/**< Ready State */
+ STAT_END/**< Invalid State */
+};
+
+/**
+ * @public typedef jl_stat_t
+ */
+typedef enum stat_e jl_stat_t;
+
+/**
+ * @enum port_type_e
+ * @brief Initialization port_type_e.
+ */
+enum port_type_e {
+ PORT_TYPE_UTP = 0,/**< UTP Port */
+ /* XXX external (phy) port type: MII, RMII2MII */
+ PORT_TYPE_EXT,/**< External Port */
+ PORT_TYPE_UNDEF,/**< Undefined Port */
+ PORT_TYPE_END/**< Invalid Type */
+};
+
+/**
+ * @public typedef jl_port_type_t
+ */
+typedef enum port_type_e jl_port_type_t;
+
+
+/**
+ * @struct jl_switch_info_s
+ * @brief Initialization switch info.
+ */
+struct jl_switch_info_s {
+ jl_hw_info_t core_ver;/**< Indicates switch core version */
+ jl_chip_id_t pkg;/**< Indicates pkg chip id */
+ jl_hw_info_t eco_ver;/**< Indicates switch eco version */
+ jl_uint32 sdk_ver;/**< Indicates SDK version */
+};
+
+/**
+ * @public typedef jl_switch_info_t
+ */
+typedef struct jl_switch_info_s jl_switch_info_t;
+
+/**
+ * @brief Initialize the switch system
+ * @details This function initialize the switch system and sets chip registers to default configuration.
+ * @return the switch system is initialized or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_FAIL Fail
+ */
+JL_API jl_api_ret_t jl_switch_init(void);
+
+/**
+ * @brief Deinitialize the switch system
+ * @details This function de-initialize the switch system.
+ * @return the switch system is deinitialized or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_FAIL Fail
+ */
+JL_API jl_api_ret_t jl_switch_deinit(void);
+
+/**
+ * @brief Get chip's version info
+ * @details This function is used to get the version information
+ * @param pinfo info returned chip's version info
+ * @return version info is sucessfully get or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_FAIL Fail
+ */
+JL_API jl_api_ret_t jl_switch_info(jl_switch_info_t *pinfo);
+
+/**
+ * @brief set state to the switch
+ * @details This function indicates set uninit or ready state to the switch .
+ * @param state the state of switch
+ * @return function result
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_PARAM Fail
+ */
+JL_API jl_ret_t jl_switch_init_state_set(jl_stat_t state);
+
+/**
+ * @brief get state from the switch
+ * @details This function indicates get uninit or ready state from the switch.
+ * @param pstate the pstate of switch
+ * @return function result
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_PARAM Fail
+ */
+JL_API jl_ret_t jl_switch_init_state_get(jl_stat_t *pstate);
+/** @} Initialization APIs*/
+
+/**
+ * @struct switch_dev_s
+ * @brief Initialization switch dev.
+ */
+struct switch_dev_s {
+ jl_chip_id_t chip_id;/**< Indicates the switch chip ID */
+ jl_uint32 p2m_port[SWITCH_PORT_NUM];/**< Indicates PHY to MAC port mapping arrary */
+ jl_uint32 m2p_port[SWITCH_PORT_NUM];/**< Indicates MAC to PHY port mapping arrary */
+ jl_uint32 p2vp_port[SWITCH_PORT_NUM];/**< Indicates PHY to vendor port mapping arrary */
+ jl_uint32 vp2p_port[SWITCH_PORT_NUM];/**< Indicates vendor port to PHY id mapping arrary */
+ jl_port_type_t phy_port_type[SWITCH_PORT_NUM];/**< Indicates PHY port type: UTP port, EXT port or Undefined port etc */
+ jl_port_type_t mac_port_type[SWITCH_PORT_NUM];/**< Indicates MAC port type */
+ jl_port_type_t vendor_port_type[SWITCH_PORT_NUM];/**< Indicates vendor port type: UTP port or Undefined port. EXT port is excluded */
+ jl_portmask_t phy_portmask;/**< Indicates the portmask of valid PHY */
+ jl_portmask_t mac_portmask;/**< Indicates the portmask of valid MAC */
+ jl_portmask_t vendor_portmask;/**< Indicates the portmask of vendor specific port */
+};
+
+/**
+ * @public typedef jl_switch_dev_t
+ */
+typedef struct switch_dev_s jl_switch_dev_t;
+
+
+/**
+ * @struct switch_ctrl_s
+ * @brief Initialization switch ctrl.
+ */
+struct switch_ctrl_s {
+ jl_stat_t stat;/**< Indicates the state of the switch */
+ jl_hw_info_t core_ver;/**< Indicates switch core version */
+ jl_hw_info_t eco_ver;/**< Indicates switch eco version */
+ void *api_mutex;/**< Indicates the User defined Mutex API. If the sdk runs under muti-thread applications, the api_mutex must be defined */
+};
+
+/**
+ * @public typedef jl_switch_ctrl_t
+ */
+typedef struct switch_ctrl_s jl_switch_ctrl_t;
+
+#ifdef CONFIG_JLFE_CHIP_ID_51XX
+JL_API extern jl_switch_dev_t g_switch_dev_5104;
+JL_API extern jl_switch_dev_t g_switch_dev_5105;
+JL_API extern jl_switch_dev_t g_switch_dev_5106;
+JL_API extern jl_switch_dev_t g_switch_dev_5108;
+JL_API extern jl_switch_dev_t g_switch_dev_5109;
+JL_API extern jl_switch_dev_t g_switch_dev_5110;
+#endif
+
+JL_API extern jl_switch_ctrl_t g_switch_ctrl; /**< Global switch control variable */
+JL_API extern jl_switch_dev_t *gp_switch_dev; /**< Pointer to global switch device variable */
+
+/**
+ * @brief Check whether phy port ID is valid
+ * @details This function checks whether phy port ID is valid
+ * @param[in] phy_port Port ID
+ * @return Check phy port is valid or not
+ * @retval JL_ERR_OK Valid
+ * @retval JL_ERR_PORT Not Valid
+ */
+JL_API jl_ret_t jl_switch_phyport_check(jl_port_t phy_port);
+
+/**
+ * @brief Check whether UTP port ID is valid
+ * @details This function checks whether UTP port ID is valid
+ * @param[in] phy_port Port ID
+ * @return Check UTP port is valid or not
+ * @retval JL_ERR_OK Valid
+ * @retval JL_ERR_PORT Not Valid
+ */
+JL_API jl_ret_t jl_switch_phyport_check_utp(jl_port_t phy_port);
+
+/**
+ * @brief Check whether EXT port ID is valid
+ * @details This function checks whether EXT port ID is valid
+ * @param[in] phy_port Port ID
+ * @return Check EXT port is valid or not
+ * @retval JL_ERR_OK Valid
+ * @retval JL_ERR_PORT Not Valid
+ */
+JL_API jl_ret_t jl_switch_phyport_check_ext(jl_port_t phy_port);
+
+/**
+ * @brief Check whether mac port ID is valid
+ * @details This function checks whether mac port ID is valid
+ * @param[in] mac_port Port ID
+ * @return Check mac port is valid or not
+ * @retval JL_ERR_OK Valid
+ * @retval JL_ERR_PORT Not Valid
+ */
+JL_API jl_ret_t jl_switch_macport_check(jl_port_t mac_port);
+
+/**
+ * @brief Translate phy portmask to mac portmask
+ * @details This function translates phy portmask to mac portmask
+ * @param[in] phy_portmask Phy Portmask
+ * @return MAC Portmask
+ */
+JL_API jl_portmask_t jl_switch_portmask_p2m(jl_portmask_t phy_portmask);
+
+/**
+ * @brief Translate mac portmask to phy portmask
+ * @details This function translates mac portmask to phy portmask
+ * @param[in] mac_portmask MAC Portmask
+ * @return Phy Portmask
+ */
+JL_API jl_portmask_t jl_switch_portmask_m2p(jl_portmask_t mac_portmask);
+
+/**
+ * @brief Translate phy portmask to vendor portmask
+ * @details This function translates phy portmask to vendor portmask
+ * @param[in] phy_portmask Phy Portmask
+ * @return Vendor Portmask
+ */
+JL_API jl_portmask_t jl_switch_portmask_p2vp(jl_portmask_t phy_portmask);
+
+/**
+ * @brief Translate vendor portmask to phy portmask
+ * @details This function translates vendor portmask to phy portmask
+ * @param[in] phy_portmask Vendor Phy Portmask
+ * @return Phy Portmask
+ */
+JL_API jl_portmask_t jl_switch_portmask_vp2p(jl_portmask_t phy_portmask);
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* __JL_SWITCH_H__ */
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl_types.h b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl_types.h
new file mode 100755
index 0000000..5a249c4
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/jl_types.h
@@ -0,0 +1,145 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+
+#ifndef __JL_TYPES_H__
+#define __JL_TYPES_H__
+
+/* Differentiate between built-in compile and out-of-tree compile for
+ * Linux kernel, for normal build, always include jl autoconf */
+#ifdef __KERNEL__
+#ifndef MODULE
+#include <linux/kconfig.h>
+#else
+#include "jl_autoconf.h"
+#endif /* MODULE */
+#else /* KERNEL */
+#include "jl_autoconf.h"
+#endif
+
+typedef unsigned long long jl_uint64;
+typedef long long jl_int64;
+typedef unsigned int jl_uint32;
+typedef int jl_int32;
+typedef unsigned short jl_uint16;
+typedef short jl_int16;
+typedef unsigned char jl_uint8;
+typedef signed char jl_int8;
+typedef unsigned int jl_bool;
+
+typedef unsigned int jl_uintptr;
+
+#define CONST_T const
+
+#if defined(WIN32)
+#if defined(CONFIG_JL_DLL_EXPORT_SYMBOL)
+#define JL_API __declspec(dllexport)
+#elif defined(CONFIG_JL_STATIC_LINK)
+#define JL_API
+#else
+#define JL_API __declspec(dllimport)
+#endif
+#else/* WIN32*/
+#define JL_API
+#endif
+
+
+#ifndef __KERNEL__
+#define attribute_deprecated __attribute__((deprecated))
+#define EXPORT_SYMBOL(x)
+#else
+/* avoid error in kernel build */
+#define attribute_deprecated
+#endif
+
+typedef jl_uint32 jl_portmask_t;
+
+typedef enum jl_enable_e {
+ DISABLED = 0,
+ ENABLED,
+ JL_ENABLE_END
+} jl_enable_t;
+
+#ifndef ETHER_ADDR_LEN
+#define ETHER_ADDR_LEN (6) /**< ETHER_ADDR_LEN */
+#endif
+
+/**
+ * @struct jl_mac_s
+ * @brief mac address in network byte order
+ */
+struct jl_mac_s {
+ jl_uint8 octet[ETHER_ADDR_LEN]; /**< MAC data */
+};
+
+/**
+ * @public typedef jl_mac_t
+ */
+typedef struct jl_mac_s jl_mac_t;
+
+
+typedef jl_uint32 ipaddr_t;
+
+typedef jl_uint32 jl_pri_t; /* priority vlaue */
+typedef jl_uint32 jl_qid_t; /* queue id type */
+typedef jl_uint32 jl_vlan_t; /* vlan id type */
+
+typedef enum jl_port_e {
+ UTP_PORT0 = 0,
+ UTP_PORT1,
+ UTP_PORT2,
+ UTP_PORT3,
+ UTP_PORT4,
+ UTP_PORT5,
+ UTP_PORT6,
+ UTP_PORT7,
+
+ EXT_PORT0 = 8,
+ EXT_PORT1,
+
+ JL_PORT_MAX = 10,
+ UNDEF_PORT = 0xff
+} jl_port_t;
+
+/**
+ * @enum jl_port_dir_e
+ * @brief port direction
+ */
+enum jl_port_dir_e {
+ PORT_DIR_INGRESS = 0,/**< ingress direction */
+ PORT_DIR_EGRESS = 1/**< egress direction */
+};
+
+/**
+ * @public typedef jl_port_dir_t
+ */
+typedef enum jl_port_dir_e jl_port_dir_t;
+
+/* type abstraction */
+typedef jl_int32 jl_api_ret_t;
+typedef jl_int32 jl_ret_t;
+typedef jl_uint64 jl_u_long_t;
+
+#ifndef NULL
+#define NULL 0
+#endif
+
+#ifndef TRUE
+#define TRUE 1
+#endif
+
+#ifndef FALSE
+#define FALSE 0
+#endif
+
+#endif /* __JL_TYPES_H__ */
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/l2.h b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/l2.h
new file mode 100644
index 0000000..d67e3f4
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/l2.h
@@ -0,0 +1,383 @@
+/**
+ * @file l2.h
+ * @brief L2 Switching
+ */
+
+/**
+ * @defgroup l2_switching_group L2 Switching
+ * @{
+ */
+
+/**
+ * @example example_l2_aging_learning.c
+ * @example example_l2_del_uni_entry.c
+ * @example example_l2_get_mul_entry.c
+ * @example example_l2_get_table.c
+ * @example example_l2_set_mul_entry.c
+ * @example example_l2_set_uni_entry.c
+ */
+
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+
+#ifndef __JL_API_L2_H__
+#define __JL_API_L2_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "jl_types.h"
+
+#define JL_L2_MAC_MASK ((jl_uint64)0xFFFFFFFFFFFFU) /**< JL_L2_MAC_MASK */
+
+/**
+ * @public typedef jl_l2_table_entry_idx_t
+ */
+typedef jl_uint32 jl_l2_table_entry_idx_t;
+
+#define JL_L2_LOOKUP_TABLE_BUCKET_NUM (4) /**< JL_L2_LOOKUP_TABLE_BUCKET_NUM */
+#define JL_L2_LOOKUP_TABLE_ENTRY_NUM (512) /**< JL_L2_LOOKUP_TABLE_ENTRY_NUM */
+#define JL_L2_LOOKUP_TABLE_SIZE (2048) /**< JL_L2_LOOKUP_TABLE_SIZE */
+
+#define JL_L2_COLLISION_TABLE_ENTRY_NUM (16) /**< JL_L2_COLLISION_TABLE_ENTRY_NUM */
+#define JL_L2_COLLISION_TABLE_SIZE (16) /**< JL_L2_COLLISION_TABLE_SIZE */
+#define JL_L2_COLLISION_TABLE_MASKS_SIZE (4) /**< JL_L2_COLLISION_TABLE_MASKS_SIZE */
+
+/**
+ * JL_L2_LOOKUP_MAX_ENTRY
+ */
+#define JL_L2_LOOKUP_MAX_ENTRY \
+ (JL_L2_LOOKUP_TABLE_BUCKET_NUM + JL_L2_COLLISION_TABLE_ENTRY_NUM)
+
+#define JL_L2_MC_TABLE_SIZE (64) /**< JL_L2_MC_TABLE_SIZE */
+#define JL_L2_MC_PORT_MASK (0x3FF) /**< JL_L2_MC_PORT_MASK */
+
+#define JL_L2_DA_TABLE_SIZE (2064) /**< JL_L2_DA_TABLE_SIZE */
+#define JL_L2_DA_COL_TABLE_SIZE (16) /**< JL_L2_DA_COL_TABLE_SIZE */
+#define JL_L2_COL_DA_OFFSET (2048) /**< JL_L2_COL_DA_OFFSET */
+
+#define JL_L2_AGING_TABLE_SIZE (2048) /**< JL_L2_AGING_TABLE_SIZE */
+#define JL_L2_AGING_COL_TABLE_SIZE (16) /**< JL_L2_AGING_COL_TABLE_SIZE */
+
+/*
+ * We have two types of table:
+ * - hash table(hash + 4 ways)
+ * - collision table
+ *
+ * is_collision: to indicate if this key is for collision table.
+ * mac_addr : mac address, this paramenter will be used to calculate hash
+ * code when this key is not for collision table.
+ * fid (filtering identifier): ranges from 0 ~ 15.
+ * entry_index : represents lookup table index when is not for collision. repesents collisiton table entry index when is for collision.
+ */
+
+/**
+ * @struct jl_l2_fib_key_s
+ * @brief L2 switching fib key configuration.
+ */
+struct jl_l2_fib_key_s {
+ jl_bool is_collision;/**< Indicates whether operate collision table or not */
+ jl_mac_addr_t mac_addr;/**< Indicates mac address,
+ *this paramenter will be used to calculate hash code when this key is not for collision table */
+ jl_uint32 fid;/**< Filtering Identifier, used for SVL/IVL, range[0, 14] */
+ jl_uint32 entry_index;/**< Per DA hash table, it is the index of the hash lookup table entry
+ *And per collision, it is the index of collision lookup table entry */
+};
+
+/**
+ * @public typedef jl_l2_fib_key_t
+ */
+typedef struct jl_l2_fib_key_s jl_l2_fib_key_t;
+
+/**
+ * @struct jl_l2_fib_aging_config_s
+ * @brief L2 switching fib aging configuration.
+ */
+struct jl_l2_fib_aging_config_s {
+ jl_bool is_valid;/**< Set the specified aging table entry as valid or not */
+ jl_bool is_static;/**< Set the specified aging table entry as static or not */
+};
+
+/**
+ * @public typedef jl_l2_fib_aging_config_t
+ */
+typedef struct jl_l2_fib_aging_config_s jl_l2_fib_aging_config_t;
+
+/**
+ * @struct jl_l2_fib_dest_config_s
+ * @brief L2 switching fib destination port configuration.
+ */
+typedef struct jl_l2_fib_dest_config_s {
+ jl_bool is_unicast;/**< Unicast or not, i.e Multicast */
+ jl_uint16 port;/**< L2 MAC table search result. It is destination port number for unicast or port mask table index for multicast.\n For multicast, port represents index which set in \ref jl_l2_mc_port_mask_set */
+ jl_bool pkt_drop;/**< drop the packet or not */
+} jl_l2_fib_dest_config_t;
+
+/**
+ * @public typedef jl_l2_fib_dest_config_t
+ */
+typedef struct jl_l2_fib_dest_config_s jl_l2_fib_dest_config_t;
+
+/**
+ * @struct jl_l2_fib_config_s
+ * @brief L2 switching fib integrate aging and dest configuration.
+ */
+struct jl_l2_fib_config_s {
+ jl_l2_fib_aging_config_t aging;/**< L2 FIB aging table configure */
+ jl_l2_fib_dest_config_t dest;/**< L2 MAC search result configure */
+};
+
+/**
+ * @public typedef jl_l2_fib_config_t
+ */
+typedef struct jl_l2_fib_config_s jl_l2_fib_config_t;
+
+/**
+ * @enum jl_l2_aging_unit_e
+ * @brief l2 aging unit
+ */
+enum jl_l2_aging_unit_e {
+ L2_AGING_NS,/**< 0 */
+ L2_AGING_US,/**< 1 */
+ L2_AGING_MS,/**< 2 */
+ L2_AGING_S,/**< 3 */
+ L2_AGING_END,/**< Invalid */
+};
+
+/**
+ * @public typedef jl_l2_aging_unit_t
+ */
+typedef enum jl_l2_aging_unit_e jl_l2_aging_unit_t;
+
+/**
+ * @brief Get L2 aging and learning status
+ * @details This function gets the global configuration of hardware aging and learning status
+ * @param[out] penable_aging Hardware MAC table aging enabled status
+ * @param[out] penable_learning Hardware MAC table learning enabled status
+ * @return Get L2 aging and learning status successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PARAM PARAM Fail
+ * @retval JL_ERR_TIMEOUT Read Reg Timeout
+ * @retval JL_ERR_FAIL Read Reg Fail
+ */
+JL_API jl_api_ret_t jl_l2_aging_learning_get(jl_enable_t *penable_aging, jl_enable_t *penable_learning);
+
+/**
+ * @brief Set L2 aging and learning status
+ * @details This function sets the global configuration of hardware aging and learning
+ * @param[in] enable_aging Hardware MAC table aging enabled status
+ * @param[in] enable_learning Hardware MAC table learning enable status
+ * @return Set L2 aging and learning status successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PARAM PARAM Fail
+ * @retval JL_ERR_TIMEOUT Read/Write Reg Timeout
+ * @retval JL_ERR_FAIL Read/Write Reg Fail
+ */
+JL_API jl_api_ret_t jl_l2_aging_learning_set(jl_enable_t enable_aging, jl_enable_t enable_learning);
+
+/**
+ * @brief Get L2 multicast portmask
+ * @details This function gets the value of multicast port mask table which is used in the multicast searching.
+ * @param[in] index Address of port mask table
+ * @param[out] pport_mask Value of port mask table
+ * @return Get L2 muticast portmask successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PARAM PARAM Fail
+ * @retval JL_ERR_TIMEOUT Read Reg Timeout
+ * @retval JL_ERR_FAIL Read Reg Fail
+ * @retval JL_ERR_OUT_OF_RANGE Index out of table range
+ */
+JL_API jl_api_ret_t jl_l2_mc_port_mask_get(jl_l2_table_entry_idx_t index, jl_uint32 *pport_mask);
+
+/**
+ * @brief Set L2 multicast portmask
+ * @details This function sets the value of multicast port mask table which is used in the multicast searching.\n
+ * Every multicast port mask is a multicast group, the total number of mulicast group is 64.\n
+ * Every entry of multicast port mask is 10 bits width corresponds to 10 ports.\n
+ * Set to 1 is part of the index specified multicast group.
+ * @param[in] index Index of port mask table
+ * @param[in] port_mask Value of port mask table
+ * @return Set L2 muticast portmask successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PARAM PARAM Fail
+ * @retval JL_ERR_TIMEOUT Read/Write Reg Timeout
+ * @retval JL_ERR_FAIL Read/Write Reg Fail
+ * @retval JL_ERR_OUT_OF_RANGE Index out of table range
+ */
+JL_API jl_api_ret_t jl_l2_mc_port_mask_set(jl_l2_table_entry_idx_t index, jl_uint32 port_mask);
+
+/**
+ * @brief Get specific port's L2 multicast learning status
+ * @details This function gets multicast learning status of the specified port
+ * @param[in] port Port port index
+ * @param[out] pen_learning The port's multicast learning status
+ * @return Get port muticast learning stat successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PARAM PARAM Fail
+ * @retval JL_ERR_TIMEOUT Read Reg Timeout
+ * @retval JL_ERR_FAIL Read Reg Fail
+ * @retval JL_ERR_PORT Error Port id
+ */
+JL_API jl_api_ret_t jl_l2_mc_port_learning_get(jl_port_t port, jl_enable_t *pen_learning);
+
+/**
+ * @brief Set specific port's L2 multicast learning status
+ * @details This function sets multicast learning status of the specified port
+ * @param[in] port port index
+ * @param[in] en_learning value of the port mc learning status
+ * @return Set port muticast learning stat successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PARAM PARAM Fail
+ * @retval JL_ERR_TIMEOUT Read/Write Reg Timeout
+ * @retval JL_ERR_FAIL Read/Write Reg Fail
+ * @retval JL_ERR_PORT Error Port id
+ */
+JL_API jl_api_ret_t jl_l2_mc_port_learning_set(jl_port_t port, jl_enable_t en_learning);
+
+/**
+ * @brief Get L2 fib configurations
+ * @details This function takes the specified MAC address and vid field of pkey as input,
+ * searches it in hash table and collision table. \n
+ * Then return the matched L2 info if found or return JL_ERR_NOT_FOUND if not.
+ * @param[in] pkey The indication (Hash table or collision table) and address of the table
+ * @param[out] pcfg The vaule of table
+ * @return Get L2 fib configurations successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PARAM PARAM Fail
+ * @retval JL_ERR_TIMEOUT Read Reg Timeout
+ * @retval JL_ERR_FAIL Read Reg Fail
+ * @retval JL_ERR_NOT_FOUND Not Matched Finally
+ * @note
+ * Specify the mac and fid as the input parameters,
+ * the API will return the related information in L2 lookup tables.
+ *
+ */
+JL_API jl_api_ret_t jl_l2_fib_config_get(jl_l2_fib_key_t *pkey, jl_l2_fib_config_t *pcfg);
+
+/**
+ * @brief Get L2 fib configurations by index
+ * @details This function gets all the L2 info by the specified entry index
+ * @param[in] entry_index the L2 entry index, ranges[0, 2063]
+ * @param[out] pkey The indication (Hash table or collision table) and the MAC Address of the table
+ * @param[out] pcfg The info of table
+ * @return Get L2 fib configurations successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PARAM PARAM Fail
+ * @retval JL_ERR_TIMEOUT Read Reg Timeout
+ * @retval JL_ERR_FAIL Read Reg Fail
+ * @note
+ * Specify the entry_index as the input parameters,
+ * the API will return the related information in L2 lookup tables in pkey and pcfg.
+ *
+ */
+JL_API jl_api_ret_t jl_l2_fib_config_get_by_index(jl_uint32 entry_index, jl_l2_fib_key_t *pkey, jl_l2_fib_config_t *pcfg);
+
+/**
+ * @brief Add the MAC address automatically in the L2 MAC table
+ * @details This function adds the MAC address automatically in the L2 MAC table. It works in an un-aggressive mode, i.e, \n
+ * The MAC address will be added successfully only no DA has collision or collision table is non-full. Or it will return fail.
+ * @param[in] pkey input pkey MAC and fid for L2 MAC table, entry index is output
+ * @param[in] pcfg Data of L2 MAC table
+ * @return Set L2 fib configurations successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PARAM PARAM Fail
+ * @retval JL_ERR_TIMEOUT Read/Write Reg Timeout
+ * @retval JL_ERR_FAIL Read/Write Reg Fail
+ * @note
+ - It works in an un-aggressive mode, i.e, the MAC address will be added successfully only no DA has collision or collision table is non-full. Or it will return fail.
+ - You can set the is_valid = false to clear one mac address with input parameters mac_addr and fid.
+ */
+JL_API jl_api_ret_t jl_l2_fib_config_set_auto(jl_l2_fib_key_t *pkey, jl_l2_fib_config_t *pcfg);
+
+/**
+ * @brief Fast clear the dynamic entries in MAC lookup table and the collision table
+ * @details This function clears all the dynamic entries in L2 DA hash table and collision table simultaneously.
+ * @return Fast clear opertion is successful or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PARAM PARAM Fail
+ * @retval JL_ERR_TIMEOUT Read/Write Reg Timeout
+ * @retval JL_ERR_FAIL Read/Write Reg Fail
+ */
+JL_API jl_api_ret_t jl_l2_fib_fast_clear_dynamic(void);
+
+/**
+ * @brief Clear the MAC lookup table or the collision table
+ * @details This function clears the L2 DA hash table or collision table as required
+ * @param[in] is_collison clear the collision table 0: clear the lookup table
+ * @return Clear opertion is successful or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PARAM PARAM Fail
+ * @retval JL_ERR_TIMEOUT Read/Write Reg Timeout
+ * @retval JL_ERR_FAIL Read/Write Reg Fail
+ */
+JL_API jl_api_ret_t jl_l2_fib_clear(jl_bool is_collison);
+
+/**
+ * @brief Clear the MAC lookup table and the collision table
+ * @details This function clears the L2 DA hash table and collision table simultaneously
+ * @return Clear opertion is successful or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PARAM PARAM Fail
+ * @retval JL_ERR_TIMEOUT Read/Write Reg Timeout
+ * @retval JL_ERR_FAIL Read/Write Reg Fail
+ */
+JL_API jl_api_ret_t jl_l2_fib_clear_all(void);
+
+/**
+ * @brief Set L2 aging time
+ * @details This function configures the L2 MAC table hardware aging period.
+ * @param[in] time MAC table hardware aging period
+ * @param[in] unit The unit of aging period
+ * @return Set L2 aging time successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PARAM PARAM Fail
+ * @retval JL_ERR_TIMEOUT Read/Write Reg Timeout
+ * @retval JL_ERR_FAIL Read/Write Reg Fail
+ */
+JL_API jl_api_ret_t jl_l2_aging_time_set(jl_uint32 time, jl_uint8 unit);
+
+/**
+ * @brief Get L2 aging time
+ * @details This function gets the L2 MAC table hardware aging period.
+ * @param[out] ptime The MAC table hardware aging period
+ * @param[out] punit The unit of aging period
+ * @return Get L2 aging time successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PARAM PARAM Fail
+ * @retval JL_ERR_TIMEOUT Read/Write Reg Timeout
+ * @retval JL_ERR_FAIL Read/Write Reg Fail
+ */
+JL_API jl_api_ret_t jl_l2_aging_time_get(jl_uint32 *ptime, jl_uint8 *punit);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __JL_API_L2_H__ */
+/** @} L2 Switching APIs*/
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/led.h b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/led.h
new file mode 100644
index 0000000..399d759
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/led.h
@@ -0,0 +1,233 @@
+/**
+ * @file led.h
+ * @brief LED
+ */
+
+/**
+ * @defgroup led_group LED
+ * @{
+ */
+
+/**
+ * @example example_led_oper_mode.c
+ */
+
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+
+#ifndef __JL_API_LED_H__
+#define __JL_API_LED_H__
+
+#include "jl_base.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @enum jl_led_group_e
+ * @brief led group.
+ */
+enum jl_led_group_e {
+ LED_GROUP0 = 0,/**< 0 */
+ LED_GROUP1,/**< 1 */
+ LED_GROUP_END,/**< Invalid */
+};
+
+/**
+ * @public typedef jl_led_group_t
+ */
+typedef enum jl_led_group_e jl_led_group_t;
+
+/**
+ * @enum jl_led_blink_rate_e
+ * @brief led blink rate.
+ */
+enum jl_led_blink_rate_e {
+ LED_BLINKRATE_16MS = 1,/**< 1 */
+ LED_BLINKRATE_32MS = 2,/**< 2 */
+ LED_BLINKRATE_48MS = 3,/**< 3 */
+ LED_BLINKRATE_64MS = 4,/**< 4 */
+ LED_BLINKRATE_96MS = 6,/**< 6 */
+ LED_BLINKRATE_128MS = 8,/**< 8 */
+ LED_BLINKRATE_256MS = 16,/**< 16 */
+ LED_BLINKRATE_512MS = 32,/**< 32 */
+ LED_BLINKRATE_1024MS = 64,/**< 64 */
+ LED_BLINKRATE_2032MS = 127,/**< 127 */
+ LED_BLINKRATE_END,/**< Invalid */
+};
+
+/**
+ * @public typedef jl_led_blink_rate_t
+ */
+typedef enum jl_led_blink_rate_e jl_led_blink_rate_t;
+
+/**
+ * @enum jl_led_config_e
+ * @brief led config.
+ */
+enum jl_led_config_e {
+ LED_CONFIG_LINK = 0,/**< 0 */
+ LED_CONFIG_ACT,/**< 1 */
+ LED_CONFIG_LINK_ACT,/**< 2 */
+ LED_CONFIG_SPD10,/**< 3 */
+ LED_CONFIG_SPD100,/**< 4 */
+ LED_CONFIG_SPD10_ACT,/**< 5 */
+ LED_CONFIG_SPD100_ACT,/**< 6 */
+ LED_CONFIG_DUPLEX,/**< 7 */
+ LED_CONFIG_COL,/**< 8 */
+ LED_CONFIG_LOOP,/**< 9 */
+ LED_CONFIG_END,/**< Invalid */
+};
+
+/**
+ * @public typedef jl_led_config_t
+ */
+typedef enum jl_led_config_e jl_led_config_t;
+
+/**
+ * @enum jl_led_active_e
+ * @brief led active mode.
+ */
+enum jl_led_active_e {
+ LED_ACTIVE_HIGH = 0,/**< 0 */
+ LED_ACTIVE_LOW,/**< 1 */
+ LED_ACTIVE_END,/**< Invalid */
+};
+
+/**
+ * @public typedef jl_led_active_t
+ */
+typedef enum jl_led_active_e jl_led_active_t;
+
+/**
+ * @brief Set LED enable configuration
+ * @details This function can be used to enable LED per port per group. portmask indicates an
+ * entry of 10-bit correspond to 10 ports. If set to 1, it means the specified led of
+ * this port will be enabled. If set to 0, it means the specified led of this port will be disabled.
+ * @param[in] group LED group index
+ * @param[in] portmask PHY portmask
+ * @return set LED enable successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PARAM PARAM Fail
+ * @retval JL_ERR_TIMEOUT Read/Write Reg Timeout
+ * @retval JL_ERR_FAIL Read/Write Reg Fail
+ */
+JL_API jl_api_ret_t jl_led_enable_set(jl_led_group_t group, jl_portmask_t portmask);
+
+/**
+ * @brief Get LED enable status
+ * @param[in] group LED group index
+ * @param[out] portmask PHY portmask
+ * @return get LED enable status successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PARAM PARAM Fail
+ * @retval JL_ERR_TIMEOUT Read Reg Timeout
+ * @retval JL_ERR_FAIL Read Reg Fail
+ */
+JL_API jl_api_ret_t jl_led_enable_get(jl_led_group_t group, jl_portmask_t *portmask);
+
+/**
+ * @brief Set LED configuration
+ * @details This function can be used to set the specified led group behavior.
+ * @param[in] group LED group index
+ * @param[in] config led behavior configuration
+ * @return set LED configuration successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PARAM PARAM Fail
+ * @retval JL_ERR_TIMEOUT Read/Write Reg Timeout
+ * @retval JL_ERR_FAIL Read/Write Reg Fail
+ */
+JL_API jl_api_ret_t jl_led_group_config_set(jl_led_group_t group, jl_led_config_t config);
+
+/**
+ * @brief Get LED configuration
+ * @details This function can be used to get the specified led group behavior
+ * @param[in] group LED group index
+ * @param[out] pconfig LED behavior configuration
+ * @return get LED configuration successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PARAM PARAM Fail
+ * @retval JL_ERR_TIMEOUT Read Reg Timeout
+ * @retval JL_ERR_FAIL Read Reg Fail
+ */
+JL_API jl_api_ret_t jl_led_group_config_get(jl_led_group_t group, jl_led_config_t *pconfig);
+
+/**
+ * @brief Set LED blink rate in millisecond
+ * @details This function can be used to set the all the LED blink rate.
+ * @param[in] blink_rate LED blink rate
+ * @return set LED blink rate successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PARAM PARAM Fail
+ * @retval JL_ERR_TIMEOUT Read/Write Reg Timeout
+ * @retval JL_ERR_FAIL Read/Write Reg Fail
+ */
+JL_API jl_api_ret_t jl_led_blink_rate_set(jl_led_blink_rate_t blink_rate);
+
+/**
+ * @brief Get LED blink rate in millisecond
+ * @details This function can be used to get the blink rate of all the LED groups.
+ * @param[out] blink_rate LED blink rate
+ * @return get LED blink rate successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PARAM PARAM Fail
+ * @retval JL_ERR_TIMEOUT Read Reg Timeout
+ * @retval JL_ERR_FAIL Read Reg Fail
+ */
+JL_API jl_api_ret_t jl_led_blink_rate_get(jl_led_blink_rate_t *blink_rate);
+
+/**
+ * @brief Set LED polarity as active high
+ * @details This function can be used to set the specified LED group of the specified portmask as
+ * active high triggered. Portmask indicates an entry of 10-bit correspond to 10 ports.
+ * If set to 1, it means the specified led of this port will be active high triggered.
+ * If set to 0, it means the specified led of this port will be active low triggered.
+ * @param[in] group LED group index
+ * @param[in] portmask PHY portmask
+ * @return set LED active high successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PARAM PARAM Fail
+ * @retval JL_ERR_TIMEOUT Read/Write Reg Timeout
+ * @retval JL_ERR_FAIL Read/Write Reg Fail
+ */
+JL_API jl_api_ret_t jl_led_group_active_high_set(jl_led_group_t group, jl_portmask_t portmask);
+
+/**
+ * @brief Get LED active high ports
+ * @details This function can be used to get the active high triggered ports of the specified LED group.
+ * @param[in] group LED group index
+ * @param[out] portmask PHY portmask
+ * @return Get LED active high successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PARAM PARAM Fail
+ * @retval JL_ERR_TIMEOUT Read Reg Timeout
+ * @retval JL_ERR_FAIL Read Reg Fail
+ */
+JL_API jl_api_ret_t jl_led_group_active_high_get(jl_led_group_t group, jl_portmask_t *portmask);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __JL_API_LED_H__*/
+/** @} LED APIs*/
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/lpd.h b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/lpd.h
new file mode 100644
index 0000000..a78bc04
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/lpd.h
@@ -0,0 +1,116 @@
+/**
+ * @file lpd.h
+ * @brief Loop Detection
+ */
+
+/**
+ * @defgroup loop_detection_group Loop Detection
+ * @{
+ */
+
+/**
+ * @example example_lpd.c
+ */
+
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+
+#ifndef __JL_API_LPD_H__
+#define __JL_API_LPD_H__
+
+#include "jl_base.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+/**
+ * @struct jl_lpd_config_s
+ * @brief loop detection configuration.
+ * @note "src_mac" should be distinct for each switch using JLSemi Loop Detection Function \n
+ * "eth_type" "op_code" should be set to the same value for switches using JLSemi Loop Detection Function
+ */
+struct jl_lpd_config_s {
+ jl_mac_t src_mac; /**< loop frame src mac address (a random address) */
+ jl_uint16 eth_type; /**< ethernet type (a given value) */
+ jl_uint16 op_code; /**< operation code (a given value)*/
+ jl_uint16 ttl; /**< loop detection frame ttl (to avoid broadcast storm)*/
+};
+
+/**
+ * @public typedef jl_lpd_config_t
+ */
+typedef struct jl_lpd_config_s jl_lpd_config_t;
+
+/**
+ * @brief Get "Loop Detection" configuration
+ * @param[out] lpd_config Loop Detection Structure
+ * @return loop detection configuration
+ * @retval JL_ERR_OK Ok
+ * @retval minus_value Fail
+ */
+JL_API jl_api_ret_t jl_lpd_config_get(jl_lpd_config_t *lpd_config);
+
+/**
+ * @brief Set "Loop Detection" configuration
+ * @param[in] lpd_config Loop Detection Structure
+ * @return function result
+ * @retval JL_ERR_OK Ok
+ * @retval minus_value Fail
+ */
+JL_API jl_api_ret_t jl_lpd_config_set(jl_lpd_config_t *lpd_config);
+
+/**
+ * @brief Enable "Loop Detection"
+ * @return function result
+ * @retval JL_ERR_OK Ok
+ * @retval minus_value Fail
+ */
+JL_API jl_api_ret_t jl_lpd_enable(void);
+
+/**
+ * @brief Disable "Loop Detection"
+ * @return function result
+ * @retval JL_ERR_OK Ok
+ * @retval minus_value Fail
+ */
+JL_API jl_api_ret_t jl_lpd_disable(void);
+
+/**
+ * @brief Get "Loop Detection" ports in loop
+ * @param[out] port_mask ports(in loop) mask
+ * @return function result
+ * @retval JL_ERR_OK Ok
+ * @retval minus_value Fail
+ */
+JL_API jl_api_ret_t jl_lpd_lp_ports_get(jl_portmask_t *port_mask);
+
+/**
+ * @brief Trigger one "Loop Detection" process
+ * @details Send a loop detection frame automatically and start to check whether loop is detected. \n
+ * If loop is detected the port(in loop) LEDS and LED(Buzzer) on loop indication pin will be drived to work.
+ * @param[in] port to send the loop detection frame
+ * @return function result
+ * @retval JL_ERR_OK Ok
+ * @retval minus_value Fail
+ */
+JL_API jl_api_ret_t jl_lpd_trigger_once(jl_port_t port);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __JL_API_LPD */
+/** @} Loop Detection APIs*/
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/mib.h b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/mib.h
new file mode 100644
index 0000000..1ed1a5f
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/mib.h
@@ -0,0 +1,322 @@
+/**
+ * @file mib.h
+ * @brief MIB counter
+ */
+
+/**
+ * @defgroup mib_group MIB
+ * @{
+ */
+
+/**
+ * @example example_mib_port_cnt.c
+ */
+
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+
+#ifndef __JL_API_MIB_H__
+#define __JL_API_MIB_H__
+
+#include "jl_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @public typedef jl_mib_counter_t
+ */
+typedef jl_uint64 jl_mib_counter_t;
+
+/**
+ * @enum jl_port_mib_type_u
+ * @brief port MIB counter type.
+ */
+enum jl_port_mib_type_u {
+ PORT_MIB_TX_PKT_CNT = 0,/**< 0 */
+ PORT_MIB_TX_PKT_BYTE_CNT,/**< 1 */
+ PORT_MIB_TX_PKT_UC_CNT,/**< 2 */
+ PORT_MIB_TX_PKT_UC_BYTE_CNT,/**< 3 */
+ PORT_MIB_TX_PKT_MC_CNT,/**< 4 */
+ PORT_MIB_TX_PKT_MC_BYTE_CNT,/**< 5 */
+ PORT_MIB_TX_PKT_BC_CNT,/**< 6 */
+ PORT_MIB_TX_PKT_BC_BYTE_CNT,/**< 7 */
+ PORT_MIB_TX_PKT_DRP_CNT,/**< 8 */
+ PORT_MIB_TX_PKT_ERR_CNT,/**< 9 */
+
+ PORT_MIB_RX_PKT_CNT,/**< 10 */
+ PORT_MIB_RX_PKT_BYTE_CNT,/**< 11 */
+ PORT_MIB_RX_PKT_UC_CNT,/**< 12 */
+ PORT_MIB_RX_PKT_UC_BYTE_CNT,/**< 13 */
+ PORT_MIB_RX_PKT_MC_CNT,/**< 14 */
+ PORT_MIB_RX_PKT_MC_BYTE_CNT,/**< 15 */
+ PORT_MIB_RX_PKT_BC_CNT,/**< 16 */
+ PORT_MIB_RX_PKT_BC_BYTE_CNT,/**< 17 */
+ PORT_MIB_RX_PKT_DRP_CNT,/**< 18 */
+ PORT_MIB_RX_PKT_CRC_ERR_CNT,/**< 19 */
+ PORT_MIB_RX_FRAG_ERR_CNT,/**< 20 */
+
+ PORT_MIB_TYPE_END/**< Invalid */
+};
+
+/**
+ * @public typedef jl_port_mib_type_t
+ */
+typedef enum jl_port_mib_type_u jl_port_mib_type_t;
+
+/**
+ * @struct jl_port_mib_cnt_s
+ * @brief port MIB counters.
+ */
+struct jl_port_mib_cnt_s {
+ jl_uint32 rc_enable;/**< Indicates read clear mode */
+ jl_uint64 tx_pkt_cnt;/**< Tx packet counter */
+ jl_uint64 tx_pkt_byte_cnt;/**< Tx packet byte counter */
+ jl_uint64 tx_pkt_uc_cnt;/**< Tx unicast packet counter */
+ jl_uint64 tx_pkt_uc_byte_cnt;/**< Tx unicast packet byte counter */
+ jl_uint64 tx_pkt_mc_cnt;/**< Tx mulicast packet counter */
+ jl_uint64 tx_pkt_mc_byte_cnt;/**< Tx mulicast packet byte counter */
+ jl_uint64 tx_pkt_bc_cnt;/**< Tx broadcast packet counter */
+ jl_uint64 tx_pkt_bc_byte_cnt;/**< Tx broadcast packet byte counter */
+ jl_uint32 tx_pkt_drp_cnt;/**< Tx drop packet counter */
+ jl_uint32 tx_pkt_err_cnt;/**< Tx error packet counter */
+
+ jl_uint64 rx_pkt_cnt;/**< Rx packet counter */
+ jl_uint64 rx_pkt_byte_cnt;/**< Rx packet byte counter */
+ jl_uint64 rx_pkt_uc_cnt;/**< Rx unicast packet counter */
+ jl_uint64 rx_pkt_uc_byte_cnt;/**< Rx unicast packet byte counter */
+ jl_uint64 rx_pkt_mc_cnt;/**< Rx multicast packet counter */
+ jl_uint64 rx_pkt_mc_byte_cnt;/**< Rx multicast packet byte counter */
+ jl_uint64 rx_pkt_bc_cnt;/**< Rx broacast packet counter */
+ jl_uint64 rx_pkt_bc_byte_cnt;/**< Rx broadcast packet byte counter */
+ jl_uint32 rx_pkt_drp_cnt;/**< Rx drop packet counter */
+ jl_uint32 rx_pkt_crc_err_cnt;/**< Rx CRC error packet counter */
+ jl_uint32 rx_frag_err_cnt;/**< Rx fragmentation error counter */
+};
+
+/**
+ * @public typedef jl_port_mib_cnt_t
+ */
+typedef struct jl_port_mib_cnt_s jl_port_mib_cnt_t;
+
+
+/**
+ * JL_MIB_CHECK_TYPE(type)
+ */
+#define JL_MIB_CHECK_TYPE(type) \
+ do { \
+ if (type >= PORT_MIB_TYPE_END) \
+ return JL_ERR_PARAM; \
+ } while(0)
+
+
+/**
+ * @brief Get port read-clear attribute of the MIB counter
+ * @details This function gets port read-clear attribute of the MIB counter.
+ * @param[in] port Index of port number
+ * @param[out] penable MIB counter read-clear enable or disable
+ * @return get port read-clear attribute of the MIB counter successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PARAM PARAM Fail
+ * @retval JL_ERR_TIMEOUT Read Reg Timeout
+ * @retval JL_ERR_FAIL Read Reg Fail
+ * @retval JL_ERR_PORT Error Port id
+ */
+JL_API jl_api_ret_t jl_mib_port_rc_mode_get(jl_port_t port, jl_enable_t *penable);
+
+/**
+ * @brief Set port read-clear attribute of the MIB counter
+ * @details This function globally sets the read-clear attribute of the MIB counter
+ * @param[in] port Index of port number
+ * @param[in] enable MIB counter read-clear enable or disable
+ * @return set port read-clear attribute of the MIB counter successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PARAM PARAM Fail
+ * @retval JL_ERR_TIMEOUT Read/Write Reg Timeout
+ * @retval JL_ERR_FAIL Read/Write Reg Fail
+ * @retval JL_ERR_PORT Error Port id
+ */
+JL_API jl_api_ret_t jl_mib_port_rc_mode_set(jl_port_t port, jl_enable_t enable);
+
+/**
+ * @brief Clears port MIB counter of the specified type
+ * @details This function clears port MIB counter of the specified type
+ * @param[in] port Index of port number
+ * @param[in] type The type of MIB rule
+ * @return clears port MIB counter of the specified type successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PARAM PARAM Fail
+ * @retval JL_ERR_TIMEOUT Read/Write Reg Timeout
+ * @retval JL_ERR_FAIL Read/Write Reg Fail
+ * @retval JL_ERR_PORT Error Port id
+ */
+JL_API jl_api_ret_t jl_mib_port_clear(jl_port_t port, jl_port_mib_type_t type);
+
+/**
+ * @brief Clears port all type MIB counter
+ * @details This function clears port all type MIB counter.
+ * @param[in] port Index of port number
+ * @return clears port all types of MIB counter successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PARAM PARAM Fail
+ * @retval JL_ERR_TIMEOUT Read/Write Reg Timeout
+ * @retval JL_ERR_FAIL Read/Write Reg Fail
+ * @retval JL_ERR_PORT Error Port id
+ */
+JL_API jl_api_ret_t jl_mib_port_clear_all(jl_port_t port);
+
+/**
+ * @brief Get port MIB counter as specified type
+ * @details This function gets the port MIB counter as specified type.
+ * @param[in] port Index of port number
+ * @param[in] type The type of MIB counter
+ * @param[out] pcnt MIB counter value
+ * @return get port MIB counter of the specified type successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PARAM PARAM Fail
+ * @retval JL_ERR_TIMEOUT Read Reg Timeout
+ * @retval JL_ERR_FAIL Read Reg Fail
+ * @retval JL_ERR_PORT Error Port id
+ */
+JL_API jl_api_ret_t jl_mib_port_get(jl_port_t port, jl_port_mib_type_t type, jl_mib_counter_t *pcnt);
+
+/**
+ * @brief Get all kinds of MIB counters of the specified port
+ * @details This function gets all kinds of MIB counters of specified port.
+ * @param[in] port Index of port number
+ * @param[out] pport_cnt All kinds of MIB counter of a port
+ * @return get all kinds of MIB counters of the specified port successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PARAM PARAM Fail
+ * @retval JL_ERR_TIMEOUT Read Reg Timeout
+ * @retval JL_ERR_FAIL Read Reg Fail
+ * @retval JL_ERR_PORT Error Port id
+ */
+JL_API jl_api_ret_t jl_mib_port_get_all(jl_port_t port, jl_port_mib_cnt_t *pport_cnt);
+
+/**
+ * @struct jl_mib_swc_glb_drop_s
+ * @brief Swcore MIB global drop counters.
+ */
+/**
+ * @public typedef jl_mib_swc_glb_drop_t
+ */
+typedef struct jl_mib_swc_glb_drop_s {
+ jl_uint32 ipp_broken_pkt;/**< IPP Broken Packets */
+ jl_uint32 ipp_pm_drop;/**< IPP PM Drop */
+ jl_uint32 epp_pm_drop;/**< EPP PM Drop */
+ jl_uint32 unknown_ingress_drop;/**< Unknown Ingress Drop */
+ jl_uint32 empty_mask_drop;/**< Empty Mask Drop */
+ jl_uint32 ingress_stp_listen_drop;/**< Ingress Spanning Tree Drop Listen */
+ jl_uint32 ingress_stp_learn_drop;/**< Ingress Spanning Tree Drop Learning */
+ jl_uint32 ingress_stp_block_drop;/**< Ingress Spanning Tree Drop Blocking */
+ jl_uint32 l2_lookup_drop;/**< L2 Lookup Drop */
+ jl_uint32 ingress_config_acl_drop;/**< Ingress Configurable ACL Drop */
+ jl_uint32 vlan_member_drop;/**< VLAN Member Drop */
+ jl_uint32 mini_allow_vlan_drop;/**< Minimum Allowed VLAN Drop */
+ jl_uint32 max_allow_vlan_drop;/**< Maximum Allowed VLAN Drop */
+ jl_uint32 buf_overflow_drop;/**< Buffer Overflow Drop */
+ jl_uint32 ingress_res_manager_drop;/**< Ingress Resource Manager Drop */
+ jl_uint32 re_queue_overflow_drop;/**< Re-queue Overflow Drop */
+} jl_mib_swc_glb_drop_t;
+
+/**
+ * @struct jl_mib_swc_port_drop_s
+ * @brief Swcore port MIB port drop counters.
+ */
+/**
+ * @public typedef jl_mib_swc_port_drop_t
+ */
+typedef struct jl_mib_swc_port_drop_s {
+ jl_uint32 sp_overflow_drop;/**< SP Overflow Drop */
+ jl_uint32 ps_err_underrun;/**< PS Error Counter underrun */
+ jl_uint32 ps_err_overflow;/**< PS Error Counter overflow */
+ jl_uint32 unknown_egress_drop;/**< Unknown Egress Drop */
+ jl_uint32 egress_port_dis_drop;/**< Egress Port Disabled Drop */
+ jl_uint32 queue_off_drop;/**< Queue Off Drop */
+ jl_uint32 egress_stp_drop;/**< Egress Spanning Tree Drop */
+ jl_uint32 mbsc_drop;/**< MBSC Drop */
+ jl_uint32 drain_port_drop;/**< Drain Port Drop */
+ jl_uint32 mac_rx_broken_pkt;/**< MAC RX Broken Packets */
+ jl_uint32 mac_rx_short_pkt_drop;/**< MAC RX Short Packet Drop */
+ jl_uint32 egress_res_manage_drop;/**< Egress Resource Management Drop */
+} jl_mib_swc_port_drop_t;
+
+/**
+ * @brief Get all kinds of swc global drop counters.
+ * @details This function gets all kinds of swc global drop counters.
+ * @param pport_cnt All kinds of global drop counters
+ * @return Get all kinds of swc global drop counters successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PARAM PARAM Fail
+ * @retval JL_ERR_TIMEOUT Read Reg Timeout
+ * @retval JL_ERR_FAIL Read Reg Fail
+ * @retval JL_ERR_PORT Error Port id
+ */
+JL_API jl_api_ret_t jl_mib_swc_global_drop_get(jl_mib_swc_glb_drop_t *pport_cnt);
+
+/**
+ * @brief Clear all kinds of swc global drop counters.
+ * @details This function gets all kinds of swc global drop counters.
+ * @return Clear all kinds of swc global drop counters successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PARAM PARAM Fail
+ * @retval JL_ERR_TIMEOUT Read Reg Timeout
+ * @retval JL_ERR_FAIL Read Reg Fail
+ * @retval JL_ERR_PORT Error Port id
+ */
+JL_API jl_api_ret_t jl_mib_swc_global_drop_clear(void);
+
+/**
+ * @brief Get all kinds of swc drop counters of the specified port
+ * @details This function gets all kinds of swc drop counters of the specified port.
+ * @param port Index of port number
+ * @param pport_cnt All kinds of swc drop counters of a port
+ * @return Get all kinds of swc drop counters of the specified port successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PARAM PARAM Fail
+ * @retval JL_ERR_TIMEOUT Read Reg Timeout
+ * @retval JL_ERR_FAIL Read Reg Fail
+ * @retval JL_ERR_PORT Error Port id
+ */
+JL_API jl_api_ret_t jl_mib_swc_port_drop_get(jl_port_t port, jl_mib_swc_port_drop_t *pport_cnt);
+
+/**
+ * @brief Clear all kinds of swc drop counters of the specified port
+ * @details This function gets all kinds of swc drop counters of the specified port.
+ * @param port Index of port number
+ * @return Clear all kinds of swc drop counters of the specified port successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PARAM PARAM Fail
+ * @retval JL_ERR_TIMEOUT Read Reg Timeout
+ * @retval JL_ERR_FAIL Read Reg Fail
+ * @retval JL_ERR_PORT Error Port id
+ */
+JL_API jl_api_ret_t jl_mib_swc_port_drop_clear(jl_port_t port);
+#ifdef __cplusplus
+}
+#endif
+#endif /* __JL_API_MIB_H__ */
+/** @} MIB APIs*/
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/mirror.h b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/mirror.h
new file mode 100644
index 0000000..9087a05
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/mirror.h
@@ -0,0 +1,133 @@
+/**
+ * @file mirror.h
+ * @brief Port mirror reference
+ */
+
+/**
+ * @defgroup mirror_group Mirror
+ * @{
+ */
+
+/**
+ * @example example_mirror_port_in.c
+ * @example example_mirror_port_out.c
+ */
+
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+
+#ifndef __JL_API_MIRROR_H__
+#define __JL_API_MIRROR_H__
+
+#include "jl_base.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Get input mirror port
+ * @param[in] mirrored_port mirrored port(source port)
+ * @param[out] mirroring_port mirroring port(monitor port)
+ * @return get mirroring port successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PARAM PARAM Fail
+ * @retval JL_ERR_TIMEOUT Read Reg Timeout
+ * @retval JL_ERR_FAIL Read Reg Fail
+ * @retval JL_ERR_PORT Error Port id
+ * @retval JL_ERR_UNAVAIL unavailable Port id
+ */
+JL_API jl_api_ret_t jl_mirror_input_mr_get(jl_port_t mirrored_port,
+ jl_port_t *mirroring_port);
+
+/**
+ * @brief Get output mirror port
+ * @param[in] mirrored_port mirrored port(source port)
+ * @param[out] mirroring_port mirroring port(monitor port)
+ * @return get mirroring port successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PARAM PARAM Fail
+ * @retval JL_ERR_TIMEOUT Read Reg Timeout
+ * @retval JL_ERR_FAIL Read Reg Fail
+ * @retval JL_ERR_PORT Error Port id
+ * @retval JL_ERR_UNAVAIL unavailable Port id
+ */
+JL_API jl_api_ret_t jl_mirror_output_mr_get(jl_port_t mirrored_port,
+ jl_port_t *mirroring_port);
+
+/**
+ * @brief Set input mirror port
+ * @param[in] mirrored_port mirrored port(source port)
+ * @param[out] mirroring_port mirroring port(monitor port)
+ * @return set mirroring port successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PARAM PARAM Fail
+ * @retval JL_ERR_TIMEOUT Read/Write Reg Timeout
+ * @retval JL_ERR_FAIL Read/Write Reg Fail
+ * @retval JL_ERR_PORT Error Port id
+ */
+JL_API jl_api_ret_t jl_mirror_input_mr_set(jl_port_t mirrored_port,
+ jl_port_t mirroring_port);
+
+
+/**
+ * @brief Set output mirror port
+ * @param[in] mirrored_port mirrored port(source port)
+ * @param[out] mirroring_port mirroring port(monitor port)
+ * @return set mirroring port successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PARAM PARAM Fail
+ * @retval JL_ERR_TIMEOUT Read/Write Reg Timeout
+ * @retval JL_ERR_FAIL Read/Write Reg Fail
+ * @retval JL_ERR_PORT Error Port id
+ */
+JL_API jl_api_ret_t jl_mirror_output_mr_set(jl_port_t mirrored_port,
+ jl_port_t mirroring_port);
+
+/**
+ * @brief Clear input mirror port
+ * @param[in] mirrored_port mirrored port(source port)
+ * @return clear mirrored_port port successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PARAM PARAM Fail
+ * @retval JL_ERR_TIMEOUT Read/Write Reg Timeout
+ * @retval JL_ERR_FAIL Read/Write Reg Fail
+ * @retval JL_ERR_PORT Error Port id
+ */
+JL_API jl_api_ret_t jl_mirror_input_mr_clear(jl_port_t mirrored_port);
+
+/**
+ * @brief Clear output mirror port
+ * @param[in] mirrored_port mirrored port(source port)
+ * @return clear mirrored_port port successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PARAM PARAM Fail
+ * @retval JL_ERR_TIMEOUT Read/Write Reg Timeout
+ * @retval JL_ERR_FAIL Read/Write Reg Fail
+ * @retval JL_ERR_PORT Error Port id
+ */
+JL_API jl_api_ret_t jl_mirror_output_mr_clear(jl_port_t mirrored_port);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __JL_API_MIRROR_H__ */
+/** @} Mirror APIs*/
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/port.h b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/port.h
new file mode 100644
index 0000000..172cceb
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/port.h
@@ -0,0 +1,549 @@
+/**
+ * @file port.h
+ * @brief Port
+ */
+
+/**
+ * @defgroup port_group port
+ * @{
+ */
+
+/**
+ * @example example_port_mac_port.c
+ * @example example_port_phy_port.c
+ */
+
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+
+#ifndef __JL_API_PORT_H__
+#define __JL_API_PORT_H__
+
+#include "jl_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @enum jl_port_link_status_e
+ * @brief port link status.
+ */
+enum jl_port_link_status_e {
+ PORT_LINKDOWN = 0,/**< 0 */
+ PORT_LINKUP,/**< 1 */
+ PORT_LINKSTATUS_END/**< Invalid */
+};
+
+/**
+ * @public typedef jl_port_link_status_t
+ */
+typedef enum jl_port_link_status_e jl_port_link_status_t;
+
+/**
+ * @enum jl_port_duplex_e
+ * @brief port duplex.
+ */
+enum jl_port_duplex_e {
+ PORT_HALF_DUPLEX = 0,/**< 0 */
+ PORT_FULL_DUPLEX,/**< 1 */
+ PORT_DUPLEX_END/**< Invalid */
+};
+
+/**
+ * @public typedef jl_port_duplex_t
+ */
+typedef enum jl_port_duplex_e jl_port_duplex_t;
+
+/**
+ * @struct jl_port_mac_ability_s
+ * @brief mac port ability.
+ */
+struct jl_port_mac_ability_s {
+ jl_uint32 force_mode;/**< Indicates whether MAC status control in force mode or not */
+ jl_uint32 speed;/**< Indicates the speed of MAC, 0: 10M, 1: 100M */
+ jl_uint32 duplex;/**< Indicates the duplex mode of MAC, 0: Half, 1: Full */
+ jl_uint32 link;/**< Indicates the link status of MAC */
+ jl_uint32 force_fc_en;/**< Indicates whether MAC flow control in force mode or not */
+ jl_uint32 tx_pause;/**< Indicates the tx flow control of MAC */
+ jl_uint32 rx_pause;/**< Indicates the rx flow control of MAC */
+};
+
+/**
+ * @public typedef jl_port_mac_ability_t
+ */
+typedef struct jl_port_mac_ability_s jl_port_mac_ability_t;
+
+/**
+ * @struct jl_port_ext_mac_ability_s
+ * @brief external mac port ability.
+ */
+struct jl_port_ext_mac_ability_s {
+ jl_uint32 force_mode;/**< Indicates whether External MAC operate in force mode or not */
+ jl_uint32 speed;/**< Indicates the speed of MAC, 0: 10M, 1: 100M */
+ jl_uint32 duplex;/**< Indicates the duplex mode of MAC, 0: Half, 1: Full */
+ jl_uint32 link;/**< Indicates the link status of MAC */
+ jl_uint32 tx_pause;/**< Indicates the tx flow control of MAC */
+ jl_uint32 rx_pause;/**< Indicates the rx flow control of MAC */
+};
+
+/**
+ * @public typedef jl_port_ext_mac_ability_t
+ */
+typedef struct jl_port_ext_mac_ability_s jl_port_ext_mac_ability_t;
+
+/**
+ * @struct jl_port_phy_ability_s
+ * @brief phy port ability.
+ */
+struct jl_port_phy_ability_s {
+ jl_uint32 auto_negotiation;/**< Indicates whether PHY operate in auto negotiation mode or not */
+ jl_uint32 half_duplex_10;/**< Indicates PHY operate in half duplex 10M mode */
+ jl_uint32 full_duplex_10;/**< Indicates PHY operate in full duplex 10M mode */
+ jl_uint32 half_duplex_100;/**< Indicates PHY operate in half duplex 100M mode */
+ jl_uint32 full_duplex_100;/**< Indicates PHY operate in full duplex 100M mode */
+ jl_uint32 flow_control;/**< Indicates PHY support flow control */
+ jl_uint32 asym_flow_control;/**< Indicates PHY support asymmetric flow control */
+};
+
+/**
+ * @public typedef jl_port_phy_ability_t
+ */
+typedef struct jl_port_phy_ability_s jl_port_phy_ability_t;
+
+/**
+ * @enum jl_speed_e
+ * @brief port speed.
+ */
+enum jl_speed_e {
+ PORT_SPEED_10M = 0,/**< 0 */
+ PORT_SPEED_100M,/**< 1 */
+ PORT_SPEED_END/**< Invalid */
+};
+
+/**
+ * @public typedef jl_port_phy_ability_t
+ */
+typedef enum jl_speed_e jl_port_speed_t;
+
+/**
+ * @enum jl_port_phy_reg_e
+ * @brief phy port Reg.
+ */
+enum jl_port_phy_reg_e {
+ PHY_CONTRL_REG = 0,/**< 0 */
+ PHY_STATUS_REG,/**< 1 */
+ PHY_ID1_REG,/**< 2 */
+ PHY_ID2_REG,/**< 3 */
+ PHY_AN_ADV_REG,/**< 4 */
+ PHY_AN_LINKP_REG,/**< 5 */
+ PHY_AN_EXP_REG,/**< 6 */
+ PHY_PAGE_SEL_REG = 0x1F,/**< 31 */
+ PHY_REG_END/**< Invalid */
+};
+
+/**
+ * @public typedef jl_port_phy_reg_t
+ */
+typedef enum jl_port_phy_reg_e jl_port_phy_reg_t;
+
+/**
+ * @public typedef jl_port_phy_page_t
+ */
+typedef jl_uint32 jl_port_phy_page_t;
+
+/**
+ * @public typedef jl_port_phy_data_t
+ */
+typedef jl_uint32 jl_port_phy_data_t;
+
+/**
+ * @brief Set ethernet PHY auto-negotiation ability
+ * @details This function configures PHY capability of specified port.
+ * If Full_1000 bit is set to 1, the auto negotiation will be automatic set to 1.
+ * While both auto negotiation and Full_1000 are set to 0, the PHY speed and duplex
+ * selection will be set as following 100F > 100H > 10F > 10H priority sequence.
+ * @param[in] port Index of port number
+ * @param[in] pability PHY ability structure
+ * @return set PHY ability successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PARAM PARAM Fail
+ * @retval JL_ERR_TIMEOUT Read/Write Reg Timeout
+ * @retval JL_ERR_FAIL Read/Write Reg Fail
+ * @retval JL_ERR_PORT Error Port id
+ * @note
+ * While auto-negotiation is set to 0, the PHY speed and duplex selection will be set as following 100F > 100H > 10F > 10H priority sequence
+ */
+JL_API jl_api_ret_t jl_port_phy_autoneg_ability_set(jl_port_t port, jl_port_phy_ability_t *pability);
+
+/**
+ * @brief Get ethernet PHY auto-negotiation ability
+ * @details This function gets PHY auto negotiation capability of specified port.
+ * @param[in] port Index of port number
+ * @param[out] pability PHY ablility structure
+ * @return get PHY ability successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PARAM PARAM Fail
+ * @retval JL_ERR_TIMEOUT Read Reg Timeout
+ * @retval JL_ERR_FAIL Read Reg Fail
+ * @retval JL_ERR_PORT Error Port id
+ * @note
+ * Get the auto-negotiation ability of specific port
+ */
+JL_API jl_api_ret_t jl_port_phy_autoneg_ability_get(jl_port_t port, jl_port_phy_ability_t *pability);
+
+/**
+ * @brief Set ethernet PHY force-mode ability
+ * @details While both auto negotiation is set to 0, the PHY speed and duplex selection will be
+ * set as following 100F > 100H > 10F > 10H priority sequence.
+ * @param[in] port Index of port number
+ * @param[in] pability PHY ability structure
+ * @return set PHY ability successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PARAM PARAM Fail
+ * @retval JL_ERR_TIMEOUT Read/Write Reg Timeout
+ * @retval JL_ERR_FAIL Read/Write Reg Fail
+ * @retval JL_ERR_PORT Error Port id
+ * @note
+ * While auto-negotiation is set to 0, the PHY speed and duplex selection will
+ * be set as following 100F > 100H > 10F > 10H priority sequence
+ */
+JL_API jl_api_ret_t jl_port_phy_force_ability_set(jl_port_t port, jl_port_phy_ability_t *pability);
+
+/**
+ * @brief Get ethernet PHY auto-negotiation ability
+ * @details This function gets the force-mode PHY capability of specified port.
+ * @param[in] port Index of port number
+ * @param[out] pability PHY ablility structure
+ * @return get PHY ability successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PARAM PARAM Fail
+ * @retval JL_ERR_TIMEOUT Read Reg Timeout
+ * @retval JL_ERR_FAIL Read Reg Fail
+ * @retval JL_ERR_PORT Error Port id
+ * @note
+ * This API can get the force-mode ability of specific port
+ */
+JL_API jl_api_ret_t jl_port_phy_force_ability_get(jl_port_t port, jl_port_phy_ability_t *pability);
+
+/**
+ * @brief Get ethernet PHY link status
+ * @details This function gets PHY linking status of specified port.
+ * @param[in] port Index of port number
+ * @param[out] pstatus PHY Link Status
+ * @param[out] pduplex PHY Duplex Mode
+ * @param[out] pspeed PHY Speed
+ * @return get PHY link status successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PARAM PARAM Fail
+ * @retval JL_ERR_TIMEOUT Read Reg Timeout
+ * @retval JL_ERR_FAIL Read Reg Fail
+ * @retval JL_ERR_PORT Error Port id
+ * @note
+ * API will return the current PHY status of specific port
+ */
+JL_API jl_api_ret_t jl_port_phy_link_status_get(jl_port_t port, jl_port_link_status_t *pstatus, jl_port_duplex_t *pduplex, jl_port_speed_t *pspeed);
+
+/**
+ * @brief Set ethernet PHY direct access register
+ * @details This function sets PHY register data of the specified port.
+ * @param[in] port Index of port number
+ * @param[in] page page id
+ * @param[in] reg register id
+ * @param[in] regval Register data
+ * @return set PHY direct access register successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PARAM PARAM Fail
+ * @retval JL_ERR_TIMEOUT Read/Write Reg Timeout
+ * @retval JL_ERR_FAIL Read/Write Reg Fail
+ * @retval JL_ERR_PORT Error Port id
+ * @note
+ * This API can set PHY direct access register value of specific port
+ */
+JL_API jl_api_ret_t jl_port_phy_reg_set(jl_port_t port, jl_port_phy_page_t page, jl_port_phy_reg_t reg, jl_port_phy_data_t regval);
+
+/**
+ * @brief Get ethernet PHY direct access register
+ * @details This function gets PHY register data of specified port.
+ * @param[in] port Index of port number
+ * @param[in] page page id
+ * @param[in] reg register id
+ * @param[out] pregval Register data
+ * @return get PHY direct access register successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PARAM PARAM Fail
+ * @retval JL_ERR_TIMEOUT Read Reg Timeout
+ * @retval JL_ERR_FAIL Read Reg Fail
+ * @retval JL_ERR_PORT Error Port id
+ * @note
+ * This API can return PHY direct access register value of specific port
+ */
+JL_API jl_api_ret_t jl_port_phy_reg_get(jl_port_t port, jl_port_phy_page_t page, jl_port_phy_reg_t reg, jl_port_phy_data_t *pregval);
+
+/**
+ * @brief Set ethernet PHY indirect access register
+ * @details This function sets PHY indirect registers data of the specified port.
+ * The input register address is the offset address of the port base register.
+ * This function is used to write non-IEEE PHY registers mainly defined in reg_fephy.h
+ * @param[in] port Index of port number
+ * @param[in] reg Register address
+ * @param[in] regval Register data
+ * @return set PHY indirect access register successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PARAM PARAM Fail
+ * @retval JL_ERR_TIMEOUT Read/Write Reg Timeout
+ * @retval JL_ERR_FAIL Read/Write Reg Fail
+ * @retval JL_ERR_PORT Error Port id
+ * @note
+ * This API can set PHY indirect access register value of specific port
+ */
+JL_API jl_api_ret_t jl_port_phy_indirect_reg_set(jl_port_t port, jl_port_phy_reg_t reg, jl_port_phy_data_t regval);
+
+/**
+ * @brief Get ethernet PHY indirect access register
+ * @details This function gets PHY indirect register data of specified port.
+ * The input register address is the offset address of the port based register.
+ * This function is used to read non-IEEE PHY registers mainly defined in reg_fephy.h
+ * @param[in] port Index of port number
+ * @param[in] reg Register address
+ * @param[out] pregval Register data
+ * @return get PHY indirect access register successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PARAM PARAM Fail
+ * @retval JL_ERR_TIMEOUT Read Reg Timeout
+ * @retval JL_ERR_FAIL Read Reg Fail
+ * @retval JL_ERR_PORT Error Port id
+ * @note
+ * This API can return PHY indirect access register value of specific port
+ */
+JL_API jl_api_ret_t jl_port_phy_indirect_reg_get(jl_port_t port, jl_port_phy_reg_t reg, jl_port_phy_data_t *pregval);
+
+/**
+ * @brief Set PHY isolate status on specific port
+ * @details This function sets PHY electrically isolate from MII/RMII of specified port.
+ * @param[in] port Index of port numb
+ * @param[in] isolate Isolate status
+ * @return set PHY isolate function successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PARAM PARAM Fail
+ * @retval JL_ERR_TIMEOUT Read/Write Reg Timeout
+ * @retval JL_ERR_FAIL Read/Write Reg Fail
+ * @retval JL_ERR_PORT Error Port id
+ * @note
+ * This API can enable or disable PHY isolate status on specific port
+ */
+JL_API jl_api_ret_t jl_port_phy_isolate_set(jl_port_t port, jl_enable_t isolate);
+
+/**
+ * @brief Get PHY isolate status on specific port
+ * @details This function gets PHY isolate status of specified port
+ * @param[in] port Index of port number
+ * @param[out] pisolate Isolate status
+ * @return get PHY isolate status successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PARAM PARAM Fail
+ * @retval JL_ERR_TIMEOUT Read Reg Timeout
+ * @retval JL_ERR_FAIL Read Reg Fail
+ * @retval JL_ERR_PORT Error Port id
+ * @note
+ * This API can get PHY isolate status on specific port
+ */
+JL_API jl_api_ret_t jl_port_phy_isolate_get(jl_port_t port, jl_enable_t *pisolate);
+
+/**
+ * @brief Set ethernet PHY enable status
+ * @details This function enables or disables the PHY as specified port
+ * @param[in] port Index of port number
+ * @param[in] enable PHY enable state
+ * @return set PHY enable status successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PARAM PARAM Fail
+ * @retval JL_ERR_TIMEOUT Read/Write Reg Timeout
+ * @retval JL_ERR_FAIL Read/Write Reg Fail
+ * @retval JL_ERR_PORT Error Port id
+ * @note
+ * This API can set PHY enable status on specific port
+ */
+JL_API jl_api_ret_t jl_port_phy_enable_set(jl_port_t port, jl_enable_t enable);
+
+/**
+ * @brief Get ethernet PHY enable status
+ * @details This function gets PHY enable status as specified port.
+ * @param[in] port Index of port number
+ * @param[out] penable PHY enable status
+ * @return get PHY enable status successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PARAM PARAM Fail
+ * @retval JL_ERR_TIMEOUT Read Reg Timeout
+ * @retval JL_ERR_FAIL Read Reg Fail
+ * @retval JL_ERR_PORT Error Port id
+ * @note
+ * This API can return PHY enable status on specific port
+ */
+JL_API jl_api_ret_t jl_port_phy_enable_get(jl_port_t port, jl_enable_t *penable);
+
+/**
+ * @brief Set ethernet all PHY enable status
+ * @details This function enables or disables all the PHYs
+ * @param[in] enable PHY enable state
+ * @return set all PHY enable status successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PARAM PARAM Fail
+ * @retval JL_ERR_TIMEOUT Read/Write Reg Timeout
+ * @retval JL_ERR_FAIL Read/Write Reg Fail
+ * @retval JL_ERR_PORT Error Port id
+ * @note
+ * This API can enable or disable all the port
+ */
+JL_API jl_api_ret_t jl_port_phy_all_enable_set(jl_enable_t enable);
+
+/**
+ * @brief Set port force link ability
+ * @details This function sets MAC force-link capability of specified port.
+ * @param[in] port Index of port number
+ * @param[in] pability MAC ability structure
+ * @return set port MAC force link ability successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PARAM PARAM Fail
+ * @retval JL_ERR_TIMEOUT Read/Write Reg Timeout
+ * @retval JL_ERR_FAIL Read/Write Reg Fail
+ * @retval JL_ERR_PORT Error Port id
+ * @note
+ * This API can set MAC force link ability of a specific port
+ */
+JL_API jl_api_ret_t jl_port_mac_force_link_set(jl_port_t port, jl_port_mac_ability_t *pability);
+
+/**
+ * @brief Get port force link ability
+ * @details This function gets MAC force-link capability of specified port.
+ * @param[in] port Index of port number
+ * @param[out] pability MAC ability structure
+ * @return get port MAC force link ability successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PARAM PARAM Fail
+ * @retval JL_ERR_TIMEOUT Read Reg Timeout
+ * @retval JL_ERR_FAIL Read Reg Fail
+ * @retval JL_ERR_PORT Error Port id
+ * @note
+ * This API can get MAC force link ability of a specific port
+ */
+JL_API jl_api_ret_t jl_port_mac_force_link_get(jl_port_t port, jl_port_mac_ability_t *pability);
+
+/**
+ * @brief Set external port force link ability
+ * @details This function sets MAC force-link capability of specified Extension port
+ * @param[in] port Index of port number
+ * @param[in] pability Ext MAC ability structure
+ * @return set external port MAC force link ability successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PARAM PARAM Fail
+ * @retval JL_ERR_TIMEOUT Read/Write Reg Timeout
+ * @retval JL_ERR_FAIL Read/Write Reg Fail
+ * @retval JL_ERR_PORT Error Port id
+ * @note
+ * This API can set external port mode and force link ability
+ */
+JL_API jl_api_ret_t jl_port_mac_force_link_ext_set(jl_port_t port, jl_port_ext_mac_ability_t *pability);
+
+/**
+ * @brief Get external port force link ability
+ * @details This function gets MAC force-link capability of specified Extension port
+ * @param[in] port Index of port number
+ * @param[out] pability Ext MAC ability structure
+ * @return get external port MAC force link ability successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PARAM PARAM Fail
+ * @retval JL_ERR_TIMEOUT Read Reg Timeout
+ * @retval JL_ERR_FAIL Read Reg Fail
+ * @retval JL_ERR_PORT Error Port id
+ * @note
+ * This API can get external port mode and force link ability
+ */
+JL_API jl_api_ret_t jl_port_mac_force_link_ext_get(jl_port_t port, jl_port_ext_mac_ability_t *pability);
+
+/**
+ * @brief Get port link status
+ * @details This function gets force MAC link parameters of specified port.
+ * @param[in] port Index of port number
+ * @param[out] pability Current mac Status
+ * @return get port link status successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PARAM PARAM Fail
+ * @retval JL_ERR_TIMEOUT Read Reg Timeout
+ * @retval JL_ERR_FAIL Read Reg Fail
+ * @retval JL_ERR_PORT Error Port id
+ * @note
+ * This API can get link status of a specific port
+ */
+JL_API jl_api_ret_t jl_port_mac_status_get(jl_port_t port, jl_port_mac_ability_t *pability);
+
+/**
+ * @brief Set port local loopback (redirect tx to rx)
+ * @details This function sets MAC loopback status of specified port
+ * @param[in] port portid
+ * @param[in] enable enable MAC loopback status
+ * @return enable/disable local loopback of a specific port
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PARAM PARAM Fail
+ * @retval JL_ERR_TIMEOUT Read/Write Reg Timeout
+ * @retval JL_ERR_FAIL Read/Write Reg Fail
+ * @retval JL_ERR_PORT Error Port id
+ * @note
+ * This API can get link status of a specific port
+ */
+JL_API jl_api_ret_t jl_port_mac_loopback_set(jl_port_t port, jl_enable_t enable);
+
+/**
+ * @brief Get port local loopback status
+ * @details This function gets MAC loopback status of specified port.
+ * @param[in] port Index of port number
+ * @param[out] penable enable MAC loopback status
+ * @return local loopback status of a specific port
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PARAM PARAM Fail
+ * @retval JL_ERR_TIMEOUT Read Reg Timeout
+ * @retval JL_ERR_FAIL Read Reg Fail
+ * @retval JL_ERR_PORT Error Port id
+ * @note
+ * This API can get local loopback is enabled or not of a specific port
+ */
+JL_API jl_api_ret_t jl_port_mac_loopback_get(jl_port_t port, jl_enable_t *penable);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __JL_API_PORT_H__ */
+/** @} Port APIs*/
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/portable/jl_portable.h b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/portable/jl_portable.h
new file mode 100644
index 0000000..cfe86f2
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/portable/jl_portable.h
@@ -0,0 +1,67 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+#ifndef __JL_PORTABLE_H__
+#define __JL_PORTABLE_H__
+
+#ifndef __KERNEL__
+#include <stdint.h>
+#endif
+
+#include "jl_error.h"
+#include "jl_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+struct gpio_descriptor_s {
+ jl_int32 pin;
+ void *hd;
+ char name[16];
+};
+#define MDC_PIN 5
+#define MDIO_PIN 6
+
+jl_ret_t port_gpio_request(struct gpio_descriptor_s *gpio);
+jl_ret_t port_gpio_free(struct gpio_descriptor_s *gpio);
+void port_gpio_set_dir(struct gpio_descriptor_s *gpio, jl_int32 dir);
+void port_gpio_set_value(struct gpio_descriptor_s *gpio, jl_int32 val);
+jl_int32 port_gpio_get_value(struct gpio_descriptor_s *gpio);
+
+
+jl_ret_t port_spi_init(void);
+jl_ret_t port_spi_deinit(void);
+jl_ret_t port_spi_read(jl_uint8 *tx_buf, jl_uint8 *rx_buf, jl_uint32 size);
+jl_ret_t port_spi_write(jl_uint8 *tx_buf, jl_uint8 *rx_buf, jl_uint32 size);
+
+
+jl_ret_t port_mdio_init(void);
+jl_ret_t port_mdio_deinit(void);
+void port_mdio_write(jl_uint8 phy, jl_uint8 reg, jl_uint16 val);
+jl_uint16 port_mdio_read(jl_uint8 phy, jl_uint8 reg);
+
+
+void *port_mutex_init(void);
+void port_mutex_deinit(void *arg);
+void port_mutex_lock(void *arg);
+void port_mutex_unlock(void *arg);
+void port_ndelay(jl_uint32 ns);
+void port_udelay(jl_uint32 us);
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __JL_PORTABLE_H__ */
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/qos.h b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/qos.h
new file mode 100644
index 0000000..4a789be
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/qos.h
@@ -0,0 +1,529 @@
+/**
+ * @file qos.h
+ * @brief QoS
+ */
+
+/**
+ * @defgroup qos_group QoS
+ * @{
+ */
+
+/**
+ * @example example_qos_dscp_to_queue_map.c
+ * @example example_qos_exp_to_queue_map.c
+ * @example example_qos_pcp_to_queue_map.c
+ * @example example_qos_schedule.c
+ * @example example_qos_enqueue.c
+ */
+
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+
+
+#ifndef __JL_API_QOS_H__
+#define __JL_API_QOS_H__
+
+#include "jl_base.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+* QOS_QUEUE_NUM
+*/
+#define QOS_QUEUE_NUM (4)
+/**
+* QOS_MULTICAST_RES_MANAGEMENT_ID
+*/
+#define QOS_MULTICAST_RES_MANAGEMENT_ID (10)
+/**
+* QOS_RES_CELLS
+*/
+#define QOS_RES_CELLS (912)
+
+/**
+ * @enum qos_l3_type
+ * @brief L3 packet type
+ */
+enum qos_l3_type {
+ QOS_L3_IPV4 = 0, /**< 0 */
+ QOS_L3_IPV6, /**< 1 */
+ QOS_L3_MPLS, /**< 2 */
+ QOS_L3_UNKNOWN, /**< 3 */
+};
+
+/**
+ * @enum qos_sche_type
+ * @brief queue schedule type
+ */
+enum qos_sche_type {
+ QOS_SCHE_SP = 0, /**< 0 */
+ QOS_SCHE_DWRR, /**< 1 */
+ QOS_SCHE_UNKNOWN, /**< 2 */
+};
+
+/**
+ * @enum qos_res_mode_e
+ * @brief queue resource mode
+ */
+enum qos_res_mode_e {
+ QOS_RES_LIMITER = 0, /**< 0 */
+ QOS_RES_GUARANTEE, /**< 1 */
+ QOS_RES_UNKNOWN /**< Invalid */
+};
+
+/**
+ * @struct jl_qos_schedule_s
+ * @brief Queue schedule type (e.g. SP or DWRR)
+ */
+struct jl_qos_schedule_s {
+ enum qos_sche_type type[QOS_QUEUE_NUM]; /**< Queue schedule type*/
+};
+
+/**
+ * @public typedef jl_qos_schedule_t
+ */
+typedef struct jl_qos_schedule_s jl_qos_schedule_t;
+
+/**
+ * @struct qos_l3_ipv4
+ * @brief config tos and queue priority for ipv4 packet
+ */
+struct qos_l3_ipv4 {
+ jl_uint32 tos; /**< Type Of Service (TOS), from TOS/ Class of service in the IPv4 header,range[0,255] */
+ jl_uint32 priority;/**< queue priority,range[0,3] */
+};
+
+/**
+ * @struct qos_l3_ipv6
+ * @brief config tos and queue priority for ipv6 packet
+ */
+struct qos_l3_ipv6 {
+ jl_uint32 tos; /**< Type Of Service (TOS), from TOS/ Class of service in the IPv6 header,range[0,255] */
+ jl_uint32 priority; /**< queue priority,range[0,3] */
+};
+
+/**
+ * @struct qos_l3_mpls
+ * @brief config exp and queue priority for mpls packet
+ */
+struct qos_l3_mpls {
+ jl_uint32 exp; /**< exp value,from packet MPLS EXP priority bits,range[0,7] */
+ jl_uint32 priority;/**< queue priority,range[0,3] */
+};
+
+/**
+ * @struct qos_l3_unknown
+ * @brief If a packet does not contain IPv4, IPv6, MPLS or PPPoE carrying IPv4/IPv6 field, there is an option to
+force the packet to a certain egress queue.
+ */
+struct qos_l3_unknown {
+ jl_uint8 force_en; /**< enable bit. If set, the packet shall have a forced queue priority. */
+ jl_uint32 priority; /**< queue priority,range[0,3] */
+};
+
+/**
+ * @union qos_l3_prio_u
+ * @brief qos l3 priority union structure.
+ */
+union qos_l3_prio_u {
+ struct qos_l3_ipv4 ipv4; /**< config tos and queue priority mapping for ipv4 packet*/
+ struct qos_l3_ipv6 ipv6; /**< config tos and queue priority mapping for ipv6 packet*/
+ struct qos_l3_mpls mpls; /**< config exp and queue priority mapping for mpls packet*/
+ struct qos_l3_unknown unknown;/**< option to force packet to a certain queue priority*/
+};
+
+/**
+ * @struct qos_l3_config
+ * @brief The priority of L3 packet map to queue priority.
+ */
+struct qos_l3_config {
+ enum qos_l3_type type; /**< select l3 packet priority mapping type. */
+ union qos_l3_prio_u qos_l3;/**< config l3 packet priority mapping to queue priority. */
+};
+
+/**
+ * @struct qos_port_config
+ * @brief config default pcp in source port table.
+ */
+struct qos_port_config {
+ jl_uint32 pcp_priority;/**< port default pcp ,range[0,7]. */
+};
+
+/**
+ * @struct qos_vlan_config
+ * @brief config mapping table from VLAN PCP priority bits to queue priority.
+ */
+struct qos_vlan_config {
+ jl_uint16 pcp; /**< Priority code point(PCP), from the outermost VLAN tag or from port default pcp for untagged packet ,range[0,7]. */
+ jl_uint32 vlan_priority; /**< config pcp mapping to queue priority. */
+};
+
+/**
+ * @brief Set mapping table from L3 packet priorities to queue priority
+ * @details This function sets the packet priority mapping from priority field of L3 to queue priority.
+ * @param[in] config Packet priority assignment based on L3
+ * @return Set successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval minus_value Fail
+ * @deprecated use \ref jl_qos_l3_dscp2queue_map_set() \ref jl_qos_l3_exp2queue_map_set().
+ */
+attribute_deprecated
+JL_API jl_api_ret_t jl_qos_l3_set(struct qos_l3_config *config);
+
+/**
+ * @brief Get mapping table from L3 packet priorities to queue priority
+ * @details This function gets the packet priority mapping from priority field of L3 to queue priority.
+ * @param[in,out] config Packet priority assignment based on L3
+ * @return Set successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval minus_value Fail
+ * @deprecated use \ref jl_qos_l3_dscp2queue_map_get() \ref jl_qos_l3_exp2queue_map_get().
+ */
+attribute_deprecated
+JL_API jl_api_ret_t jl_qos_l3_get(struct qos_l3_config *config);
+
+/**
+ * @brief Set enable or disable l3 packet priority assignment
+ * @details This function can enable or disable packet queue priority assignment based on L3 protocol in the specified port.
+ * @param[in] port Port ID
+ * @param[in] enable Enable or disable queue priority assignment based on L3 packet in the specified port.
+ * @return Set successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval minus_value Fail
+ * @deprecated use \ref jl_qos_l3_queue_assign_enable_set().
+ */
+attribute_deprecated
+JL_API jl_api_ret_t jl_qos_l3_port_enable_set(jl_port_t port, jl_uint8 enable);
+
+/**
+ * @brief Get l3 packet priority assignment status
+ * @details This function can get enable status of packet queue priority assignment based on L3 protocol in the specified port.
+ * @param[in] port Port ID
+ * @param[out] enable Enable status.
+ * @return Set successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval minus_value Fail
+ * @deprecated use \ref jl_qos_l3_queue_assign_enable_get().
+ */
+attribute_deprecated
+JL_API jl_api_ret_t jl_qos_l3_port_enable_get(jl_port_t port, jl_uint8 *enable);
+
+/**
+ * @brief Set the Port Default PCP
+ * @details This function sets the Port Default PCP for the specified port.
+ * @param[in] port Port ID
+ * @param[in] config The Port Default PCP.
+ * @return Set successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval minus_value Fail
+ * @deprecated use \ref jl_qos_l2_port_pcp_set().
+ */
+attribute_deprecated
+JL_API jl_api_ret_t jl_qos_port_set(jl_port_t port, struct qos_port_config *config);
+
+/**
+ * @brief Get the Port Default PCP
+ * @details This function gets the Port Default PCP for the specified port.
+ * @param[in] port port ID
+ * @param[out] config The Port Default PCP.
+ * @return Set successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval minus_value Fail
+ * @deprecated use \ref jl_qos_l2_port_pcp_get().
+ */
+attribute_deprecated
+JL_API jl_api_ret_t jl_qos_port_get(jl_port_t port, struct qos_port_config *config);
+
+/**
+ * @brief Set PCP to queue Priority Mapping
+ * @details This function sets vlan PCP to queue Priority Mapping.
+ * @param[in] config The mapping between PCP to queue Priority
+ * @return Set successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval minus_value Fail
+ * @deprecated use \ref jl_qos_l2_pcp2queue_map_set().
+ */
+attribute_deprecated
+JL_API jl_api_ret_t jl_qos_vlan_set(struct qos_vlan_config *config);
+
+/**
+ * @brief Get PCP to queue Priority Mapping
+ * @details This function gets vlan PCP to queue Priority Mapping.
+ * @param[in,out] config The mapping between PCP to queue Priority
+ * @return Set successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval minus_value Fail
+ * @deprecated use \ref jl_qos_l2_pcp2queue_map_get().
+ */
+attribute_deprecated
+JL_API jl_api_ret_t jl_qos_vlan_get(struct qos_vlan_config *config);
+
+/* new qos api */
+
+/**
+ * @brief Init Qos
+ * @details This function initialize the qos module.
+ * @return Set successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval minus_value Fail
+ */
+JL_API jl_api_ret_t jl_qos_init(void);
+
+/**
+ * @brief Deinit Qos
+ * @details This function will disable Qos module. All related qos tables will restore to the default values.
+ * @return Set successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval minus_value Fail
+ */
+JL_API jl_api_ret_t jl_qos_deinit(void);
+
+/**
+ * @brief Set enable or disable L3 based assignment
+ * @details This function can enable or disable queue assignment based on L3 protocol in the specified port.
+ * @param[in] port Port ID
+ * @param[in] enable Enable or disable
+ * @return Set successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval minus_value Fail
+ */
+JL_API jl_api_ret_t jl_qos_l3_queue_assign_enable_set(jl_port_t port, jl_enable_t enable);
+
+/**
+ * @brief Get L3 based assignment status
+ * @details This function can get enable status of queue assignment based on L3 protocol in the specified port.
+ * @param[in] port Port ID
+ * @param[out] penable Get enable status
+ * @return Set successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval minus_value Fail
+ */
+JL_API jl_api_ret_t jl_qos_l3_queue_assign_enable_get(jl_port_t port, jl_enable_t *penable);
+
+/**
+ * @brief Set mapping table from DSCP to queue
+ * @details This function sets the mapping table from DSCP to queue.
+ * @param[in] dscp From DSCP in the IPV4 or IPV6 header,range[0,63]
+ * @param[in] queue Queue id, range[0,3]
+ * @return Set successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval minus_value Fail
+ */
+JL_API jl_api_ret_t jl_qos_l3_dscp2queue_map_set(jl_uint32 dscp, jl_uint32 queue);
+
+/**
+ * @brief Get mapping table from DSCP to queue
+ * @details This function gets the mapping table from DSCP to queue.
+ * @param[in] dscp From DSCP in the IPV4 or IPV6 header,range[0,63]
+ * @param[out] pqueue Queue id
+ * @return Set successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval minus_value Fail
+ */
+JL_API jl_api_ret_t jl_qos_l3_dscp2queue_map_get(jl_uint32 dscp, jl_uint32 *pqueue);
+
+/**
+ * @brief Set mapping table from exp to queue
+ * @details This function sets the mapping table from exp to queue.
+ * @param[in] exp From packet MPLS EXP priority bits,range[0,7]
+ * @param[in] queue Queue id,range[0,3]
+ * @return Set successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval minus_value Fail
+ */
+JL_API jl_api_ret_t jl_qos_l3_exp2queue_map_set(jl_uint32 exp, jl_uint32 queue);
+
+/**
+ * @brief Get mapping table from exp to queue
+ * @details This function gets the mapping table from exp to queue.
+ * @param[in] exp From packet MPLS EXP priority bits,range[0,7]
+ * @param[out] pqueue Queue id
+ * @return Set successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval minus_value Fail
+ */
+JL_API jl_api_ret_t jl_qos_l3_exp2queue_map_get(jl_uint32 exp, jl_uint32 *pqueue);
+
+/**
+ * @brief Set mapping table from pcp to queue
+ * @details This function sets the mapping table from vlan pcp to queue.
+ * @param[in] vlan_pcp Priority code point(PCP),from the outermost VLAN tag or from port default pcp for untagged packet,range[0,7]
+ * @param[in] queue Queue id,range[0,3]
+ * @return Set successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval minus_value Fail
+ */
+JL_API jl_api_ret_t jl_qos_l2_pcp2queue_map_set(jl_uint32 vlan_pcp, jl_uint32 queue);
+
+/**
+ * @brief Get mapping table from pcp to queue
+ * @details This function gets the mapping table from vlan pcp to queue.
+ * @param[in] vlan_pcp Priority code point(PCP), from the outermost VLAN tag or from port default pcp for untagged packet, range[0,7]
+ * @param[out] pqueue Queue id
+ * @return Set successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval minus_value Fail
+ */
+JL_API jl_api_ret_t jl_qos_l2_pcp2queue_map_get(jl_uint32 vlan_pcp, jl_uint32 *pqueue);
+
+/**
+ * @brief Set the Port Default PCP
+ * @details This function sets the Port Default PCP for the specified port.
+ * @param[in] port Port ID
+ * @param[in] pcp The Port Default PCP
+ * @return Set successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval minus_value Fail
+ */
+JL_API jl_api_ret_t jl_qos_l2_port_pcp_set(jl_port_t port, jl_uint32 pcp);
+
+/**
+ * @brief Get the Port Default PCP
+ * @details This function gets the Port Default PCP for the specified port.
+ * @param[in] port Port ID
+ * @param[out] ppcp The Port Default PCP
+ * @return Set successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval minus_value Fail
+ */
+JL_API jl_api_ret_t jl_qos_l2_port_pcp_get(jl_port_t port, jl_uint32 *ppcp);
+
+/**
+ * @brief Set mapping queue to priority
+ * @details This function sets mapping queue to priority. Each queue is mapped to one of four egress priorities.
+ * @param[in] port Port ID
+ * @param[in] queue Queue id,range[0,3]
+ * @param[in] priority Queue priority,range[0,3]
+ * @return Set successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval minus_value Fail
+ * @note The priorities are ranked in descending order, from the highest priority (zero), to the lowest (three).
+ * Strict priority scheduling is performed between different priorities.
+ * @deprecated use \ref jl_qos_schedule_set().
+ */
+attribute_deprecated
+JL_API jl_api_ret_t jl_qos_queue_pri_set(jl_port_t port, jl_uint32 queue, jl_uint32 priority);
+
+/**
+ * @brief Get mapping queue to priority
+ * @details This function gets mapping queue to priority.
+ * @param[in] port Port ID
+ * @param[in] queue Queue id,range[0,3]
+ * @param[out] ppriority Queue priority
+ * @return Set successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval minus_value Fail
+ */
+JL_API jl_api_ret_t jl_qos_queue_pri_get(jl_port_t port, jl_uint32 queue, jl_uint32 *ppriority);
+
+/**
+ * @brief Set queue's DWRR weight
+ * @details This function sets queue's dwrr weight.
+ * @param[in] port Port ID
+ * @param[in] queue Queue id,range[0,3]
+ * @param[in] weight The relative weight of the queue,range[0,127]
+ * @return Set successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval minus_value Fail
+ * @note DWRR scheduling is performed among the same priorities.
+ */
+JL_API jl_api_ret_t jl_qos_queue_dwrr_set(jl_port_t port, jl_uint32 queue, jl_uint32 weight);
+
+/**
+ * @brief Get queue's DWRR weight
+ * @details This function gets queue's dwrr weight.
+ * @param[in] port Port ID
+ * @param[in] queue Queue id,range[0,3]
+ * @param[out] pweight The relative weight of the queue
+ * @return Set successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval minus_value Fail
+ */
+JL_API jl_api_ret_t jl_qos_queue_dwrr_get(jl_port_t port, jl_uint32 queue, jl_uint32 *pweight);
+
+/**
+ * @brief Set queue's schedule type
+ * @details Set queue's schedule type, type SP or DWRR.
+ * @param[in] port Egress Port Id
+ * @param[in] psche Schedule Type Info
+ * @return Set queue's schedule type successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PORT Port Error
+ * @retval JL_ERR_PARAM Param Error
+ * @retval JL_ERR_CONFIG Config Error
+ * @retval JL_ERR_TIMEOUT Read/Write Reg Timeout
+ * @retval JL_ERR_FAIL Read/Write Reg Fail
+ * @note Queue 0 to 3 in SP scheduler follows strict priority from highest to lowest.
+ * In addition, Queues in DWRR scheduler have lower priority than those in SP.
+ */
+JL_API jl_api_ret_t jl_qos_schedule_set(jl_uint8 port, jl_qos_schedule_t *psche);
+/**
+ * @brief Get queue's schedule type
+ * @details Get queue's schedule type, type SP or DWRR.
+ * @param[in] port Egress Port Id
+ * @param[out] psche Schedule Type Info
+ * @return Get queue's schedule type successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PORT Port Error
+ * @retval JL_ERR_PARAM Param Error
+ * @retval JL_ERR_CONFIG Config Error
+ * @retval JL_ERR_TIMEOUT Read/Write Reg Timeout
+ * @retval JL_ERR_FAIL Read/Write Reg Fail
+ */
+JL_API jl_api_ret_t jl_qos_schedule_get(jl_uint8 port, jl_qos_schedule_t *psche);
+
+/**
+ * @brief Set queue's enable state
+ * @details Set enabled queue on each port
+ * @param[in] port Egress Port Id
+ * @param[in] enmask Enabled Queue Bitmask, bit 0-3 represent to queue 0-3
+ * @return Set queue's enable state successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PORT Port Error
+ * @retval JL_ERR_PARAM Param Error
+ * @retval JL_ERR_TIMEOUT Read/Write Reg Timeout
+ * @retval JL_ERR_FAIL Read/Write Reg Fail
+ * @deprecated not in use
+ */
+attribute_deprecated
+JL_API jl_api_ret_t jl_qos_enqueue_set(jl_uint8 port, jl_uint8 enmask);
+
+/**
+ * @brief Get queue's enable state
+ * @details Get enabled queue on each port
+ * @param[in] port Egress Port Id
+ * @param[out] penmask Enabled Queue Bitmask, bit 0-3 represent to queue 0-3
+ * @return Get queue's enable state successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PORT Port Error
+ * @retval JL_ERR_TIMEOUT Read/Write Reg Timeout
+ * @retval JL_ERR_FAIL Read/Write Reg Fail
+ * @deprecated not in use
+ */
+attribute_deprecated
+JL_API jl_api_ret_t jl_qos_enqueue_get(jl_uint8 port, jl_uint8 *penmask);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __JL_API_QOS_H__*/
+/** @} QoS APIs*/
+
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/sram_load.h b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/sram_load.h
new file mode 100644
index 0000000..ed1b67e
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/sram_load.h
@@ -0,0 +1,49 @@
+/**
+ * @file sram_load.h
+ * @brief Sram Load
+ */
+
+/**
+ * @defgroup sram_load_group Sram Load
+ * @{
+ */
+
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+
+#ifndef __JL_API_SRAM_LOAD_H__
+#define __JL_API_SRAM_LOAD_H__
+
+#include "jl_base.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Perform a transfer to sram
+ * @details This api is a tool, it can copy datas of bin to the sram for the firmware to use
+ * @return set successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_SMI SMI Operation Fail
+ * @retval JL_ERR_FAIL Fail
+ */
+JL_API jl_api_ret_t jl_sram_load(void);
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* __JL_API_SRAM_LOAD_H__*/
+/** @} SRAM_LOAD APIs*/
+
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/storm.h b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/storm.h
new file mode 100644
index 0000000..55a02e9
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/storm.h
@@ -0,0 +1,168 @@
+/**
+ * @file storm.h
+ * @brief Multicast Broadcast Storm Control reference
+ */
+
+/**
+ * @defgroup storm_group Storm
+ * @{
+ */
+
+/**
+ * @example example_storm_rate_ctrl.c
+ */
+
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+
+#ifndef __JL_API_STORM_H__
+#define __JL_API_STORM_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "jl_types.h"
+
+/**
+ * @public typedef jl_rate_t
+ */
+typedef jl_uint32 jl_rate_t;
+
+/**
+ * @enum jl_storm_type_e
+ * @brief storm type.
+ */
+enum jl_storm_type_e {
+ STORM_TYPE_BROADCAST = 0,/**< 0 */
+ STORM_TYPE_MULTICAST,/**< 1 */
+ STORM_TYPE_UNKNOWN,/**< 2 */
+ STORM_TYPE_END,/**< Invalid */
+};
+
+/**
+ * @public typedef jl_storm_type_t
+ */
+typedef enum jl_storm_type_e jl_storm_type_t;
+
+/**
+ * @enum jl_rate_unit_e
+ * @brief rate unit.
+ */
+enum jl_rate_unit_e {
+ RATE_UNIT_KBPS = 0,/**< 0 */
+ RATE_UNIT_PPS,/**< 1 */
+ RATE_UNIT_END,/**< Invalid */
+};
+
+/**
+ * @public typedef jl_rate_unit_t
+ */
+typedef enum jl_rate_unit_e jl_rate_unit_t;
+
+/**
+ * @brief Set storm control enable configuration
+ * @details This function can be used to enable storm control per egress port per traffic type.
+ * @param[in] egress_port the specified egress port
+ * @param[in] type the traffic type to be set
+ * @param[in] enable the enable status to be set
+ * @return set storm control enable successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PARAM PARAM Fail
+ * @retval JL_ERR_TIMEOUT Read/Write Reg Timeout
+ * @retval JL_ERR_FAIL Read/Write Reg Fail
+ * @retval JL_ERR_PORT Error Port id
+ */
+JL_API jl_api_ret_t jl_storm_control_enable_set(jl_port_t egress_port, jl_storm_type_t type, jl_enable_t enable);
+
+/**
+ * @brief Get storm control enable configuration
+ * @details This function can be used to get the specified traffic type enable status of the specified egress port
+ * @param[in] egress_port the specified egress port
+ * @param[in] type the traffic type
+ * @param[out] penable the returned enable status
+ * @return get storm control enable successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PARAM PARAM Fail
+ * @retval JL_ERR_TIMEOUT Read Reg Timeout
+ * @retval JL_ERR_FAIL Read Reg Fail
+ * @retval JL_ERR_PORT Error Port id
+ */
+JL_API jl_api_ret_t jl_storm_control_enable_get(jl_port_t egress_port, jl_storm_type_t type, jl_enable_t *penable);
+
+/**
+ * @brief Set storm control rate configuration
+ * @details This function can set storm control rate for each egress port each traffic type.
+ * The rate unit is 1 kbps and the range is from 8k to 1048568k if type is RATE_UNIT_KBPS
+ * and the granularity of rate is 8 kbps.
+ * The rate unit is packets per second and the range is 1 ~ 0x1FFF if type is RATE_UNIT_PPS.\n
+ * The IFG is included by default.
+ * @param[in] egress_port the specified egress port
+ * @param[in] type the traffic type to be set
+ * @param[in] unit the rate unit to be set
+ * @param[out] rate storm control rate
+ * @return set storm control enable successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PARAM PARAM Fail
+ * @retval JL_ERR_TIMEOUT Read/Write Reg Timeout
+ * @retval JL_ERR_FAIL Read/Write Reg Fail
+ * @retval JL_ERR_PORT Error Port id
+ */
+JL_API jl_api_ret_t jl_storm_control_rate_set(jl_port_t egress_port, jl_storm_type_t type, jl_rate_unit_t unit, jl_rate_t rate);
+
+/**
+ * @brief Get storm control rate configuration
+ * @details This function can get storm control rate for each egress port each traffic type.
+ * The rate unit is 1 kbps and the range is from 8k to 1048568k if type is RATE_UNIT_KBPS
+ * and the granularity of rate is 8 kbps.
+ * The rate unit is packets per second and the range is 1 ~ 0x1FFF if type is RATE_UNIT_PPS.\n
+ * The IFG is included by default.
+ * @param[in] egress_port the specified egress port
+ * @param[in] type the traffic type to be set
+ * @param[out] punit the returned rate unit
+ * @param[out] prate the returned storm control rate
+ * @return get storm control enable successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PARAM PARAM Fail
+ * @retval JL_ERR_TIMEOUT Read Reg Timeout
+ * @retval JL_ERR_FAIL Read Reg Fail
+ * @retval JL_ERR_PORT Error Port id
+ */
+JL_API jl_api_ret_t jl_storm_control_rate_get(jl_port_t egress_port, jl_storm_type_t type, jl_rate_unit_t *punit, jl_rate_t *prate);
+
+/**
+ * @brief Get storm control drop counter
+ * @details This function can get storm control drop counter of the specified port
+ * @param[in] egress_port the specified egress port
+ * @param[out] pcntr the returned drop counter
+ * @return get storm control drop counter successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PARAM PARAM Fail
+ * @retval JL_ERR_TIMEOUT Read Reg Timeout
+ * @retval JL_ERR_FAIL Read Reg Fail
+ * @retval JL_ERR_PORT Error Port id
+ */
+JL_API jl_api_ret_t jl_storm_control_drop_counter_get(jl_port_t egress_port, jl_uint32 *pcntr);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __JL_API_STORM_H__ */
+/** @} Storm APIs*/
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/stp.h b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/stp.h
new file mode 100644
index 0000000..398c597
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/stp.h
@@ -0,0 +1,181 @@
+/**
+ * @file stp.h
+ * @brief Spanning Tree Protocol
+ */
+
+/**
+ * @defgroup spanning_tree_protocol_group Spanning Tree Protocol
+ * @{
+ */
+
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+
+#ifndef __JL_API_STP_H__
+#define __JL_API_STP_H__
+
+#include "jl_base.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @enum jl_stp_state_e
+ * @brief stp state.
+ */
+enum jl_stp_state_e {
+ STP_STATE_DISABLED = 0,/**< 0 */
+ STP_STATE_BLOCKING,/**< 1 */
+ STP_STATE_LISTENING,/**< 2 */
+ STP_STATE_LEARNING,/**< 3 */
+ STP_STATE_FORWARDING,/**< 4 */
+ STP_STATE_END,/**< Invalid */
+};
+
+/**
+ * @public typedef jl_stp_state_t
+ */
+typedef enum jl_stp_state_e jl_stp_state_t;
+
+/**
+ * @brief Configure ingress spanning tree state per each port
+ * @param[in] port port id
+ * @param[in] stp_state ingress spanning tree state
+ * @return set ingress stp state successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PARAM PARAM Fail
+ * @retval JL_ERR_TIMEOUT Read/Write Reg Timeout
+ * @retval JL_ERR_FAIL Read/Write Reg Fail
+ * @retval JL_ERR_PORT Error Port id
+ * @note
+ * System supports per-port ingress spanning tree state.
+ * There are five states supported by ASIC.
+ * - STP_STATE_DISABLED
+ * - STP_STATE_BLOCKING
+ * - STP_STATE_LISTENING
+ * - STP_STATE_LEARNING
+ * - STP_STATE_FORWARDING
+ */
+JL_API jl_api_ret_t jl_stp_port_ingress_state_set(jl_port_t port, jl_stp_state_t stp_state);
+
+/**
+ * @brief Get ingress spanning tree state per each port
+ * @param[in] port port id
+ * @param[out] pstp_state the returned ingress spanning tree state
+ * @return get ingress stp state successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PARAM PARAM Fail
+ * @retval JL_ERR_TIMEOUT Read Reg Timeout
+ * @retval JL_ERR_FAIL Read Reg Fail
+ * @retval JL_ERR_PORT Error Port id
+ * @note
+ * System supports per-port ingress spanning tree state.
+ * There are five states supported by ASIC.
+ * - STP_STATE_DISABLED
+ * - STP_STATE_BLOCKING
+ * - STP_STATE_LISTENING
+ * - STP_STATE_LEARNING
+ * - STP_STATE_FORWARDING
+ */
+JL_API jl_api_ret_t jl_stp_port_ingress_state_get(jl_port_t port, jl_stp_state_t *pstp_state);
+
+/**
+ * @brief Configure egress spanning tree state per each port
+ * @param[in] port port id
+ * @param[in] stp_state egress spanning tree state
+ * @return set egress stp state successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PARAM PARAM Fail
+ * @retval JL_ERR_TIMEOUT Read/Write Reg Timeout
+ * @retval JL_ERR_FAIL Read/Write Reg Fail
+ * @retval JL_ERR_PORT Error Port id
+ * @note
+ * System supports per-port egress spanning tree state.
+ * There are five states supported by ASIC.
+ * - STP_STATE_DISABLED
+ * - STP_STATE_BLOCKING
+ * - STP_STATE_LISTENING
+ * - STP_STATE_LEARNING
+ * - STP_STATE_FORWARDING
+ */
+JL_API jl_api_ret_t jl_stp_port_egress_state_set(jl_port_t port, jl_stp_state_t stp_state);
+
+/**
+ * @brief Get egress spanning tree state per each port
+ * @param[in] port port id
+ * @param[out] pstp_state egress spanning tree state
+ * @return get egress stp state successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PARAM PARAM Fail
+ * @retval JL_ERR_TIMEOUT Read Reg Timeout
+ * @retval JL_ERR_FAIL Read Reg Fail
+ * @retval JL_ERR_PORT Error Port id
+ * @note
+ * System supports per-port egress spanning tree state.
+ * There are five states supported by ASIC.
+ * - STP_STATE_DISABLED
+ * - STP_STATE_BLOCKING
+ * - STP_STATE_LISTENING
+ * - STP_STATE_LEARNING
+ * - STP_STATE_FORWARDING
+ */
+JL_API jl_api_ret_t jl_stp_port_egress_state_get(jl_port_t port, jl_stp_state_t *pstp_state);
+
+/**
+ * @brief Get drop counter due to the specified ingress stp state
+ * @param[in] stp_state ingress spanning tree state
+ * @param[out] pcntr counter
+ * @return get ingress stp drop counter successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PARAM PARAM Fail
+ * @retval JL_ERR_TIMEOUT Read Reg Timeout
+ * @retval JL_ERR_FAIL Read Reg Fail
+ * @note
+ * Drop counter will be calculated per ingress spanning tree state not per port.
+ * Packets will be dropped when stp state is set as the following three states:
+ * - STP_STATE_BLOCKING
+ * - STP_STATE_LISTENING
+ * - STP_STATE_LEARNING
+ * While the ingress spanning tree state is set as the following two states,
+ * packets will be forwarded as normal.
+ * - STP_STATE_FORWARDING
+ * - STP_STATE_DISABLED
+ */
+JL_API jl_api_ret_t jl_stp_ingress_drop_counter_get(jl_stp_state_t stp_state, jl_uint32 *pcntr);
+
+/**
+ * @brief Get per-port drop counter due to egress spanning tree state.
+ * @param[in] port port id
+ * @param[out] pcntr drop counter
+ * @return get egress stp drop counter successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval JL_ERR_INIT Check Switch State Fail
+ * @retval JL_ERR_PARAM PARAM Fail
+ * @retval JL_ERR_TIMEOUT Read Reg Timeout
+ * @retval JL_ERR_FAIL Read Reg Fail
+ */
+JL_API jl_api_ret_t jl_stp_port_egress_drop_counter_get(jl_port_t port, jl_uint32 *pcntr);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __JL_API_STP_H__*/
+/** @} Spanning Tree Protocol APIs*/
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/version.h b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/version.h
new file mode 100644
index 0000000..10f93d1
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/version.h
@@ -0,0 +1,27 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+
+#ifndef __JL_SDK_VERSION__
+#define __JL_SDK_VERSION__
+
+#include "jl_types.h"
+/*
+ * # Software Version: Major[4bits] + Minor[12bits] + Maintenance[16bits]
+ */
+
+#define VERSION_JL_SDK_MAJOR 4
+#define VERSION_JL_SDK_MINOR 0
+#define VERSION_JL_SDK_MAINTENANCE 0
+
+#endif /* __JL_SDK_VERSION__ */
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/vlan.h b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/vlan.h
new file mode 100644
index 0000000..6de71e1
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/inc/vlan.h
@@ -0,0 +1,273 @@
+/**
+ * @file vlan.h
+ * @brief vlan
+ */
+
+/**
+ * @defgroup vlan_group Vlan
+ * @{
+ */
+
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+
+#ifndef __JL_API_VLAN_H__
+#define __JL_API_VLAN_H__
+
+#include "jl_base.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @example example_vlan_mtu.c
+ */
+
+/**
+ * @enum vlan_assignment
+ * @brief Controls how a packets Ingress VID is assigned
+ * @note The default vlaue is VLAN_ASSIGN_PKT. If vlan_assignment is VLAN_ASSIGN_PKT and the incoming packet doesn't have that header, then
+ * this table entry's defaultVid will be used.
+ */
+enum vlan_assignment {
+ VLAN_ASSIGN_PKT = 0, /**< the Ingress VID is assigned from the incoming packets outermost VLAN header */
+ VLAN_ASSIGN_PORT = 1,/**< the packets Ingress VID is assigned from this table entry's defaultVid */
+ VLAN_ASSIGN_MIXED = 2,/**< if there are two VLANs in the incoming packet, the inner VLAN is chosen. If the incoming packet has only 0 or 1 VLAN, then it will select this table entry's defaultVid */
+};
+
+/**
+ * @enum vlan_operation
+ * @brief A number of operations that can be performed on the packet's VLAN headers such as push/pop etc
+ */
+enum vlan_operation {
+ VLAN_OPERATION_NONE = 0,/**< No operation */
+ VLAN_OPERATION_SWAP = 1,/**< The outermost VLAN header in the packet is replaced, the new VID comes from the ingress port Port VID */
+ VLAN_OPERATION_PUSH = 2,/**< A new VLAN header is added to the packet before any previous VLANs, the new VID comes from the ingress port Port VID*/
+ VLAN_OPERATION_POP = 3, /**< The outermost VLAN header in the packet is removed */
+ VLAN_OPERATION_REMOVE_ALL = 4, /**< All VLAN headers are removed from the packet. */
+ VLAN_OPERATION_END /**< enum delimiter */
+};
+
+/**
+ * @public typedef vlan_operation_t
+ */
+typedef enum vlan_operation vlan_operation_t;
+
+ /**
+ * @enum jl_vlan_acpt_frmt_e
+ * @brief The vlan accept frame type on the specified port
+ */
+
+enum jl_vlan_acpt_frmt_e {
+ VLAN_ACCEPT_FRAME_TYPE_ALL = 0, /**< accept all frames */
+ VLAN_ACCEPT_FRAME_TYPE_TAG_ONLY, /**< only accept tagged frames */
+ VLAN_ACCEPT_FRAME_TYPE_UNTAG_ONLY,/**< only accept untagged frames */
+ VLAN_ACCEPT_FRAME_TYPE_END/**< enum delimiter */
+};
+
+/**
+ * @public typedef jl_vlan_acpt_frmt_t
+ */
+typedef enum jl_vlan_acpt_frmt_e jl_vlan_acpt_frmt_t;
+
+/**
+ * @enum jl_vlanid_inherit_select_e
+ * @brief Selects which VID to use when building a new VLAN header in a push or swap operation.
+ * If the selected VLAN header does not exist in the packet then table entry's vid will be used.
+ */
+enum jl_vlanid_inherit_select_e {
+ VLANID_INHERIT_FROM_ORIGINAL_OUTERMOST = 0, /**<From the outermost VLAN in the original packet (if any) */
+ VLANID_INHERIT_FROM_TABLE_VALUE, /**<From this table entry's vid */
+ VLANID_INHERIT_FROM_ORIGINAL_SECOND_VLAN, /**<From the second VLAN in the original packet (if any) */
+ VLANID_INHERIT_FROM_END /**< enum delimiter */
+};
+
+/**
+ * @public typedef jl_vlanid_inherit_select_e
+ */
+typedef enum jl_vlanid_inherit_select_e jl_vlanid_inherit_select_t;
+
+/**
+ * @struct vlan_config
+ * @brief vlan configuration
+ * @note "port_mask" means the ports in Vlan group, one bit represents one port, bit0 -> port0, bit1->port1...
+ */
+struct vlan_config {
+ jl_uint8 valid;/**< Valid flag of VLAN table entry, if set 1, means this vlan is valid */
+ jl_uint16 vid;/**< VLAN ID */
+ jl_uint32 port_mask;/**< Ports in VLAN group */
+ jl_uint32 fid;/**< Filtering Identifier, used for SVL/IVL, range[0, 14] */
+ vlan_operation_t operation; /**<The ingress VLAN operation to perform on the packet,default is none */
+ jl_vlanid_inherit_select_t vid_sel; /**< Selects which vid to use when building a new vlan tag if operation is push or swap */
+ jl_uint32 new_vid; /**<The vid used in VLAN push or swap operation if vid_sel is set VLANID_INHERIT_FROM_TABLE_VALUE */
+};
+
+/**
+ * @struct vlan_item
+ * @brief Vlan table information
+ */
+struct vlan_item {
+ jl_uint16 index;/**< Entry index of VLAN table */
+ struct vlan_config config;/**< VLAN configuration used in VLAN table */
+};
+
+/**
+ * @brief Init Vlan
+ * @details This function initialize the vlan module. A default VLAN with VID==1 and contains all ports(PVID==1) will be created.
+ * @return Init vlan successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval minus_value Fail
+ * @see jl_error.h
+ */
+JL_API jl_api_ret_t jl_vlan_init(void);
+
+/**
+ * @brief Deinit Vlan
+ * @details This function will reset and disable VLAN module
+ * @return Deinit vlan successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval minus_value Fail
+
+ */
+JL_API jl_api_ret_t jl_vlan_deinit(void);
+
+/**
+ * @brief Get the VLAN assignment for the specified port.
+ * @details the function Gets how a packets Ingress VID is assigned for the specified port.
+ * @param[in] port: Port number
+ * @param[out] opt: vlan assignment
+ * @return Get successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval minus_value Fail
+ */
+JL_API jl_api_ret_t jl_port_vlan_assignment_get(jl_port_t port, enum vlan_assignment *opt);
+
+/**
+ * @brief Set the VLAN assignment for the specified port.
+ * @details the function Controls how a packets Ingress VID is assigned for the specified port.
+ * @param[in] port: Port number
+ * @param[in] opt: vlan assignment
+ * @return Set successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval minus_value Fail
+ * @note If the opt is VLAN_ASSIGN_PKT and the incoming packet doesn't have that header, then
+ * this table entry's defaultVid will be used.
+ */
+JL_API jl_api_ret_t jl_port_vlan_assignment_set(jl_port_t port, enum vlan_assignment opt);
+
+/**
+ * @brief Get the port Default VLAN ID
+ * @param[in] port: Port number
+ * @param[out] vid: VLAN ID
+ * @return Get successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval minus_value Fail
+ */
+JL_API jl_api_ret_t jl_port_vlan_get(jl_port_t port, jl_uint32 *vid);
+
+/**
+ * @brief Set the port Default VLAN ID
+ * @param[in] port: Port number
+ * @param[in] vid: VLAN ID
+ * @return Set successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval minus_value Fail
+ */
+JL_API jl_api_ret_t jl_port_vlan_set(jl_port_t port, jl_uint32 vid);
+
+/**
+ * @brief Get the packets VLAN header updating operation at the specified port and direction.
+ * @details The function get the operation that was performed on the packet's VLAN headers such as push/pop/swap etc
+ * @param[in] port: Port number
+ * @param[in] dir: 0 = port ingress direction , 1 = port egress direction
+ * @param[out] opt: vlan_operation
+ * @return Get successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval minus_value Fail
+ */
+JL_API jl_api_ret_t jl_port_vlan_operation_get(jl_port_t port, jl_port_dir_t dir, enum vlan_operation *opt);
+
+/**
+ * @brief Set the packets VLAN header updating operation at the specified port and direction.
+ * @param[in] port: Port number
+ * @param[in] dir: 0 = port ingress direction, 1 = port egress direction
+ * @param[in] opt: vlan_operation
+ * @return Set successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval minus_value Fail
+ * @note for port egress direction, not support Swap/Push operation
+ */
+JL_API jl_api_ret_t jl_port_vlan_operation_set(jl_port_t port, jl_port_dir_t dir, enum vlan_operation opt);
+
+/**
+ * @brief Get a VLAN Group configuration from a specified VLAN table entry
+ * @param[in] vlan_index: Entry index of VLAN table, range [0,14]
+ * @param[out] config: vlan_config
+ * @return Get successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval minus_value Fail
+ */
+JL_API jl_api_ret_t jl_vlan_get(jl_uint32 vlan_index, struct vlan_config *config);
+
+/**
+ * @brief Set a VLAN Group configuration to a specified VLAN table entry
+ * @details This function sets a valid/invalid VLAN Group configuration into the specified VLAN table entry. VLAN table entry 0 stores Default VLAN configuration, be careful to modify this entry.
+ * @param[in] vlan_index: Entry index of VLAN table,range [0,14]
+ * @param[in] config: vlan_config
+ * @return Set successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval minus_value Fail
+ * @note By default, all vlan entries owe the same FID=0. It is called SVL(Shared Vlan Learning).
+ * If Vlan entries are configured to different FIDs, then the same source MAC Addr with multiple FIDs can be learned into different look-up table entries. It is called IVL(Independent Vlan Learning).
+ */
+JL_API jl_api_ret_t jl_vlan_set(jl_uint32 vlan_index, struct vlan_config *config);
+
+/**
+ * @brief Set a batch VLAN Group configurations into specified VLAN table entries
+ * @param[in] v_list: vlan_item
+ * @param[in] size: The total configuration entries in the list
+ * @return Set successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval minus_value Fail
+ */
+JL_API jl_api_ret_t jl_vlan_set_batch(struct vlan_item *v_list, jl_uint16 size);
+
+/**
+ * @brief Set the VLAN accept frame type at the specified port, by default accept all
+ * @param[in] port: Port number
+ * @param[in] frmt: jl_vlan_acpt_frmt_e
+ * @return Set successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval minus_value Fail
+ */
+JL_API jl_api_ret_t jl_vlan_acpt_frmt_set(jl_port_t port, jl_vlan_acpt_frmt_t frmt);
+
+/**
+ * @brief Get the VLAN accept frame type at the specified port
+ * @param[in] port Port number
+ * @param[out] pfrmt jl_vlan_acpt_frmt_e
+ * @return Get successfully or not
+ * @retval JL_ERR_OK Ok
+ * @retval minus_value Fail
+ */
+JL_API jl_api_ret_t jl_vlan_acpt_frmt_get(jl_port_t port, jl_vlan_acpt_frmt_t *pfrmt);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __JL_API_VLAN_H__*/
+/** @} Vlan APIs*/
+
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/scripts/Makefile.build b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/scripts/Makefile.build
new file mode 100644
index 0000000..5f5f297
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/scripts/Makefile.build
@@ -0,0 +1,76 @@
+LIBSRC_DIR := $(LIBPROD_DIR)src
+DRIVER_DIR := $(LIBSRC_DIR)/driver
+PORTABLE_DIR := $(LIBSRC_DIR)/portable
+
+LIBOBJ-y += $(LIBSRC_DIR)/acl.o \
+ $(LIBSRC_DIR)/cpu.o \
+ $(LIBSRC_DIR)/fc.o \
+ $(LIBSRC_DIR)/jl_error.o \
+ $(LIBSRC_DIR)/jl_switch.o \
+ $(LIBSRC_DIR)/l2.o \
+ $(LIBSRC_DIR)/led.o \
+ $(LIBSRC_DIR)/lpd.o \
+ $(LIBSRC_DIR)/mib.o \
+ $(LIBSRC_DIR)/mirror.o \
+ $(LIBSRC_DIR)/port.o \
+ $(LIBSRC_DIR)/qos.o \
+ $(LIBSRC_DIR)/storm.o \
+ $(LIBSRC_DIR)/stp.o \
+ $(LIBSRC_DIR)/vlan.o \
+ $(LIBSRC_DIR)/sram_load.o
+
+#
+# jl51xx switch driver layer
+#
+LIBOBJ-y += $(LIBSRC_DIR)/jl51xx/jl51xx_drv_switch.o
+LIBOBJ-y += $(LIBSRC_DIR)/jl51xx/jl51xx_drv_phy.o
+LIBOBJ-y += $(LIBSRC_DIR)/jl51xx/jl51xx_mac_uctrl.o
+LIBOBJ-y += $(LIBSRC_DIR)/jl51xx/jl51xx_drv_acl.o
+LIBOBJ-y += $(LIBSRC_DIR)/jl51xx/jl51xx_drv_cpu.o
+LIBOBJ-y += $(LIBSRC_DIR)/jl51xx/jl51xx_drv_fc.o
+LIBOBJ-y += $(LIBSRC_DIR)/jl51xx/jl51xx_drv_l2.o
+LIBOBJ-y += $(LIBSRC_DIR)/jl51xx/jl51xx_drv_led.o
+LIBOBJ-y += $(LIBSRC_DIR)/jl51xx/jl51xx_drv_lpd.o
+LIBOBJ-y += $(LIBSRC_DIR)/jl51xx/jl51xx_drv_mib.o
+LIBOBJ-y += $(LIBSRC_DIR)/jl51xx/jl51xx_drv_mirror.o
+LIBOBJ-y += $(LIBSRC_DIR)/jl51xx/jl51xx_drv_port.o
+LIBOBJ-y += $(LIBSRC_DIR)/jl51xx/jl51xx_drv_qos.o
+LIBOBJ-y += $(LIBSRC_DIR)/jl51xx/jl51xx_drv_storm.o
+LIBOBJ-y += $(LIBSRC_DIR)/jl51xx/jl51xx_drv_stp.o
+LIBOBJ-y += $(LIBSRC_DIR)/jl51xx/jl51xx_drv_vlan.o
+LIBOBJ-y += $(LIBSRC_DIR)/jl51xx/jl51xx_drv_sram_load.o
+
+LIBOBJ-y += $(DRIVER_DIR)/jl_reg_io.o
+LIBOBJ-$(CONFIG_JLFE_DUMP_REG_WRITE) += $(DRIVER_DIR)/dbg_dump_write.o
+
+LIBOBJ-$(CONFIG_JLFE_SMI_OVER_MDIO) += $(DRIVER_DIR)/hal_smi_mdio.o \
+ $(if $(CONFIG_HAS_OWN_PORTABLE),,$(PORTABLE_DIR)/jl_portable_mdio.o) \
+ $(if $(CONFIG_HAS_OWN_PORTABLE),,$(PORTABLE_DIR)/jl_portable_osdep.o)
+LIBOBJ-$(CONFIG_JLFE_SMI_OVER_GPIO) += $(DRIVER_DIR)/hal_smi_gpio.o \
+ $(if $(CONFIG_HAS_OWN_PORTABLE),,$(PORTABLE_DIR)/jl_portable_gpio.o) \
+ $(if $(CONFIG_HAS_OWN_PORTABLE),,$(PORTABLE_DIR)/jl_portable_osdep.o)
+LIBOBJ-$(CONFIG_JLFE_SMI_OVER_SPI) += $(DRIVER_DIR)/hal_smi_spi.o \
+ $(if $(CONFIG_HAS_OWN_PORTABLE),,$(PORTABLE_DIR)/jl_portable_spi.o) \
+ $(if $(CONFIG_HAS_OWN_PORTABLE),,$(PORTABLE_DIR)/jl_portable_osdep.o)
+
+#
+#USB part
+#
+LIBOBJ-$(CONFIG_JLFE_SMI_OVER_FTDI) += $(DRIVER_DIR)/hal_smi_spi.o \
+ $(PORTABLE_DIR)/demo_spi.o \
+ $(PORTABLE_DIR)/demo_osdep.o
+
+LIBOBJ-$(CONFIG_JLFE_SMI_OVER_WINUSB) += $(DRIVER_DIR)/hal_smi_mdio.o \
+ $(PORTABLE_DIR)/demo_mdio.o \
+ $(PORTABLE_DIR)/demo_osdep.o
+
+ifeq ($(CONFIG_OS_LINUX), y)
+LIBOBJ-$(CONFIG_JLFE_SMI_OVER_HID) += $(DRIVER_DIR)/demo_hid_libusb.o \
+ $(DRIVER_DIR)/demo_smi_hid_spi.o \
+ $(PORTABLE_DIR)/demo_osdep.o
+endif
+ifeq ($(CONFIG_OS_WIN), y)
+LIBOBJ-$(CONFIG_JLFE_SMI_OVER_HID) += $(DRIVER_DIR)/demo_hid_windows.o \
+ $(DRIVER_DIR)/demo_smi_hid_spi.o \
+ $(PORTABLE_DIR)/demo_osdep.o
+endif
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/scripts/Makefile.userconf b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/scripts/Makefile.userconf
new file mode 100644
index 0000000..fde49b7
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/scripts/Makefile.userconf
@@ -0,0 +1,63 @@
+CFLAGS += -I$(LIBPROD_DIR)inc
+CFLAGS += -fgnu89-inline
+
+#
+#Windows specified configs
+#
+ifeq ($(CONFIG_OS_WIN), y)
+
+CFLAGS += -D__USE_MINGW_ANSI_STDIO
+CFLAGS += -DCONFIG_JL_STATIC_LINK
+
+ifeq ($(CONFIG_JLFE_SMI_OVER_FTDI), y)
+CFLAGS += -I$(JL_SDK_DIR)/3rdparty/libftd2xx/libftd2xx_windows
+LDFLAGS += -L$(JL_SDK_DIR)/3rdparty/libftd2xx/libftd2xx_windows/amd64 -lftd2xx
+endif
+
+ifeq ($(CONFIG_JLFE_SMI_OVER_HID), y)
+CFLAGS += -I$(JL_SDK_DIR)/3rdparty/libusb-1.0.25/include/libusb-1.0/
+LDFLAGS += -Wl,--no-as-needed -lpthread -L$(JL_SDK_DIR)/3rdparty/libusb-1.0.25/MinGW64/static -lusb-1.0
+LDFLAGS += -lsetupapi
+endif
+
+ifeq ($(CONFIG_JLFE_SMI_OVER_WINUSB), y)
+CFLAGS += -I$(JL_SDK_DIR)/3rdparty/libusb-1.0.25/include/libusb-1.0/
+LDFLAGS += -Wl,--no-as-needed -lpthread -L$(JL_SDK_DIR)/3rdparty/libusb-1.0.25/MinGW64/static -lusb-1.0
+LDFLAGS += -lwinusb -lcfgmgr32
+endif
+
+endif
+
+#
+#Linux specified configs
+#
+ifeq ($(CONFIG_OS_LINUX), y)
+
+ifeq ($(CONFIG_JLFE_SMI_OVER_FTDI), y)
+#TODO
+CFLAGS += -I$(JL_SDK_DIR)/3rdparty/libftd2xx/libftd2xx_linux
+LDFLAGS += -L$(JL_SDK_DIR)/3rdparty/libftd2xx/libftd2xx_linux/build -Wl,-Bstatic -lftd2xx
+LDFLAGS += -Wl,-Bdynamic -ldl -lrt -lpthread
+endif
+
+ifeq ($(CONFIG_JLFE_SMI_OVER_HID), y)
+CFLAGS += `pkg-config libusb-1.0 --cflags`
+LDFLAGS += -Wl,--no-as-needed -ldl -lrt -lpthread `pkg-config libusb-1.0 --libs`
+endif
+
+ifeq ($(CONFIG_JLFE_SMI_OVER_WINUSB), y)
+CFLAGS += `pkg-config libusb-1.0 --cflags`
+LDFLAGS += -lusb-1.0
+endif
+
+endif
+
+#
+#User config
+#
+
+# USB interfaces are meant to be used in native apps, so cross compiling is not supported
+ifneq ($(CROSS_COMPILE),)
+$(if $(CONFIG_JLFE_SMI_OVER_FTDI)$(CONFIG_JLFE_SMI_OVER_HID)$(CONFIG_JLFE_SMI_OVER_WINUSB), \
+$(error USB interfaces are not supported in cross compilie, please redo menuconfig),)
+endif
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/acl.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/acl.c
new file mode 100755
index 0000000..3fb7ffd
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/acl.c
@@ -0,0 +1,65 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+
+#include "jl_base.h"
+#include "jl51xx/jl51xx_drv_acl.h"
+#include "acl.h"
+
+
+jl_ret_t _jl_acl_set(jl_uint8 entry_index, jl_acl_rule_t *acl_rule,
+ jl_acl_action_t *acl_action)
+{
+ return jl51xx_acl_set(entry_index, acl_rule, acl_action);
+}
+
+jl_ret_t _jl_acl_get(jl_uint8 entry_index, jl_acl_rule_t *acl_rule,
+ jl_acl_action_t *acl_action)
+{
+ return jl51xx_acl_get(entry_index, acl_rule, acl_action);
+}
+
+jl_api_ret_t jl_acl_set(jl_uint8 entry_index, jl_acl_rule_t *acl_rule,
+ jl_acl_action_t *acl_action)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+ JL_CHECK_POINTER(acl_rule);
+ JL_CHECK_POINTER(acl_action);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_acl_set(entry_index, acl_rule, acl_action);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_acl_set);
+
+jl_api_ret_t jl_acl_get(jl_uint8 entry_index, jl_acl_rule_t *acl_rule,
+ jl_acl_action_t *acl_action)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+ JL_CHECK_POINTER(acl_rule);
+ JL_CHECK_POINTER(acl_action);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_acl_get(entry_index, acl_rule, acl_action);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_acl_get);
+
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/cpu.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/cpu.c
new file mode 100644
index 0000000..b02a80f
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/cpu.c
@@ -0,0 +1,199 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+#include "jl_switch.h"
+
+#include "jl51xx/jl51xx_drv_cpu.h"
+#include "cpu.h"
+
+
+static jl_ret_t _jl_cpu_allow_bpdu_enable_set(jl_enable_t enable)
+{
+ return jl51xx_cpu_allow_bpdu_enable_set(enable);
+}
+
+static jl_ret_t _jl_cpu_allow_bpdu_enable_get(jl_enable_t *penable)
+{
+ return jl51xx_cpu_allow_bpdu_enable_get(penable);
+}
+
+static jl_ret_t _jl_cpu_allow_rst_bpdu_enable_set(jl_enable_t enable)
+{
+ return jl51xx_cpu_allow_rst_bpdu_enable_set(enable);
+}
+
+static jl_ret_t _jl_cpu_allow_rst_bpdu_enable_get(jl_enable_t *penable)
+{
+ return jl51xx_cpu_allow_rst_bpdu_enable_get(penable);
+}
+
+static jl_ret_t _jl_to_cpu_tag_enable_get(jl_enable_t *penable)
+{
+ return jl51xx_to_cpu_tag_enable_get(penable);
+}
+
+static jl_ret_t _jl_to_cpu_tag_enable_set(jl_enable_t enable)
+{
+ return jl51xx_to_cpu_tag_enable_set(enable);
+}
+
+static jl_ret_t _jl_cpu_allow_lldp_enable_set(jl_enable_t enable)
+{
+ return jl51xx_cpu_allow_lldp_enable_set(enable);
+}
+
+static jl_ret_t _jl_cpu_allow_lldp_enable_get(jl_enable_t *penable)
+{
+ return jl51xx_cpu_allow_lldp_enable_get(penable);
+}
+
+jl_api_ret_t jl_cpu_allow_bpdu_enable_set(jl_enable_t enable)
+{
+ jl_api_ret_t ret;
+
+ /* Check System state */
+ JL_CHECK_STAT();
+
+ if (enable >= JL_ENABLE_END)
+ return JL_ERR_PARAM;
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_cpu_allow_bpdu_enable_set(enable);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_cpu_allow_bpdu_enable_set);
+
+jl_api_ret_t jl_cpu_allow_bpdu_enable_get(jl_enable_t *penable)
+{
+ jl_api_ret_t ret;
+
+ /* Check System state */
+ JL_CHECK_STAT();
+
+ JL_CHECK_POINTER(penable);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_cpu_allow_bpdu_enable_get(penable);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_cpu_allow_bpdu_enable_get);
+
+jl_api_ret_t jl_cpu_allow_rst_bpdu_enable_set(jl_enable_t enable)
+{
+ jl_api_ret_t ret;
+
+ /* Check System state */
+ JL_CHECK_STAT();
+
+ if (enable >= JL_ENABLE_END)
+ return JL_ERR_PARAM;
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_cpu_allow_rst_bpdu_enable_set(enable);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_cpu_allow_rst_bpdu_enable_set);
+
+jl_api_ret_t jl_cpu_allow_rst_bpdu_enable_get(jl_enable_t *penable)
+{
+ jl_api_ret_t ret;
+
+ /* Check System state */
+ JL_CHECK_STAT();
+
+ JL_CHECK_POINTER(penable);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_cpu_allow_rst_bpdu_enable_get(penable);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_cpu_allow_rst_bpdu_enable_get);
+
+jl_api_ret_t jl_cpu_tag_enable_set(jl_enable_t enable)
+{
+ jl_api_ret_t ret;
+
+ /* Check System state */
+ JL_CHECK_STAT();
+
+ if (enable >= JL_ENABLE_END)
+ return JL_ERR_PARAM;
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_to_cpu_tag_enable_set(enable);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_cpu_tag_enable_set);
+
+jl_api_ret_t jl_cpu_tag_enable_get(jl_enable_t *penable)
+{
+ jl_api_ret_t ret;
+
+ /* Check System state */
+ JL_CHECK_STAT();
+
+ JL_CHECK_POINTER(penable);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_to_cpu_tag_enable_get(penable);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_cpu_tag_enable_get);
+
+jl_api_ret_t jl_cpu_allow_lldp_enable_set(jl_enable_t enable)
+{
+ jl_api_ret_t ret;
+
+ /* Check System state */
+ JL_CHECK_STAT();
+
+ if (enable >= JL_ENABLE_END)
+ return JL_ERR_PARAM;
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_cpu_allow_lldp_enable_set(enable);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_cpu_allow_lldp_enable_set);
+
+jl_api_ret_t jl_cpu_allow_lldp_enable_get(jl_enable_t *penable)
+{
+ jl_api_ret_t ret;
+
+ /* Check System state */
+ JL_CHECK_STAT();
+
+ JL_CHECK_POINTER(penable);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_cpu_allow_lldp_enable_get(penable);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_cpu_allow_lldp_enable_get);
+
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/driver/dbg_dump_write.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/driver/dbg_dump_write.c
new file mode 100644
index 0000000..ed0cd68
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/driver/dbg_dump_write.c
@@ -0,0 +1,194 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+
+#include "driver/jl_reg_io.h"
+
+#define JL_REG_DUMP_FILE "register_write_dump.txt"
+#define JL_CMD_WRITE "WRITE"
+#define JL_CMD_BWRITE "BWRITE"
+#define JL_CMD_DELAY "DELAY"
+#define JL_CMD_FLAG_DA 0U
+#define JL_CMD_FLAG_IDA 1U
+#define MAX_BURST_SIZE 8U
+
+#define JL_DUMP_OVL 1
+#define JL_DUMP_EE 0
+
+static FILE *g_dump_fp;
+static jl_uint8 g_dump_enable;
+
+jl_api_ret_t jl_dump_file_open(void)
+{
+ g_dump_fp = fopen(JL_REG_DUMP_FILE, "w+");
+ if (g_dump_fp == NULL)
+ return JL_ERR_FAIL;
+
+ return JL_ERR_OK;
+}
+
+void jl_dump_file_close(void)
+{
+ if (g_dump_fp != NULL) {
+ fclose(g_dump_fp);
+ g_dump_fp = NULL;
+ }
+}
+
+#if JL_DUMP_OVL
+jl_api_ret_t jl_dump_direct_write(jl_uint32 phy_id, jl_uint32 page_id, jl_uint32 reg_id, jl_uint16 val)
+{
+ jl_uint32 addr;
+
+ if (g_dump_fp == NULL)
+ return JL_ERR_EXISTS;
+ if (!g_dump_enable)
+ return JL_ERR_OK;
+
+ addr = ((phy_id & 0x1FU) << 0x15U) | ((page_id & 0x1FU) << 0x5U) | reg_id;
+
+ fprintf(g_dump_fp, "DEVICE(REGFILE_RF_BASE+0x%x) = 0x%x;\n", addr * 4, val); // DEVICE(REGFILE_APB_BASE + (ADDR_FIXUP_DATA_LO << 2)) = 0xe06f; fprintf(g_dump_fp, "REG32(0x%x) = 0x%x;\n",
+
+ return JL_ERR_OK;
+}
+
+jl_api_ret_t jl_dump_indirect_write(jl_uint32 addr, jl_uint32 val)
+{
+ if (g_dump_fp == NULL)
+ return JL_ERR_EXISTS;
+ if (!g_dump_enable)
+ return JL_ERR_OK;
+
+ fprintf(g_dump_fp, "DEVICE(REGFILE_APB_BASE+0x%x) = 0x%x;\n", addr * 4, val);
+
+ return JL_ERR_OK;
+}
+
+jl_api_ret_t jl_dump_indirect_burst_write(jl_uint32 addr, jl_uint32 size, jl_uint32 * pval)
+{
+ if (g_dump_fp == NULL)
+ return JL_ERR_EXISTS;
+ if ((size > MAX_BURST_SIZE) || (pval == NULL))
+ return JL_ERR_PARAM;
+ if (!g_dump_enable)
+ return JL_ERR_OK;
+
+ for (jl_uint8 i = 0; i < size; i++)
+ fprintf(g_dump_fp, "DEVICE(REGFILE_APB_BASE+0x%x) = 0x%x;\n", addr * 4 + i * 4, pval[i]);
+ return JL_ERR_OK;
+}
+
+jl_api_ret_t jl_dump_add_delay(jl_uint32 us)
+{
+ if (g_dump_fp == NULL)
+ return JL_ERR_EXISTS;
+
+ fprintf(g_dump_fp, "%s %d\n", JL_CMD_DELAY, us);
+
+ return JL_ERR_OK;
+}
+
+jl_api_ret_t jl_dump_add_comment(char *comment)
+{
+ if (g_dump_fp == NULL)
+ return JL_ERR_EXISTS;
+
+ if (comment == NULL)
+ return JL_ERR_PARAM;
+
+ fprintf(g_dump_fp, "//%s\n", comment);
+
+ return JL_ERR_OK;
+}
+
+#elif JL_DUMP_EE
+
+jl_api_ret_t jl_dump_direct_write(jl_uint32 phy_id, jl_uint32 page_id, jl_uint32 reg_id, jl_uint16 val)
+{
+ jl_uint32 addr;
+
+ if (g_dump_fp == NULL)
+ return JL_ERR_EXISTS;
+ if (!g_dump_enable)
+ return JL_ERR_OK;
+
+ addr = ((phy_id & 0x1FU) << 0x15U) | ((page_id & 0x1FU) << 0x5U) | reg_id;
+
+ fprintf(g_dump_fp, "%s %d 0x%x 0x%x\n", JL_CMD_WRITE, JL_CMD_FLAG_DA, addr, val);
+
+ return JL_ERR_OK;
+}
+
+jl_api_ret_t jl_dump_indirect_write(jl_uint32 addr, jl_uint32 val)
+{
+ if (g_dump_fp == NULL)
+ return JL_ERR_EXISTS;
+ if (!g_dump_enable)
+ return JL_ERR_OK;
+
+ fprintf(g_dump_fp, "%s %d 0x%x 0x%x\n", JL_CMD_WRITE, JL_CMD_FLAG_IDA, addr, val);
+
+ return JL_ERR_OK;
+}
+
+jl_api_ret_t jl_dump_indirect_burst_write(jl_uint32 addr, jl_uint32 size, jl_uint32 * pval)
+{
+ if (g_dump_fp == NULL)
+ return JL_ERR_EXISTS;
+ if ((size > MAX_BURST_SIZE) || (pval == NULL))
+ return JL_ERR_PARAM;
+ if (!g_dump_enable)
+ return JL_ERR_OK;
+
+ fprintf(g_dump_fp, "%s %d 0x%x", JL_CMD_BWRITE, size, addr);
+ for (jl_uint8 i = 0; i < size; i++)
+ fprintf(g_dump_fp, " 0x%x", pval[i]);
+ fprintf(g_dump_fp, "\n");
+
+ return JL_ERR_OK;
+}
+
+jl_api_ret_t jl_dump_add_delay(jl_uint32 us)
+{
+ if (g_dump_fp == NULL)
+ return JL_ERR_EXISTS;
+
+ fprintf(g_dump_fp, "%s %d\n", JL_CMD_DELAY, us);
+
+ return JL_ERR_OK;
+}
+
+jl_api_ret_t jl_dump_add_comment(char *comment)
+{
+ if (g_dump_fp == NULL)
+ return JL_ERR_EXISTS;
+
+ if (comment == NULL)
+ return JL_ERR_PARAM;
+
+ fprintf(g_dump_fp, ";%s\n", comment);
+
+ return JL_ERR_OK;
+}
+
+#endif
+
+void jl_dump_enable(void)
+{
+ g_dump_enable = 1;
+}
+
+void jl_dump_disable(void)
+{
+ g_dump_enable = 0;
+}
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/driver/demo_hid_libusb.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/driver/demo_hid_libusb.c
new file mode 100644
index 0000000..695b8a3
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/driver/demo_hid_libusb.c
@@ -0,0 +1,1691 @@
+/*******************************************************
+ HIDAPI - Multi-Platform library for
+ communication with HID devices.
+
+ Alan Ott
+ Signal 11 Software
+
+ 8/22/2009
+ Linux Version - 6/2/2010
+ Libusb Version - 8/13/2010
+ FreeBSD Version - 11/1/2011
+
+ Copyright 2009, All Rights Reserved.
+
+ At the discretion of the user of this library,
+ this software may be licensed under the terms of the
+ GNU General Public License v3, a BSD-Style license, or the
+ original HIDAPI license as outlined in the LICENSE.txt,
+ LICENSE-gpl3.txt, LICENSE-bsd.txt, and LICENSE-orig.txt
+ files located at the root of the source distribution.
+ These files may also be found in the public source
+ code repository located at:
+ https://github.com/libusb/hidapi .
+********************************************************/
+
+
+#define _GNU_SOURCE /* needed for wcsdup() before glibc 2.10 */
+
+/* C */
+#include <stdio.h>
+#include <string.h>
+#include <stdlib.h>
+#include <ctype.h>
+#include <locale.h>
+#include <errno.h>
+
+/* Unix */
+#include <unistd.h>
+#include <sys/types.h>
+#include <sys/stat.h>
+#include <sys/ioctl.h>
+#include <sys/utsname.h>
+#include <fcntl.h>
+#include <pthread.h>
+#include <wchar.h>
+
+/* GNU / LibUSB */
+#include <libusb.h>
+#if !defined(__ANDROID__) && !defined(NO_ICONV)
+#include <iconv.h>
+#endif
+
+#include "driver/demo_hidapi_libusb.h"
+
+#if defined(__ANDROID__) && __ANDROID_API__ < __ANDROID_API_N__
+
+/* Barrier implementation because Android/Bionic don't have pthread_barrier.
+ This implementation came from Brent Priddy and was posted on
+ StackOverflow. It is used with his permission. */
+typedef int pthread_barrierattr_t;
+typedef struct pthread_barrier {
+ pthread_mutex_t mutex;
+ pthread_cond_t cond;
+ int count;
+ int trip_count;
+} pthread_barrier_t;
+
+static int pthread_barrier_init(pthread_barrier_t *barrier, const pthread_barrierattr_t *attr, unsigned int count)
+{
+ if(count == 0) {
+ errno = EINVAL;
+ return -1;
+ }
+
+ if(pthread_mutex_init(&barrier->mutex, 0) < 0) {
+ return -1;
+ }
+ if(pthread_cond_init(&barrier->cond, 0) < 0) {
+ pthread_mutex_destroy(&barrier->mutex);
+ return -1;
+ }
+ barrier->trip_count = count;
+ barrier->count = 0;
+
+ return 0;
+}
+
+static int pthread_barrier_destroy(pthread_barrier_t *barrier)
+{
+ pthread_cond_destroy(&barrier->cond);
+ pthread_mutex_destroy(&barrier->mutex);
+ return 0;
+}
+
+static int pthread_barrier_wait(pthread_barrier_t *barrier)
+{
+ pthread_mutex_lock(&barrier->mutex);
+ ++(barrier->count);
+ if(barrier->count >= barrier->trip_count)
+ {
+ barrier->count = 0;
+ pthread_cond_broadcast(&barrier->cond);
+ pthread_mutex_unlock(&barrier->mutex);
+ return 1;
+ }
+ else
+ {
+ pthread_cond_wait(&barrier->cond, &(barrier->mutex));
+ pthread_mutex_unlock(&barrier->mutex);
+ return 0;
+ }
+}
+
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifdef DEBUG_PRINTF
+#define LOG(...) fprintf(stderr, __VA_ARGS__)
+#else
+#define LOG(...) do {} while (0)
+#endif
+
+#ifndef __FreeBSD__
+#define DETACH_KERNEL_DRIVER
+#endif
+
+/* Uncomment to enable the retrieval of Usage and Usage Page in
+hid_enumerate(). Warning, on platforms different from FreeBSD
+this is very invasive as it requires the detach
+and re-attach of the kernel driver. See comments inside hid_enumerate().
+libusb HIDAPI programs are encouraged to use the interface number
+instead to differentiate between interfaces on a composite HID device. */
+/*#define INVASIVE_GET_USAGE*/
+
+/* Linked List of input reports received from the device. */
+struct input_report {
+ uint8_t *data;
+ size_t len;
+ struct input_report *next;
+};
+
+
+struct hid_device_ {
+ /* Handle to the actual device. */
+ libusb_device_handle *device_handle;
+
+ /* Endpoint information */
+ int input_endpoint;
+ int output_endpoint;
+ int input_ep_max_packet_size;
+
+ /* The interface number of the HID */
+ int interface;
+
+ /* Indexes of Strings */
+ int manufacturer_index;
+ int product_index;
+ int serial_index;
+
+ /* Whether blocking reads are used */
+ int blocking; /* boolean */
+
+ /* Read thread objects */
+ pthread_t thread;
+ pthread_mutex_t mutex; /* Protects input_reports */
+ pthread_cond_t condition;
+ pthread_barrier_t barrier; /* Ensures correct startup sequence */
+ int shutdown_thread;
+ int transfer_loop_finished;
+ struct libusb_transfer *transfer;
+
+ /* List of received input reports. */
+ struct input_report *input_reports;
+
+ /* Was kernel driver detached by libusb */
+#ifdef DETACH_KERNEL_DRIVER
+ int is_driver_detached;
+#endif
+};
+
+static struct hid_api_version api_version = {
+ .major = HID_API_VERSION_MAJOR,
+ .minor = HID_API_VERSION_MINOR,
+ .patch = HID_API_VERSION_PATCH
+};
+
+static libusb_context *usb_context = NULL;
+
+uint16_t get_usb_code_for_current_locale(void);
+static int return_data(hid_device *dev, unsigned char *data, size_t length);
+
+static hid_device *new_hid_device(void)
+{
+ hid_device *dev = (hid_device*) calloc(1, sizeof(hid_device));
+ dev->blocking = 1;
+
+ pthread_mutex_init(&dev->mutex, NULL);
+ pthread_cond_init(&dev->condition, NULL);
+ pthread_barrier_init(&dev->barrier, NULL, 2);
+
+ return dev;
+}
+
+static void free_hid_device(hid_device *dev)
+{
+ /* Clean up the thread objects */
+ pthread_barrier_destroy(&dev->barrier);
+ pthread_cond_destroy(&dev->condition);
+ pthread_mutex_destroy(&dev->mutex);
+
+ /* Free the device itself */
+ free(dev);
+}
+
+#if 0
+/*TODO: Implement this function on hidapi/libusb.. */
+static void register_error(hid_device *dev, const char *op)
+{
+
+}
+#endif
+
+#ifdef INVASIVE_GET_USAGE
+/* Get bytes from a HID Report Descriptor.
+ Only call with a num_bytes of 0, 1, 2, or 4. */
+static uint32_t get_bytes(uint8_t *rpt, size_t len, size_t num_bytes, size_t cur)
+{
+ /* Return if there aren't enough bytes. */
+ if (cur + num_bytes >= len)
+ return 0;
+
+ if (num_bytes == 0)
+ return 0;
+ else if (num_bytes == 1) {
+ return rpt[cur+1];
+ }
+ else if (num_bytes == 2) {
+ return (rpt[cur+2] * 256 + rpt[cur+1]);
+ }
+ else if (num_bytes == 4) {
+ return (rpt[cur+4] * 0x01000000 +
+ rpt[cur+3] * 0x00010000 +
+ rpt[cur+2] * 0x00000100 +
+ rpt[cur+1] * 0x00000001);
+ }
+ else
+ return 0;
+}
+
+/* Retrieves the device's Usage Page and Usage from the report
+ descriptor. The algorithm is simple, as it just returns the first
+ Usage and Usage Page that it finds in the descriptor.
+ The return value is 0 on success and -1 on failure. */
+static int get_usage(uint8_t *report_descriptor, size_t size,
+ unsigned short *usage_page, unsigned short *usage)
+{
+ unsigned int i = 0;
+ int size_code;
+ int data_len, key_size;
+ int usage_found = 0, usage_page_found = 0;
+
+ while (i < size) {
+ int key = report_descriptor[i];
+ int key_cmd = key & 0xfc;
+
+ //printf("key: %02hhx\n", key);
+
+ if ((key & 0xf0) == 0xf0) {
+ /* This is a Long Item. The next byte contains the
+ length of the data section (value) for this key.
+ See the HID specification, version 1.11, section
+ 6.2.2.3, titled "Long Items." */
+ if (i+1 < size)
+ data_len = report_descriptor[i+1];
+ else
+ data_len = 0; /* malformed report */
+ key_size = 3;
+ }
+ else {
+ /* This is a Short Item. The bottom two bits of the
+ key contain the size code for the data section
+ (value) for this key. Refer to the HID
+ specification, version 1.11, section 6.2.2.2,
+ titled "Short Items." */
+ size_code = key & 0x3;
+ switch (size_code) {
+ case 0:
+ case 1:
+ case 2:
+ data_len = size_code;
+ break;
+ case 3:
+ data_len = 4;
+ break;
+ default:
+ /* Can't ever happen since size_code is & 0x3 */
+ data_len = 0;
+ break;
+ };
+ key_size = 1;
+ }
+
+ if (key_cmd == 0x4) {
+ *usage_page = get_bytes(report_descriptor, size, data_len, i);
+ usage_page_found = 1;
+ //printf("Usage Page: %x\n", (uint32_t)*usage_page);
+ }
+ if (key_cmd == 0x8) {
+ *usage = get_bytes(report_descriptor, size, data_len, i);
+ usage_found = 1;
+ //printf("Usage: %x\n", (uint32_t)*usage);
+ }
+
+ if (usage_page_found && usage_found)
+ return 0; /* success */
+
+ /* Skip over this key and it's associated data */
+ i += data_len + key_size;
+ }
+
+ return -1; /* failure */
+}
+#endif /* INVASIVE_GET_USAGE */
+
+#if defined(__FreeBSD__) && __FreeBSD__ < 10
+/* The libusb version included in FreeBSD < 10 doesn't have this function. In
+ mainline libusb, it's inlined in libusb.h. This function will bear a striking
+ resemblance to that one, because there's about one way to code it.
+
+ Note that the data parameter is Unicode in UTF-16LE encoding.
+ Return value is the number of bytes in data, or LIBUSB_ERROR_*.
+ */
+static inline int libusb_get_string_descriptor(libusb_device_handle *dev,
+ uint8_t descriptor_index, uint16_t lang_id,
+ unsigned char *data, int length)
+{
+ return libusb_control_transfer(dev,
+ LIBUSB_ENDPOINT_IN | 0x0, /* Endpoint 0 IN */
+ LIBUSB_REQUEST_GET_DESCRIPTOR,
+ ((uint32_t)LIBUSB_DT_STRING << 8) | descriptor_index,
+ lang_id, data, (uint16_t) length, 1000);
+}
+
+#endif
+
+
+/* Get the first language the device says it reports. This comes from
+ USB string #0. */
+static uint16_t get_first_language(libusb_device_handle *dev)
+{
+ uint16_t buf[32];
+ int len;
+
+ /* Get the string from libusb. */
+ len = libusb_get_string_descriptor(dev,
+ 0x0, /* String ID */
+ 0x0, /* Language */
+ (unsigned char*)buf,
+ sizeof(buf));
+ if (len < 4)
+ return 0x0;
+
+ return buf[1]; /* First two bytes are len and descriptor type. */
+}
+
+static int is_language_supported(libusb_device_handle *dev, uint16_t lang)
+{
+ uint16_t buf[32];
+ int len;
+ int i;
+
+ /* Get the string from libusb. */
+ len = libusb_get_string_descriptor(dev,
+ 0x0, /* String ID */
+ 0x0, /* Language */
+ (unsigned char*)buf,
+ sizeof(buf));
+ if (len < 4)
+ return 0x0;
+
+
+ len /= 2; /* language IDs are two-bytes each. */
+ /* Start at index 1 because there are two bytes of protocol data. */
+ for (i = 1; i < len; i++) {
+ if (buf[i] == lang)
+ return 1;
+ }
+
+ return 0;
+}
+
+
+/* This function returns a newly allocated wide string containing the USB
+ device string numbered by the index. The returned string must be freed
+ by using free(). */
+static wchar_t *get_usb_string(libusb_device_handle *dev, uint8_t idx)
+{
+ char buf[512];
+ int len;
+ wchar_t *str = NULL;
+
+#if !defined(__ANDROID__) && !defined(NO_ICONV) /* we don't use iconv on Android, or when it is explicitly disabled */
+ wchar_t wbuf[256];
+ /* iconv variables */
+ iconv_t ic;
+ size_t inbytes;
+ size_t outbytes;
+ size_t res;
+ char *inptr;
+ char *outptr;
+#endif
+
+ /* Determine which language to use. */
+ uint16_t lang;
+ lang = get_usb_code_for_current_locale();
+ if (!is_language_supported(dev, lang))
+ lang = get_first_language(dev);
+
+ /* Get the string from libusb. */
+ len = libusb_get_string_descriptor(dev,
+ idx,
+ lang,
+ (unsigned char*)buf,
+ sizeof(buf));
+ if (len < 0)
+ return NULL;
+
+#if defined(__ANDROID__) || defined(NO_ICONV)
+
+ /* Bionic does not have iconv support nor wcsdup() function, so it
+ has to be done manually. The following code will only work for
+ code points that can be represented as a single UTF-16 character,
+ and will incorrectly convert any code points which require more
+ than one UTF-16 character.
+
+ Skip over the first character (2-bytes). */
+ len -= 2;
+ str = (wchar_t*) malloc((len / 2 + 1) * sizeof(wchar_t));
+ int i;
+ for (i = 0; i < len / 2; i++) {
+ str[i] = buf[i * 2 + 2] | ((uint32_t)buf[i * 2 + 3] << 8);
+ }
+ str[len / 2] = 0x00000000;
+
+#else
+
+ /* buf does not need to be explicitly NULL-terminated because
+ it is only passed into iconv() which does not need it. */
+
+ /* Initialize iconv. */
+ ic = iconv_open("WCHAR_T", "UTF-16LE");
+ if (ic == (iconv_t)-1) {
+ LOG("iconv_open() failed\n");
+ return NULL;
+ }
+
+ /* Convert to native wchar_t (UTF-32 on glibc/BSD systems).
+ Skip the first character (2-bytes). */
+ inptr = buf+2;
+ inbytes = len-2;
+ outptr = (char*) wbuf;
+ outbytes = sizeof(wbuf);
+ res = iconv(ic, &inptr, &inbytes, &outptr, &outbytes);
+ if (res == (size_t)-1) {
+ LOG("iconv() failed\n");
+ goto err;
+ }
+
+ /* Write the terminating NULL. */
+ wbuf[sizeof(wbuf)/sizeof(wbuf[0])-1] = 0x00000000;
+ if (outbytes >= sizeof(wbuf[0]))
+ *((wchar_t*)outptr) = 0x00000000;
+
+ /* Allocate and copy the string. */
+ str = wcsdup(wbuf);
+
+err:
+ iconv_close(ic);
+
+#endif
+
+ return str;
+}
+
+static char *make_path(libusb_device *dev, int interface_number, int config_number)
+{
+ char str[64]; /* max length "000-000.000.000.000.000.000.000:000.000" */
+ /* Note that USB3 port count limit is 7; use 8 here for alignment */
+ uint8_t port_numbers[8] = {0, 0, 0, 0, 0, 0, 0, 0};
+ int num_ports = libusb_get_port_numbers(dev, port_numbers, 8);
+
+ if (num_ports > 0) {
+ int n = snprintf(str, sizeof("000-000"), "%u-%u", libusb_get_bus_number(dev), port_numbers[0]);
+ for (uint8_t i = 1; i < num_ports; i++) {
+ n += snprintf(&str[n], sizeof(".000"), ".%u", port_numbers[i]);
+ }
+ n += snprintf(&str[n], sizeof(":000.000"), ":%u.%u", (uint8_t)config_number, (uint8_t)interface_number);
+ str[n] = '\0';
+ } else {
+ /* USB3.0 specs limit number of ports to 7 and buffer size here is 8 */
+ if (num_ports == LIBUSB_ERROR_OVERFLOW) {
+ LOG("make_path() failed. buffer overflow error\n");
+ } else {
+ LOG("make_path() failed. unknown error\n");
+ }
+ str[0] = '\0';
+ }
+ return strdup(str);
+}
+
+HID_API_EXPORT const struct hid_api_version* HID_API_CALL hid_version()
+{
+ return &api_version;
+}
+
+HID_API_EXPORT const char* HID_API_CALL hid_version_str()
+{
+ return HID_API_VERSION_STR;
+}
+
+int HID_API_EXPORT hid_init(void)
+{
+ if (!usb_context) {
+ const char *locale;
+
+ /* Init Libusb */
+ if (libusb_init(&usb_context))
+ return -1;
+
+ /* Set the locale if it's not set. */
+ locale = setlocale(LC_CTYPE, NULL);
+ if (!locale)
+ setlocale(LC_CTYPE, "");
+ }
+
+ return 0;
+}
+
+int HID_API_EXPORT hid_exit(void)
+{
+ if (usb_context) {
+ libusb_exit(usb_context);
+ usb_context = NULL;
+ }
+
+ return 0;
+}
+
+struct hid_device_info HID_API_EXPORT *hid_enumerate(unsigned short vendor_id, unsigned short product_id)
+{
+ libusb_device **devs;
+ libusb_device *dev;
+ libusb_device_handle *handle;
+ ssize_t num_devs;
+ int i = 0;
+
+ struct hid_device_info *root = NULL; /* return object */
+ struct hid_device_info *cur_dev = NULL;
+
+ if(hid_init() < 0)
+ return NULL;
+
+ num_devs = libusb_get_device_list(usb_context, &devs);
+ if (num_devs < 0)
+ return NULL;
+ while ((dev = devs[i++]) != NULL) {
+ struct libusb_device_descriptor desc;
+ struct libusb_config_descriptor *conf_desc = NULL;
+ int j, k;
+
+ int res = libusb_get_device_descriptor(dev, &desc);
+ unsigned short dev_vid = desc.idVendor;
+ unsigned short dev_pid = desc.idProduct;
+
+ if ((vendor_id != 0x0 && vendor_id != dev_vid) ||
+ (product_id != 0x0 && product_id != dev_pid)) {
+ continue;
+ }
+
+ res = libusb_get_active_config_descriptor(dev, &conf_desc);
+ if (res < 0)
+ libusb_get_config_descriptor(dev, 0, &conf_desc);
+ if (conf_desc) {
+ for (j = 0; j < conf_desc->bNumInterfaces; j++) {
+ const struct libusb_interface *intf = &conf_desc->interface[j];
+ for (k = 0; k < intf->num_altsetting; k++) {
+ const struct libusb_interface_descriptor *intf_desc;
+ intf_desc = &intf->altsetting[k];
+ if (intf_desc->bInterfaceClass == LIBUSB_CLASS_HID) {
+ int interface_num = intf_desc->bInterfaceNumber;
+ struct hid_device_info *tmp;
+
+ /* VID/PID match. Create the record. */
+ tmp = (struct hid_device_info*) calloc(1, sizeof(struct hid_device_info));
+ if (cur_dev) {
+ cur_dev->next = tmp;
+ }
+ else {
+ root = tmp;
+ }
+ cur_dev = tmp;
+
+ /* Fill out the record */
+ cur_dev->next = NULL;
+ cur_dev->path = make_path(dev, interface_num, conf_desc->bConfigurationValue);
+
+ res = libusb_open(dev, &handle);
+
+ if (res >= 0) {
+#ifdef __ANDROID__
+ /* There is (a potential) libusb Android backend, in which
+ device descriptor is not accurate up until the device is opened.
+ https://github.com/libusb/libusb/pull/874#discussion_r632801373
+ A workaround is to re-read the descriptor again.
+ Even if it is not going to be accepted into libusb master,
+ having it here won't do any harm, since reading the device descriptor
+ is as cheap as copy 18 bytes of data. */
+ libusb_get_device_descriptor(dev, &desc);
+#endif
+
+ /* Serial Number */
+ if (desc.iSerialNumber > 0)
+ cur_dev->serial_number =
+ get_usb_string(handle, desc.iSerialNumber);
+
+ /* Manufacturer and Product strings */
+ if (desc.iManufacturer > 0)
+ cur_dev->manufacturer_string =
+ get_usb_string(handle, desc.iManufacturer);
+ if (desc.iProduct > 0)
+ cur_dev->product_string =
+ get_usb_string(handle, desc.iProduct);
+
+#ifdef INVASIVE_GET_USAGE
+{
+ /*
+ This section is removed because it is too
+ invasive on the system. Getting a Usage Page
+ and Usage requires parsing the HID Report
+ descriptor. Getting a HID Report descriptor
+ involves claiming the interface. Claiming the
+ interface involves detaching the kernel driver.
+ Detaching the kernel driver is hard on the system
+ because it will unclaim interfaces (if another
+ app has them claimed) and the re-attachment of
+ the driver will sometimes change /dev entry names.
+ It is for these reasons that this section is
+ #if 0. For composite devices, use the interface
+ field in the hid_device_info struct to distinguish
+ between interfaces. */
+ unsigned char data[256];
+#ifdef DETACH_KERNEL_DRIVER
+ int detached = 0;
+ /* Usage Page and Usage */
+ res = libusb_kernel_driver_active(handle, interface_num);
+ if (res == 1) {
+ res = libusb_detach_kernel_driver(handle, interface_num);
+ if (res < 0)
+ LOG("Couldn't detach kernel driver, even though a kernel driver was attached.\n");
+ else
+ detached = 1;
+ }
+#endif
+ res = libusb_claim_interface(handle, interface_num);
+ if (res >= 0) {
+ /* Get the HID Report Descriptor. */
+ res = libusb_control_transfer(handle, LIBUSB_ENDPOINT_IN|LIBUSB_RECIPIENT_INTERFACE, LIBUSB_REQUEST_GET_DESCRIPTOR, ((uint32_t)LIBUSB_DT_REPORT << 8)|interface_num, 0, data, sizeof(data), 5000);
+ if (res >= 0) {
+ unsigned short page=0, usage=0;
+ /* Parse the usage and usage page
+ out of the report descriptor. */
+ get_usage(data, res, &page, &usage);
+ cur_dev->usage_page = page;
+ cur_dev->usage = usage;
+ }
+ else
+ LOG("libusb_control_transfer() for getting the HID report failed with %d\n", res);
+
+ /* Release the interface */
+ res = libusb_release_interface(handle, interface_num);
+ if (res < 0)
+ LOG("Can't release the interface.\n");
+ }
+ else
+ LOG("Can't claim interface %d\n", res);
+#ifdef DETACH_KERNEL_DRIVER
+ /* Re-attach kernel driver if necessary. */
+ if (detached) {
+ res = libusb_attach_kernel_driver(handle, interface_num);
+ if (res < 0)
+ LOG("Couldn't re-attach kernel driver.\n");
+ }
+#endif
+}
+#endif /* INVASIVE_GET_USAGE */
+
+ libusb_close(handle);
+ }
+ /* VID/PID */
+ cur_dev->vendor_id = dev_vid;
+ cur_dev->product_id = dev_pid;
+
+ /* Release Number */
+ cur_dev->release_number = desc.bcdDevice;
+
+ /* Interface Number */
+ cur_dev->interface_number = interface_num;
+ }
+ } /* altsettings */
+ } /* interfaces */
+ libusb_free_config_descriptor(conf_desc);
+ }
+ }
+
+ libusb_free_device_list(devs, 1);
+
+ return root;
+}
+
+void HID_API_EXPORT hid_free_enumeration(struct hid_device_info *devs)
+{
+ struct hid_device_info *d = devs;
+ while (d) {
+ struct hid_device_info *next = d->next;
+ free(d->path);
+ free(d->serial_number);
+ free(d->manufacturer_string);
+ free(d->product_string);
+ free(d);
+ d = next;
+ }
+}
+
+hid_device * hid_open(unsigned short vendor_id, unsigned short product_id, const wchar_t *serial_number)
+{
+ struct hid_device_info *devs, *cur_dev;
+ const char *path_to_open = NULL;
+ hid_device *handle = NULL;
+
+ devs = hid_enumerate(vendor_id, product_id);
+ cur_dev = devs;
+ while (cur_dev) {
+ if (cur_dev->vendor_id == vendor_id &&
+ cur_dev->product_id == product_id) {
+ if (serial_number) {
+ if (cur_dev->serial_number &&
+ wcscmp(serial_number, cur_dev->serial_number) == 0) {
+ path_to_open = cur_dev->path;
+ break;
+ }
+ }
+ else {
+ path_to_open = cur_dev->path;
+ break;
+ }
+ }
+ cur_dev = cur_dev->next;
+ }
+
+ if (path_to_open) {
+ /* Open the device */
+ handle = hid_open_path(path_to_open);
+ }
+
+ hid_free_enumeration(devs);
+
+ return handle;
+}
+
+static void read_callback(struct libusb_transfer *transfer)
+{
+ hid_device *dev = transfer->user_data;
+ int res;
+
+ if (transfer->status == LIBUSB_TRANSFER_COMPLETED) {
+
+ struct input_report *rpt = (struct input_report*) malloc(sizeof(*rpt));
+ rpt->data = (uint8_t*) malloc(transfer->actual_length);
+ memcpy(rpt->data, transfer->buffer, transfer->actual_length);
+ rpt->len = transfer->actual_length;
+ rpt->next = NULL;
+
+ pthread_mutex_lock(&dev->mutex);
+
+ /* Attach the new report object to the end of the list. */
+ if (dev->input_reports == NULL) {
+ /* The list is empty. Put it at the root. */
+ dev->input_reports = rpt;
+ pthread_cond_signal(&dev->condition);
+ }
+ else {
+ /* Find the end of the list and attach. */
+ struct input_report *cur = dev->input_reports;
+ int num_queued = 0;
+ while (cur->next != NULL) {
+ cur = cur->next;
+ num_queued++;
+ }
+ cur->next = rpt;
+
+ /* Pop one off if we've reached 30 in the queue. This
+ way we don't grow forever if the user never reads
+ anything from the device. */
+ if (num_queued > 30) {
+ return_data(dev, NULL, 0);
+ }
+ }
+ pthread_mutex_unlock(&dev->mutex);
+ }
+ else if (transfer->status == LIBUSB_TRANSFER_CANCELLED) {
+ dev->shutdown_thread = 1;
+ }
+ else if (transfer->status == LIBUSB_TRANSFER_NO_DEVICE) {
+ dev->shutdown_thread = 1;
+ }
+ else if (transfer->status == LIBUSB_TRANSFER_TIMED_OUT) {
+ //LOG("Timeout (normal)\n");
+ }
+ else {
+ LOG("Unknown transfer code: %d\n", transfer->status);
+ }
+
+ if (dev->shutdown_thread) {
+ dev->transfer_loop_finished = 1;
+ return;
+ }
+
+ /* Re-submit the transfer object. */
+ res = libusb_submit_transfer(transfer);
+ if (res != 0) {
+ LOG("Unable to submit URB. libusb error code: %d\n", res);
+ dev->shutdown_thread = 1;
+ dev->transfer_loop_finished = 1;
+ }
+}
+
+
+static void *read_thread(void *param)
+{
+ hid_device *dev = param;
+ uint8_t *buf;
+ const size_t length = dev->input_ep_max_packet_size;
+
+ /* Set up the transfer object. */
+ buf = (uint8_t*) malloc(length);
+ dev->transfer = libusb_alloc_transfer(0);
+ libusb_fill_interrupt_transfer(dev->transfer,
+ dev->device_handle,
+ dev->input_endpoint,
+ buf,
+ length,
+ read_callback,
+ dev,
+ 5000/*timeout*/);
+
+ /* Make the first submission. Further submissions are made
+ from inside read_callback() */
+ libusb_submit_transfer(dev->transfer);
+
+ /* Notify the main thread that the read thread is up and running. */
+ pthread_barrier_wait(&dev->barrier);
+
+ /* Handle all the events. */
+ while (!dev->shutdown_thread) {
+ int res;
+ res = libusb_handle_events(usb_context);
+ if (res < 0) {
+ /* There was an error. */
+ LOG("read_thread(): libusb reports error # %d\n", res);
+
+ /* Break out of this loop only on fatal error.*/
+ if (res != LIBUSB_ERROR_BUSY &&
+ res != LIBUSB_ERROR_TIMEOUT &&
+ res != LIBUSB_ERROR_OVERFLOW &&
+ res != LIBUSB_ERROR_INTERRUPTED) {
+ dev->shutdown_thread = 1;
+ break;
+ }
+ }
+ }
+
+ /* Cancel any transfer that may be pending. This call will fail
+ if no transfers are pending, but that's OK. */
+ libusb_cancel_transfer(dev->transfer);
+
+ while (!dev->transfer_loop_finished)
+ libusb_handle_events_completed(usb_context, &dev->transfer_loop_finished);
+
+ /* Now that the read thread is stopping, Wake any threads which are
+ waiting on data (in hid_read_timeout()). Do this under a mutex to
+ make sure that a thread which is about to go to sleep waiting on
+ the condition actually will go to sleep before the condition is
+ signaled. */
+ pthread_mutex_lock(&dev->mutex);
+ pthread_cond_broadcast(&dev->condition);
+ pthread_mutex_unlock(&dev->mutex);
+
+ /* The dev->transfer->buffer and dev->transfer objects are cleaned up
+ in hid_close(). They are not cleaned up here because this thread
+ could end either due to a disconnect or due to a user
+ call to hid_close(). In both cases the objects can be safely
+ cleaned up after the call to pthread_join() (in hid_close()), but
+ since hid_close() calls libusb_cancel_transfer(), on these objects,
+ they can not be cleaned up here. */
+
+ return NULL;
+}
+
+
+static int hidapi_initialize_device(hid_device *dev, const struct libusb_interface_descriptor *intf_desc)
+{
+ int i =0;
+ int res = 0;
+ struct libusb_device_descriptor desc;
+ libusb_get_device_descriptor(libusb_get_device(dev->device_handle), &desc);
+
+#ifdef DETACH_KERNEL_DRIVER
+ /* Detach the kernel driver, but only if the
+ device is managed by the kernel */
+ dev->is_driver_detached = 0;
+ if (libusb_kernel_driver_active(dev->device_handle, intf_desc->bInterfaceNumber) == 1) {
+ res = libusb_detach_kernel_driver(dev->device_handle, intf_desc->bInterfaceNumber);
+ if (res < 0) {
+ LOG("Unable to detach Kernel Driver\n");
+ return 0;
+ }
+ else {
+ dev->is_driver_detached = 1;
+ LOG("Driver successfully detached from kernel.\n");
+ }
+ }
+#endif
+ res = libusb_claim_interface(dev->device_handle, intf_desc->bInterfaceNumber);
+ if (res < 0) {
+ LOG("can't claim interface %d: %d\n", intf_desc->bInterfaceNumber, res);
+ return 0;
+ }
+
+ /* Store off the string descriptor indexes */
+ dev->manufacturer_index = desc.iManufacturer;
+ dev->product_index = desc.iProduct;
+ dev->serial_index = desc.iSerialNumber;
+
+ /* Store off the interface number */
+ dev->interface = intf_desc->bInterfaceNumber;
+
+ dev->input_endpoint = 0;
+ dev->input_ep_max_packet_size = 0;
+ dev->output_endpoint = 0;
+
+ /* Find the INPUT and OUTPUT endpoints. An
+ OUTPUT endpoint is not required. */
+ for (i = 0; i < intf_desc->bNumEndpoints; i++) {
+ const struct libusb_endpoint_descriptor *ep
+ = &intf_desc->endpoint[i];
+
+ /* Determine the type and direction of this
+ endpoint. */
+ int is_interrupt =
+ (ep->bmAttributes & LIBUSB_TRANSFER_TYPE_MASK)
+ == LIBUSB_TRANSFER_TYPE_INTERRUPT;
+ int is_output =
+ (ep->bEndpointAddress & LIBUSB_ENDPOINT_DIR_MASK)
+ == LIBUSB_ENDPOINT_OUT;
+ int is_input =
+ (ep->bEndpointAddress & LIBUSB_ENDPOINT_DIR_MASK)
+ == LIBUSB_ENDPOINT_IN;
+
+ /* Decide whether to use it for input or output. */
+ if (dev->input_endpoint == 0 &&
+ is_interrupt && is_input) {
+ /* Use this endpoint for INPUT */
+ dev->input_endpoint = ep->bEndpointAddress;
+ dev->input_ep_max_packet_size = ep->wMaxPacketSize;
+ }
+ if (dev->output_endpoint == 0 &&
+ is_interrupt && is_output) {
+ /* Use this endpoint for OUTPUT */
+ dev->output_endpoint = ep->bEndpointAddress;
+ }
+ }
+
+ pthread_create(&dev->thread, NULL, read_thread, dev);
+
+ /* Wait here for the read thread to be initialized. */
+ pthread_barrier_wait(&dev->barrier);
+ return 1;
+}
+
+
+hid_device * HID_API_EXPORT hid_open_path(const char *path)
+{
+ hid_device *dev = NULL;
+
+ libusb_device **devs = NULL;
+ libusb_device *usb_dev = NULL;
+ int res = 0;
+ int d = 0;
+ int good_open = 0;
+
+ if(hid_init() < 0)
+ return NULL;
+
+ dev = new_hid_device();
+
+ libusb_get_device_list(usb_context, &devs);
+ while ((usb_dev = devs[d++]) != NULL && !good_open) {
+ struct libusb_config_descriptor *conf_desc = NULL;
+ int j,k;
+
+ if (libusb_get_active_config_descriptor(usb_dev, &conf_desc) < 0)
+ continue;
+ for (j = 0; j < conf_desc->bNumInterfaces && !good_open; j++) {
+ const struct libusb_interface *intf = &conf_desc->interface[j];
+ for (k = 0; k < intf->num_altsetting && !good_open; k++) {
+ const struct libusb_interface_descriptor *intf_desc = &intf->altsetting[k];
+ if (intf_desc->bInterfaceClass == LIBUSB_CLASS_HID) {
+ char *dev_path = make_path(usb_dev, intf_desc->bInterfaceNumber, conf_desc->bConfigurationValue);
+ if (!strcmp(dev_path, path)) {
+ /* Matched Paths. Open this device */
+
+ /* OPEN HERE */
+ res = libusb_open(usb_dev, &dev->device_handle);
+ if (res < 0) {
+ LOG("can't open device\n");
+ free(dev_path);
+ break;
+ }
+ good_open = hidapi_initialize_device(dev, intf_desc);
+ if (!good_open)
+ libusb_close(dev->device_handle);
+ }
+ free(dev_path);
+ }
+ }
+ }
+ libusb_free_config_descriptor(conf_desc);
+ }
+
+ libusb_free_device_list(devs, 1);
+
+ /* If we have a good handle, return it. */
+ if (good_open) {
+ return dev;
+ }
+ else {
+ /* Unable to open any devices. */
+ free_hid_device(dev);
+ return NULL;
+ }
+}
+
+
+HID_API_EXPORT hid_device * HID_API_CALL hid_libusb_wrap_sys_device(intptr_t sys_dev, int interface_num)
+{
+/* 0x01000107 is a LIBUSB_API_VERSION for 1.0.23 - version when libusb_wrap_sys_device was introduced */
+#if (!defined(HIDAPI_TARGET_LIBUSB_API_VERSION) || HIDAPI_TARGET_LIBUSB_API_VERSION >= 0x01000107) && (LIBUSB_API_VERSION >= 0x01000107)
+ hid_device *dev = NULL;
+ struct libusb_config_descriptor *conf_desc = NULL;
+ const struct libusb_interface_descriptor *selected_intf_desc = NULL;
+ int res = 0;
+ int j = 0, k = 0;
+
+ if(hid_init() < 0)
+ return NULL;
+
+ dev = new_hid_device();
+
+ res = libusb_wrap_sys_device(usb_context, sys_dev, &dev->device_handle);
+ if (res < 0) {
+ LOG("libusb_wrap_sys_device failed: %d %s\n", res, libusb_error_name(res));
+ goto err;
+ }
+
+ res = libusb_get_active_config_descriptor(libusb_get_device(dev->device_handle), &conf_desc);
+ if (res < 0)
+ libusb_get_config_descriptor(libusb_get_device(dev->device_handle), 0, &conf_desc);
+
+ if (!conf_desc) {
+ LOG("Failed to get configuration descriptor: %d %s\n", res, libusb_error_name(res));
+ goto err;
+ }
+
+ /* find matching HID interface */
+ for (j = 0; j < conf_desc->bNumInterfaces && !selected_intf_desc; j++) {
+ const struct libusb_interface *intf = &conf_desc->interface[j];
+ for (k = 0; k < intf->num_altsetting; k++) {
+ const struct libusb_interface_descriptor *intf_desc = &intf->altsetting[k];
+ if (intf_desc->bInterfaceClass == LIBUSB_CLASS_HID) {
+ if (interface_num < 0 || interface_num == intf_desc->bInterfaceNumber) {
+ selected_intf_desc = intf_desc;
+ break;
+ }
+ }
+ }
+ }
+
+ if (!selected_intf_desc) {
+ if (interface_num < 0) {
+ LOG("Sys USB device doesn't contain a HID interface\n");
+ }
+ else {
+ LOG("Sys USB device doesn't contain a HID interface with number %d\n", interface_num);
+ }
+ goto err;
+ }
+
+ if (!hidapi_initialize_device(dev, selected_intf_desc))
+ goto err;
+
+ return dev;
+
+err:
+ if (conf_desc)
+ libusb_free_config_descriptor(conf_desc);
+ if (dev->device_handle)
+ libusb_close(dev->device_handle);
+ free_hid_device(dev);
+#else
+ (void)sys_dev;
+ (void)interface_num;
+ LOG("libusb_wrap_sys_device is not available\n");
+#endif
+ return NULL;
+}
+
+
+int HID_API_EXPORT hid_write(hid_device *dev, const unsigned char *data, size_t length)
+{
+ int res;
+ int report_number;
+ int skipped_report_id = 0;
+
+ if (!data || (length ==0)) {
+ return -1;
+ }
+
+ report_number = data[0];
+
+ if (report_number == 0x0) {
+ data++;
+ length--;
+ skipped_report_id = 1;
+ }
+
+
+ if (dev->output_endpoint <= 0) {
+ /* No interrupt out endpoint. Use the Control Endpoint */
+ res = libusb_control_transfer(dev->device_handle,
+ LIBUSB_REQUEST_TYPE_CLASS|LIBUSB_RECIPIENT_INTERFACE|LIBUSB_ENDPOINT_OUT,
+ 0x09/*HID Set_Report*/,
+ (2/*HID output*/ << 8) | report_number,
+ dev->interface,
+ (unsigned char *)data, length,
+ 1000/*timeout millis*/);
+
+ if (res < 0)
+ return -1;
+
+ if (skipped_report_id)
+ length++;
+
+ return length;
+ }
+ else {
+ /* Use the interrupt out endpoint */
+ int actual_length;
+ res = libusb_interrupt_transfer(dev->device_handle,
+ dev->output_endpoint,
+ (unsigned char*)data,
+ length,
+ &actual_length, 1000);
+
+ if (res < 0)
+ return -1;
+
+ if (skipped_report_id)
+ actual_length++;
+
+ return actual_length;
+ }
+}
+
+/* Helper function, to simplify hid_read().
+ This should be called with dev->mutex locked. */
+static int return_data(hid_device *dev, unsigned char *data, size_t length)
+{
+ /* Copy the data out of the linked list item (rpt) into the
+ return buffer (data), and delete the liked list item. */
+ struct input_report *rpt = dev->input_reports;
+ size_t len = (length < rpt->len)? length: rpt->len;
+ if (len > 0)
+ memcpy(data, rpt->data, len);
+ dev->input_reports = rpt->next;
+ free(rpt->data);
+ free(rpt);
+ return len;
+}
+
+static void cleanup_mutex(void *param)
+{
+ hid_device *dev = param;
+ pthread_mutex_unlock(&dev->mutex);
+}
+
+
+int HID_API_EXPORT hid_read_timeout(hid_device *dev, unsigned char *data, size_t length, int milliseconds)
+{
+#if 0
+ int transferred;
+ int res = libusb_interrupt_transfer(dev->device_handle, dev->input_endpoint, data, length, &transferred, 5000);
+ LOG("transferred: %d\n", transferred);
+ return transferred;
+#endif
+ /* by initialising this variable right here, GCC gives a compilation warning/error: */
+ /* error: variable ‘bytes_read’ might be clobbered by ‘longjmp’ or ‘vfork’ [-Werror=clobbered] */
+ int bytes_read; /* = -1; */
+
+ pthread_mutex_lock(&dev->mutex);
+ pthread_cleanup_push(&cleanup_mutex, dev);
+
+ bytes_read = -1;
+
+ /* There's an input report queued up. Return it. */
+ if (dev->input_reports) {
+ /* Return the first one */
+ bytes_read = return_data(dev, data, length);
+ goto ret;
+ }
+
+ if (dev->shutdown_thread) {
+ /* This means the device has been disconnected.
+ An error code of -1 should be returned. */
+ bytes_read = -1;
+ goto ret;
+ }
+
+ if (milliseconds == -1) {
+ /* Blocking */
+ while (!dev->input_reports && !dev->shutdown_thread) {
+ pthread_cond_wait(&dev->condition, &dev->mutex);
+ }
+ if (dev->input_reports) {
+ bytes_read = return_data(dev, data, length);
+ }
+ }
+ else if (milliseconds > 0) {
+ /* Non-blocking, but called with timeout. */
+ int res;
+ struct timespec ts;
+ clock_gettime(CLOCK_REALTIME, &ts);
+ ts.tv_sec += milliseconds / 1000;
+ ts.tv_nsec += (milliseconds % 1000) * 1000000;
+ if (ts.tv_nsec >= 1000000000L) {
+ ts.tv_sec++;
+ ts.tv_nsec -= 1000000000L;
+ }
+
+ while (!dev->input_reports && !dev->shutdown_thread) {
+ res = pthread_cond_timedwait(&dev->condition, &dev->mutex, &ts);
+ if (res == 0) {
+ if (dev->input_reports) {
+ bytes_read = return_data(dev, data, length);
+ break;
+ }
+
+ /* If we're here, there was a spurious wake up
+ or the read thread was shutdown. Run the
+ loop again (ie: don't break). */
+ }
+ else if (res == ETIMEDOUT) {
+ /* Timed out. */
+ bytes_read = 0;
+ break;
+ }
+ else {
+ /* Error. */
+ bytes_read = -1;
+ break;
+ }
+ }
+ }
+ else {
+ /* Purely non-blocking */
+ bytes_read = 0;
+ }
+
+ret:
+ pthread_mutex_unlock(&dev->mutex);
+ pthread_cleanup_pop(0);
+
+ return bytes_read;
+}
+
+int HID_API_EXPORT hid_read(hid_device *dev, unsigned char *data, size_t length)
+{
+ return hid_read_timeout(dev, data, length, dev->blocking ? -1 : 0);
+}
+
+int HID_API_EXPORT hid_set_nonblocking(hid_device *dev, int nonblock)
+{
+ dev->blocking = !nonblock;
+
+ return 0;
+}
+
+
+int HID_API_EXPORT hid_send_feature_report(hid_device *dev, const unsigned char *data, size_t length)
+{
+ int res = -1;
+ int skipped_report_id = 0;
+ int report_number = data[0];
+
+ if (report_number == 0x0) {
+ data++;
+ length--;
+ skipped_report_id = 1;
+ }
+
+ res = libusb_control_transfer(dev->device_handle,
+ LIBUSB_REQUEST_TYPE_CLASS|LIBUSB_RECIPIENT_INTERFACE|LIBUSB_ENDPOINT_OUT,
+ 0x09/*HID set_report*/,
+ (3/*HID feature*/ << 8) | report_number,
+ dev->interface,
+ (unsigned char *)data, length,
+ 1000/*timeout millis*/);
+
+ if (res < 0)
+ return -1;
+
+ /* Account for the report ID */
+ if (skipped_report_id)
+ length++;
+
+ return length;
+}
+
+int HID_API_EXPORT hid_get_feature_report(hid_device *dev, unsigned char *data, size_t length)
+{
+ int res = -1;
+ int skipped_report_id = 0;
+ int report_number = data[0];
+
+ if (report_number == 0x0) {
+ /* Offset the return buffer by 1, so that the report ID
+ will remain in byte 0. */
+ data++;
+ length--;
+ skipped_report_id = 1;
+ }
+ res = libusb_control_transfer(dev->device_handle,
+ LIBUSB_REQUEST_TYPE_CLASS|LIBUSB_RECIPIENT_INTERFACE|LIBUSB_ENDPOINT_IN,
+ 0x01/*HID get_report*/,
+ (3/*HID feature*/ << 8) | report_number,
+ dev->interface,
+ (unsigned char *)data, length,
+ 1000/*timeout millis*/);
+
+ if (res < 0)
+ return -1;
+
+ if (skipped_report_id)
+ res++;
+
+ return res;
+}
+
+int HID_API_EXPORT HID_API_CALL hid_get_input_report(hid_device *dev, unsigned char *data, size_t length)
+{
+ int res = -1;
+ int skipped_report_id = 0;
+ int report_number = data[0];
+
+ if (report_number == 0x0) {
+ /* Offset the return buffer by 1, so that the report ID
+ will remain in byte 0. */
+ data++;
+ length--;
+ skipped_report_id = 1;
+ }
+ res = libusb_control_transfer(dev->device_handle,
+ LIBUSB_REQUEST_TYPE_CLASS|LIBUSB_RECIPIENT_INTERFACE|LIBUSB_ENDPOINT_IN,
+ 0x01/*HID get_report*/,
+ (1/*HID Input*/ << 8) | report_number,
+ dev->interface,
+ (unsigned char *)data, length,
+ 1000/*timeout millis*/);
+
+ if (res < 0)
+ return -1;
+
+ if (skipped_report_id)
+ res++;
+
+ return res;
+}
+
+void HID_API_EXPORT hid_close(hid_device *dev)
+{
+ if (!dev)
+ return;
+
+ /* Cause read_thread() to stop. */
+ dev->shutdown_thread = 1;
+ libusb_cancel_transfer(dev->transfer);
+
+ /* Wait for read_thread() to end. */
+ pthread_join(dev->thread, NULL);
+
+ /* Clean up the Transfer objects allocated in read_thread(). */
+ free(dev->transfer->buffer);
+ libusb_free_transfer(dev->transfer);
+
+ /* release the interface */
+ libusb_release_interface(dev->device_handle, dev->interface);
+
+ /* reattach the kernel driver if it was detached */
+#ifdef DETACH_KERNEL_DRIVER
+ if (dev->is_driver_detached) {
+ int res = libusb_attach_kernel_driver(dev->device_handle, dev->interface);
+ if (res < 0)
+ LOG("Failed to reattach the driver to kernel.\n");
+ }
+#endif
+
+ /* Close the handle */
+ libusb_close(dev->device_handle);
+
+ /* Clear out the queue of received reports. */
+ pthread_mutex_lock(&dev->mutex);
+ while (dev->input_reports) {
+ return_data(dev, NULL, 0);
+ }
+ pthread_mutex_unlock(&dev->mutex);
+
+ free_hid_device(dev);
+}
+
+
+int HID_API_EXPORT_CALL hid_get_manufacturer_string(hid_device *dev, wchar_t *string, size_t maxlen)
+{
+ return hid_get_indexed_string(dev, dev->manufacturer_index, string, maxlen);
+}
+
+int HID_API_EXPORT_CALL hid_get_product_string(hid_device *dev, wchar_t *string, size_t maxlen)
+{
+ return hid_get_indexed_string(dev, dev->product_index, string, maxlen);
+}
+
+int HID_API_EXPORT_CALL hid_get_serial_number_string(hid_device *dev, wchar_t *string, size_t maxlen)
+{
+ return hid_get_indexed_string(dev, dev->serial_index, string, maxlen);
+}
+
+int HID_API_EXPORT_CALL hid_get_indexed_string(hid_device *dev, int string_index, wchar_t *string, size_t maxlen)
+{
+ wchar_t *str;
+
+ str = get_usb_string(dev->device_handle, string_index);
+ if (str) {
+ wcsncpy(string, str, maxlen);
+ string[maxlen-1] = L'\0';
+ free(str);
+ return 0;
+ }
+ else
+ return -1;
+}
+
+
+HID_API_EXPORT const wchar_t * HID_API_CALL hid_error(hid_device *dev)
+{
+ (void)dev;
+ return L"hid_error is not implemented yet";
+}
+
+
+struct lang_map_entry {
+ const char *name;
+ const char *string_code;
+ uint16_t usb_code;
+};
+
+#define LANG(name,code,usb_code) { name, code, usb_code }
+static struct lang_map_entry lang_map[] = {
+ LANG("Afrikaans", "af", 0x0436),
+ LANG("Albanian", "sq", 0x041C),
+ LANG("Arabic - United Arab Emirates", "ar_ae", 0x3801),
+ LANG("Arabic - Bahrain", "ar_bh", 0x3C01),
+ LANG("Arabic - Algeria", "ar_dz", 0x1401),
+ LANG("Arabic - Egypt", "ar_eg", 0x0C01),
+ LANG("Arabic - Iraq", "ar_iq", 0x0801),
+ LANG("Arabic - Jordan", "ar_jo", 0x2C01),
+ LANG("Arabic - Kuwait", "ar_kw", 0x3401),
+ LANG("Arabic - Lebanon", "ar_lb", 0x3001),
+ LANG("Arabic - Libya", "ar_ly", 0x1001),
+ LANG("Arabic - Morocco", "ar_ma", 0x1801),
+ LANG("Arabic - Oman", "ar_om", 0x2001),
+ LANG("Arabic - Qatar", "ar_qa", 0x4001),
+ LANG("Arabic - Saudi Arabia", "ar_sa", 0x0401),
+ LANG("Arabic - Syria", "ar_sy", 0x2801),
+ LANG("Arabic - Tunisia", "ar_tn", 0x1C01),
+ LANG("Arabic - Yemen", "ar_ye", 0x2401),
+ LANG("Armenian", "hy", 0x042B),
+ LANG("Azeri - Latin", "az_az", 0x042C),
+ LANG("Azeri - Cyrillic", "az_az", 0x082C),
+ LANG("Basque", "eu", 0x042D),
+ LANG("Belarusian", "be", 0x0423),
+ LANG("Bulgarian", "bg", 0x0402),
+ LANG("Catalan", "ca", 0x0403),
+ LANG("Chinese - China", "zh_cn", 0x0804),
+ LANG("Chinese - Hong Kong SAR", "zh_hk", 0x0C04),
+ LANG("Chinese - Macau SAR", "zh_mo", 0x1404),
+ LANG("Chinese - Singapore", "zh_sg", 0x1004),
+ LANG("Chinese - Taiwan", "zh_tw", 0x0404),
+ LANG("Croatian", "hr", 0x041A),
+ LANG("Czech", "cs", 0x0405),
+ LANG("Danish", "da", 0x0406),
+ LANG("Dutch - Netherlands", "nl_nl", 0x0413),
+ LANG("Dutch - Belgium", "nl_be", 0x0813),
+ LANG("English - Australia", "en_au", 0x0C09),
+ LANG("English - Belize", "en_bz", 0x2809),
+ LANG("English - Canada", "en_ca", 0x1009),
+ LANG("English - Caribbean", "en_cb", 0x2409),
+ LANG("English - Ireland", "en_ie", 0x1809),
+ LANG("English - Jamaica", "en_jm", 0x2009),
+ LANG("English - New Zealand", "en_nz", 0x1409),
+ LANG("English - Philippines", "en_ph", 0x3409),
+ LANG("English - Southern Africa", "en_za", 0x1C09),
+ LANG("English - Trinidad", "en_tt", 0x2C09),
+ LANG("English - Great Britain", "en_gb", 0x0809),
+ LANG("English - United States", "en_us", 0x0409),
+ LANG("Estonian", "et", 0x0425),
+ LANG("Farsi", "fa", 0x0429),
+ LANG("Finnish", "fi", 0x040B),
+ LANG("Faroese", "fo", 0x0438),
+ LANG("French - France", "fr_fr", 0x040C),
+ LANG("French - Belgium", "fr_be", 0x080C),
+ LANG("French - Canada", "fr_ca", 0x0C0C),
+ LANG("French - Luxembourg", "fr_lu", 0x140C),
+ LANG("French - Switzerland", "fr_ch", 0x100C),
+ LANG("Gaelic - Ireland", "gd_ie", 0x083C),
+ LANG("Gaelic - Scotland", "gd", 0x043C),
+ LANG("German - Germany", "de_de", 0x0407),
+ LANG("German - Austria", "de_at", 0x0C07),
+ LANG("German - Liechtenstein", "de_li", 0x1407),
+ LANG("German - Luxembourg", "de_lu", 0x1007),
+ LANG("German - Switzerland", "de_ch", 0x0807),
+ LANG("Greek", "el", 0x0408),
+ LANG("Hebrew", "he", 0x040D),
+ LANG("Hindi", "hi", 0x0439),
+ LANG("Hungarian", "hu", 0x040E),
+ LANG("Icelandic", "is", 0x040F),
+ LANG("Indonesian", "id", 0x0421),
+ LANG("Italian - Italy", "it_it", 0x0410),
+ LANG("Italian - Switzerland", "it_ch", 0x0810),
+ LANG("Japanese", "ja", 0x0411),
+ LANG("Korean", "ko", 0x0412),
+ LANG("Latvian", "lv", 0x0426),
+ LANG("Lithuanian", "lt", 0x0427),
+ LANG("F.Y.R.O. Macedonia", "mk", 0x042F),
+ LANG("Malay - Malaysia", "ms_my", 0x043E),
+ LANG("Malay – Brunei", "ms_bn", 0x083E),
+ LANG("Maltese", "mt", 0x043A),
+ LANG("Marathi", "mr", 0x044E),
+ LANG("Norwegian - Bokml", "no_no", 0x0414),
+ LANG("Norwegian - Nynorsk", "no_no", 0x0814),
+ LANG("Polish", "pl", 0x0415),
+ LANG("Portuguese - Portugal", "pt_pt", 0x0816),
+ LANG("Portuguese - Brazil", "pt_br", 0x0416),
+ LANG("Raeto-Romance", "rm", 0x0417),
+ LANG("Romanian - Romania", "ro", 0x0418),
+ LANG("Romanian - Republic of Moldova", "ro_mo", 0x0818),
+ LANG("Russian", "ru", 0x0419),
+ LANG("Russian - Republic of Moldova", "ru_mo", 0x0819),
+ LANG("Sanskrit", "sa", 0x044F),
+ LANG("Serbian - Cyrillic", "sr_sp", 0x0C1A),
+ LANG("Serbian - Latin", "sr_sp", 0x081A),
+ LANG("Setsuana", "tn", 0x0432),
+ LANG("Slovenian", "sl", 0x0424),
+ LANG("Slovak", "sk", 0x041B),
+ LANG("Sorbian", "sb", 0x042E),
+ LANG("Spanish - Spain (Traditional)", "es_es", 0x040A),
+ LANG("Spanish - Argentina", "es_ar", 0x2C0A),
+ LANG("Spanish - Bolivia", "es_bo", 0x400A),
+ LANG("Spanish - Chile", "es_cl", 0x340A),
+ LANG("Spanish - Colombia", "es_co", 0x240A),
+ LANG("Spanish - Costa Rica", "es_cr", 0x140A),
+ LANG("Spanish - Dominican Republic", "es_do", 0x1C0A),
+ LANG("Spanish - Ecuador", "es_ec", 0x300A),
+ LANG("Spanish - Guatemala", "es_gt", 0x100A),
+ LANG("Spanish - Honduras", "es_hn", 0x480A),
+ LANG("Spanish - Mexico", "es_mx", 0x080A),
+ LANG("Spanish - Nicaragua", "es_ni", 0x4C0A),
+ LANG("Spanish - Panama", "es_pa", 0x180A),
+ LANG("Spanish - Peru", "es_pe", 0x280A),
+ LANG("Spanish - Puerto Rico", "es_pr", 0x500A),
+ LANG("Spanish - Paraguay", "es_py", 0x3C0A),
+ LANG("Spanish - El Salvador", "es_sv", 0x440A),
+ LANG("Spanish - Uruguay", "es_uy", 0x380A),
+ LANG("Spanish - Venezuela", "es_ve", 0x200A),
+ LANG("Southern Sotho", "st", 0x0430),
+ LANG("Swahili", "sw", 0x0441),
+ LANG("Swedish - Sweden", "sv_se", 0x041D),
+ LANG("Swedish - Finland", "sv_fi", 0x081D),
+ LANG("Tamil", "ta", 0x0449),
+ LANG("Tatar", "tt", 0X0444),
+ LANG("Thai", "th", 0x041E),
+ LANG("Turkish", "tr", 0x041F),
+ LANG("Tsonga", "ts", 0x0431),
+ LANG("Ukrainian", "uk", 0x0422),
+ LANG("Urdu", "ur", 0x0420),
+ LANG("Uzbek - Cyrillic", "uz_uz", 0x0843),
+ LANG("Uzbek – Latin", "uz_uz", 0x0443),
+ LANG("Vietnamese", "vi", 0x042A),
+ LANG("Xhosa", "xh", 0x0434),
+ LANG("Yiddish", "yi", 0x043D),
+ LANG("Zulu", "zu", 0x0435),
+ LANG(NULL, NULL, 0x0),
+};
+
+uint16_t get_usb_code_for_current_locale(void)
+{
+ char *locale;
+ char search_string[64];
+ char *ptr;
+ struct lang_map_entry *lang;
+
+ /* Get the current locale. */
+ locale = setlocale(0, NULL);
+ if (!locale)
+ return 0x0;
+
+ /* Make a copy of the current locale string. */
+ strncpy(search_string, locale, sizeof(search_string));
+ search_string[sizeof(search_string)-1] = '\0';
+
+ /* Chop off the encoding part, and make it lower case. */
+ ptr = search_string;
+ while (*ptr) {
+ *ptr = tolower(*ptr);
+ if (*ptr == '.') {
+ *ptr = '\0';
+ break;
+ }
+ ptr++;
+ }
+
+ /* Find the entry which matches the string code of our locale. */
+ lang = lang_map;
+ while (lang->string_code) {
+ if (!strcmp(lang->string_code, search_string)) {
+ return lang->usb_code;
+ }
+ lang++;
+ }
+
+ /* There was no match. Find with just the language only. */
+ /* Chop off the variant. Chop it off at the '_'. */
+ ptr = search_string;
+ while (*ptr) {
+ *ptr = tolower(*ptr);
+ if (*ptr == '_') {
+ *ptr = '\0';
+ break;
+ }
+ ptr++;
+ }
+
+#if 0 /* TODO: Do we need this? */
+ /* Find the entry which matches the string code of our language. */
+ lang = lang_map;
+ while (lang->string_code) {
+ if (!strcmp(lang->string_code, search_string)) {
+ return lang->usb_code;
+ }
+ lang++;
+ }
+#endif
+
+ /* Found nothing. */
+ return 0x0;
+}
+
+#ifdef __cplusplus
+}
+
+#endif
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/driver/demo_hid_windows.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/driver/demo_hid_windows.c
new file mode 100644
index 0000000..4db5e27
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/driver/demo_hid_windows.c
@@ -0,0 +1,1262 @@
+/*******************************************************
+ HIDAPI - Multi-Platform library for
+ communication with HID devices.
+
+ Alan Ott
+ Signal 11 Software
+
+ 8/22/2009
+
+ Copyright 2009, All Rights Reserved.
+
+ At the discretion of the user of this library,
+ this software may be licensed under the terms of the
+ GNU General Public License v3, a BSD-Style license, or the
+ original HIDAPI license as outlined in the LICENSE.txt,
+ LICENSE-gpl3.txt, LICENSE-bsd.txt, and LICENSE-orig.txt
+ files located at the root of the source distribution.
+ These files may also be found in the public source
+ code repository located at:
+ https://github.com/libusb/hidapi .
+********************************************************/
+
+
+#if defined(_MSC_VER) && !defined(_CRT_SECURE_NO_WARNINGS)
+// Do not warn about mbsrtowcs and wcsncpy usage.
+// https://docs.microsoft.com/cpp/c-runtime-library/security-features-in-the-crt
+#define _CRT_SECURE_NO_WARNINGS
+#endif
+
+#include <windows.h>
+
+#ifndef _NTDEF_
+typedef LONG NTSTATUS;
+#endif
+
+#ifdef __MINGW32__
+#include <devpropdef.h>
+#include <ntdef.h>
+#include <winbase.h>
+#endif
+
+#ifdef __CYGWIN__
+#include <ntdef.h>
+#define _wcsdup wcsdup
+#endif
+
+/* The maximum number of characters that can be passed into the
+ HidD_Get*String() functions without it failing.*/
+#define MAX_STRING_WCHARS 0xFFF
+
+/*#define HIDAPI_USE_DDK*/
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+ #include <setupapi.h>
+ #include <winioctl.h>
+ #ifdef HIDAPI_USE_DDK
+ #include <hidsdi.h>
+ #endif
+
+ /* Copied from inc/ddk/hidclass.h, part of the Windows DDK. */
+ #define HID_OUT_CTL_CODE(id) \
+ CTL_CODE(FILE_DEVICE_KEYBOARD, (id), METHOD_OUT_DIRECT, FILE_ANY_ACCESS)
+ #define IOCTL_HID_GET_FEATURE HID_OUT_CTL_CODE(100)
+ #define IOCTL_HID_GET_INPUT_REPORT HID_OUT_CTL_CODE(104)
+
+#ifdef __cplusplus
+} /* extern "C" */
+#endif
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <wctype.h>
+
+#include "driver/demo_hidapi.h"
+
+#undef MIN
+#define MIN(x,y) ((x) < (y)? (x): (y))
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+static struct hid_api_version api_version = {
+ .major = HID_API_VERSION_MAJOR,
+ .minor = HID_API_VERSION_MINOR,
+ .patch = HID_API_VERSION_PATCH
+};
+
+#ifndef HIDAPI_USE_DDK
+ /* Since we're not building with the DDK, and the HID header
+ files aren't part of the SDK, we have to define all this
+ stuff here. In lookup_functions(), the function pointers
+ defined below are set. */
+ typedef struct _HIDD_ATTRIBUTES{
+ ULONG Size;
+ USHORT VendorID;
+ USHORT ProductID;
+ USHORT VersionNumber;
+ } HIDD_ATTRIBUTES, *PHIDD_ATTRIBUTES;
+
+ typedef USHORT USAGE;
+ typedef struct _HIDP_CAPS {
+ USAGE Usage;
+ USAGE UsagePage;
+ USHORT InputReportByteLength;
+ USHORT OutputReportByteLength;
+ USHORT FeatureReportByteLength;
+ USHORT Reserved[17];
+ USHORT fields_not_used_by_hidapi[10];
+ } HIDP_CAPS, *PHIDP_CAPS;
+ typedef void* PHIDP_PREPARSED_DATA;
+ #define HIDP_STATUS_SUCCESS 0x110000
+
+ typedef void (__stdcall *HidD_GetHidGuid_)(LPGUID hid_guid);
+ typedef BOOLEAN (__stdcall *HidD_GetAttributes_)(HANDLE device, PHIDD_ATTRIBUTES attrib);
+ typedef BOOLEAN (__stdcall *HidD_GetSerialNumberString_)(HANDLE device, PVOID buffer, ULONG buffer_len);
+ typedef BOOLEAN (__stdcall *HidD_GetManufacturerString_)(HANDLE handle, PVOID buffer, ULONG buffer_len);
+ typedef BOOLEAN (__stdcall *HidD_GetProductString_)(HANDLE handle, PVOID buffer, ULONG buffer_len);
+ typedef BOOLEAN (__stdcall *HidD_SetFeature_)(HANDLE handle, PVOID data, ULONG length);
+ typedef BOOLEAN (__stdcall *HidD_GetFeature_)(HANDLE handle, PVOID data, ULONG length);
+ typedef BOOLEAN (__stdcall *HidD_GetInputReport_)(HANDLE handle, PVOID data, ULONG length);
+ typedef BOOLEAN (__stdcall *HidD_GetIndexedString_)(HANDLE handle, ULONG string_index, PVOID buffer, ULONG buffer_len);
+ typedef BOOLEAN (__stdcall *HidD_GetPreparsedData_)(HANDLE handle, PHIDP_PREPARSED_DATA *preparsed_data);
+ typedef BOOLEAN (__stdcall *HidD_FreePreparsedData_)(PHIDP_PREPARSED_DATA preparsed_data);
+ typedef NTSTATUS (__stdcall *HidP_GetCaps_)(PHIDP_PREPARSED_DATA preparsed_data, HIDP_CAPS *caps);
+ typedef BOOLEAN (__stdcall *HidD_SetNumInputBuffers_)(HANDLE handle, ULONG number_buffers);
+
+ static HidD_GetHidGuid_ HidD_GetHidGuid;
+ static HidD_GetAttributes_ HidD_GetAttributes;
+ static HidD_GetSerialNumberString_ HidD_GetSerialNumberString;
+ static HidD_GetManufacturerString_ HidD_GetManufacturerString;
+ static HidD_GetProductString_ HidD_GetProductString;
+ static HidD_SetFeature_ HidD_SetFeature;
+ static HidD_GetFeature_ HidD_GetFeature;
+ static HidD_GetInputReport_ HidD_GetInputReport;
+ static HidD_GetIndexedString_ HidD_GetIndexedString;
+ static HidD_GetPreparsedData_ HidD_GetPreparsedData;
+ static HidD_FreePreparsedData_ HidD_FreePreparsedData;
+ static HidP_GetCaps_ HidP_GetCaps;
+ static HidD_SetNumInputBuffers_ HidD_SetNumInputBuffers;
+
+ static HMODULE lib_handle = NULL;
+ static BOOLEAN initialized = FALSE;
+
+ typedef DWORD RETURN_TYPE;
+ typedef RETURN_TYPE CONFIGRET;
+ typedef DWORD DEVNODE, DEVINST;
+ typedef DEVNODE* PDEVNODE, * PDEVINST;
+ typedef WCHAR* DEVNODEID_W, * DEVINSTID_W;
+
+#define CR_SUCCESS (0x00000000)
+#define CR_BUFFER_SMALL (0x0000001A)
+
+#define CM_LOCATE_DEVNODE_NORMAL 0x00000000
+
+#define DEVPROP_TYPEMOD_LIST 0x00002000
+
+#define DEVPROP_TYPE_STRING 0x00000012
+#define DEVPROP_TYPE_STRING_LIST (DEVPROP_TYPE_STRING|DEVPROP_TYPEMOD_LIST)
+
+ typedef CONFIGRET(__stdcall* CM_Locate_DevNodeW_)(PDEVINST pdnDevInst, DEVINSTID_W pDeviceID, ULONG ulFlags);
+ typedef CONFIGRET(__stdcall* CM_Get_Parent_)(PDEVINST pdnDevInst, DEVINST dnDevInst, ULONG ulFlags);
+ typedef CONFIGRET(__stdcall* CM_Get_DevNode_PropertyW_)(DEVINST dnDevInst, CONST DEVPROPKEY* PropertyKey, DEVPROPTYPE* PropertyType, PBYTE PropertyBuffer, PULONG PropertyBufferSize, ULONG ulFlags);
+ typedef CONFIGRET(__stdcall* CM_Get_Device_Interface_PropertyW_)(LPCWSTR pszDeviceInterface, CONST DEVPROPKEY* PropertyKey, DEVPROPTYPE* PropertyType, PBYTE PropertyBuffer, PULONG PropertyBufferSize, ULONG ulFlags);
+
+ static CM_Locate_DevNodeW_ CM_Locate_DevNodeW = NULL;
+ static CM_Get_Parent_ CM_Get_Parent = NULL;
+ static CM_Get_DevNode_PropertyW_ CM_Get_DevNode_PropertyW = NULL;
+ static CM_Get_Device_Interface_PropertyW_ CM_Get_Device_Interface_PropertyW = NULL;
+
+ static HMODULE cfgmgr32_lib_handle = NULL;
+#endif /* HIDAPI_USE_DDK */
+
+struct hid_device_ {
+ HANDLE device_handle;
+ BOOL blocking;
+ USHORT output_report_length;
+ unsigned char *write_buf;
+ size_t input_report_length;
+ USHORT feature_report_length;
+ unsigned char *feature_buf;
+ void *last_error_str;
+ DWORD last_error_num;
+ BOOL read_pending;
+ char *read_buf;
+ OVERLAPPED ol;
+ OVERLAPPED write_ol;
+ struct hid_device_info* device_info;
+};
+
+static hid_device *new_hid_device()
+{
+ hid_device *dev = (hid_device*) calloc(1, sizeof(hid_device));
+ dev->device_handle = INVALID_HANDLE_VALUE;
+ dev->blocking = TRUE;
+ dev->output_report_length = 0;
+ dev->write_buf = NULL;
+ dev->input_report_length = 0;
+ dev->feature_report_length = 0;
+ dev->feature_buf = NULL;
+ dev->last_error_str = NULL;
+ dev->last_error_num = 0;
+ dev->read_pending = FALSE;
+ dev->read_buf = NULL;
+ memset(&dev->ol, 0, sizeof(dev->ol));
+ dev->ol.hEvent = CreateEvent(NULL, FALSE, FALSE /*initial state f=nonsignaled*/, NULL);
+ memset(&dev->write_ol, 0, sizeof(dev->write_ol));
+ dev->write_ol.hEvent = CreateEvent(NULL, FALSE, FALSE /*inital state f=nonsignaled*/, NULL);
+ dev->device_info = NULL;
+
+ return dev;
+}
+
+static void free_hid_device(hid_device *dev)
+{
+ CloseHandle(dev->ol.hEvent);
+ CloseHandle(dev->write_ol.hEvent);
+ CloseHandle(dev->device_handle);
+ LocalFree(dev->last_error_str);
+ free(dev->write_buf);
+ free(dev->feature_buf);
+ free(dev->read_buf);
+ hid_free_enumeration(dev->device_info);
+ free(dev);
+}
+
+static void register_error(hid_device *dev, const char *op)
+{
+ WCHAR *ptr, *msg;
+ (void)op; // unreferenced param
+ FormatMessageW(FORMAT_MESSAGE_ALLOCATE_BUFFER |
+ FORMAT_MESSAGE_FROM_SYSTEM |
+ FORMAT_MESSAGE_IGNORE_INSERTS,
+ NULL,
+ GetLastError(),
+ MAKELANGID(LANG_NEUTRAL, SUBLANG_DEFAULT),
+ (LPWSTR)&msg, 0/*sz*/,
+ NULL);
+
+ /* Get rid of the CR and LF that FormatMessage() sticks at the
+ end of the message. Thanks Microsoft! */
+ ptr = msg;
+ while (*ptr) {
+ if (*ptr == L'\r') {
+ *ptr = L'\0';
+ break;
+ }
+ ptr++;
+ }
+
+ /* Store the message off in the Device entry so that
+ the hid_error() function can pick it up. */
+ LocalFree(dev->last_error_str);
+ dev->last_error_str = msg;
+}
+
+#ifndef HIDAPI_USE_DDK
+static int lookup_functions()
+{
+ lib_handle = LoadLibraryA("hid.dll");
+ if (lib_handle) {
+#if defined(__GNUC__)
+# pragma GCC diagnostic push
+# pragma GCC diagnostic ignored "-Wcast-function-type"
+#endif
+#define RESOLVE(x) x = (x##_)GetProcAddress(lib_handle, #x); if (!x) return -1;
+ RESOLVE(HidD_GetHidGuid);
+ RESOLVE(HidD_GetAttributes);
+ RESOLVE(HidD_GetSerialNumberString);
+ RESOLVE(HidD_GetManufacturerString);
+ RESOLVE(HidD_GetProductString);
+ RESOLVE(HidD_SetFeature);
+ RESOLVE(HidD_GetFeature);
+ RESOLVE(HidD_GetInputReport);
+ RESOLVE(HidD_GetIndexedString);
+ RESOLVE(HidD_GetPreparsedData);
+ RESOLVE(HidD_FreePreparsedData);
+ RESOLVE(HidP_GetCaps);
+ RESOLVE(HidD_SetNumInputBuffers);
+#undef RESOLVE
+#if defined(__GNUC__)
+# pragma GCC diagnostic pop
+#endif
+ }
+ else
+ return -1;
+
+ cfgmgr32_lib_handle = LoadLibraryA("cfgmgr32.dll");
+ if (cfgmgr32_lib_handle) {
+#if defined(__GNUC__)
+# pragma GCC diagnostic push
+# pragma GCC diagnostic ignored "-Wcast-function-type"
+#endif
+#define RESOLVE(x) x = (x##_)GetProcAddress(cfgmgr32_lib_handle, #x);
+ RESOLVE(CM_Locate_DevNodeW);
+ RESOLVE(CM_Get_Parent);
+ RESOLVE(CM_Get_DevNode_PropertyW);
+ RESOLVE(CM_Get_Device_Interface_PropertyW);
+#undef RESOLVE
+#if defined(__GNUC__)
+# pragma GCC diagnostic pop
+#endif
+ }
+ else {
+ CM_Locate_DevNodeW = NULL;
+ CM_Get_Parent = NULL;
+ CM_Get_DevNode_PropertyW = NULL;
+ CM_Get_Device_Interface_PropertyW = NULL;
+ }
+
+ return 0;
+}
+#endif
+
+static HANDLE open_device(const char *path, BOOL open_rw)
+{
+ HANDLE handle;
+ DWORD desired_access = (open_rw)? (GENERIC_WRITE | GENERIC_READ): 0;
+ DWORD share_mode = FILE_SHARE_READ|FILE_SHARE_WRITE;
+
+ handle = CreateFileA(path,
+ desired_access,
+ share_mode,
+ NULL,
+ OPEN_EXISTING,
+ FILE_FLAG_OVERLAPPED,/*FILE_ATTRIBUTE_NORMAL,*/
+ 0);
+
+ return handle;
+}
+
+HID_API_EXPORT const struct hid_api_version* HID_API_CALL hid_version()
+{
+ return &api_version;
+}
+
+HID_API_EXPORT const char* HID_API_CALL hid_version_str()
+{
+ return HID_API_VERSION_STR;
+}
+
+int HID_API_EXPORT hid_init(void)
+{
+#ifndef HIDAPI_USE_DDK
+ if (!initialized) {
+ if (lookup_functions() < 0) {
+ hid_exit();
+ return -1;
+ }
+ initialized = TRUE;
+ }
+#endif
+ return 0;
+}
+
+int HID_API_EXPORT hid_exit(void)
+{
+#ifndef HIDAPI_USE_DDK
+ if (lib_handle)
+ FreeLibrary(lib_handle);
+ lib_handle = NULL;
+ if (cfgmgr32_lib_handle)
+ FreeLibrary(cfgmgr32_lib_handle);
+ cfgmgr32_lib_handle = NULL;
+ initialized = FALSE;
+#endif
+ return 0;
+}
+
+static void hid_internal_get_ble_info(struct hid_device_info* dev, DEVINST dev_node)
+{
+ ULONG len;
+ CONFIGRET cr;
+ DEVPROPTYPE property_type;
+
+#if defined(__GNUC__)
+# pragma GCC diagnostic push
+# pragma GCC diagnostic ignored "-Wmissing-braces"
+#endif
+ static DEVPROPKEY DEVPKEY_NAME = { { 0xb725f130, 0x47ef, 0x101a, 0xa5, 0xf1, 0x02, 0x60, 0x8c, 0x9e, 0xeb, 0xac }, 10 }; // DEVPROP_TYPE_STRING
+ static DEVPROPKEY PKEY_DeviceInterface_Bluetooth_DeviceAddress = { { 0x2BD67D8B, 0x8BEB, 0x48D5, 0x87, 0xE0, 0x6C, 0xDA, 0x34, 0x28, 0x04, 0x0A }, 1 }; // DEVPROP_TYPE_STRING
+ static DEVPROPKEY PKEY_DeviceInterface_Bluetooth_Manufacturer = { { 0x2BD67D8B, 0x8BEB, 0x48D5, 0x87, 0xE0, 0x6C, 0xDA, 0x34, 0x28, 0x04, 0x0A }, 4 }; // DEVPROP_TYPE_STRING
+#if defined(__GNUC__)
+# pragma GCC diagnostic pop
+#endif
+
+ /* Manufacturer String */
+ len = 0;
+ cr = CM_Get_DevNode_PropertyW(dev_node, &PKEY_DeviceInterface_Bluetooth_Manufacturer, &property_type, NULL, &len, 0);
+ if (cr == CR_BUFFER_SMALL && property_type == DEVPROP_TYPE_STRING) {
+ free(dev->manufacturer_string);
+ dev->manufacturer_string = (wchar_t*)calloc(len, sizeof(BYTE));
+ CM_Get_DevNode_PropertyW(dev_node, &PKEY_DeviceInterface_Bluetooth_Manufacturer, &property_type, (PBYTE)dev->manufacturer_string, &len, 0);
+ }
+
+ /* Serial Number String (MAC Address) */
+ len = 0;
+ cr = CM_Get_DevNode_PropertyW(dev_node, &PKEY_DeviceInterface_Bluetooth_DeviceAddress, &property_type, NULL, &len, 0);
+ if (cr == CR_BUFFER_SMALL && property_type == DEVPROP_TYPE_STRING) {
+ free(dev->serial_number);
+ dev->serial_number = (wchar_t*)calloc(len, sizeof(BYTE));
+ CM_Get_DevNode_PropertyW(dev_node, &PKEY_DeviceInterface_Bluetooth_DeviceAddress, &property_type, (PBYTE)dev->serial_number, &len, 0);
+ }
+
+ /* Get devnode grandparent to reach out Bluetooth LE device node */
+ cr = CM_Get_Parent(&dev_node, dev_node, 0);
+ if (cr != CR_SUCCESS)
+ return;
+
+ /* Product String */
+ len = 0;
+ cr = CM_Get_DevNode_PropertyW(dev_node, &DEVPKEY_NAME, &property_type, NULL, &len, 0);
+ if (cr == CR_BUFFER_SMALL && property_type == DEVPROP_TYPE_STRING) {
+ free(dev->product_string);
+ dev->product_string = (wchar_t*)calloc(len, sizeof(BYTE));
+ CM_Get_DevNode_PropertyW(dev_node, &DEVPKEY_NAME, &property_type, (PBYTE)dev->product_string, &len, 0);
+ }
+}
+
+/* USB Device Interface Number.
+ It can be parsed out of the Hardware ID if a USB device is has multiple interfaces (composite device).
+ See https://docs.microsoft.com/windows-hardware/drivers/hid/hidclass-hardware-ids-for-top-level-collections
+ and https://docs.microsoft.com/windows-hardware/drivers/install/standard-usb-identifiers
+
+ hardware_id is always expected to be uppercase.
+*/
+static int hid_internal_get_interface_number(const wchar_t* hardware_id)
+{
+ int interface_number;
+ wchar_t *startptr, *endptr;
+ const wchar_t *interface_token = L"&MI_";
+
+ startptr = wcsstr(hardware_id, interface_token);
+ if (!startptr)
+ return -1;
+
+ startptr += wcslen(interface_token);
+ interface_number = wcstol(startptr, &endptr, 16);
+ if (endptr == startptr)
+ return -1;
+
+ return interface_number;
+}
+
+static void hid_internal_get_info(struct hid_device_info* dev)
+{
+ const char *tmp = NULL;
+ wchar_t *interface_path = NULL, *device_id = NULL, *compatible_ids = NULL, *hardware_ids = NULL;
+ mbstate_t state;
+ ULONG len;
+ CONFIGRET cr;
+ DEVPROPTYPE property_type;
+ DEVINST dev_node;
+
+#if defined(__GNUC__)
+# pragma GCC diagnostic push
+# pragma GCC diagnostic ignored "-Wmissing-braces"
+#endif
+ static DEVPROPKEY DEVPKEY_Device_InstanceId = { { 0x78c34fc8, 0x104a, 0x4aca, 0x9e, 0xa4, 0x52, 0x4d, 0x52, 0x99, 0x6e, 0x57 }, 256 }; // DEVPROP_TYPE_STRING
+ static DEVPROPKEY DEVPKEY_Device_HardwareIds = { { 0xa45c254e, 0xdf1c, 0x4efd, 0x80, 0x20, 0x67, 0xd1, 0x46, 0xa8, 0x50, 0xe0}, 3 }; // DEVPROP_TYPE_STRING_LIST
+ static DEVPROPKEY DEVPKEY_Device_CompatibleIds = { { 0xa45c254e, 0xdf1c, 0x4efd, 0x80, 0x20, 0x67, 0xd1, 0x46, 0xa8, 0x50, 0xe0}, 4 }; // DEVPROP_TYPE_STRING_LIST
+#if defined(__GNUC__)
+# pragma GCC diagnostic pop
+#endif
+
+ if (!CM_Get_Device_Interface_PropertyW ||
+ !CM_Locate_DevNodeW ||
+ !CM_Get_Parent ||
+ !CM_Get_DevNode_PropertyW)
+ goto end;
+
+ tmp = dev->path;
+
+ len = (ULONG)strlen(tmp);
+ interface_path = (wchar_t*)calloc(len + 1, sizeof(wchar_t));
+ memset(&state, 0, sizeof(state));
+
+ if (mbsrtowcs(interface_path, &tmp, len, &state) == (size_t)-1)
+ goto end;
+
+ /* Get the device id from interface path */
+ len = 0;
+ cr = CM_Get_Device_Interface_PropertyW(interface_path, &DEVPKEY_Device_InstanceId, &property_type, NULL, &len, 0);
+ if (cr == CR_BUFFER_SMALL && property_type == DEVPROP_TYPE_STRING) {
+ device_id = (wchar_t*)calloc(len, sizeof(BYTE));
+ cr = CM_Get_Device_Interface_PropertyW(interface_path, &DEVPKEY_Device_InstanceId, &property_type, (PBYTE)device_id, &len, 0);
+ }
+ if (cr != CR_SUCCESS)
+ goto end;
+
+ /* Open devnode from device id */
+ cr = CM_Locate_DevNodeW(&dev_node, (DEVINSTID_W)device_id, CM_LOCATE_DEVNODE_NORMAL);
+ if (cr != CR_SUCCESS)
+ goto end;
+
+ /* Get the hardware ids from devnode */
+ len = 0;
+ cr = CM_Get_DevNode_PropertyW(dev_node, &DEVPKEY_Device_HardwareIds, &property_type, NULL, &len, 0);
+ if (cr == CR_BUFFER_SMALL && property_type == DEVPROP_TYPE_STRING_LIST) {
+ hardware_ids = (wchar_t*)calloc(len, sizeof(BYTE));
+ cr = CM_Get_DevNode_PropertyW(dev_node, &DEVPKEY_Device_HardwareIds, &property_type, (PBYTE)hardware_ids, &len, 0);
+ }
+ if (cr != CR_SUCCESS)
+ goto end;
+
+ // Search for interface number in hardware ids
+ for (wchar_t* hardware_id = hardware_ids; *hardware_id; hardware_id += wcslen(hardware_id) + 1) {
+ /* Normalize to upper case */
+ for (wchar_t* p = hardware_id; *p; ++p) *p = towupper(*p);
+
+ dev->interface_number = hid_internal_get_interface_number(hardware_id);
+
+ if (dev->interface_number != -1)
+ break;
+ }
+
+ /* Get devnode parent */
+ cr = CM_Get_Parent(&dev_node, dev_node, 0);
+ if (cr != CR_SUCCESS)
+ goto end;
+
+ /* Get the compatible ids from parent devnode */
+ len = 0;
+ cr = CM_Get_DevNode_PropertyW(dev_node, &DEVPKEY_Device_CompatibleIds, &property_type, NULL, &len, 0);
+ if (cr == CR_BUFFER_SMALL && property_type == DEVPROP_TYPE_STRING_LIST) {
+ compatible_ids = (wchar_t*)calloc(len, sizeof(BYTE));
+ cr = CM_Get_DevNode_PropertyW(dev_node, &DEVPKEY_Device_CompatibleIds, &property_type, (PBYTE)compatible_ids, &len, 0);
+ }
+ if (cr != CR_SUCCESS)
+ goto end;
+
+ /* Now we can parse parent's compatible IDs to find out the device bus type */
+ for (wchar_t* compatible_id = compatible_ids; *compatible_id; compatible_id += wcslen(compatible_id) + 1) {
+ /* Normalize to upper case */
+ for (wchar_t* p = compatible_id; *p; ++p) *p = towupper(*p);
+
+ /* Bluetooth LE devices */
+ if (wcsstr(compatible_id, L"BTHLEDEVICE") != NULL) {
+ /* HidD_GetProductString/HidD_GetManufacturerString/HidD_GetSerialNumberString is not working for BLE HID devices
+ Request this info via dev node properties instead.
+ https://docs.microsoft.com/answers/questions/401236/hidd-getproductstring-with-ble-hid-device.html */
+ hid_internal_get_ble_info(dev, dev_node);
+ break;
+ }
+ }
+end:
+ free(interface_path);
+ free(device_id);
+ free(hardware_ids);
+ free(compatible_ids);
+}
+
+static struct hid_device_info *hid_get_device_info(const char *path, HANDLE handle)
+{
+ struct hid_device_info *dev = NULL; /* return object */
+
+ BOOL res;
+ HIDD_ATTRIBUTES attrib;
+ PHIDP_PREPARSED_DATA pp_data = NULL;
+ HIDP_CAPS caps;
+
+ #define WSTR_LEN 512
+ wchar_t wstr[WSTR_LEN]; /* TODO: Determine Size */
+
+ /* Create the record. */
+ dev = (struct hid_device_info*)calloc(1, sizeof(struct hid_device_info));
+
+ /* Fill out the record */
+ dev->next = NULL;
+
+ if (path) {
+ size_t len = strlen(path);
+ dev->path = (char*)calloc(len + 1, sizeof(char));
+ memcpy(dev->path, path, len + 1);
+ }
+ else
+ dev->path = NULL;
+
+ attrib.Size = sizeof(HIDD_ATTRIBUTES);
+ res = HidD_GetAttributes(handle, &attrib);
+ if (res) {
+ /* VID/PID */
+ dev->vendor_id = attrib.VendorID;
+ dev->product_id = attrib.ProductID;
+
+ /* Release Number */
+ dev->release_number = attrib.VersionNumber;
+ }
+
+ /* Get the Usage Page and Usage for this device. */
+ res = HidD_GetPreparsedData(handle, &pp_data);
+ if (res) {
+ NTSTATUS nt_res = HidP_GetCaps(pp_data, &caps);
+ if (nt_res == HIDP_STATUS_SUCCESS) {
+ dev->usage_page = caps.UsagePage;
+ dev->usage = caps.Usage;
+ }
+
+ HidD_FreePreparsedData(pp_data);
+ }
+
+ /* Serial Number */
+ wstr[0] = L'\0';
+ res = HidD_GetSerialNumberString(handle, wstr, sizeof(wstr));
+ wstr[WSTR_LEN - 1] = L'\0';
+ dev->serial_number = _wcsdup(wstr);
+
+ /* Manufacturer String */
+ wstr[0] = L'\0';
+ res = HidD_GetManufacturerString(handle, wstr, sizeof(wstr));
+ wstr[WSTR_LEN - 1] = L'\0';
+ dev->manufacturer_string = _wcsdup(wstr);
+
+ /* Product String */
+ wstr[0] = L'\0';
+ res = HidD_GetProductString(handle, wstr, sizeof(wstr));
+ wstr[WSTR_LEN - 1] = L'\0';
+ dev->product_string = _wcsdup(wstr);
+
+ hid_internal_get_info(dev);
+
+ return dev;
+}
+
+struct hid_device_info HID_API_EXPORT * HID_API_CALL hid_enumerate(unsigned short vendor_id, unsigned short product_id)
+{
+ BOOL res;
+ struct hid_device_info *root = NULL; /* return object */
+ struct hid_device_info *cur_dev = NULL;
+ GUID interface_class_guid;
+
+ /* Windows objects for interacting with the driver. */
+ SP_DEVINFO_DATA devinfo_data;
+ SP_DEVICE_INTERFACE_DATA device_interface_data;
+ SP_DEVICE_INTERFACE_DETAIL_DATA_A *device_interface_detail_data = NULL;
+ HDEVINFO device_info_set = INVALID_HANDLE_VALUE;
+ char driver_name[256];
+ int device_index = 0;
+
+ if (hid_init() < 0)
+ return NULL;
+
+ /* Retrieve HID Interface Class GUID
+ https://docs.microsoft.com/windows-hardware/drivers/install/guid-devinterface-hid */
+ HidD_GetHidGuid(&interface_class_guid);
+
+ /* Initialize the Windows objects. */
+ memset(&devinfo_data, 0x0, sizeof(devinfo_data));
+ devinfo_data.cbSize = sizeof(SP_DEVINFO_DATA);
+ device_interface_data.cbSize = sizeof(SP_DEVICE_INTERFACE_DATA);
+
+ /* Get information for all the devices belonging to the HID class. */
+ device_info_set = SetupDiGetClassDevsA(&interface_class_guid, NULL, NULL, DIGCF_PRESENT | DIGCF_DEVICEINTERFACE);
+
+ /* Iterate over each device in the HID class, looking for the right one. */
+
+ for (;;) {
+ HANDLE read_handle = INVALID_HANDLE_VALUE;
+ DWORD required_size = 0;
+ HIDD_ATTRIBUTES attrib;
+
+ res = SetupDiEnumDeviceInterfaces(device_info_set,
+ NULL,
+ &interface_class_guid,
+ device_index,
+ &device_interface_data);
+
+ if (!res) {
+ /* A return of FALSE from this function means that
+ there are no more devices. */
+ break;
+ }
+
+ /* Call with 0-sized detail size, and let the function
+ tell us how long the detail struct needs to be. The
+ size is put in &required_size. */
+ res = SetupDiGetDeviceInterfaceDetailA(device_info_set,
+ &device_interface_data,
+ NULL,
+ 0,
+ &required_size,
+ NULL);
+
+ /* Allocate a long enough structure for device_interface_detail_data. */
+ device_interface_detail_data = (SP_DEVICE_INTERFACE_DETAIL_DATA_A*) malloc(required_size);
+ device_interface_detail_data->cbSize = sizeof(SP_DEVICE_INTERFACE_DETAIL_DATA_A);
+
+ /* Get the detailed data for this device. The detail data gives us
+ the device path for this device, which is then passed into
+ CreateFile() to get a handle to the device. */
+ res = SetupDiGetDeviceInterfaceDetailA(device_info_set,
+ &device_interface_data,
+ device_interface_detail_data,
+ required_size,
+ NULL,
+ NULL);
+
+ if (!res) {
+ /* register_error(dev, "Unable to call SetupDiGetDeviceInterfaceDetail");
+ Continue to the next device. */
+ goto cont;
+ }
+
+ /* Populate devinfo_data. This function will return failure
+ when the device with such index doesn't exist. We've already checked it does. */
+ res = SetupDiEnumDeviceInfo(device_info_set, device_index, &devinfo_data);
+ if (!res)
+ goto cont;
+
+
+ /* Make sure this device has a driver bound to it. */
+ res = SetupDiGetDeviceRegistryPropertyA(device_info_set, &devinfo_data,
+ SPDRP_DRIVER, NULL, (PBYTE)driver_name, sizeof(driver_name), NULL);
+ if (!res)
+ goto cont;
+
+ //wprintf(L"HandleName: %s\n", device_interface_detail_data->DevicePath);
+
+ /* Open read-only handle to the device */
+ read_handle = open_device(device_interface_detail_data->DevicePath, FALSE);
+
+ /* Check validity of read_handle. */
+ if (read_handle == INVALID_HANDLE_VALUE) {
+ /* Unable to open the device. */
+ //register_error(dev, "CreateFile");
+ goto cont;
+ }
+
+ /* Get the Vendor ID and Product ID for this device. */
+ attrib.Size = sizeof(HIDD_ATTRIBUTES);
+ HidD_GetAttributes(read_handle, &attrib);
+ //wprintf(L"Product/Vendor: %x %x\n", attrib.ProductID, attrib.VendorID);
+
+ /* Check the VID/PID to see if we should add this
+ device to the enumeration list. */
+ if ((vendor_id == 0x0 || attrib.VendorID == vendor_id) &&
+ (product_id == 0x0 || attrib.ProductID == product_id)) {
+
+ /* VID/PID match. Create the record. */
+ struct hid_device_info *tmp = hid_get_device_info(device_interface_detail_data->DevicePath, read_handle);
+
+ if (tmp == NULL) {
+ goto cont_close;
+ }
+
+ if (cur_dev) {
+ cur_dev->next = tmp;
+ }
+ else {
+ root = tmp;
+ }
+ cur_dev = tmp;
+ }
+
+cont_close:
+ CloseHandle(read_handle);
+cont:
+ /* We no longer need the detail data. It can be freed */
+ free(device_interface_detail_data);
+
+ device_index++;
+
+ }
+
+ /* Close the device information handle. */
+ SetupDiDestroyDeviceInfoList(device_info_set);
+
+ return root;
+}
+
+void HID_API_EXPORT HID_API_CALL hid_free_enumeration(struct hid_device_info *devs)
+{
+ /* TODO: Merge this with the Linux version. This function is platform-independent. */
+ struct hid_device_info *d = devs;
+ while (d) {
+ struct hid_device_info *next = d->next;
+ free(d->path);
+ free(d->serial_number);
+ free(d->manufacturer_string);
+ free(d->product_string);
+ free(d);
+ d = next;
+ }
+}
+
+
+HID_API_EXPORT hid_device * HID_API_CALL hid_open(unsigned short vendor_id, unsigned short product_id, const wchar_t *serial_number)
+{
+ /* TODO: Merge this functions with the Linux version. This function should be platform independent. */
+ struct hid_device_info *devs, *cur_dev;
+ const char *path_to_open = NULL;
+ hid_device *handle = NULL;
+
+ devs = hid_enumerate(vendor_id, product_id);
+ cur_dev = devs;
+ while (cur_dev) {
+ if (cur_dev->vendor_id == vendor_id &&
+ cur_dev->product_id == product_id) {
+ if (serial_number) {
+ if (cur_dev->serial_number && wcscmp(serial_number, cur_dev->serial_number) == 0) {
+ path_to_open = cur_dev->path;
+ break;
+ }
+ }
+ else {
+ path_to_open = cur_dev->path;
+ break;
+ }
+ }
+ cur_dev = cur_dev->next;
+ }
+
+ if (path_to_open) {
+ /* Open the device */
+ handle = hid_open_path(path_to_open);
+ }
+
+ hid_free_enumeration(devs);
+
+ return handle;
+}
+
+HID_API_EXPORT hid_device * HID_API_CALL hid_open_path(const char *path)
+{
+ hid_device *dev = NULL;
+ HANDLE device_handle = INVALID_HANDLE_VALUE;
+ PHIDP_PREPARSED_DATA pp_data = NULL;
+ HIDP_CAPS caps;
+
+ if (hid_init() < 0)
+ goto end_of_function;
+
+ /* Open a handle to the device */
+ device_handle = open_device(path, TRUE);
+
+ /* Check validity of write_handle. */
+ if (device_handle == INVALID_HANDLE_VALUE) {
+ /* System devices, such as keyboards and mice, cannot be opened in
+ read-write mode, because the system takes exclusive control over
+ them. This is to prevent keyloggers. However, feature reports
+ can still be sent and received. Retry opening the device, but
+ without read/write access. */
+ device_handle = open_device(path, FALSE);
+
+ /* Check the validity of the limited device_handle. */
+ if (device_handle == INVALID_HANDLE_VALUE)
+ goto end_of_function;
+ }
+
+ /* Set the Input Report buffer size to 64 reports. */
+ if (!HidD_SetNumInputBuffers(device_handle, 64))
+ goto end_of_function;
+
+ /* Get the Input Report length for the device. */
+ if (!HidD_GetPreparsedData(device_handle, &pp_data))
+ goto end_of_function;
+
+ if (HidP_GetCaps(pp_data, &caps) != HIDP_STATUS_SUCCESS)
+ goto end_of_function;
+
+ dev = new_hid_device();
+
+ dev->device_handle = device_handle;
+ device_handle = INVALID_HANDLE_VALUE;
+
+ dev->output_report_length = caps.OutputReportByteLength;
+ dev->input_report_length = caps.InputReportByteLength;
+ dev->feature_report_length = caps.FeatureReportByteLength;
+ dev->read_buf = (char*) malloc(dev->input_report_length);
+ dev->device_info = hid_get_device_info(path, dev->device_handle);
+
+end_of_function:
+ CloseHandle(device_handle);
+ HidD_FreePreparsedData(pp_data);
+
+ return dev;
+}
+
+int HID_API_EXPORT HID_API_CALL hid_write(hid_device *dev, const unsigned char *data, size_t length)
+{
+ DWORD bytes_written = 0;
+ int function_result = -1;
+ BOOL res;
+ BOOL overlapped = FALSE;
+
+ unsigned char *buf;
+
+ if (!data || (length==0)) {
+ register_error(dev, "Zero length buffer");
+ return function_result;
+ }
+
+ /* Make sure the right number of bytes are passed to WriteFile. Windows
+ expects the number of bytes which are in the _longest_ report (plus
+ one for the report number) bytes even if the data is a report
+ which is shorter than that. Windows gives us this value in
+ caps.OutputReportByteLength. If a user passes in fewer bytes than this,
+ use cached temporary buffer which is the proper size. */
+ if (length >= dev->output_report_length) {
+ /* The user passed the right number of bytes. Use the buffer as-is. */
+ buf = (unsigned char *) data;
+ } else {
+ if (dev->write_buf == NULL)
+ dev->write_buf = (unsigned char *) malloc(dev->output_report_length);
+ buf = dev->write_buf;
+ memcpy(buf, data, length);
+ memset(buf + length, 0, dev->output_report_length - length);
+ length = dev->output_report_length;
+ }
+
+ res = WriteFile(dev->device_handle, buf, (DWORD) length, NULL, &dev->write_ol);
+
+ if (!res) {
+ if (GetLastError() != ERROR_IO_PENDING) {
+ /* WriteFile() failed. Return error. */
+ register_error(dev, "WriteFile");
+ goto end_of_function;
+ }
+ overlapped = TRUE;
+ }
+
+ if (overlapped) {
+ /* Wait for the transaction to complete. This makes
+ hid_write() synchronous. */
+ res = WaitForSingleObject(dev->write_ol.hEvent, 1000);
+ if (res != WAIT_OBJECT_0) {
+ /* There was a Timeout. */
+ register_error(dev, "WriteFile/WaitForSingleObject Timeout");
+ goto end_of_function;
+ }
+
+ /* Get the result. */
+ res = GetOverlappedResult(dev->device_handle, &dev->write_ol, &bytes_written, FALSE/*wait*/);
+ if (res) {
+ function_result = bytes_written;
+ }
+ else {
+ /* The Write operation failed. */
+ register_error(dev, "WriteFile");
+ goto end_of_function;
+ }
+ }
+
+end_of_function:
+ return function_result;
+}
+
+
+int HID_API_EXPORT HID_API_CALL hid_read_timeout(hid_device *dev, unsigned char *data, size_t length, int milliseconds)
+{
+ DWORD bytes_read = 0;
+ size_t copy_len = 0;
+ BOOL res = FALSE;
+ BOOL overlapped = FALSE;
+
+ /* Copy the handle for convenience. */
+ HANDLE ev = dev->ol.hEvent;
+
+ if (!dev->read_pending) {
+ /* Start an Overlapped I/O read. */
+ dev->read_pending = TRUE;
+ memset(dev->read_buf, 0, dev->input_report_length);
+ ResetEvent(ev);
+ res = ReadFile(dev->device_handle, dev->read_buf, (DWORD) dev->input_report_length, &bytes_read, &dev->ol);
+
+ if (!res) {
+ if (GetLastError() != ERROR_IO_PENDING) {
+ /* ReadFile() has failed.
+ Clean up and return error. */
+ CancelIo(dev->device_handle);
+ dev->read_pending = FALSE;
+ goto end_of_function;
+ }
+ overlapped = TRUE;
+ }
+ }
+ else {
+ overlapped = TRUE;
+ }
+
+ if (overlapped) {
+ if (milliseconds >= 0) {
+ /* See if there is any data yet. */
+ res = WaitForSingleObject(ev, milliseconds);
+ if (res != WAIT_OBJECT_0) {
+ /* There was no data this time. Return zero bytes available,
+ but leave the Overlapped I/O running. */
+ return 0;
+ }
+ }
+
+ /* Either WaitForSingleObject() told us that ReadFile has completed, or
+ we are in non-blocking mode. Get the number of bytes read. The actual
+ data has been copied to the data[] array which was passed to ReadFile(). */
+ res = GetOverlappedResult(dev->device_handle, &dev->ol, &bytes_read, TRUE/*wait*/);
+ }
+ /* Set pending back to false, even if GetOverlappedResult() returned error. */
+ dev->read_pending = FALSE;
+
+ if (res && bytes_read > 0) {
+ if (dev->read_buf[0] == 0x0) {
+ /* If report numbers aren't being used, but Windows sticks a report
+ number (0x0) on the beginning of the report anyway. To make this
+ work like the other platforms, and to make it work more like the
+ HID spec, we'll skip over this byte. */
+ bytes_read--;
+ copy_len = length > bytes_read ? bytes_read : length;
+ memcpy(data, dev->read_buf+1, copy_len);
+ }
+ else {
+ /* Copy the whole buffer, report number and all. */
+ copy_len = length > bytes_read ? bytes_read : length;
+ memcpy(data, dev->read_buf, copy_len);
+ }
+ }
+
+end_of_function:
+ if (!res) {
+ register_error(dev, "GetOverlappedResult");
+ return -1;
+ }
+
+ return (int) copy_len;
+}
+
+int HID_API_EXPORT HID_API_CALL hid_read(hid_device *dev, unsigned char *data, size_t length)
+{
+ return hid_read_timeout(dev, data, length, (dev->blocking)? -1: 0);
+}
+
+int HID_API_EXPORT HID_API_CALL hid_set_nonblocking(hid_device *dev, int nonblock)
+{
+ dev->blocking = !nonblock;
+ return 0; /* Success */
+}
+
+int HID_API_EXPORT HID_API_CALL hid_send_feature_report(hid_device *dev, const unsigned char *data, size_t length)
+{
+ BOOL res = FALSE;
+ unsigned char *buf;
+ size_t length_to_send;
+
+ /* Windows expects at least caps.FeatureReportByteLength bytes passed
+ to HidD_SetFeature(), even if the report is shorter. Any less sent and
+ the function fails with error ERROR_INVALID_PARAMETER set. Any more
+ and HidD_SetFeature() silently truncates the data sent in the report
+ to caps.FeatureReportByteLength. */
+ if (length >= dev->feature_report_length) {
+ buf = (unsigned char *) data;
+ length_to_send = length;
+ } else {
+ if (dev->feature_buf == NULL)
+ dev->feature_buf = (unsigned char *) malloc(dev->feature_report_length);
+ buf = dev->feature_buf;
+ memcpy(buf, data, length);
+ memset(buf + length, 0, dev->feature_report_length - length);
+ length_to_send = dev->feature_report_length;
+ }
+
+ res = HidD_SetFeature(dev->device_handle, (PVOID)buf, (DWORD) length_to_send);
+
+ if (!res) {
+ register_error(dev, "HidD_SetFeature");
+ return -1;
+ }
+
+ return (int) length;
+}
+
+static int hid_get_report(hid_device *dev, DWORD report_type, unsigned char *data, size_t length)
+{
+ BOOL res;
+ DWORD bytes_returned = 0;
+
+ OVERLAPPED ol;
+ memset(&ol, 0, sizeof(ol));
+
+ res = DeviceIoControl(dev->device_handle,
+ report_type,
+ data, (DWORD) length,
+ data, (DWORD) length,
+ &bytes_returned, &ol);
+
+ if (!res) {
+ if (GetLastError() != ERROR_IO_PENDING) {
+ /* DeviceIoControl() failed. Return error. */
+ register_error(dev, "Get Input/Feature Report DeviceIoControl");
+ return -1;
+ }
+ }
+
+ /* Wait here until the write is done. This makes
+ hid_get_feature_report() synchronous. */
+ res = GetOverlappedResult(dev->device_handle, &ol, &bytes_returned, TRUE/*wait*/);
+ if (!res) {
+ /* The operation failed. */
+ register_error(dev, "Get Input/Feature Report GetOverLappedResult");
+ return -1;
+ }
+
+ /* When numbered reports aren't used,
+ bytes_returned seem to include only what is actually received from the device
+ (not including the first byte with 0, as an indication "no numbered reports"). */
+ if (data[0] == 0x0) {
+ bytes_returned++;
+ }
+
+ return bytes_returned;
+}
+
+int HID_API_EXPORT HID_API_CALL hid_get_feature_report(hid_device *dev, unsigned char *data, size_t length)
+{
+ /* We could use HidD_GetFeature() instead, but it doesn't give us an actual length, unfortunately */
+ return hid_get_report(dev, IOCTL_HID_GET_FEATURE, data, length);
+}
+
+int HID_API_EXPORT HID_API_CALL hid_get_input_report(hid_device *dev, unsigned char *data, size_t length)
+{
+ /* We could use HidD_GetInputReport() instead, but it doesn't give us an actual length, unfortunately */
+ return hid_get_report(dev, IOCTL_HID_GET_INPUT_REPORT, data, length);
+}
+
+void HID_API_EXPORT HID_API_CALL hid_close(hid_device *dev)
+{
+ if (!dev)
+ return;
+ CancelIo(dev->device_handle);
+ free_hid_device(dev);
+}
+
+int HID_API_EXPORT_CALL HID_API_CALL hid_get_manufacturer_string(hid_device *dev, wchar_t *string, size_t maxlen)
+{
+ if (!dev->device_info || !string || !maxlen)
+ return -1;
+
+ wcsncpy(string, dev->device_info->manufacturer_string, maxlen);
+ string[maxlen] = L'\0';
+
+ return 0;
+}
+
+int HID_API_EXPORT_CALL HID_API_CALL hid_get_product_string(hid_device *dev, wchar_t *string, size_t maxlen)
+{
+ if (!dev->device_info || !string || !maxlen)
+ return -1;
+
+ wcsncpy(string, dev->device_info->product_string, maxlen);
+ string[maxlen] = L'\0';
+
+ return 0;
+}
+
+int HID_API_EXPORT_CALL HID_API_CALL hid_get_serial_number_string(hid_device *dev, wchar_t *string, size_t maxlen)
+{
+ if (!dev->device_info || !string || !maxlen)
+ return -1;
+
+ wcsncpy(string, dev->device_info->serial_number, maxlen);
+ string[maxlen] = L'\0';
+
+ return 0;
+}
+
+int HID_API_EXPORT_CALL HID_API_CALL hid_get_indexed_string(hid_device *dev, int string_index, wchar_t *string, size_t maxlen)
+{
+ BOOL res;
+
+ res = HidD_GetIndexedString(dev->device_handle, string_index, string, sizeof(wchar_t) * (DWORD) MIN(maxlen, MAX_STRING_WCHARS));
+ if (!res) {
+ register_error(dev, "HidD_GetIndexedString");
+ return -1;
+ }
+
+ return 0;
+}
+
+
+HID_API_EXPORT const wchar_t * HID_API_CALL hid_error(hid_device *dev)
+{
+ if (dev) {
+ if (dev->last_error_str == NULL)
+ return L"Success";
+ return (wchar_t*)dev->last_error_str;
+ }
+
+ // Global error messages are not (yet) implemented on Windows.
+ return L"hid_error for global errors is not implemented yet";
+}
+
+
+/*#define PICPGM*/
+/*#define S11*/
+#define P32
+#ifdef S11
+ unsigned short VendorID = 0xa0a0;
+ unsigned short ProductID = 0x0001;
+#endif
+
+#ifdef P32
+ unsigned short VendorID = 0x04d8;
+ unsigned short ProductID = 0x3f;
+#endif
+
+
+#ifdef PICPGM
+ unsigned short VendorID = 0x04d8;
+ unsigned short ProductID = 0x0033;
+#endif
+
+
+#if 0
+int __cdecl main(int argc, char* argv[])
+{
+ int res;
+ unsigned char buf[65];
+
+ UNREFERENCED_PARAMETER(argc);
+ UNREFERENCED_PARAMETER(argv);
+
+ /* Set up the command buffer. */
+ memset(buf,0x00,sizeof(buf));
+ buf[0] = 0;
+ buf[1] = 0x81;
+
+
+ /* Open the device. */
+ int handle = open(VendorID, ProductID, L"12345");
+ if (handle < 0)
+ printf("unable to open device\n");
+
+
+ /* Toggle LED (cmd 0x80) */
+ buf[1] = 0x80;
+ res = write(handle, buf, 65);
+ if (res < 0)
+ printf("Unable to write()\n");
+
+ /* Request state (cmd 0x81) */
+ buf[1] = 0x81;
+ write(handle, buf, 65);
+ if (res < 0)
+ printf("Unable to write() (2)\n");
+
+ /* Read requested state */
+ read(handle, buf, 65);
+ if (res < 0)
+ printf("Unable to read()\n");
+
+ /* Print out the returned buffer. */
+ for (int i = 0; i < 4; i++)
+ printf("buf[%d]: %d\n", i, buf[i]);
+
+ return 0;
+}
+#endif
+
+#ifdef __cplusplus
+} /* extern "C" */
+#endif
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/driver/demo_smi_hid_spi.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/driver/demo_smi_hid_spi.c
new file mode 100644
index 0000000..395d091
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/driver/demo_smi_hid_spi.c
@@ -0,0 +1,322 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+
+#include <stdint.h>
+#include <stdio.h>
+#include <assert.h>
+#include <string.h>
+#include <stdlib.h>
+
+#include "jl_error.h"
+#include "jl_types.h"
+#include "jl_debug.h"
+#include "portable/jl_portable.h"
+#include "driver/hal_smi.h"
+#include "driver/demo_hidapi.h"
+
+#define VID 0x483
+#define PID 0xde
+
+#define SMI_CLAUSE22 0x22
+
+#ifdef WIN32
+#define HID_STM32_CMD_MAX_SIZE 65
+#else
+#define HID_STM32_CMD_MAX_SIZE 64
+#endif
+
+/* cmd_index,length0,lenght1,clause22,deviceid */
+jl_uint8 CMD_SMI_CFG[] = {0x30, 0x00, 0x00, 0x22, 0x00};
+jl_uint8 CMD_SMI_WRITE[] = {0x31, 0x00, 0x00};
+jl_uint8 CMD_SMI_READ[] = {0x32, 0x00, 0x00};
+
+struct smi_device_s g_smi_dev;
+
+jl_ret_t __hid_stm32_wait_resp(jl_uint8 *data)
+{
+ jl_ret_t ret;
+
+ /* ret = hid_read(g_smi_dev.device, data, 64); */
+ ret = hid_read_timeout(g_smi_dev.device, data, 64, 1000);
+ if (ret <= 0) {
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_ERROR, "HID over STM32 response error, error code :%d\n", ret);
+ return JL_ERR_FAIL;
+ }
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t __hid_stm32_write(jl_uint8 *data, jl_uint8 size)
+{
+ jl_ret_t ret;
+ jl_uint8 buf[65] = {0};
+
+ if (size > HID_STM32_CMD_MAX_SIZE) {
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_ERROR, "HID over STM32 write buffer size overflow\n");
+ return JL_ERR_OUT_OF_RANGE;
+ }
+
+#ifdef WIN32
+ memcpy(&buf[1], data, size);
+#else
+ memcpy(&buf[0], data, size);
+#endif
+
+ ret = hid_write(g_smi_dev.device, buf, HID_STM32_CMD_MAX_SIZE);
+ if (ret == -1) {
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_ERROR, "HID over STM32 write fail\n");
+ return JL_ERR_FAIL;
+ }
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t __hid_smi_config(void)
+{
+ jl_ret_t ret;
+ jl_uint8 hid_smi_cmd[5] = {0};
+ jl_uint8 hid_smi_resp[64] = {0};
+ /* STM32 spi device id ??? */
+ jl_uint8 dev = 0;
+
+ memcpy(hid_smi_cmd, CMD_SMI_CFG, 5);
+ hid_smi_cmd[3] = SMI_CLAUSE22;
+ hid_smi_cmd[4] = dev;
+
+ ret = __hid_stm32_write(hid_smi_cmd, 5);
+ if (ret) {
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_ERROR, "HID over STM32 config write fail\n");
+ return JL_ERR_FAIL;
+ }
+
+ ret = __hid_stm32_wait_resp(hid_smi_resp);
+ if (ret) {
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_ERROR, "HID over STM32 config wait response fail\n");
+ return JL_ERR_FAIL;
+ } else if (hid_smi_resp[1]) {
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_ERROR, "HID over STM32 config response error code:%d\n", hid_smi_resp[1]);
+ return JL_ERR_FAIL;
+ }
+
+ return JL_ERR_OK;
+}
+
+hid_device *__hid_device_init(void)
+{
+ jl_int32 ret;
+ #define MAX_STR 255
+ wchar_t wstr[MAX_STR];
+ hid_device *handle;
+
+ ret = hid_init();
+ if (ret) {
+ JL_DBG_MSG(JL_FLAG_ALL, _DBG_ERROR, "hid device init fail\n");
+ return NULL;
+ }
+
+ handle = hid_open(VID, PID, NULL);
+ if (!handle) {
+ JL_DBG_MSG(JL_FLAG_ALL, _DBG_ERROR, "hid device open fail\n");
+ hid_exit();
+ return NULL;
+ }
+
+ // Read the Manufacturer String
+ wstr[0] = 0x0000;
+ ret = hid_get_manufacturer_string(handle, wstr, MAX_STR);
+ if (ret < 0)
+ JL_DBG_MSG(JL_FLAG_ALL, _DBG_ERROR, "Unable to read manufacturer string\n");
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_INFO, "Manufacturer String: %ls\n", wstr);
+
+ // Read the Product String
+ wstr[0] = 0x0000;
+ ret = hid_get_product_string(handle, wstr, MAX_STR);
+ if (ret < 0)
+ JL_DBG_MSG(JL_FLAG_ALL, _DBG_ERROR, "Unable to read product string\n");
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_INFO, "Product String: %ls\n", wstr);
+
+ // Read the Serial Number String
+ wstr[0] = 0x0000;
+ ret = hid_get_serial_number_string(handle, wstr, MAX_STR);
+ if (ret < 0)
+ JL_DBG_MSG(JL_FLAG_ALL, _DBG_ERROR, "Unable to read serial number string\n");
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_INFO, "Serial Number String: (%d) %ls", wstr[0], wstr);
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_INFO, "\n");
+
+ // Read Indexed String 1
+ wstr[0] = 0x0000;
+ ret = hid_get_indexed_string(handle, 1, wstr, MAX_STR);
+ if (ret < 0)
+ JL_DBG_MSG(JL_FLAG_ALL, _DBG_ERROR, "Unable to read indexed string 1\n");
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_INFO, "Indexed String 1: %ls\n", wstr);
+
+ // Set the hid_read() function to be non-blocking.
+ /* hid_set_nonblocking(handle, 1); */
+
+ return handle;
+}
+
+jl_ret_t __hid_device_deinit(void)
+{
+ if (g_smi_dev.device)
+ hid_close(g_smi_dev.device);
+
+ /* Free static HIDAPI objects. */
+ hid_exit();
+
+ return JL_ERR_OK;
+}
+
+jl_uint16 jl_smi_read(jl_uint8 phy, jl_uint8 reg)
+{
+ jl_ret_t ret;
+ jl_uint8 hid_smi_frame[sizeof(CMD_SMI_READ) + 8] = {0};
+ jl_uint8 hid_smi_resp[64] = {0};
+ jl_uint8 *hid_smi_cmd = &hid_smi_frame[0];
+ jl_uint8 *hid_smi_data = &hid_smi_frame[sizeof(CMD_SMI_READ)];
+ jl_uint16 op_phy_reg = 0;
+
+ /* operation: 0x6 for smi read */
+ op_phy_reg = (0x6 << 12) | ((jl_uint16)(phy & 0x1f) << 7) | ((jl_uint16)(reg & 0x1f) << 2) | 0x2;
+ hid_smi_data[0] = 0xff;
+ hid_smi_data[1] = 0xff;
+ hid_smi_data[2] = 0xff;
+ hid_smi_data[3] = 0xff;
+ hid_smi_data[4] = op_phy_reg >> 8;
+ hid_smi_data[5] = op_phy_reg & 0xff;
+ hid_smi_data[6] = 0xff;
+ hid_smi_data[7] = 0xff;
+
+ memcpy(hid_smi_cmd, CMD_SMI_READ, sizeof(CMD_SMI_READ));
+ /* hid smi data size */
+ hid_smi_cmd[1] = 8;
+
+#ifdef CONFIG_JLFE_PHY_MUTEX
+ port_mutex_lock(g_smi_dev.phy_mutex);
+#endif
+
+ ret = __hid_stm32_write(hid_smi_frame, sizeof(hid_smi_frame));
+ if (ret) {
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_ERROR, "HID over STM32 smi read fail\n");
+ exit(EXIT_FAILURE);
+ }
+
+ ret = __hid_stm32_wait_resp(hid_smi_resp);
+ if (ret) {
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_ERROR, "HID over STM32 smi write wait response fail\n");
+ exit(EXIT_FAILURE);
+ } else if (hid_smi_resp[1]) {
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_ERROR, "HID over STM32 smi write response error code:%d\n", hid_smi_resp[1]);
+ exit(EXIT_FAILURE);
+ }
+
+#ifdef CONFIG_JLFE_PHY_MUTEX
+ port_mutex_unlock(g_smi_dev.phy_mutex);
+#endif
+
+ return ((jl_uint16 ) (hid_smi_resp[sizeof(CMD_SMI_READ) + 6] << 8 | hid_smi_resp[sizeof(CMD_SMI_READ) + 7]));
+}
+
+void jl_smi_write(jl_uint8 phy, jl_uint8 reg, jl_uint16 val)
+{
+ jl_ret_t ret;
+ jl_uint8 hid_smi_frame[sizeof(CMD_SMI_WRITE) + 8] = {0};
+ jl_uint8 hid_smi_resp[64] = {0};
+ jl_uint8 *hid_smi_cmd = &hid_smi_frame[0];
+ jl_uint8 *hid_smi_data = &hid_smi_frame[sizeof(CMD_SMI_WRITE)];
+ jl_uint16 op_phy_reg = 0;
+
+ /* operation: 0x5 for smi write */
+ op_phy_reg = (0x5 << 12) | ((jl_uint16)(phy & 0x1f) << 7) | ((jl_uint16)(reg & 0x1f) << 2) | 0x2;
+ hid_smi_data[0] = 0xff;
+ hid_smi_data[1] = 0xff;
+ hid_smi_data[2] = 0xff;
+ hid_smi_data[3] = 0xff;
+ hid_smi_data[4] = op_phy_reg >> 8;
+ hid_smi_data[5] = op_phy_reg & 0xff;
+ hid_smi_data[6] = val >> 8;
+ hid_smi_data[7] = val & 0xff;
+
+ memcpy(hid_smi_cmd, CMD_SMI_WRITE, sizeof(CMD_SMI_WRITE));
+ /* hid smi data size */
+ hid_smi_cmd[1] = 8;
+
+#ifdef CONFIG_JLFE_PHY_MUTEX
+ port_mutex_lock(g_smi_dev.phy_mutex);
+#endif
+
+ ret = __hid_stm32_write(hid_smi_frame, sizeof(hid_smi_frame));
+ if (ret) {
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_ERROR, "HID over STM32 smi write fail\n");
+ exit(EXIT_FAILURE);
+ }
+
+ ret = __hid_stm32_wait_resp(hid_smi_resp);
+ if (ret) {
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_ERROR, "HID over STM32 smi write wait response fail\n");
+ exit(EXIT_FAILURE);
+ } else if (hid_smi_resp[1]) {
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_ERROR, "HID over STM32 smi write response error code:%d\n", hid_smi_resp[1]);
+ exit(EXIT_FAILURE);
+ }
+
+#ifdef CONFIG_JLFE_PHY_MUTEX
+ port_mutex_unlock(g_smi_dev.phy_mutex);
+#endif
+}
+
+jl_api_ret_t jl_smi_init(void)
+{
+ /* jl_ret_t ret; */
+
+#ifdef CONFIG_JLFE_PHY_MUTEX
+ g_smi_dev.phy_mutex = port_mutex_init();
+ if (!g_smi_dev.phy_mutex)
+ return JL_ERR_INIT;
+#endif
+
+#ifdef CONFIG_JLFE_APB_MUTEX
+ g_smi_dev.apb_mutex = port_mutex_init();
+ if (!g_smi_dev.apb_mutex)
+ return JL_ERR_INIT;
+#endif
+ g_smi_dev.device = __hid_device_init();
+ if (!g_smi_dev.device)
+ exit(EXIT_FAILURE);
+
+ /* ret = __hid_smi_config(); */
+ /* if (ret) */
+ /* exit(EXIT_FAILURE); */
+
+ return JL_ERR_OK;
+}
+
+jl_api_ret_t jl_smi_deinit(void)
+{
+#ifdef CONFIG_JLFE_PHY_MUTEX
+ if (g_smi_dev.phy_mutex) {
+ port_mutex_deinit(g_smi_dev.phy_mutex);
+ g_smi_dev.phy_mutex = NULL;
+ }
+#endif
+
+#ifdef CONFIG_JLFE_APB_MUTEX
+ if (g_smi_dev.apb_mutex) {
+ port_mutex_deinit(g_smi_dev.apb_mutex);
+ g_smi_dev.apb_mutex = NULL;
+ }
+#endif
+
+ return __hid_device_deinit();
+}
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/driver/hal_smi_gpio.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/driver/hal_smi_gpio.c
new file mode 100644
index 0000000..4e68edf
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/driver/hal_smi_gpio.c
@@ -0,0 +1,254 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+
+#include "jl_types.h"
+#include "jl_error.h"
+#include "portable/jl_portable.h"
+#include "driver/hal_smi.h"
+
+#define SMI_READ 2
+#define SMI_WRITE 1
+
+#define SMI_SETUP_TIME 10
+#define SMI_HOLD_TIME 10
+
+/* Minimum MDC period is 400 ns, plus some margin for error. smi_DELAY
+ * is done twice per period.
+ */
+#define SMI_DELAY 250
+
+/* The PHY may take up to 300 ns to produce data, plus some margin
+ * for error.
+ */
+#define SMI_READ_DELAY 350
+
+struct smibb_gpio_s {
+ struct gpio_descriptor_s mdc;
+ struct gpio_descriptor_s mdio;
+};
+
+struct smibb_gpio_s g_smi_gpio;
+struct smi_device_s g_smi_dev;
+
+
+static jl_ret_t init_smi(struct smibb_gpio_s *gpio)
+{
+ jl_ret_t ret = JL_ERR_OK;
+
+ ret = port_gpio_request(&gpio->mdc);
+ if (ret)
+ return ret;
+ ret = port_gpio_request(&gpio->mdio);
+ if (ret)
+ return ret;
+
+ port_gpio_set_dir(&gpio->mdc, 1);
+ port_gpio_set_value(&gpio->mdc, 0);
+ port_gpio_set_dir(&gpio->mdio, 0);
+
+ return ret;
+}
+
+static jl_ret_t deinit_smi(struct smibb_gpio_s *gpio)
+{
+ jl_ret_t ret = JL_ERR_OK;
+ jl_ret_t _ret = JL_ERR_OK;
+
+ _ret = port_gpio_free(&gpio->mdc);
+ if (_ret)
+ ret = JL_ERR_FAIL;
+
+ _ret = port_gpio_free(&gpio->mdio);
+ if (_ret)
+ ret = JL_ERR_FAIL;
+
+ return ret;
+}
+
+static void set_mdc(struct smibb_gpio_s *gpio, jl_int32 val)
+{
+ port_gpio_set_value(&gpio->mdc, val);
+}
+
+static void set_mdio_dir(struct smibb_gpio_s *gpio , jl_int32 dir)
+{
+ port_gpio_set_dir(&gpio->mdio, dir);
+}
+
+static void set_mdio_data(struct smibb_gpio_s *gpio, jl_int32 val)
+{
+ port_gpio_set_value(&gpio->mdio, val);
+}
+
+static jl_ret_t get_mdio_data(struct smibb_gpio_s *gpio)
+{
+ return port_gpio_get_value(&gpio->mdio);
+}
+
+static void smibb_send_bit(jl_int32 val)
+{
+ set_mdio_data(&g_smi_gpio, val);
+ port_ndelay(SMI_DELAY);
+ set_mdc(&g_smi_gpio, 1);
+ port_ndelay(SMI_DELAY);
+ set_mdc(&g_smi_gpio, 0);
+}
+
+static jl_ret_t smibb_get_bit(void)
+{
+ port_ndelay(SMI_DELAY);
+ set_mdc(&g_smi_gpio, 1);
+ port_ndelay(SMI_READ_DELAY);
+ set_mdc(&g_smi_gpio, 0);
+
+ return get_mdio_data(&g_smi_gpio);
+}
+
+static void smibb_send_num(jl_uint16 val, jl_int32 bits)
+{
+ jl_int32 i;
+
+ for (i = bits - 1; i >= 0; i--)
+ smibb_send_bit((val >> i) & 1);
+}
+
+static jl_uint16 smibb_get_num(jl_int32 bits)
+{
+ jl_int32 i;
+ jl_uint16 ret = 0;
+
+ for (i = bits - 1; i >= 0; i--) {
+ ret <<= 1;
+ ret |= smibb_get_bit();
+ }
+
+ return ret;
+}
+
+static void smibb_cmd(jl_int32 op, jl_uint8 phy, jl_uint8 reg)
+{
+ jl_int32 i;
+
+ set_mdio_dir(&g_smi_gpio, 1);
+
+ /*
+ * Send a 32 bit preamble ('1's) with an extra '1' bit for good
+ * measure. The IEEE spec says this is a PHY optional
+ * requirement. The AMD 79C874 requires one after power up and
+ * one after a MII communications error. This means that we are
+ * doing more preambles than we need, but it is safer and will be
+ * much more robust.
+ */
+
+ for (i = 0; i < 32; i++)
+ smibb_send_bit(1);
+
+ /* TODO Clause 45 */
+ /* send the start bit (01) and the read opcode (10) or write (01).
+ Clause 45 operation uses 00 for the start and 11, 10 for
+ read/write */
+ smibb_send_bit(0);
+ smibb_send_bit(1);
+ smibb_send_bit((op >> 1) & 1);
+ smibb_send_bit((op >> 0) & 1);
+
+ smibb_send_num(phy, 5);
+ smibb_send_num(reg, 5);
+}
+
+jl_uint16 jl_smi_read(jl_uint8 phy, jl_uint8 reg)
+{
+ jl_uint16 ret;
+
+#ifdef CONFIG_JLFE_PHY_MUTEX
+ port_mutex_lock(g_smi_dev.phy_mutex);
+#endif
+
+ smibb_cmd(SMI_READ, phy, reg);
+
+ set_mdio_dir(&g_smi_gpio, 0);
+
+ smibb_get_bit();
+
+ ret = smibb_get_num(16);
+
+#ifdef CONFIG_JLFE_PHY_MUTEX
+ port_mutex_unlock(g_smi_dev.phy_mutex);
+#endif
+
+ return ret;
+}
+
+void jl_smi_write(jl_uint8 phy, jl_uint8 reg, jl_uint16 val)
+{
+#ifdef CONFIG_JLFE_PHY_MUTEX
+ port_mutex_lock(g_smi_dev.phy_mutex);
+#endif
+
+ smibb_cmd(SMI_WRITE, phy, reg);
+
+ smibb_send_bit(1);
+ smibb_send_bit(0);
+
+ smibb_send_num(val, 16);
+
+ set_mdio_dir(&g_smi_gpio, 0);
+
+#ifdef CONFIG_JLFE_PHY_MUTEX
+ port_mutex_unlock(g_smi_dev.phy_mutex);
+#endif
+}
+
+jl_api_ret_t jl_smi_init(void)
+{
+ g_smi_gpio.mdc.pin = MDC_PIN;
+ g_smi_gpio.mdc.hd = NULL;
+ g_smi_gpio.mdio.pin = MDIO_PIN;
+ g_smi_gpio.mdio.hd = NULL;
+
+ g_smi_dev.device = &g_smi_gpio;
+
+#ifdef CONFIG_JLFE_PHY_MUTEX
+ g_smi_dev.phy_mutex = port_mutex_init();
+ if (!g_smi_dev.phy_mutex)
+ return JL_ERR_INIT;
+#endif
+
+#ifdef CONFIG_JLFE_APB_MUTEX
+ g_smi_dev.apb_mutex = port_mutex_init();
+ if (!g_smi_dev.apb_mutex)
+ return JL_ERR_INIT;
+#endif
+
+ return init_smi(&g_smi_gpio);
+}
+
+jl_api_ret_t jl_smi_deinit(void)
+{
+#ifdef CONFIG_JLFE_PHY_MUTEX
+ if (g_smi_dev.phy_mutex) {
+ port_mutex_deinit(g_smi_dev.phy_mutex);
+ g_smi_dev.phy_mutex = NULL;
+ }
+#endif
+
+#ifdef CONFIG_JLFE_APB_MUTEX
+ if (g_smi_dev.apb_mutex) {
+ port_mutex_deinit(g_smi_dev.apb_mutex);
+ g_smi_dev.apb_mutex = NULL;
+ }
+#endif
+
+ return deinit_smi(&g_smi_gpio);
+}
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/driver/hal_smi_mdio.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/driver/hal_smi_mdio.c
new file mode 100644
index 0000000..9635b7a
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/driver/hal_smi_mdio.c
@@ -0,0 +1,88 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+
+#include "jl_error.h"
+#include "jl_types.h"
+#include "jl_config.h"
+#include "portable/jl_portable.h"
+#include "driver/hal_smi.h"
+
+struct smi_device_s g_smi_dev;
+
+
+jl_uint16 jl_smi_read(jl_uint8 phy, jl_uint8 reg)
+{
+ jl_uint16 val;
+
+#ifdef CONFIG_JLFE_PHY_MUTEX
+ port_mutex_lock(g_smi_dev.phy_mutex);
+#endif
+
+ val = port_mdio_read(phy, reg);
+
+#ifdef CONFIG_JLFE_PHY_MUTEX
+ port_mutex_unlock(g_smi_dev.phy_mutex);
+#endif
+
+ return val;
+}
+
+void jl_smi_write(jl_uint8 phy, jl_uint8 reg, jl_uint16 val)
+{
+#ifdef CONFIG_JLFE_PHY_MUTEX
+ port_mutex_lock(g_smi_dev.phy_mutex);
+#endif
+
+ port_mdio_write(phy, reg, val);
+
+#ifdef CONFIG_JLFE_PHY_MUTEX
+ port_mutex_unlock(g_smi_dev.phy_mutex);
+#endif
+}
+
+jl_api_ret_t jl_smi_init(void)
+{
+#ifdef CONFIG_JLFE_PHY_MUTEX
+ g_smi_dev.phy_mutex = port_mutex_init();
+ if (!g_smi_dev.phy_mutex)
+ return JL_ERR_INIT;
+#endif
+
+#ifdef CONFIG_JLFE_APB_MUTEX
+ g_smi_dev.apb_mutex = port_mutex_init();
+ if (!g_smi_dev.apb_mutex)
+ return JL_ERR_INIT;
+#endif
+
+ return port_mdio_init();
+}
+
+jl_api_ret_t jl_smi_deinit(void)
+{
+#ifdef CONFIG_JLFE_PHY_MUTEX
+ if (g_smi_dev.phy_mutex) {
+ port_mutex_deinit(g_smi_dev.phy_mutex);
+ g_smi_dev.phy_mutex = NULL;
+ }
+#endif
+
+#ifdef CONFIG_JLFE_APB_MUTEX
+ if (g_smi_dev.apb_mutex) {
+ port_mutex_deinit(g_smi_dev.apb_mutex);
+ g_smi_dev.apb_mutex = NULL;
+ }
+#endif
+
+ return port_mdio_deinit();
+}
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/driver/hal_smi_spi.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/driver/hal_smi_spi.c
new file mode 100644
index 0000000..df22dcb
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/driver/hal_smi_spi.c
@@ -0,0 +1,163 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+
+#include "jl_error.h"
+#include "jl_types.h"
+#include "portable/jl_portable.h"
+#include "driver/hal_smi.h"
+
+
+struct bit_buffer_s {
+ jl_uint8 *p_data;
+ jl_uint8 i_mask;
+ jl_int32 i_size;
+ jl_int32 i_data;
+};
+
+struct smi_device_s g_smi_dev;
+
+
+#define write_bits(buffer, count, bits)\
+do {\
+ struct bit_buffer_s *p_buffer = (buffer);\
+ jl_int32 i_count = (count);\
+ jl_uint64 i_bits = (bits);\
+ while (i_count > 0) {\
+ i_count--;\
+ if ((i_bits >> i_count)&0x01)\
+ p_buffer->p_data[p_buffer->i_data] |= p_buffer->i_mask;\
+ else\
+ p_buffer->p_data[p_buffer->i_data] &= ~p_buffer->i_mask;\
+ p_buffer->i_mask >>= 1;\
+ if (p_buffer->i_mask == 0) {\
+ p_buffer->i_data++;\
+ p_buffer->i_mask = 0x80;\
+ }\
+ }\
+} while (0)
+
+#define read_bits(buffer, count, bits)\
+do {\
+ struct bit_buffer_s *p_buffer = (buffer);\
+ jl_int32 i_count = (count);\
+ *bits = 0;\
+ while (i_count > 0) {\
+ i_count--;\
+ *bits += p_buffer->p_data[p_buffer->i_data] & p_buffer->i_mask;\
+ p_buffer->i_mask >>= 1;\
+ *bits <<= 1;\
+ if (p_buffer->i_mask == 0) {\
+ p_buffer->i_data++;\
+ p_buffer->i_mask = 0x80;\
+ }\
+ }\
+} while (0)
+
+/* wr:0,read;1:write*/
+static void __pack_spi_frame(jl_int32 wr, jl_uint8 *buf, jl_uint8 phy, jl_uint8 reg, jl_uint16 data)
+{
+ struct bit_buffer_s bitbuf;
+
+ bitbuf.i_size = 8; /* a clause-22 frame size in bytes */
+ bitbuf.i_mask = 0x80;
+ bitbuf.p_data = buf;
+ bitbuf.i_data = 0;
+
+ write_bits(&bitbuf, 32, 0xffffffff); /* 32 bits preambles:32-1 */
+ write_bits(&bitbuf, 2, 1); /* 2 bits start code:01 */
+ if (wr)
+ write_bits(&bitbuf, 2, 1); /* 2 bits opcode(write:01, read:10) */
+ else
+ write_bits(&bitbuf, 2, 2);
+ write_bits(&bitbuf, 5, phy); /* 5 bits phy id */
+ write_bits(&bitbuf, 5, reg); /* 5 bits register address */
+ write_bits(&bitbuf, 2, 2); /* 2 bits turn around(a trick way) */
+ write_bits(&bitbuf, 16, data); /* 16 bits data, if spi read, tx data is 0xff(MISO/MOSI wired-AND) */
+}
+
+jl_uint16 jl_smi_read(jl_uint8 phy, jl_uint8 reg)
+{
+ jl_uint8 tx_buf[8];
+ jl_uint8 rx_buf[8];
+
+ /* XXX mutex is not neccessary if you are using spidev driver
+ * casue it's transfer ioctl is thread safe */
+#ifdef CONFIG_JLFE_PHY_MUTEX
+ port_mutex_lock(g_smi_dev.phy_mutex);
+#endif
+
+ __pack_spi_frame(0, tx_buf, phy, reg, 0xffff);
+ port_spi_read(tx_buf, rx_buf, 8);
+
+#ifdef CONFIG_JLFE_PHY_MUTEX
+ port_mutex_unlock(g_smi_dev.phy_mutex);
+#endif
+
+ return ((jl_uint16) ((jl_uint16)rx_buf[6] << 8 | rx_buf[7]));
+}
+
+void jl_smi_write(jl_uint8 phy, jl_uint8 reg, jl_uint16 val)
+{
+ jl_uint8 tx_buf[8];
+ jl_uint8 rx_buf[8];
+
+ /* XXX mutex is not neccessary if you are using spidev driver
+ * casue it's transfer ioctl is thread safe */
+#ifdef CONFIG_JLFE_PHY_MUTEX
+ port_mutex_lock(g_smi_dev.phy_mutex);
+#endif
+
+ __pack_spi_frame(1, tx_buf, phy, reg, val);
+ port_spi_write(tx_buf, rx_buf, 8);
+
+#ifdef CONFIG_JLFE_PHY_MUTEX
+ port_mutex_unlock(g_smi_dev.phy_mutex);
+#endif
+}
+
+jl_api_ret_t jl_smi_init(void)
+{
+#ifdef CONFIG_JLFE_PHY_MUTEX
+ g_smi_dev.phy_mutex = port_mutex_init();
+ if (!g_smi_dev.phy_mutex)
+ return JL_ERR_INIT;
+#endif
+
+#ifdef CONFIG_JLFE_APB_MUTEX
+ g_smi_dev.apb_mutex = port_mutex_init();
+ if (!g_smi_dev.apb_mutex)
+ return JL_ERR_INIT;
+#endif
+
+ return port_spi_init();
+}
+
+jl_api_ret_t jl_smi_deinit(void)
+{
+#ifdef CONFIG_JLFE_PHY_MUTEX
+ if (g_smi_dev.phy_mutex) {
+ port_mutex_deinit(g_smi_dev.phy_mutex);
+ g_smi_dev.phy_mutex = NULL;
+ }
+#endif
+
+#ifdef CONFIG_JLFE_APB_MUTEX
+ if (g_smi_dev.apb_mutex) {
+ port_mutex_deinit(g_smi_dev.apb_mutex);
+ g_smi_dev.apb_mutex = NULL;
+ }
+#endif
+
+ return port_spi_deinit();
+}
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/driver/jl_reg_io.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/driver/jl_reg_io.c
new file mode 100644
index 0000000..ef36997
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/driver/jl_reg_io.c
@@ -0,0 +1,337 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+
+#include "jl_base.h"
+#include "jl_config.h"
+#include "driver/jl_reg_io.h"
+
+#define APB_REG_BUSRT_SIZE_PG0_MAX 6
+#define APB_REG_BUSRT_SIZE_MAX 8
+
+#define REG_NO_OPR_CTRL_0 16
+#define REG_NO_OPR_CTRL_1 17
+#define REG_NO_OPR_CTRL_2 18
+#define REG_NO_OPR_DATA0_L 19
+#define REG_NO_OPR_DATA6_L 16
+
+
+jl_ret_t __apb_reg_read(jl_uint32 reg, jl_uint32 *buf, jl_uint8 size)
+{
+ /* access apb registers indirectly via SMI on domain "phy 0 & page 0" */
+ jl_uint32 phy_0 = 0;
+ /* page selection register */
+ jl_uint32 phy_reg = 31;
+ jl_uint32 page_0 = 0;
+ jl_uint32 page_1 = 1;
+ jl_uint32 reg_l_14b = 0;
+ jl_uint32 reg_h_16b = 0;
+ jl_uint16 try = 1000;
+ jl_uint32 tmp = 0;
+ jl_uint8 pg0_burst = 0;
+ jl_uint8 pg1_burst = 0;
+ jl_uint16 wide_en = 0;
+ jl_uint16 burst_ctrl = 0;
+ jl_int32 i, j;
+ jl_api_ret_t ret = 0;
+
+ if (size > APB_REG_BUSRT_SIZE_MAX) {
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_ERROR, "Brust size overflow, max burst size is 8\n");
+ ret = JL_ERR_PARAM;
+ return ret;
+ }
+
+#ifdef CONFIG_JLFE_APB_MUTEX
+ port_mutex_lock(g_smi_dev.apb_mutex);
+#endif
+
+ /* set page 0 */
+ jl_smi_write(phy_0, phy_reg, page_0);
+
+ /* 1. set burst size to 0(1 word)
+ * '0' is same as '1', but would not enable the wide range
+ */
+ wide_en = ((size > 1) ? 1: 0);
+ burst_ctrl = (size << 2) | (wide_en << 1);
+ jl_smi_write(phy_0, REG_NO_OPR_CTRL_2, burst_ctrl);
+
+ /* 2. set register address && issue read operation */
+ reg_l_14b = ((reg << 2) & 0x0000fffc) | 1;
+ reg_h_16b = (reg >> 14) & 0x000003fff;
+ jl_smi_write(phy_0, REG_NO_OPR_CTRL_1, reg_h_16b);
+ jl_smi_write(phy_0, REG_NO_OPR_CTRL_0, reg_l_14b);
+
+ /* 4. check operation done & status */
+ while (--try) {
+ tmp = jl_smi_read(phy_0, REG_NO_OPR_CTRL_0);
+ if (!(tmp & 1))
+ break;
+ }
+
+ if (!try) {
+#ifdef CONFIG_JLFE_APB_MUTEX
+ port_mutex_unlock(g_smi_dev.apb_mutex);
+#endif
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_ERROR, "read apb register timeout\n");
+ ret = JL_ERR_TIMEOUT;
+ return ret;
+ }
+
+ tmp = jl_smi_read(phy_0, REG_NO_OPR_CTRL_2);
+ if ((tmp & 1)) {
+#ifdef CONFIG_JLFE_APB_MUTEX
+ port_mutex_unlock(g_smi_dev.apb_mutex);
+#endif
+ ret = JL_ERR_FAIL;
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_ERROR, "read apb register fail\n");
+ return ret;
+ }
+
+ /* 5. read data */
+ pg0_burst = size;
+ if (size > APB_REG_BUSRT_SIZE_PG0_MAX) {
+ pg0_burst = APB_REG_BUSRT_SIZE_PG0_MAX;
+ pg1_burst = size - APB_REG_BUSRT_SIZE_PG0_MAX;
+ }
+ for (i = 0; i < pg0_burst; i++) {
+ buf[i] = jl_smi_read(phy_0, REG_NO_OPR_DATA0_L + (i * 2));
+ tmp = jl_smi_read(phy_0, REG_NO_OPR_DATA0_L + (i * 2) + 1);
+ buf[i] |= tmp << 16;
+ }
+ if (size > APB_REG_BUSRT_SIZE_PG0_MAX) {
+ /* set page 1 */
+ jl_smi_write(phy_0, phy_reg, page_1);
+ for (j = 0; j < pg1_burst; j++) {
+ buf[i + j] = jl_smi_read(phy_0, REG_NO_OPR_DATA6_L + (j * 2));
+ tmp = jl_smi_read(phy_0, REG_NO_OPR_DATA6_L + (j * 2) + 1);
+ buf[i + j] |= tmp << 16;
+ }
+ }
+
+#ifdef CONFIG_JLFE_APB_MUTEX
+ port_mutex_unlock(g_smi_dev.apb_mutex);
+#endif
+
+ return ret;
+}
+
+jl_ret_t __apb_reg_write(jl_uint32 reg, jl_uint32 *buf, jl_uint8 size)
+{
+ /* access apb registers indirectly via SMI on domain "phy 0 & page 0" */
+ jl_uint32 phy_0 = 0;
+ /* page selection register */
+ jl_uint32 phy_reg = 31;
+ jl_uint32 page_0 = 0;
+ jl_uint32 page_1 = 1;
+ jl_uint32 reg_l_14b = 0;
+ jl_uint32 reg_h_16b = 0;
+ jl_uint16 try = 1000;
+ jl_uint16 tmp = 0;
+ jl_uint8 pg0_burst = 0;
+ jl_uint8 pg1_burst = 0;
+ jl_uint16 wide_en = 0;
+ jl_uint16 burst_ctrl = 0;
+ jl_int32 i, j;
+ jl_ret_t ret = 0;
+
+ if (size > APB_REG_BUSRT_SIZE_MAX) {
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_ERROR, "Brust size overflow, max burst size is 8\n");
+ ret = JL_ERR_PARAM;
+ return ret;
+ }
+
+#ifdef CONFIG_JLFE_DUMP_REG_WRITE
+ if (size == 1) {
+ ret = jl_dump_indirect_write(reg, *buf);
+ if (ret)
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_ERROR, "Dump smi write fail!!!\n");
+ } else {
+ ret = jl_dump_indirect_burst_write(reg, size, buf);
+ if (ret)
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_ERROR, "Dump smi write fail!!!\n");
+ }
+ ret = 0;
+#endif
+
+#ifdef CONFIG_JLFE_APB_MUTEX
+ port_mutex_lock(g_smi_dev.apb_mutex);
+#endif
+
+ /* set page 0 */
+ jl_smi_write(phy_0, phy_reg, page_0);
+
+ /* 1. write data */
+ pg0_burst = size;
+ if (size > APB_REG_BUSRT_SIZE_PG0_MAX) {
+ pg0_burst = APB_REG_BUSRT_SIZE_PG0_MAX;
+ pg1_burst = size - APB_REG_BUSRT_SIZE_PG0_MAX;
+ }
+ for (i = 0; i < pg0_burst; i++) {
+ jl_smi_write(phy_0, REG_NO_OPR_DATA0_L + (i * 2), (buf[i] & 0x0000ffff));
+ jl_smi_write(phy_0, REG_NO_OPR_DATA0_L + (i * 2 + 1), ((buf[i] >> 16) & 0x0000ffff));
+ }
+ if (size > APB_REG_BUSRT_SIZE_PG0_MAX) {
+ /* set page 1 */
+ jl_smi_write(phy_0, phy_reg, page_1);
+ for (j = 0; j < pg1_burst; j++) {
+ jl_smi_write(phy_0, REG_NO_OPR_DATA6_L + (j * 2), (buf[i + j] & 0x0000ffff));
+ jl_smi_write(phy_0, REG_NO_OPR_DATA6_L + (j * 2 + 1), ((buf[i + j] >> 16) & 0x0000ffff));
+ }
+ /* set page 0 */
+ jl_smi_write(phy_0, phy_reg, page_0);
+ }
+
+ /* 2. set burst size to 0(1 word)
+ * '0' is same as '1', but would not enable the wide range
+ */
+ wide_en = ((size > 1) ? 1: 0);
+ burst_ctrl = (size << 2) | (wide_en << 1);
+ jl_smi_write(phy_0, REG_NO_OPR_CTRL_2, burst_ctrl);
+
+ /* 3. set register address && issue read operation */
+ reg_l_14b = ((reg << 2) & 0x0000fffc) | 3;
+ reg_h_16b = (reg >> 14) & 0x000003fff;
+ jl_smi_write(phy_0, REG_NO_OPR_CTRL_1, reg_h_16b);
+ jl_smi_write(phy_0, REG_NO_OPR_CTRL_0, reg_l_14b);
+
+ /* 4. check operation done & status */
+ while (--try) {
+ tmp = jl_smi_read(phy_0, REG_NO_OPR_CTRL_0);
+ if (!(tmp & 1))
+ break;
+ }
+
+ if (!try) {
+#ifdef CONFIG_JLFE_APB_MUTEX
+ port_mutex_unlock(g_smi_dev.apb_mutex);
+#endif
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_ERROR, "write apb register timeout\n");
+ ret = JL_ERR_TIMEOUT;
+ return ret;
+ }
+ tmp = jl_smi_read(phy_0, REG_NO_OPR_CTRL_2);
+ if ((tmp & 1)) {
+#ifdef CONFIG_JLFE_APB_MUTEX
+ port_mutex_unlock(g_smi_dev.apb_mutex);
+#endif
+ ret = JL_ERR_FAIL;
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_ERROR, "write apb register fail\n");
+ return ret;
+ }
+
+#ifdef CONFIG_JLFE_APB_MUTEX
+ port_mutex_unlock(g_smi_dev.apb_mutex);
+#endif
+
+ return ret;
+}
+
+void jl_read_bits(jl_uint8 *bit_buf, jl_uint64 *bits, jl_uint8 start, jl_uint8 count)
+{
+ jl_uint64 i_bits = 0;
+ jl_uint8 i_count = 0;
+ jl_uint32 i_index = (start) / 8;
+ jl_uint8 i_mask = 1 << ((start) % 8);
+
+ while (i_count < count) {
+ if (bit_buf[i_index] & i_mask)
+ i_bits |= (1ULL << i_count);
+ if (i_mask == 0x80) {
+ i_index++;
+ i_mask = 0x01;
+ } else
+ i_mask <<= 1;
+ i_count++;
+ }
+ *bits = i_bits;
+};
+
+void jl_write_bits(jl_uint8 *bit_buf, jl_uint64 bits, jl_uint8 start, jl_uint8 count)
+{
+ jl_uint64 i_bits = bits;
+ jl_uint8 i_count = 0;
+ jl_uint32 i_index = (start) / 8;
+ jl_uint8 i_mask = 1 << ((start) % 8);
+
+ while (i_count < count) {
+ if ((i_bits >> i_count) & 0x01)
+ bit_buf[i_index] |= i_mask;
+ else
+ bit_buf[i_index] &= ~i_mask;
+ if (i_mask == 0x80) {
+ i_index++;
+ i_mask = 0x01;
+ } else
+ i_mask <<= 1;
+ i_count++;
+ }
+};
+
+jl_uint16 jl_phy_reg_read_ext(jl_uint32 phy, jl_uint32 page, jl_uint32 reg)
+{
+ jl_smi_write(phy, 0x1f, page);
+
+ return jl_smi_read(phy, reg);
+}
+
+void jl_phy_reg_write_ext(jl_uint32 phy, jl_uint32 page, jl_uint32 reg, jl_uint16 val)
+{
+ jl_smi_write(phy, 0x1f, page);
+ jl_smi_write(phy, reg, val);
+
+#ifdef CONFIG_JLFE_DUMP_REG_WRITE
+ jl_ret_t ret;
+
+ ret = jl_dump_direct_write(phy, page, reg, val);
+ if (ret)
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_ERROR, "Dump smi write fail!!!\n");
+#endif
+}
+
+jl_api_ret_t jl_apb_reg_read(jl_uint32 reg, jl_uint32 *val)
+{
+ return __apb_reg_read(reg, val, 1);
+}
+
+jl_api_ret_t jl_apb_reg_burst_read(jl_uint32 reg, jl_uint32 *buf, jl_uint32 size)
+{
+ return __apb_reg_read(reg, buf, size);
+}
+
+jl_api_ret_t jl_apb_reg_write(jl_uint32 reg, jl_uint32 val)
+{
+ return __apb_reg_write(reg, &val, 1);
+}
+
+jl_api_ret_t jl_apb_reg_burst_write(jl_uint32 reg, jl_uint32 *buf, jl_uint32 size)
+{
+ return __apb_reg_write(reg, buf, size);
+}
+
+jl_api_ret_t jl_reg_io_init(void)
+{
+#ifdef CONFIG_JLFE_DUMP_REG_WRITE
+ jl_dump_file_open();
+#endif
+
+ return jl_smi_init();
+}
+
+jl_api_ret_t jl_reg_io_deinit(void)
+{
+#ifdef CONFIG_JLFE_DUMP_REG_WRITE
+ jl_dump_file_close();
+#endif
+
+ return jl_smi_deinit();
+}
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/fc.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/fc.c
new file mode 100644
index 0000000..bc23718
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/fc.c
@@ -0,0 +1,219 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+
+#include "jl_base.h"
+#include "jl51xx/jl51xx_drv_fc.h"
+#include "fc.h"
+
+
+jl_api_ret_t _jl_port_fc_enable_set(jl_port_t port, jl_enable_t enable)
+{
+ return jl51xx_port_fc_enable_set(port, enable);
+}
+
+jl_api_ret_t _jl_port_fc_enable_get(jl_port_t port, jl_enable_t *penable)
+{
+ return jl51xx_port_fc_enable_get(port, penable);
+}
+
+jl_api_ret_t _jl_port_fc_threshold_set(jl_port_t port,
+ jl_uint32 threshold_on, jl_uint32 threshold_off)
+{
+ return jl51xx_port_fc_threshold_set(port, threshold_on, threshold_off);
+}
+
+jl_api_ret_t _jl_port_fc_threshold_get(jl_port_t port,
+ jl_uint32 *pthreshold_on, jl_uint32 *pthreshold_off)
+{
+ return jl51xx_port_fc_threshold_get(port, pthreshold_on, pthreshold_off);
+}
+
+jl_api_ret_t _jl_port_fc_pause_time_set(jl_port_t port, jl_uint32 pause_time)
+{
+ return jl51xx_port_fc_pause_time_set(port, pause_time);
+}
+
+jl_api_ret_t _jl_port_fc_pause_time_get(jl_port_t port, jl_uint32 *ppause_time)
+{
+ return jl51xx_port_fc_pause_time_get(port, ppause_time);
+}
+
+jl_api_ret_t _jl_taildrop_enable_set(jl_port_t port, jl_enable_t enable)
+{
+ return jl51xx_taildrop_enable_set(port, enable);
+}
+
+jl_api_ret_t _jl_taildrop_enable_get(jl_port_t port, jl_enable_t *penable)
+{
+ return jl51xx_taildrop_enable_get(port, penable);
+}
+
+jl_api_ret_t _jl_taildrop_counter_get(jl_uint32 *pcntr)
+{
+ return jl51xx_ingress_resource_manager_drop_counter_get(pcntr);
+}
+
+
+jl_ret_t jl_port_fc_enable_set(jl_port_t port, jl_enable_t enable)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+ JL_CHECK_PORT(port);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_port_fc_enable_set(port, enable);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_port_fc_enable_set);
+
+jl_ret_t jl_port_fc_enable_get(jl_port_t port, jl_enable_t *penable)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+ JL_CHECK_PORT(port);
+ JL_CHECK_POINTER(penable);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_port_fc_enable_get(port, penable);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_port_fc_enable_get);
+
+jl_ret_t jl_port_fc_threshold_set(jl_port_t port,
+ jl_uint32 threshold_on, jl_uint32 threshold_off)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+ JL_CHECK_PORT(port);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_port_fc_threshold_set(port, threshold_on, threshold_off);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_port_fc_threshold_set);
+
+jl_ret_t jl_port_fc_threshold_get(jl_port_t port,
+ jl_uint32 *pthreshold_on, jl_uint32 *pthreshold_off)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+ JL_CHECK_PORT(port);
+ JL_CHECK_POINTER(pthreshold_on);
+ JL_CHECK_POINTER(pthreshold_off);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_port_fc_threshold_get(port, pthreshold_on, pthreshold_off);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_port_fc_threshold_get);
+
+jl_ret_t jl_port_fc_pause_time_set(jl_port_t port, jl_uint32 pause_time)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+ JL_CHECK_PORT(port);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_port_fc_pause_time_set(port, pause_time);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_port_fc_pause_time_set);
+
+jl_ret_t jl_port_fc_pause_time_get(jl_port_t port, jl_uint32 *ppause_time)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+ JL_CHECK_PORT(port);
+ JL_CHECK_POINTER(ppause_time);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_port_fc_pause_time_get(port, ppause_time);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_port_fc_pause_time_get);
+
+jl_api_ret_t jl_taildrop_enable_set(jl_port_t port, jl_enable_t enable)
+{
+ jl_api_ret_t ret;
+
+ /* Check System state */
+ JL_CHECK_STAT();
+
+ JL_CHECK_PORT(port);
+
+ if (enable >= JL_ENABLE_END)
+ return JL_ERR_PARAM;
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_taildrop_enable_set(port, enable);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_taildrop_enable_set);
+
+jl_api_ret_t jl_taildrop_enable_get(jl_port_t port, jl_enable_t *penable)
+{
+ jl_api_ret_t ret;
+
+ /* Check System state */
+ JL_CHECK_STAT();
+
+ JL_CHECK_PORT(port);
+
+ JL_CHECK_POINTER(penable);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_taildrop_enable_get(port, penable);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_taildrop_enable_get);
+
+jl_api_ret_t jl_taildrop_counter_get(jl_uint32 *pcntr)
+{
+ jl_api_ret_t ret;
+
+ /* Check System state */
+ JL_CHECK_STAT();
+
+ JL_CHECK_POINTER(pcntr);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_taildrop_counter_get(pcntr);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_taildrop_counter_get);
+
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/jl51xx/jl51xx_drv_acl.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/jl51xx/jl51xx_drv_acl.c
new file mode 100644
index 0000000..d225002
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/jl51xx/jl51xx_drv_acl.c
@@ -0,0 +1,297 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+
+#include "jl_base.h"
+#include "acl.h"
+
+jl_ret_t jl51xx_acl_check_para(jl_uint8 entry_index, jl_acl_rule_t *acl_rule, jl_acl_action_t *acl_action)
+{
+ JL_CHECK_POINTER(acl_rule);
+ JL_CHECK_POINTER(acl_action);
+ JL_CHECK_PORTMASK(acl_rule->ports);
+ JL_CHECK_PORT(acl_action->dest_port);
+
+ if (entry_index >= INGRESS_L2_ACL_MATCH_DATA_ENTRIES_NUM)
+ return JL_ERR_PARAM;
+
+ if (acl_action->drop_enable >= JL_ENABLE_END)
+ return JL_ERR_PARAM;
+
+ if (acl_action->send_to_cpu_enable >= JL_ENABLE_END)
+ return JL_ERR_PARAM;
+
+ if (acl_action->send_to_port_enable >= JL_ENABLE_END)
+ return JL_ERR_PARAM;
+
+ if (acl_action->force_queue_enable >= JL_ENABLE_END)
+ return JL_ERR_PARAM;
+
+ if (acl_action->update_pcp_enable >= JL_ENABLE_END)
+ return JL_ERR_PARAM;
+
+ if (acl_action->update_vid_enable >= JL_ENABLE_END)
+ return JL_ERR_PARAM;
+
+ if (acl_action->queue_id >= MAX_QUEUE_NUM)
+ return JL_ERR_PARAM;
+
+ if (acl_action->new_pcp_value > MAX_PCP)
+ return JL_ERR_PARAM;
+
+ if (acl_action->new_vid_value > MAX_VLAN_ID)
+ return JL_ERR_PARAM;
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_acl_set(jl_uint8 entry_index, jl_acl_rule_t *acl_rule, jl_acl_action_t *acl_action)
+{
+ jl_ret_t ret = JL_ERR_OK;
+ jl_uint32 in_l2_acl_match_val[8] = {0};
+ jl_uint32 in_l2_acl_result_operation_val[2] = {0};
+ jl_uint32 reg_addr = 0;
+ jl_uint8 *preg_val = NULL;
+
+ ret = jl51xx_acl_check_para(entry_index, acl_rule, acl_action);
+ if (ret)
+ return ret;
+
+ reg_addr = SWCORE_BASE + entry_index * 8 + INGRESS_L2_ACL_MATCH_DATA_ENTRIES_OFFSET;
+ preg_val = (jl_uint8 *)&in_l2_acl_match_val[0];
+ jl_write_bits(preg_val, (jl_uint64)acl_rule->compare_ethtype, 0, 1);
+ jl_write_bits(preg_val, (jl_uint64)acl_rule->type_of_comparison_ethtype, 1, 1);
+ jl_write_bits(preg_val, (jl_uint64)acl_rule->eth_type, 2, 16);
+ jl_write_bits(preg_val, (jl_uint64)acl_rule->compare_da, 18, 1);
+ jl_write_bits(preg_val, (jl_uint64)acl_rule->type_of_comparison_da, 19, 1);
+ jl_write_bits(preg_val, (jl_uint64)acl_rule->da_mac, 20, 48);
+ jl_write_bits(preg_val, (jl_uint64)acl_rule->compare_sa, 68, 1);
+ jl_write_bits(preg_val, (jl_uint64)acl_rule->type_of_comparison_sa, 69, 1);
+ jl_write_bits(preg_val, (jl_uint64)acl_rule->sa_mac, 70, 48);
+ jl_write_bits(preg_val, (jl_uint64)acl_rule->compare_vid, 118, 1);
+ jl_write_bits(preg_val, (jl_uint64)acl_rule->type_of_comparison_vid, 119, 1);
+ jl_write_bits(preg_val, (jl_uint64)acl_rule->vid, 120, 12);
+ jl_write_bits(preg_val, (jl_uint64)acl_rule->compare_pcp, 132, 1);
+ jl_write_bits(preg_val, (jl_uint64)acl_rule->type_of_comparison_pcp, 133, 1);
+ jl_write_bits(preg_val, (jl_uint64)acl_rule->pcp, 134, 3);
+ jl_write_bits(preg_val, (jl_uint64)acl_rule->compare_dei, 137, 1);
+ jl_write_bits(preg_val, (jl_uint64)acl_rule->type_of_comparison_dei, 138, 1);
+ jl_write_bits(preg_val, (jl_uint64)acl_rule->dei, 139, 1);
+ jl_write_bits(preg_val, (jl_uint64)acl_rule->compare_has_vlans, 140, 1);
+ jl_write_bits(preg_val, (jl_uint64)acl_rule->type_of_comparison_has_vlans, 141, 1);
+ jl_write_bits(preg_val, (jl_uint64)acl_rule->has_vlans, 142, 1);
+ jl_write_bits(preg_val, (jl_uint64)acl_rule->compare_cstag, 143, 1);
+ jl_write_bits(preg_val, (jl_uint64)acl_rule->type_of_comparison_cstag, 144, 1);
+ jl_write_bits(preg_val, (jl_uint64)acl_rule->cstag, 145, 1);
+ jl_write_bits(preg_val, (jl_uint64)JL_PORTMASK_P2M(acl_rule->ports), 146, 10);
+ ret = jl_apb_reg_burst_write(reg_addr, &in_l2_acl_match_val[0], 8);
+ if (ret)
+ return ret;
+
+ reg_addr = SWCORE_BASE + entry_index * 2 + INGRESS_L2_ACL_RESULT_OPERATION_ENTRIES_OFFSET;
+ preg_val = (jl_uint8 *)&in_l2_acl_result_operation_val[0];
+ ret = jl_apb_reg_burst_read(reg_addr, &in_l2_acl_result_operation_val[0], 2);
+ if (ret)
+ return ret;
+
+ jl_write_bits(preg_val, (jl_uint64)acl_action->drop_enable, 0, 1);
+ jl_write_bits(preg_val, (jl_uint64)acl_action->send_to_cpu_enable, 1, 1);
+ jl_write_bits(preg_val, (jl_uint64)acl_action->force_queue_enable, 2, 1);
+ jl_write_bits(preg_val, (jl_uint64)acl_action->queue_id, 3, 2);
+ jl_write_bits(preg_val, (jl_uint64)acl_action->send_to_port_enable, 5, 1);
+ jl_write_bits(preg_val, (jl_uint64)JL_PORT_P2M(acl_action->dest_port), 6, 4);
+ jl_write_bits(preg_val, (jl_uint64)acl_action->update_pcp_enable, 24, 1);
+ jl_write_bits(preg_val, (jl_uint64)acl_action->new_pcp_value, 25, 3);
+ jl_write_bits(preg_val, (jl_uint64)acl_action->update_vid_enable, 28, 1);
+ jl_write_bits(preg_val, (jl_uint64)acl_action->new_vid_value, 29, 12);
+ ret = jl_apb_reg_burst_write(reg_addr, &in_l2_acl_result_operation_val[0], 2);
+ if (ret)
+ return ret;
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_acl_get(jl_uint8 entry_index, jl_acl_rule_t *acl_rule, jl_acl_action_t *acl_action)
+{
+ jl_ret_t ret;
+ jl_uint32 in_l2_acl_match_val[8] = {0};
+ jl_uint32 in_l2_acl_result_operation_val[2] = {0};
+ jl_uint32 reg_addr = 0;
+ jl_uint64 val = 0;
+ jl_uint8 *preg_val = NULL;
+
+ JL_CHECK_POINTER(acl_rule);
+ JL_CHECK_POINTER(acl_action);
+
+ if (entry_index >= INGRESS_L2_ACL_MATCH_DATA_ENTRIES_NUM)
+ return JL_ERR_PARAM;
+
+ do {
+ reg_addr = SWCORE_BASE + entry_index * 8 + INGRESS_L2_ACL_MATCH_DATA_ENTRIES_OFFSET;
+ preg_val = (jl_uint8 *)&in_l2_acl_match_val[0];
+ ret = jl_apb_reg_burst_read(reg_addr, &in_l2_acl_match_val[0], 8);
+ if (ret)
+ return ret;
+
+ jl_read_bits(preg_val, &val, 0, 1);
+ acl_rule->compare_ethtype = val&0x1;
+
+ val = 0;
+ jl_read_bits(preg_val, &val, 1, 1);
+ acl_rule->type_of_comparison_ethtype = val&0x1;
+
+ val = 0;
+ jl_read_bits(preg_val, &val, 2, 16);
+ acl_rule->eth_type = val&0xffff;
+
+ val = 0;
+ jl_read_bits(preg_val, &val, 18, 1);
+ acl_rule->compare_da = val&0x1;
+
+ val = 0;
+ jl_read_bits(preg_val, &val, 19, 1);
+ acl_rule->type_of_comparison_da = val&0x1;
+
+ val = 0;
+ jl_read_bits(preg_val, &val, 20, 48);
+ acl_rule->da_mac = val;
+
+ val = 0;
+ jl_read_bits(preg_val, &val, 68, 1);
+ acl_rule->compare_sa = val&0x1;
+
+ val = 0;
+ jl_read_bits(preg_val, &val, 69, 1);
+ acl_rule->type_of_comparison_sa = val&0x1;
+
+ val = 0;
+ jl_read_bits(preg_val, &val, 70, 48);
+ acl_rule->sa_mac = val;
+
+ val = 0;
+ jl_read_bits(preg_val, &val, 118, 1);
+ acl_rule->compare_vid = val&0x1;
+
+ val = 0;
+ jl_read_bits(preg_val, &val, 119, 1);
+ acl_rule->type_of_comparison_vid = val&0x1;
+
+ val = 0;
+ jl_read_bits(preg_val, &val, 120, 12);
+ acl_rule->vid = val&0xfff;
+
+ val = 0;
+ jl_read_bits(preg_val, &val, 132, 1);
+ acl_rule->compare_pcp = val&0x1;
+
+ val = 0;
+ jl_read_bits(preg_val, &val, 133, 1);
+ acl_rule->type_of_comparison_pcp = val&0x1;
+
+ val = 0;
+ jl_read_bits(preg_val, &val, 134, 3);
+ acl_rule->pcp = val&0x7;
+
+ val = 0;
+ jl_read_bits(preg_val, &val, 137, 1);
+ acl_rule->compare_dei = val&0x1;
+
+ val = 0;
+ jl_read_bits(preg_val, &val, 138, 1);
+ acl_rule->type_of_comparison_dei = val&0x1;
+
+ val = 0;
+ jl_read_bits(preg_val, &val, 139, 1);
+ acl_rule->dei = val&0x1;
+
+ val = 0;
+ jl_read_bits(preg_val, &val, 140, 1);
+ acl_rule->compare_has_vlans = val&0x1;
+
+ val = 0;
+ jl_read_bits(preg_val, &val, 141, 1);
+ acl_rule->type_of_comparison_has_vlans = val&0x1;
+
+ val = 0;
+ jl_read_bits(preg_val, &val, 142, 1);
+ acl_rule->has_vlans = val&0x1;
+
+ val = 0;
+ jl_read_bits(preg_val, &val, 143, 1);
+ acl_rule->compare_cstag = val&0x1;
+
+ val = 0;
+ jl_read_bits(preg_val, &val, 144, 1);
+ acl_rule->type_of_comparison_cstag = val&0x1;
+
+ val = 0;
+ jl_read_bits(preg_val, &val, 145, 1);
+ acl_rule->cstag = val&0x1;
+
+ val = 0;
+ jl_read_bits(preg_val, &val, 146, 10);
+ acl_rule->ports = JL_PORTMASK_M2P(val&0x3ff);
+ } while (0);
+
+ do {
+ reg_addr = SWCORE_BASE + entry_index * 2 + INGRESS_L2_ACL_RESULT_OPERATION_ENTRIES_OFFSET;
+ preg_val = (jl_uint8 *)&in_l2_acl_result_operation_val[0];
+ ret = jl_apb_reg_burst_read(reg_addr, &in_l2_acl_result_operation_val[0], 2);
+ if (ret)
+ return ret;
+
+ val = 0;
+ jl_read_bits(preg_val, &val, 0, 1);
+ acl_action->drop_enable = val&0x1;
+
+ val = 0;
+ jl_read_bits(preg_val, &val, 1, 1);
+ acl_action->send_to_cpu_enable = val&0x1;
+
+ val = 0;
+ jl_read_bits(preg_val, &val, 2, 1);
+ acl_action->force_queue_enable = val&0x1;
+
+ val = 0;
+ jl_read_bits(preg_val, &val, 3, 2);
+ acl_action->queue_id = val&0x3;
+
+ val = 0;
+ jl_read_bits(preg_val, &val, 5, 1);
+ acl_action->send_to_port_enable = val&0x1;
+
+ val = 0;
+ jl_read_bits(preg_val, &val, 6, 4);
+ acl_action->dest_port = JL_PORT_M2P(val&0xf);
+
+ val = 0;
+ jl_read_bits(preg_val, &val, 24, 1);
+ acl_action->update_pcp_enable = val&0x1;
+
+ val = 0;
+ jl_read_bits(preg_val, &val, 25, 3);
+ acl_action->new_pcp_value = val&0x7;
+
+ val = 0;
+ jl_read_bits(preg_val, &val, 28, 1);
+ acl_action->update_vid_enable = val&0x1;
+
+ val = 0;
+ jl_read_bits(preg_val, &val, 29, 12);
+ acl_action->new_vid_value = val&0xfff;
+
+ } while (0);
+
+ return JL_ERR_OK;
+}
+
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/jl51xx/jl51xx_drv_cpu.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/jl51xx/jl51xx_drv_cpu.c
new file mode 100644
index 0000000..25046d3
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/jl51xx/jl51xx_drv_cpu.c
@@ -0,0 +1,207 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+
+#include "jl_base.h"
+#include "driver/jl_reg_io.h"
+#include "jl51xx/jl51xx_drv_cpu.h"
+#include "jl51xx/reg_swcore.h"
+
+jl_ret_t jl51xx_cpu_allow_bpdu_enable_set(jl_enable_t enable)
+{
+ jl_ret_t ret;
+ jl_uint32 src_port_tab_val[2];
+ jl_uint32 reg_addr = SWCORE_BASE + SEND_TO_CPU_OFFSET;
+
+ ret = jl_apb_reg_burst_read(reg_addr, &src_port_tab_val[0], 2);
+ if (ret)
+ return ret;
+
+ if (enable == ENABLED)
+ SET_BIT(src_port_tab_val[0], 0);
+ else if (enable == DISABLED)
+ CLR_BIT(src_port_tab_val[0], 0);
+ else
+ return JL_ERR_PARAM;
+
+ ret = jl_apb_reg_burst_write(reg_addr, &src_port_tab_val[0], 2);
+ if (ret)
+ return ret;
+
+ JL_DBG_MSG(JL_FLAG_SWCORE, _DBG_ON,
+ "%s reg=0x%x, val[0]=0x%x, enable=0x%x\n",
+ __func__, reg_addr, src_port_tab_val[0], enable);
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_cpu_allow_bpdu_enable_get(jl_enable_t *penable)
+{
+ jl_ret_t ret;
+ jl_uint32 src_port_tab_val[2];
+ jl_uint32 reg_addr = SWCORE_BASE + SEND_TO_CPU_OFFSET;
+
+ ret = jl_apb_reg_burst_read(reg_addr, &src_port_tab_val[0], 2);
+ if (ret)
+ return ret;
+
+ if ((src_port_tab_val[0] & BIT(0)) == 1)
+ *penable = 1;
+ else
+ *penable = 0;
+
+ JL_DBG_MSG(JL_FLAG_SWCORE, _DBG_ON,
+ "%s reg=0x%x, val[0]=0x%x, enable=0x%x\n",
+ __func__, reg_addr, src_port_tab_val[0], *penable);
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_cpu_allow_rst_bpdu_enable_set(jl_enable_t enable)
+{
+ jl_ret_t ret;
+ jl_uint32 src_port_tab_val[2];
+ jl_uint32 reg_addr = SWCORE_BASE + SEND_TO_CPU_OFFSET;
+
+ ret = jl_apb_reg_burst_read(reg_addr, &src_port_tab_val[0], 2);
+ if (ret)
+ return ret;
+
+ if (enable == ENABLED)
+ SET_BIT(src_port_tab_val[0], 1);
+ else if (enable == DISABLED)
+ CLR_BIT(src_port_tab_val[0], 1);
+ else
+ return JL_ERR_PARAM;
+
+ ret = jl_apb_reg_burst_write(reg_addr, &src_port_tab_val[0], 2);
+ if (ret)
+ return ret;
+
+ JL_DBG_MSG(JL_FLAG_SWCORE, _DBG_ON,
+ "%s reg=0x%x, val[0]=0x%x, enable=0x%x\n",
+ __func__, reg_addr, src_port_tab_val[0], enable);
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_cpu_allow_rst_bpdu_enable_get(jl_enable_t *penable)
+{
+ jl_ret_t ret;
+ jl_uint32 src_port_tab_val[2];
+ jl_uint32 reg_addr = SWCORE_BASE + SEND_TO_CPU_OFFSET;
+
+ ret = jl_apb_reg_burst_read(reg_addr, &src_port_tab_val[0], 2);
+ if (ret)
+ return ret;
+
+ if ((src_port_tab_val[0] & BIT(1)) == BIT(1))
+ *penable = 1;
+ else
+ *penable = 0;
+
+ JL_DBG_MSG(JL_FLAG_SWCORE, _DBG_ON,
+ "%s reg=0x%x, val[0]=0x%x, enable=0x%x\n",
+ __func__, reg_addr, src_port_tab_val[0], *penable);
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_to_cpu_tag_enable_set(jl_enable_t enable)
+{
+ jl_ret_t ret;
+ jl_uint32 disable_cpu_port[1];
+ jl_uint32 reg_addr = SWCORE_BASE + DISABLE_CPU_TAG_ON_CPU_PORT_OFFSET;
+
+ ret = jl_apb_reg_read(reg_addr, &disable_cpu_port[0]);
+ if (ret)
+ return ret;
+
+ if (enable == ENABLED)
+ CLR_BIT(disable_cpu_port[0], 0);
+ else if (enable == DISABLED)
+ SET_BIT(disable_cpu_port[0], 0);
+ else
+ return JL_ERR_PARAM;
+
+ ret = jl_apb_reg_write(reg_addr, disable_cpu_port[0]);
+ if (ret)
+ return ret;
+
+ JL_DBG_MSG(JL_FLAG_SWCORE, _DBG_ON,
+ "%s regaddr=0x%x, regval=0x%x, enable=0x%x\n",
+ __func__, reg_addr, disable_cpu_port[0], enable);
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_to_cpu_tag_enable_get(jl_enable_t *penable)
+{
+ jl_ret_t ret;
+ jl_uint32 disable_cpu_port[1];
+ jl_uint32 reg_addr = SWCORE_BASE + DISABLE_CPU_TAG_ON_CPU_PORT_OFFSET;
+
+ ret = jl_apb_reg_read(reg_addr, &disable_cpu_port[0]);
+ if (ret)
+ return ret;
+
+ if (disable_cpu_port[0] & BIT(0))
+ *penable = 0;
+ else
+ *penable = 1;
+
+ JL_DBG_MSG(JL_FLAG_SWCORE, _DBG_ON,
+ "%s regaddr=0x%x, regval=0x%x, enable=0x%x\n",
+ __func__, reg_addr, disable_cpu_port[0], *penable);
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_cpu_allow_lldp_enable_set(jl_enable_t enable)
+{
+ jl_ret_t ret = JL_ERR_OK;
+ jl_uint32 val = 0;
+ jl_uint32 portmask_offset = 5;
+ jl_uint32 reg_addr = SWCORE_BASE + LLDP_CONFIGURATION_OFFSET + portmask_offset;
+
+ ret = jl_apb_reg_read(reg_addr, &val);
+ if (ret)
+ return ret;
+
+ if (enable == ENABLED)
+ SET_BITS(val, 0, 8);
+ else if (enable == DISABLED)
+ CLR_BITS(val, 0, 8);
+ else
+ return JL_ERR_PARAM;
+
+ ret = jl_apb_reg_write(reg_addr, val);
+ if (ret)
+ return ret;
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_cpu_allow_lldp_enable_get(jl_enable_t *penable)
+{
+ jl_ret_t ret = JL_ERR_OK;
+ jl_uint32 val = 0;
+ jl_uint32 portmask_offset = 5;
+ jl_uint32 reg_addr = SWCORE_BASE + LLDP_CONFIGURATION_OFFSET + portmask_offset;
+
+ ret = jl_apb_reg_read(reg_addr, &val);
+ if (ret)
+ return ret;
+
+ if (GET_BITS(val, 0, 8) == 0x1ff)
+ *penable = 1;
+ else
+ *penable = 0;
+
+ return JL_ERR_OK;
+}
+
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/jl51xx/jl51xx_drv_fc.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/jl51xx/jl51xx_drv_fc.c
new file mode 100644
index 0000000..576ec49
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/jl51xx/jl51xx_drv_fc.c
@@ -0,0 +1,437 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+
+#include "jl_base.h"
+#include "jl51xx/jl51xx_drv_fc.h"
+
+#define CELLS_MASK 0x3FF //bit0-9
+
+#define TAILDROP_DROP_COUNTER_MASK 0xFFFFFF //bit0-23
+
+jl_ret_t jl51xx_taildrop_global_ffa_threshold_set(jl_enable_t enable, jl_uint32 cells)
+{
+ jl_ret_t ret;
+ jl_uint32 reg_addr;
+ jl_uint32 val;
+
+ if (cells > CELLS_MASK)
+ cells = CELLS_MASK;
+
+ reg_addr = SWCORE_BASE + TAIL_DROP_FFA_THRESHOLD_OFFSET;
+
+ ret = jl_apb_reg_read(reg_addr, &val);
+ if (ret)
+ return ret;
+ if (enable == ENABLED) {
+ SET_BIT(val, 10);
+ CLR_BITS(val, 0, 9);
+ val |= (cells & CELLS_MASK);
+ } else if (enable == DISABLED) {
+ CLR_BITS(val, 0, 10);
+ val |= (cells & CELLS_MASK);
+ } else
+ return JL_ERR_PARAM;
+
+ JL_DBG_MSG(JL_FLAG_ALL, _DBG_ON,
+ "%s reg:0x%x, val: 0x%x, cells:0x%x\n",
+ __func__, reg_addr, val, cells);
+
+ return jl_apb_reg_write(reg_addr, val);
+}
+
+jl_ret_t jl51xx_taildrop_global_ffa_threshold_get(jl_enable_t *penable, jl_uint32 *pcells)
+{
+ jl_ret_t ret;
+ jl_uint32 reg_addr;
+ jl_uint32 val;
+
+ if (penable == NULL || pcells == NULL)
+ return JL_ERR_OK;
+
+ reg_addr = SWCORE_BASE + TAIL_DROP_FFA_THRESHOLD_OFFSET;
+
+ ret = jl_apb_reg_read(reg_addr, &val);
+ if (ret)
+ return ret;
+
+ *pcells = val & CELLS_MASK;
+
+ if (val & BIT(10))
+ *penable = ENABLED;
+ else
+ *penable = DISABLED;
+
+ JL_DBG_MSG(JL_FLAG_ALL, _DBG_ON,
+ "%s reg:0x%x, val: 0x%x, cells:0x%x, enable=0x%x\n",
+ __func__, reg_addr, val, *pcells, *penable);
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_taildrop_port_ffa_threshold_set(jl_port_t phyport, jl_enable_t enable, jl_uint32 cells)
+{
+ jl_ret_t ret;
+ jl_uint32 reg_addr;
+ jl_uint32 val;
+ jl_port_t mac_port = JL_PORT_P2M(phyport);
+
+ reg_addr = SWCORE_BASE + PORT_TAIL_DROP_FFA_THRESHOLD_OFFSET + mac_port;
+
+ if (cells > CELLS_MASK)
+ cells = CELLS_MASK;
+
+ ret = jl_apb_reg_read(reg_addr, &val);
+ if (ret)
+ return ret;
+
+ if (enable == ENABLED) {
+ SET_BIT(val, 10);
+ CLR_BITS(val, 0, 9);
+ val |= (cells & CELLS_MASK);
+ } else if (enable == DISABLED) {
+ CLR_BITS(val, 0, 10);
+ val |= (cells & CELLS_MASK);
+ } else
+ return JL_ERR_PARAM;
+
+ JL_DBG_MSG(JL_FLAG_ALL, _DBG_ON,
+ "%s reg:0x%x, val: 0x%x, cells:0x%x\n",
+ __func__, reg_addr, val, cells);
+ return jl_apb_reg_write(reg_addr, val);
+}
+
+jl_ret_t jl51xx_taildrop_port_ffa_threshold_get(jl_port_t phyport, jl_enable_t *penable, jl_uint32 *pcells)
+{
+ jl_ret_t ret;
+ jl_uint32 reg_addr;
+ jl_uint32 val;
+ jl_port_t mac_port = JL_PORT_P2M(phyport);
+
+ if (penable == NULL || pcells == NULL)
+ return JL_ERR_OK;
+
+ reg_addr = SWCORE_BASE + PORT_TAIL_DROP_FFA_THRESHOLD_OFFSET + mac_port;
+
+ ret = jl_apb_reg_read(reg_addr, &val);
+ if (ret)
+ return ret;
+
+ *pcells = val & CELLS_MASK;
+
+ if (val & BIT(10))
+ *penable = ENABLED;
+ else
+ *penable = DISABLED;
+
+ JL_DBG_MSG(JL_FLAG_ALL, _DBG_ON,
+ "%s reg:0x%x, val: 0x%x, cells:0x%x, enable=0x%x\n",
+ __func__, reg_addr, val, *pcells, *penable);
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_taildrop_enable_set(jl_port_t phyport, jl_enable_t enable)
+{
+ jl_ret_t ret;
+ jl_uint32 reg_addr;
+ jl_uint32 val;
+ jl_port_t mac_port = JL_PORT_P2M(phyport);
+
+ reg_addr = SWCORE_BASE + PORT_TAIL_DROP_SETTINGS_OFFSET + mac_port;
+
+ ret = jl_apb_reg_read(reg_addr, &val);
+ if (ret)
+ return ret;
+ if (enable == ENABLED)
+ SET_BIT(val, 0);
+ else if (enable == DISABLED)
+ CLR_BIT(val, 0);
+ else
+ return JL_ERR_PARAM;
+
+ JL_DBG_MSG(JL_FLAG_ALL, _DBG_ON,
+ "%s reg:0x%x, val: 0x%x\n",
+ __func__, reg_addr, val);
+ return jl_apb_reg_write(reg_addr, val);
+}
+
+jl_ret_t jl51xx_taildrop_enable_get(jl_port_t phyport, jl_enable_t *penable)
+{
+ jl_ret_t ret;
+ jl_uint32 reg_addr;
+ jl_uint32 val;
+ jl_port_t mac_port = JL_PORT_P2M(phyport);
+
+ if (penable == NULL)
+ return JL_ERR_OK;
+
+ reg_addr = SWCORE_BASE + PORT_TAIL_DROP_SETTINGS_OFFSET + mac_port;
+
+ ret = jl_apb_reg_read(reg_addr, &val);
+ if (ret)
+ return ret;
+
+ JL_DBG_MSG(JL_FLAG_ALL, _DBG_ON,
+ "%s reg:0x%x, val: 0x%x\n",
+ __func__, reg_addr, val);
+
+ if (val & BIT(0))
+ *penable = ENABLED;
+ else
+ *penable = DISABLED;
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_ingress_resource_manager_drop_counter_get(jl_uint32 *pcntr)
+{
+ jl_ret_t ret;
+ jl_uint32 reg_addr;
+ jl_uint32 val;
+
+ if (pcntr == NULL)
+ return JL_ERR_OK;
+
+ reg_addr = SWCORE_BASE + INGRESS_RESOURCE_MANAGER_DROP_OFFSET;
+
+ ret = jl_apb_reg_read(reg_addr, &val);
+ if (ret)
+ return ret;
+
+ *pcntr = val & TAILDROP_DROP_COUNTER_MASK;
+
+ JL_DBG_MSG(JL_FLAG_ALL, _DBG_ON,
+ "%s reg:0x%x, val: 0x%x, counter=0x%x\n",
+ __func__, reg_addr, val, *pcntr);
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_port_fc_enable_set(jl_port_t port, jl_enable_t enable)
+{
+ jl_ret_t ret = JL_ERR_OK;
+ jl_uint64 tx_flow, rx_flow, tx_pause_en;
+ jl_uint32 port_pause_set_val[1] = {0};
+ jl_uint32 ctrl_moder_val[1] = {0};
+ jl_uint32 tx_pause_frm_ctrl_val[1] = {0};
+ jl_uint32 reg_addr = 0;
+ jl_uint8 *preg_val = NULL;
+
+ JL_ASSERT(enable < JL_ENABLE_END);
+
+ if (enable == ENABLED) {
+ rx_flow = 1;
+ tx_flow = 1;
+ tx_pause_en = 1;
+ } else {
+ rx_flow = 0; //default is 0
+ tx_flow = 1; //default is 1
+ tx_pause_en = 0;
+
+ }
+
+ do {
+ reg_addr = SWCORE_BASE + PORT_PAUSE_SETTINGS_OFFSET + JL_PORT_P2M(port) * 1;
+ preg_val = (jl_uint8 *)&port_pause_set_val[0];
+
+ ret = jl_apb_reg_burst_read(reg_addr, &port_pause_set_val[0], 1);
+ if (ret)
+ return ret;
+
+ jl_write_bits(preg_val, (jl_uint64)enable, 0, 1);
+
+ ret = jl_apb_reg_burst_write(reg_addr, &port_pause_set_val[0], 1);
+ if (ret)
+ return ret;
+ } while (0);
+
+ do {
+ reg_addr = ETHMAC0_BASE + ETHMAC0_BLOCK_SIZE * JL_PORT_P2M(port) + CTRL_MODER_OFFSET;
+ preg_val = (jl_uint8 *)&ctrl_moder_val[0];
+
+ ret = jl_apb_reg_burst_read(reg_addr, &ctrl_moder_val[0], 1);
+ if (ret)
+ return ret;
+
+ jl_write_bits(preg_val, rx_flow, 1, 1);
+ jl_write_bits(preg_val, tx_flow, 2, 1);
+
+ ret = jl_apb_reg_burst_write(reg_addr, &ctrl_moder_val[0], 1);
+ if (ret)
+ return ret;
+ } while (0);
+
+ do {
+ reg_addr = ETHMAC0_BASE + ETHMAC0_BLOCK_SIZE * JL_PORT_P2M(port) + TXPAUSE_FRAME_CONTROL_OFFSET;
+ preg_val = (jl_uint8 *)&tx_pause_frm_ctrl_val[0];
+
+ ret = jl_apb_reg_burst_read(reg_addr, &tx_pause_frm_ctrl_val[0], 1);
+ if (ret)
+ return ret;
+
+ jl_write_bits(preg_val, tx_pause_en, 17, 1);
+
+ ret = jl_apb_reg_burst_write(reg_addr, &tx_pause_frm_ctrl_val[0], 1);
+ if (ret)
+ return ret;
+ } while (0);
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_port_fc_enable_get(jl_port_t port, jl_enable_t *penable)
+{
+ jl_ret_t ret = JL_ERR_OK;
+ jl_uint32 port_pause_set_val = 0;
+ jl_uint32 reg_addr = 0;
+
+ reg_addr = SWCORE_BASE + PORT_PAUSE_SETTINGS_OFFSET + JL_PORT_P2M(port) * 1;
+ ret = jl_apb_reg_read(reg_addr, &port_pause_set_val);
+ if (ret)
+ return ret;
+
+ *penable = port_pause_set_val & 0x1;
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_port_fc_threshold_set(jl_port_t port,
+ jl_uint32 threshold_on, jl_uint32 threshold_off)
+{
+ jl_ret_t ret = JL_ERR_OK;
+ jl_uint64 cells = 0;
+ jl_uint32 port_xon_ffa_thresold_val[1] = {0};
+ jl_uint32 port_xoff_ffa_threshold_val[1] = {0};
+ jl_uint32 reg_addr = 0;
+ jl_uint8 *preg_val = NULL;
+
+ if (threshold_on >= threshold_off)
+ return JL_ERR_PARAM;
+
+ do {
+ reg_addr = SWCORE_BASE + PORT_XON_FFA_THRESHOLD_OFFSET + JL_PORT_P2M(port) * 1;
+ preg_val = (jl_uint8 *)&port_xon_ffa_thresold_val[0];
+
+ ret = jl_apb_reg_burst_read(reg_addr, &port_xon_ffa_thresold_val[0], 1);
+ if (ret)
+ return ret;
+
+ cells = threshold_on;
+ jl_write_bits(preg_val, cells, 0, 10);
+
+ ret = jl_apb_reg_burst_write(reg_addr, &port_xon_ffa_thresold_val[0], 1);
+ if (ret)
+ return ret;
+ } while (0);
+
+ do {
+ reg_addr = SWCORE_BASE + PORT_XOFF_FFA_THRESHOLD_OFFSET + JL_PORT_P2M(port) * 1;
+ preg_val = (jl_uint8 *)&port_xoff_ffa_threshold_val[0];
+
+ ret = jl_apb_reg_burst_read(reg_addr, &port_xoff_ffa_threshold_val[0], 1);
+ if (ret)
+ return ret;
+
+ cells = threshold_off;
+ jl_write_bits(preg_val, cells, 0, 10);
+
+ ret = jl_apb_reg_burst_write(reg_addr, &port_xoff_ffa_threshold_val[0], 1);
+ if (ret)
+ return ret;
+ } while (0);
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_port_fc_threshold_get(jl_port_t port,
+ jl_uint32 *pthreshold_on, jl_uint32 *pthreshold_off)
+{
+ jl_ret_t ret = JL_ERR_OK;
+ jl_uint64 cells = 0;
+ jl_uint32 port_xon_ffa_thresold_val[1] = {0};
+ jl_uint32 port_xoff_ffa_threshold_val[1] = {0};
+ jl_uint32 reg_addr = 0;
+ jl_uint8 *preg_val = NULL;
+
+ reg_addr = SWCORE_BASE + PORT_XON_FFA_THRESHOLD_OFFSET + JL_PORT_P2M(port) * 1;
+ preg_val = (jl_uint8 *)&port_xon_ffa_thresold_val[0];
+
+ ret = jl_apb_reg_burst_read(reg_addr, &port_xon_ffa_thresold_val[0], 1);
+ if (ret)
+ return ret;
+
+ jl_read_bits(preg_val, &cells, 0, 10);
+ *pthreshold_on = cells;
+
+ reg_addr = SWCORE_BASE + PORT_XOFF_FFA_THRESHOLD_OFFSET + JL_PORT_P2M(port) * 1;
+ preg_val = (jl_uint8 *)&port_xoff_ffa_threshold_val[0];
+
+ ret = jl_apb_reg_burst_read(reg_addr, &port_xoff_ffa_threshold_val[0], 1);
+ if (ret)
+ return ret;
+
+ jl_read_bits(preg_val, &cells, 0, 10);
+ *pthreshold_off = cells;
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_port_fc_pause_time_set(jl_port_t port, jl_uint32 pause_time)
+{
+ jl_ret_t ret = JL_ERR_OK;
+ jl_uint64 tx_pause_tv;
+ jl_uint32 tx_pause_frm_ctrl_val[1] = {0};
+ jl_uint32 reg_addr = 0;
+ jl_uint8 *preg_val = NULL;
+
+ if (pause_time > 0xffff)
+ return JL_ERR_PARAM;
+
+ reg_addr = ETHMAC0_BASE + ETHMAC0_BLOCK_SIZE * JL_PORT_P2M(port) + TXPAUSE_FRAME_CONTROL_OFFSET;
+ preg_val = (jl_uint8 *)&tx_pause_frm_ctrl_val[0];
+
+ ret = jl_apb_reg_burst_read(reg_addr, &tx_pause_frm_ctrl_val[0], 1);
+ if (ret)
+ return ret;
+
+ tx_pause_tv = pause_time;
+ jl_write_bits(preg_val, tx_pause_tv, 0, 16);
+
+ ret = jl_apb_reg_burst_write(reg_addr, &tx_pause_frm_ctrl_val[0], 1);
+ if (ret)
+ return ret;
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_port_fc_pause_time_get(jl_port_t port, jl_uint32 *ppause_time)
+{
+ jl_ret_t ret = JL_ERR_OK;
+ jl_uint64 tx_pause_tv;
+ jl_uint32 tx_pause_frm_ctrl_val[1] = {0};
+ jl_uint32 reg_addr = 0;
+ jl_uint8 *preg_val = NULL;
+
+ reg_addr = ETHMAC0_BASE + ETHMAC0_BLOCK_SIZE * JL_PORT_P2M(port) + TXPAUSE_FRAME_CONTROL_OFFSET;
+ preg_val = (jl_uint8 *)&tx_pause_frm_ctrl_val[0];
+
+ ret = jl_apb_reg_burst_read(reg_addr, &tx_pause_frm_ctrl_val[0], 1);
+ if (ret)
+ return ret;
+
+ jl_read_bits(preg_val, &tx_pause_tv, 0, 16);
+ *ppause_time = tx_pause_tv;
+
+ return JL_ERR_OK;
+}
+
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/jl51xx/jl51xx_drv_l2.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/jl51xx/jl51xx_drv_l2.c
new file mode 100644
index 0000000..b17bc8b
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/jl51xx/jl51xx_drv_l2.c
@@ -0,0 +1,1102 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+
+#ifdef __KERNEL__
+#include <linux/math64.h>
+#endif
+#include "jl_base.h"
+#include "vlan.h"
+#include "driver/jl_reg_io.h"
+#include "jl51xx/jl51xx_drv_l2.h"
+#include "jl51xx/jl51xx_drv_vlan.h"
+
+static inline jl_uint32 __l2_hash(jl_l2_fib_key_t *pkey)
+{
+ jl_uint64 k;
+ jl_uint8 i;
+ jl_uint32 hashval = 0; /* size: 52(48 + 4) bits */
+ jl_uint64 hash_size = 9;
+ jl_uint64 mask_hash = 0x1FF; /* 9 bits */
+ jl_uint8 rounds = 5; /* math.floor(52 / 9) */
+
+ k = (jl_uint64)(pkey->fid & 0xf) << 48;
+ k |= pkey->mac_addr.val & JL_L2_MAC_MASK;
+
+ hashval = (jl_uint32)k; /* size: 52(48 + 4) bits */
+
+ for (i = 0; i < rounds; i++) {
+ hashval = hashval & mask_hash;
+ k >>= hash_size;
+ hashval ^= k;
+ }
+
+ return hashval & mask_hash;
+}
+
+static inline jl_ret_t __l2_fib_key_check(jl_l2_fib_key_t *pkey)
+{
+ if (!pkey || pkey->fid > VLAN_IDX_MAX)
+ return JL_ERR_PARAM;
+
+ if (!pkey->is_collision && pkey->entry_index >= JL_L2_LOOKUP_TABLE_SIZE)
+ return JL_ERR_PARAM;
+
+ if (pkey->is_collision && pkey->entry_index >= JL_L2_COLLISION_TABLE_SIZE)
+ return JL_ERR_PARAM;
+
+ return JL_ERR_OK;
+}
+
+static inline jl_uint32 __l2_fib_hash_index(jl_uint32 hash, jl_uint32 entry)
+{
+ return hash | (entry << 9);
+}
+
+static inline jl_bool __l2_fib_key_match(jl_l2_fib_key_t *a, jl_l2_fib_key_t *b)
+{
+ if (a == NULL || b == NULL)
+ return FALSE;
+
+ if (a->mac_addr.val != b->mac_addr.val)
+ return FALSE;
+
+ if (a->fid != b->fid)
+ return FALSE;
+
+ return TRUE;
+}
+
+static inline jl_uint32 __l2_fib_key_index(jl_l2_fib_key_t *pkey)
+{
+ if (pkey->is_collision) {
+ return pkey->entry_index;
+ } else {
+ jl_uint32 hash_index = __l2_hash(pkey);
+
+ return __l2_fib_hash_index(hash_index, pkey->entry_index);
+ }
+}
+
+static inline jl_ret_t __l2_fib_dest_check(jl_l2_fib_dest_config_t *pdest_cfg)
+{
+ if (!pdest_cfg || pdest_cfg->is_unicast >= JL_ENABLE_END ||
+ pdest_cfg->pkt_drop >= JL_ENABLE_END || pdest_cfg->port > 0x3F)
+ return JL_ERR_PARAM;
+ return JL_ERR_OK;
+}
+
+static inline jl_ret_t __l2_fib_aging_check(jl_l2_fib_aging_config_t *paging)
+{
+ if (!paging || paging->is_valid >= JL_ENABLE_END ||
+ paging->is_static >= JL_ENABLE_END)
+ return JL_ERR_PARAM;
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_l2_aging_table_get(jl_uint32 index, jl_l2_fib_aging_config_t *paging_cfg)
+{
+ jl_ret_t ret;
+ reg_addr_t regaddr;
+ jl_uint32 regval;
+
+ if (index >= L2_AGING_TABLE_NUM)
+ return JL_ERR_PARAM;
+ regaddr = SWCORE_L2_REG_ENTRY_ADDR(L2_AGING_TABLE_OFFSET, index, 1);
+
+ ret = jl_apb_reg_read(regaddr, ®val);
+
+ paging_cfg->is_static = (regval & BIT(1)) ? 1 : 0;
+ paging_cfg->is_valid = regval & BIT(0);
+
+ return ret;
+}
+
+jl_ret_t jl51xx_l2_fib_aging_table_set(jl_uint32 index, jl_l2_fib_aging_config_t *paging_cfg)
+{
+ jl_ret_t ret;
+ reg_addr_t regaddr;
+ jl_uint32 regval;
+
+ if (index >= L2_AGING_TABLE_NUM)
+ return JL_ERR_PARAM;
+
+ regaddr = SWCORE_L2_REG_ENTRY_ADDR(L2_AGING_TABLE_OFFSET, index, 1);
+
+ ret = jl_apb_reg_read(regaddr, ®val);
+ if (ret)
+ return ret;
+ /* always setup hit with 1 to prevent new itme be aged */
+ regval |= BIT(2);
+ if (paging_cfg->is_valid == 1)
+ SET_BIT(regval, 0);
+ else
+ CLR_BIT(regval, 0);
+
+ if (paging_cfg->is_static == 1)
+ SET_BIT(regval, 1);
+ else
+ CLR_BIT(regval, 1);
+
+ ret = jl_apb_reg_write(regaddr, regval);
+
+ return ret;
+}
+
+jl_ret_t jl51xx_l2_fib_aging_sha_table_set(jl_uint32 index, jl_l2_fib_aging_config_t *paging_cfg)
+{
+ jl_ret_t ret;
+ reg_addr_t regaddr;
+ jl_uint32 regval;
+
+ if (index >= L2_AGING_STATUS_SHADOW_TABLE_NUM)
+ return JL_ERR_PARAM;
+
+ regaddr = SWCORE_L2_REG_ENTRY_ADDR(
+ L2_AGING_STATUS_SHADOW_TABLE_OFFSET, index, 1);
+
+ ret = jl_apb_reg_read(regaddr, ®val);
+ if (ret)
+ return ret;
+
+ if (paging_cfg->is_valid == 1)
+ SET_BIT(regval, 0);
+ else
+ CLR_BIT(regval, 0);
+
+ ret = jl_apb_reg_write(regaddr, regval);
+
+ return ret;
+}
+
+jl_ret_t jl51xx_l2_col_aging_table_get(jl_uint32 index, jl_l2_fib_aging_config_t *paging_cfg)
+{
+ jl_ret_t ret;
+ reg_addr_t regaddr;
+ jl_uint32 regval;
+
+ if (index >= L2_AGING_COLLISION_TABLE_NUM)
+ return JL_ERR_PARAM;
+
+ regaddr = SWCORE_L2_REG_ENTRY_ADDR(L2_AGING_COLLISION_TABLE_OFFSET, index, 1);
+
+ ret = jl_apb_reg_read(regaddr, ®val);
+
+ paging_cfg->is_static = (regval & BIT(1)) ? 1 : 0;
+ paging_cfg->is_valid = regval & BIT(0);
+ return ret;
+}
+
+jl_ret_t jl51xx_l2_fib_col_aging_table_set(jl_uint32 index, jl_l2_fib_aging_config_t *paging_cfg)
+{
+ jl_ret_t ret;
+ reg_addr_t regaddr;
+ jl_uint32 regval;
+
+ if (index >= L2_AGING_COLLISION_TABLE_NUM)
+ return JL_ERR_PARAM;
+
+ regaddr = SWCORE_L2_REG_ENTRY_ADDR(L2_AGING_COLLISION_TABLE_OFFSET, index, 1);
+
+ ret = jl_apb_reg_read(regaddr, ®val);
+ if (ret)
+ return ret;
+ /* always setup hit with 1 to prevent new itme be aged */
+ regval |= BIT(2);
+ if (paging_cfg->is_valid == 1)
+ SET_BIT(regval, 0);
+ else
+ CLR_BIT(regval, 0);
+
+ if (paging_cfg->is_static == 1)
+ SET_BIT(regval, 1);
+ else
+ CLR_BIT(regval, 1);
+
+ ret = jl_apb_reg_write(regaddr, regval);
+
+ return ret;
+}
+
+jl_ret_t jl51xx_l2_fib_col_aging_sha_table_set(jl_uint32 index, jl_l2_fib_aging_config_t *paging_cfg)
+{
+ jl_ret_t ret;
+ reg_addr_t regaddr;
+ jl_uint32 regval;
+
+ if (index >= L2_AGING_COLLISION_SHADOW_TABLE_NUM)
+ return JL_ERR_PARAM;
+ regaddr = SWCORE_L2_REG_ENTRY_ADDR(L2_AGING_COLLISION_SHADOW_TABLE_OFFSET, index, 1);
+
+ ret = jl_apb_reg_read(regaddr, ®val);
+ if (ret)
+ return ret;
+ /* always setup hit with 1 to prevent new itme be aged */
+ regval |= BIT(2);
+ if (paging_cfg->is_valid == 1)
+ SET_BIT(regval, 0);
+ else
+ CLR_BIT(regval, 0);
+
+ if (paging_cfg->is_static == 1)
+ SET_BIT(regval, 1);
+ else
+ CLR_BIT(regval, 1);
+
+ ret = jl_apb_reg_write(regaddr, regval);
+
+ return ret;
+}
+
+jl_ret_t jl51xx_l2_mc_port_mask_get(jl_uint32 index, jl_uint32 *pregval)
+{
+ jl_ret_t ret;
+ jl_uint32 phy_mask;
+ jl_uint32 mac_mask;
+ reg_addr_t regaddr;
+
+ if (index >= L2_MULTICAST_TABLE_NUM)
+ return JL_ERR_OUT_OF_RANGE;
+
+ regaddr = SWCORE_L2_REG_ENTRY_ADDR(L2_MULTICAST_TABLE_OFFSET, index, 1);
+
+ ret = jl_apb_reg_read(regaddr, &mac_mask);
+
+ phy_mask = JL_PORTMASK_M2P(mac_mask);
+
+ *pregval = phy_mask;
+
+ return ret;
+}
+
+jl_ret_t jl51xx_l2_mc_port_mask_set(jl_uint32 index, jl_uint32 regval)
+{
+ jl_ret_t ret;
+ reg_addr_t regaddr;
+ jl_uint32 val;
+ jl_uint32 mac_mask;
+
+ if (index >= L2_MULTICAST_TABLE_NUM)
+ return JL_ERR_OUT_OF_RANGE;
+
+ if (regval >= BIT(10))
+ return JL_ERR_PARAM;
+
+ regaddr = SWCORE_L2_REG_ENTRY_ADDR(L2_MULTICAST_TABLE_OFFSET, index, 1);
+
+ ret = jl_apb_reg_read(regaddr, &val);
+ if (ret)
+ return ret;
+
+ mac_mask = JL_PORTMASK_P2M(regval);
+
+ WRITE_BITS(val, 0, 9, mac_mask);
+
+ ret = jl_apb_reg_write(regaddr, val);
+
+ return ret;
+}
+
+jl_ret_t jl51xx_l2_mc_port_learning_set(jl_port_t port, jl_enable_t en_learning)
+{
+ jl_ret_t ret;
+ jl_uint64 default_learning;
+ jl_uint32 src_port_tab_val[2];
+ jl_uint32 reg_addr = SWCORE_BASE + SOURCE_PORT_TABLE_OFFSET + JL_PORT_P2M(port) * 2;
+ jl_uint8 *preg_val = (jl_uint8 *)&src_port_tab_val[0];
+
+ ret = jl_apb_reg_burst_read(reg_addr, &src_port_tab_val[0], 2);
+ if (ret)
+ return ret;
+
+ default_learning = en_learning;
+ jl_write_bits(preg_val, default_learning, 34, 1);
+
+ ret = jl_apb_reg_burst_write(reg_addr, &src_port_tab_val[0], 2);
+ if (ret)
+ return ret;
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_l2_mc_port_learning_get(jl_port_t port, jl_enable_t *pen_learning)
+{
+ jl_ret_t ret;
+ jl_uint64 default_learning;
+ jl_uint32 src_port_tab_val[2];
+ jl_uint32 reg_addr = SWCORE_BASE + SOURCE_PORT_TABLE_OFFSET + JL_PORT_P2M(port) * 2;
+ jl_uint8 *preg_val = (jl_uint8 *)&src_port_tab_val[0];
+
+ ret = jl_apb_reg_burst_read(reg_addr, &src_port_tab_val[0], 2);
+ if (ret)
+ return ret;
+
+ jl_read_bits(preg_val, &default_learning, 34, 1);
+ *pen_learning = default_learning;
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_l2_coltable_get(jl_uint32 index, jl_l2_fib_key_t *pkey)
+{
+ jl_ret_t ret;
+ reg_addr_t regaddr;
+ jl_uint8 *ptr;
+ jl_uint32 buf[2] = {0};
+ jl_uint64 gid, mac;
+
+ if (index >= L2_LOOKUP_COLLISION_TABLE_NUM)
+ return JL_ERR_OUT_OF_RANGE;
+
+ regaddr = SWCORE_L2_REG_ENTRY_ADDR(L2_LOOKUP_COLLISION_TABLE_OFFSET, index, 2);
+
+ ret = jl_apb_reg_burst_read(regaddr, &buf[0], 2);
+ if (ret)
+ return ret;
+ ptr = (jl_uint8 *)&buf[0];
+
+ jl_read_bits(ptr, &mac, 0, 48);
+ jl_read_bits(ptr, &gid, 48, 4);
+
+ pkey->mac_addr.val = mac;
+ pkey->fid = (jl_uint8)gid;
+
+ return ret;
+}
+
+jl_ret_t jl51xx_l2_coltable_set(jl_uint32 index, jl_l2_fib_key_t *pkey)
+{
+ jl_ret_t ret;
+ reg_addr_t regaddr;
+ jl_uint8 *ptr;
+ jl_uint32 buf[2];
+ jl_uint64 gid, mac_addr;
+
+ if (index >= L2_LOOKUP_COLLISION_TABLE_NUM)
+ return JL_ERR_OUT_OF_RANGE;
+
+ regaddr = SWCORE_L2_REG_ENTRY_ADDR(L2_LOOKUP_COLLISION_TABLE_OFFSET, index, 2);
+
+ ret = jl_apb_reg_burst_read(regaddr, &buf[0], 2);
+ if (ret)
+ return ret;
+
+ ptr = (jl_uint8 *)&buf[0];
+ gid = pkey->fid & VLAN_IDX_MAX;
+ mac_addr = pkey->mac_addr.val;
+
+ jl_write_bits(ptr, mac_addr, 0, 48);
+ jl_write_bits(ptr, gid, 48, 4);
+
+ ret = jl_apb_reg_burst_write(regaddr, &buf[0], 2);
+ if (ret)
+ return ret;
+
+ return ret;
+}
+
+jl_ret_t jl51xx_l2_hashtable_get(jl_uint32 index, jl_l2_fib_key_t *pkey)
+{
+ jl_ret_t ret;
+ reg_addr_t regaddr;
+ jl_uint8 *ptr;
+ jl_uint32 buf[2] = {0};
+ jl_uint64 gid, mac;
+
+ if (index >= L2_DA_HASH_LOOKUP_TABLE_NUM)
+ return JL_ERR_OUT_OF_RANGE;
+
+ regaddr = SWCORE_L2_REG_ENTRY_ADDR(L2_DA_HASH_LOOKUP_TABLE_OFFSET, index, 2);
+ ret = jl_apb_reg_burst_read(regaddr, buf, 2);
+
+ ptr = (jl_uint8 *)&buf[0];
+
+ jl_read_bits(ptr, &mac, 0, 48);
+ jl_read_bits(ptr, &gid, 48, 4);
+
+ pkey->mac_addr.val = mac;
+ pkey->fid = (jl_uint8)gid & VLAN_IDX_MAX;
+
+ return ret;
+}
+
+jl_ret_t jl51xx_l2_hashtable_set(jl_uint32 index, jl_l2_fib_key_t *pkey)
+{
+ jl_ret_t ret;
+ reg_addr_t regaddr;
+ jl_uint8 *ptr;
+ jl_uint32 buf[2];
+ jl_uint64 gid, mac_addr;
+
+ if (index >= L2_DA_HASH_LOOKUP_TABLE_NUM)
+ return JL_ERR_OUT_OF_RANGE;
+
+ regaddr = SWCORE_L2_REG_ENTRY_ADDR(L2_DA_HASH_LOOKUP_TABLE_OFFSET, index, 2);
+ ret = jl_apb_reg_burst_read(regaddr, &buf[0], 2);
+ if (ret)
+ return ret;
+
+ ptr = (jl_uint8 *)&buf[0];
+ gid = pkey->fid & VLAN_IDX_MAX;
+ mac_addr = pkey->mac_addr.val;
+
+ jl_write_bits(ptr, mac_addr, 0, 48);
+ jl_write_bits(ptr, gid, 48, 4);
+
+ ret = jl_apb_reg_burst_write(regaddr, &buf[0], 2);
+ if (ret)
+ return ret;
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_l2_dest_set(jl_uint32 index, jl_l2_fib_dest_config_t *pdest_cfg)
+{
+ jl_ret_t ret;
+ reg_addr_t regaddr;
+ jl_uint32 regval;
+ jl_uint8 *ptr;
+ jl_uint64 uc, port, drop;
+
+ if (index >= L2_DESTINATION_TABLE_NUM)
+ return JL_ERR_OUT_OF_RANGE;
+
+ regaddr = SWCORE_L2_REG_ENTRY_ADDR(L2_DESTINATION_TABLE_OFFSET, index, 1);
+ ret = jl_apb_reg_read(regaddr, ®val);
+ if (ret)
+ return ret;
+
+ ptr = (jl_uint8 *)®val;
+ uc = pdest_cfg->is_unicast;
+ port = JL_PORT_P2M(pdest_cfg->port);
+ drop = pdest_cfg->pkt_drop;
+ jl_write_bits(ptr, uc, 0, 1);
+ jl_write_bits(ptr, port, 1, 6);
+ jl_write_bits(ptr, drop, 7, 1);
+
+ ret = jl_apb_reg_write(regaddr, regval);
+
+ return ret;
+}
+
+jl_ret_t jl51xx_l2_fib_dest_get(jl_uint32 index, jl_l2_fib_dest_config_t *pdest_cfg)
+{
+ jl_ret_t ret;
+ reg_addr_t regaddr;
+ jl_uint32 regval;
+
+ if (index >= L2_DESTINATION_TABLE_NUM)
+ return JL_ERR_OUT_OF_RANGE;
+
+ regaddr = SWCORE_L2_REG_ENTRY_ADDR(L2_DESTINATION_TABLE_OFFSET, index, 1);
+ ret = jl_apb_reg_read(regaddr, ®val);
+ if (ret)
+ return ret;
+
+ pdest_cfg->is_unicast = regval & BIT(0);
+ pdest_cfg->port = JL_PORT_M2P((regval >> 1) & 0x3F);
+ pdest_cfg->pkt_drop = (regval & BIT(7)) ? 1 : 0;
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_l2_tick_configuration_get(jl_uint16 *pdiv, jl_uint8 *pstep)
+{
+ jl_ret_t ret;
+ reg_addr_t regaddr;
+ jl_uint32 regval;
+
+ regaddr = SWCORE_L2_REG_ADDR(TICK_CONFIGURATION_OFFSET);
+
+ ret = jl_apb_reg_read(regaddr, ®val);
+ if (ret)
+ return ret;
+ *pdiv = regval & 0x3FFF;
+ *pstep = (regval >> 14) & 0x0F;
+
+ return JL_ERR_OK;
+}
+
+static jl_ret_t jl51xx_l2_time_to_age_set(jl_uint8 tick, jl_uint32 tick_cnt)
+{
+ jl_ret_t ret;
+ reg_addr_t regaddr;
+ jl_uint8 *ptr;
+ jl_uint32 buf[2];
+ jl_uint64 tickcnt, tickindex;
+
+ if (tick > 0x07) // 3bit
+ return JL_ERR_PARAM;
+
+ regaddr = SWCORE_L2_REG_ADDR(TIME_TO_AGE_OFFSET);
+ ptr = (jl_uint8 *)&buf[0];
+ ret = jl_apb_reg_burst_read(regaddr, &buf[0], 2);
+ if (ret)
+ return ret;
+
+ tickcnt = tick_cnt;
+ tickindex = tick;
+ jl_write_bits(ptr, tickcnt, 0, 32);
+ jl_write_bits(ptr, tickindex, 32, 3);
+ ret = jl_apb_reg_burst_write(regaddr, &buf[0], 2);
+ if (ret)
+ return ret;
+
+ return ret;
+}
+
+jl_ret_t jl51xx_l2_time_to_age_get(jl_uint8 *ptick, jl_uint32 *ptick_cnt)
+{
+ jl_ret_t ret;
+ reg_addr_t regaddr;
+ jl_uint32 buf[2] = {0};
+
+ regaddr = SWCORE_L2_REG_ADDR(TIME_TO_AGE_OFFSET);
+
+ ret = jl_apb_reg_burst_read(regaddr, buf, 2);
+ if (ret)
+ return ret;
+
+ *ptick = buf[1] & 0x7;
+ *ptick_cnt = buf[0];
+
+ return JL_ERR_OK;
+}
+
+static jl_ret_t _jl_l2_fib_aging_set(CONST_T jl_uint32 index, jl_l2_fib_aging_config_t *cfg)
+{
+ jl_ret_t ret;
+
+ ret = __l2_fib_aging_check(cfg);
+ if (ret)
+ return ret;
+
+ if ((ret = jl51xx_l2_fib_aging_table_set(index, cfg)) != JL_ERR_OK)
+ return ret;
+
+ if ((ret = jl51xx_l2_fib_aging_sha_table_set(index, cfg)) != JL_ERR_OK)
+ return ret;
+ return JL_ERR_OK;
+}
+
+static jl_ret_t _jl_l2_fib_col_aging_set(CONST_T jl_uint32 index, jl_l2_fib_aging_config_t *cfg)
+{
+ jl_ret_t ret;
+
+ ret = __l2_fib_aging_check(cfg);
+ if (ret)
+ return ret;
+
+ if ((ret = jl51xx_l2_fib_col_aging_table_set(index, cfg)) != JL_ERR_OK)
+ return ret;
+ if ((ret = jl51xx_l2_fib_col_aging_sha_table_set(index, cfg)) != JL_ERR_OK)
+ return ret;
+ return JL_ERR_OK;
+}
+
+static jl_ret_t _jl_l2_fib_dest_set(CONST_T jl_uint32 index, jl_l2_fib_dest_config_t *cfg)
+{
+ jl_ret_t ret;
+
+ ret = __l2_fib_dest_check(cfg);
+ if (ret)
+ return ret;
+
+ return jl51xx_l2_dest_set(index, cfg);
+}
+
+static jl_ret_t _l2_fib_dest_get(jl_uint32 index, jl_l2_fib_dest_config_t *pdest)
+{
+ return jl51xx_l2_fib_dest_get(index, pdest);
+
+}
+
+static jl_ret_t _jl_l2_fib_col_dest_set(CONST_T jl_uint32 index, jl_l2_fib_dest_config_t *cfg)
+{
+ return _jl_l2_fib_dest_set(
+ index + JL_L2_COL_DA_OFFSET,
+ cfg);
+}
+
+static jl_ret_t _l2_fib_col_dest_get(CONST_T jl_uint32 index, jl_l2_fib_dest_config_t *cfg)
+{
+ return jl51xx_l2_fib_dest_get(
+ index + JL_L2_COL_DA_OFFSET,
+ cfg);
+}
+
+jl_ret_t jl51xx_l2_aging_time_set(jl_uint32 time, jl_uint8 unit)
+{
+ jl_ret_t ret;
+ jl_uint32 period_ns = 160; /* 1 / core_freq(6.25M) */
+ jl_uint64 max_tick_cnt = 0xFFFFFFFF; /* 2^32 - 1 */
+ jl_uint8 max_tick_index = 4;
+ jl_uint64 t_ns = time * 2 / 3;
+ jl_uint16 div;
+ jl_uint8 step;
+ jl_uint64 tick0_period;
+ jl_uint64 aim_tick_cnt;
+ jl_uint8 tick_index;
+
+ if (unit >= L2_AGING_END)
+ return JL_ERR_PARAM;
+
+ switch (unit) {
+ case L2_AGING_S:
+ t_ns *= 1000;
+ /* fallthrough */
+ case L2_AGING_MS:
+ t_ns *= 1000;
+ /* fallthrough */
+ case L2_AGING_US:
+ t_ns *= 1000;
+ /* fallthrough */
+ case L2_AGING_NS:
+ break;
+ }
+
+ if ((ret = jl51xx_l2_tick_configuration_get(
+ &div, &step)) != JL_ERR_OK)
+ return ret;
+
+ tick0_period = period_ns * div;
+ #ifdef __KERNEL__
+ aim_tick_cnt = div_u64(t_ns, tick0_period);
+ #else
+ aim_tick_cnt = t_ns / tick0_period;
+ #endif
+
+ tick_index = 0;
+ while (aim_tick_cnt > max_tick_cnt) {
+ #ifdef __KERNEL__
+ aim_tick_cnt = div_u64(aim_tick_cnt, step);
+ #else
+ aim_tick_cnt /= step;
+ #endif
+
+ tick_index += 1;
+
+ if (tick_index >= max_tick_index) {
+ break;
+ }
+ }
+
+ /* Set the minimum aging time to 1us when input time is not zero */
+ if (time != 0 && tick_index == 0 && aim_tick_cnt == 0)
+ aim_tick_cnt = 1;
+
+ return jl51xx_l2_time_to_age_set(
+ tick_index,
+ (jl_uint32)aim_tick_cnt);
+}
+
+jl_ret_t jl51xx_l2_aging_time_get(jl_uint32 *ptime, jl_uint8 *punit)
+{
+ jl_ret_t ret;
+ jl_uint32 period_ns = 160; /* 1 / core_freq(6.25M) */
+ //jl_uint64 max_tick_cnt = 0xFFFFFFFF; /* 2^32 - 1 */
+ jl_uint8 max_tick_index = 4;
+ jl_uint64 t_ns = 0;
+ jl_uint16 div;
+ jl_uint8 step;
+ jl_uint64 tick0_period;
+ jl_uint32 cur_tick_cnt;
+ jl_uint8 cur_tick_index;
+ jl_uint64 tick_cnt = 0;
+
+ if ((ret = jl51xx_l2_tick_configuration_get(&div, &step)) != JL_ERR_OK)
+ return ret;
+
+ tick0_period = period_ns * div;
+
+ ret = jl51xx_l2_time_to_age_get(
+ &cur_tick_index,
+ &cur_tick_cnt);
+ if (ret)
+ return ret;
+
+ if (cur_tick_index >= max_tick_index)
+ return JL_ERR_PARAM;
+
+ tick_cnt = cur_tick_cnt;
+#ifdef __KERNEL__
+ tick_cnt = div_u64(tick_cnt * 3, 2);
+#else
+ tick_cnt = tick_cnt * 3 / 2;
+#endif
+ while (cur_tick_index > 0) {
+ tick_cnt = tick_cnt * step;
+ cur_tick_index --;
+ }
+
+ t_ns = tick_cnt * tick0_period;
+
+ if (t_ns < 1000)
+ *punit = L2_AGING_NS;
+ else if (t_ns < 1000000) {
+ #ifdef __KERNEL__
+ t_ns = div_u64(t_ns, 1000);
+ #else
+ t_ns /= 1000;
+ #endif
+ *punit = L2_AGING_US;
+ } else if (t_ns < 1000000000) {
+ #ifdef __KERNEL__
+ t_ns = div_u64(t_ns, 1000000);
+ #else
+ t_ns /= 1000000;
+ #endif
+ *punit = L2_AGING_MS;
+ } else {
+ #ifdef __KERNEL__
+ t_ns = div_u64(t_ns, 1000000000);
+ #else
+ t_ns /= 1000000000;
+ #endif
+ *punit = L2_AGING_S;
+ }
+
+ *ptime = (jl_uint32)t_ns;
+ return JL_ERR_OK;
+}
+
+jl_ret_t _l2_fib_config_set(jl_l2_fib_key_t *pkey, jl_l2_fib_config_t *cfg)
+{
+ jl_ret_t ret;
+ jl_uint32 index;
+ jl_enable_t cur_aging, cur_learning;
+
+ index = pkey->entry_index;
+
+ if ((ret = jl51xx_l2_aging_learning_get(&cur_aging,
+ &cur_learning)) != JL_ERR_OK)
+ return ret;
+
+ if ((ret = jl51xx_l2_aging_learning_set(0, 0)) != JL_ERR_OK)
+ return ret;
+
+ if (pkey->is_collision) {
+ //set collision hash table
+ //set collision aging table
+ //set collision dest table +2048
+
+ if ((ret = jl51xx_l2_coltable_set(index, pkey)) != JL_ERR_OK)
+ return ret;
+ if ((ret = _jl_l2_fib_col_aging_set(index, &cfg->aging)) != JL_ERR_OK)
+ return ret;
+ if ((ret = _jl_l2_fib_col_dest_set(index, &cfg->dest)) != JL_ERR_OK)
+ return ret;
+ } else {
+ // set lut hash table
+ // set lut aging table
+ // set dest table+0
+ if ((ret = jl51xx_l2_hashtable_set(index, pkey)) != JL_ERR_OK)
+ return ret;
+ if ((ret = _jl_l2_fib_aging_set(index, &cfg->aging)) != JL_ERR_OK)
+ return ret;
+ if ((ret = _jl_l2_fib_dest_set(index, &cfg->dest)) != JL_ERR_OK)
+ return ret;
+ }
+
+ if ((ret = jl51xx_l2_aging_learning_set(cur_aging, cur_learning)) != JL_ERR_OK)
+ return ret;
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_l2_fib_config_set_auto(jl_l2_fib_key_t *pkey, jl_l2_fib_config_t *cfg)
+{
+ jl_ret_t ret;
+ jl_uint32 hash = 0;
+ jl_uint16 offset = 0;
+ jl_int8 first_invalid = -1;
+ jl_int8 first_match = -1;
+ jl_l2_fib_key_t keys[JL_L2_LOOKUP_MAX_ENTRY];
+ jl_l2_fib_aging_config_t agings[JL_L2_LOOKUP_MAX_ENTRY];
+ jl_l2_fib_key_t *k = NULL;
+ jl_l2_fib_aging_config_t *a = NULL;
+ jl_int8 aim_index = -1;
+ jl_uint8 i;
+
+ if ((ret = __l2_fib_key_check(pkey)) != JL_ERR_OK)
+ return ret;
+
+ hash = __l2_hash(pkey);
+
+ /* load keys from hash-table */
+ for (i = 0; i < JL_L2_LOOKUP_TABLE_BUCKET_NUM; i++) {
+ jl_uint32 index = __l2_fib_hash_index(hash, i);
+
+ ret = jl51xx_l2_hashtable_get(
+ index,
+ &keys[offset]);
+ if (ret)
+ return ret;
+
+ ret = jl51xx_l2_aging_table_get(
+ index,
+ &agings[offset]);
+ if (ret)
+ return ret;
+ offset += 1;
+ }
+
+ /* load keys from col-table */
+ for (i = 0; i < JL_L2_COLLISION_TABLE_ENTRY_NUM; i++) {
+ ret = jl51xx_l2_coltable_get(i, &keys[offset]);
+ if (ret)
+ return ret;
+ ret = jl51xx_l2_col_aging_table_get(
+ i,
+ &agings[offset]);
+ if (ret)
+ return ret;
+ offset += 1;
+ }
+
+ /* find match or invalid slot */
+ for (i = 0; i < JL_L2_LOOKUP_MAX_ENTRY; i++) {
+ k = &keys[i];
+ a = &agings[i];
+ if (!a->is_valid) {
+ if (first_invalid < 0) {
+ first_invalid = i;
+ }
+ /* find next one */
+ continue;
+ }
+
+ if (__l2_fib_key_match(pkey, k)) {
+
+ if (first_match < 0) {
+ first_match = i;
+ }
+ /* break, if found someone match */
+ break;
+ }
+
+ /* do nothing for else */
+ }
+
+ /* check if we don't have site for this key */
+ if (first_match >= 0) {
+ aim_index = first_match;
+ } else if (first_invalid >= 0) {
+ aim_index = first_invalid;
+ } else {
+ return JL_ERR_OUT_OF_RANGE;
+ }
+
+ /* setup key automaticly */
+ if (aim_index < JL_L2_LOOKUP_TABLE_BUCKET_NUM) {
+ pkey->is_collision = FALSE;
+ pkey->entry_index = __l2_fib_hash_index(hash, aim_index);
+ } else {
+ pkey->is_collision = TRUE;
+ pkey->entry_index = aim_index - JL_L2_LOOKUP_TABLE_BUCKET_NUM;
+ }
+
+ ret = _l2_fib_config_set(pkey, cfg);
+ if (ret)
+ return ret;
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_l2_fib_config_get_by_index(jl_uint32 entry_index, jl_l2_fib_key_t *pkey, jl_l2_fib_config_t *pcfg)
+{
+ jl_ret_t ret;
+
+ if (entry_index >= JL_L2_LOOKUP_TABLE_SIZE) {
+ pkey->is_collision = 1;
+ ret = jl51xx_l2_coltable_get(entry_index - JL_L2_LOOKUP_TABLE_SIZE, pkey);
+ if (ret)
+ return ret;
+
+ ret = jl51xx_l2_col_aging_table_get(entry_index - JL_L2_LOOKUP_TABLE_SIZE, &pcfg->aging);
+ if (ret)
+ return ret;
+ } else {
+ pkey->is_collision = 0;
+ ret = jl51xx_l2_hashtable_get(entry_index, pkey);
+ if (ret)
+ return ret;
+
+ ret = jl51xx_l2_aging_table_get(entry_index, &pcfg->aging);
+ if (ret)
+ return ret;
+ }
+
+ pkey->entry_index = entry_index;
+ ret = jl51xx_l2_fib_dest_get(entry_index, &pcfg->dest);
+ if (ret)
+ return ret;
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_l2_fib_config_get(jl_l2_fib_key_t *pkey, jl_l2_fib_config_t *cfg)
+{
+ jl_ret_t ret;
+ jl_uint32 index;
+ jl_l2_fib_key_t tmp_key;
+ jl_l2_fib_aging_config_t tmp_aging;
+ jl_uint32 hash_index;
+ jl_uint8 i = 0;
+ jl_int32 match_idx = -1;
+
+ hash_index = __l2_hash(pkey);
+
+ /* search in 4 way hash lookup table */
+ for (i = 0; i < JL_L2_LOOKUP_TABLE_BUCKET_NUM; i++) {
+ index = __l2_fib_hash_index(hash_index, i);
+ if ((ret = jl51xx_l2_aging_table_get(index, &tmp_aging)) != JL_ERR_OK)
+ return ret;
+
+ /* not valid in hash table, continue... */
+ if (tmp_aging.is_valid != 1)
+ continue;
+
+ if ((ret = jl51xx_l2_hashtable_get(index, &tmp_key)) != JL_ERR_OK)
+ return ret;
+
+ /* mismatch in hash table, continue... */
+ if (!__l2_fib_key_match(pkey, &tmp_key))
+ continue;
+
+ if (match_idx < 0) {
+ match_idx = index;
+ pkey->is_collision = 0;
+ break;
+ }
+ }
+
+ if (match_idx < 0) {
+ for (i = 0; i < JL_L2_COLLISION_TABLE_ENTRY_NUM; i++) {
+
+ if ((ret = jl51xx_l2_col_aging_table_get(i, &tmp_aging)) != JL_ERR_OK)
+ return ret;
+
+ /* not valid in collision table, continue */
+ if (tmp_aging.is_valid != 1)
+ continue;
+
+ if ((ret = jl51xx_l2_coltable_get(i, &tmp_key)) != JL_ERR_OK)
+ return ret;
+
+ /* mismatch in collision table, continue... */
+ if (!__l2_fib_key_match(pkey, &tmp_key))
+ continue;
+
+ if (match_idx < 0) {
+ pkey->is_collision = 1;
+ match_idx = i;
+ break;
+ }
+
+ }
+ }
+
+ if (match_idx < 0) {
+ /* not matched finally */
+ return JL_ERR_NOT_FOUND;
+ }
+
+ pkey->entry_index = match_idx;
+
+ if (pkey->is_collision) {
+ if ((ret = jl51xx_l2_col_aging_table_get(match_idx, &cfg->aging)) != JL_ERR_OK)
+ return ret;
+ if ((ret = _l2_fib_col_dest_get(match_idx, &cfg->dest)) != JL_ERR_OK)
+ return ret;
+ } else {
+ if ((ret = jl51xx_l2_aging_table_get(match_idx, &cfg->aging)) != JL_ERR_OK)
+ return ret;
+ if ((ret = _l2_fib_dest_get(match_idx, &cfg->dest)) != JL_ERR_OK)
+ return ret;
+ }
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_l2_fib_hash_clear(void)
+{
+ jl_ret_t ret;
+ jl_l2_fib_aging_config_t aging = {
+ .is_valid = 0,
+ .is_static = 0,
+ };
+ jl_l2_table_entry_idx_t i;
+
+ for (i = 0; i < JL_L2_LOOKUP_TABLE_SIZE; i++) {
+ ret = _jl_l2_fib_aging_set(i, &aging);
+ if (ret)
+ return ret;
+ }
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_l2_fib_col_clear(void)
+{
+ jl_l2_fib_aging_config_t aging = {
+ .is_valid = 0,
+ .is_static = 0,
+ };
+ jl_l2_table_entry_idx_t i;
+
+ for (i = 0; i < JL_L2_COLLISION_TABLE_SIZE; i++)
+ _jl_l2_fib_col_aging_set(i, &aging);
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_l2_aging_learning_get(jl_enable_t *penable_aging, jl_enable_t *penable_learning)
+{
+ jl_ret_t ret;
+ reg_addr_t regaddr;
+ jl_uint32 regval;
+
+ regaddr = SWCORE_L2_REG_ADDR(LEARNING_AND_AGING_ENABLE_OFFSET);
+
+ ret = jl_apb_reg_read(regaddr, ®val);
+
+ *penable_aging = regval & BIT(1) ? 1 : 0;
+ *penable_learning = regval & BIT(0) ? 1 : 0;
+ return ret;
+}
+
+jl_ret_t jl51xx_l2_aging_learning_set(jl_enable_t enable_aging, jl_enable_t enable_learning)
+{
+ jl_ret_t ret;
+ reg_addr_t regaddr;
+ jl_uint32 regval;
+
+ regaddr = SWCORE_L2_REG_ADDR(LEARNING_AND_AGING_ENABLE_OFFSET);
+
+ ret = jl_apb_reg_read(regaddr, ®val);
+ if (ret)
+ return ret;
+
+ if (enable_aging == 0)
+ CLR_BIT(regval, 1);
+ else
+ SET_BIT(regval, 1);
+
+ if (enable_learning == 0)
+ CLR_BIT(regval, 0);
+ else
+ SET_BIT(regval, 0);
+
+ ret = jl_apb_reg_write(regaddr, regval);
+
+ return ret;
+}
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/jl51xx/jl51xx_drv_led.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/jl51xx/jl51xx_drv_led.c
new file mode 100644
index 0000000..a81049a
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/jl51xx/jl51xx_drv_led.c
@@ -0,0 +1,410 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+
+#include "jl_base.h"
+#include "driver/jl_reg_io.h"
+#include "jl51xx/reg_apb_top.h"
+#include "jl51xx/reg_pinmux.h"
+#include "jl51xx/jl51xx_drv_led.h"
+
+static inline jl_uint8 __led_config_to_mask(jl_led_config_t config)
+{
+ jl_uint8 src_mask = 0;
+
+ switch (config) {
+ case LED_CONFIG_LINK:
+ src_mask = 0x3F;
+ break;
+ case LED_CONFIG_ACT:
+ src_mask = 0xCF;
+ break;
+ case LED_CONFIG_LINK_ACT:
+ src_mask = 0xF;
+ break;
+ case LED_CONFIG_SPD10:
+ src_mask = 0x37;
+ break;
+ case LED_CONFIG_SPD100:
+ src_mask = 0x3B;
+ break;
+ case LED_CONFIG_SPD10_ACT:
+ src_mask = 0x7;
+ break;
+ case LED_CONFIG_SPD100_ACT:
+ src_mask = 0xB;
+ break;
+ case LED_CONFIG_DUPLEX:
+ src_mask = 0x3D;
+ break;
+ case LED_CONFIG_COL:
+ src_mask = 0xFE;
+ break;
+ case LED_CONFIG_LOOP:
+ src_mask = 0xFF;
+ break;
+ default:
+ src_mask= 0;
+ break;
+ }
+ return src_mask;
+}
+
+static inline jl_ret_t __mask_to_led_config(jl_uint8 src_mask, jl_led_config_t *pconfig)
+{
+ jl_ret_t ret = JL_ERR_OK;
+
+ switch (src_mask) {
+ case 0x3F:
+ *pconfig = LED_CONFIG_LINK;
+ break;
+ case 0xCF:
+ *pconfig = LED_CONFIG_ACT;
+ break;
+ case 0xF:
+ *pconfig = LED_CONFIG_LINK_ACT;
+ break;
+ case 0x37:
+ *pconfig = LED_CONFIG_SPD10;
+ break;
+ case 0x3B:
+ *pconfig = LED_CONFIG_SPD100;
+ break;
+ case 0x7:
+ *pconfig = LED_CONFIG_SPD10_ACT;
+ break;
+ case 0xB:
+ *pconfig = LED_CONFIG_SPD100_ACT;
+ break;
+ case 0x3D:
+ *pconfig = LED_CONFIG_DUPLEX;
+ break;
+ case 0xFE:
+ *pconfig = LED_CONFIG_COL;
+ break;
+ case 0xFF:
+ *pconfig = LED_CONFIG_LOOP;
+ break;
+ default:
+ ret = JL_ERR_PARAM;
+ break;
+ }
+ return ret;
+}
+
+jl_ret_t jl51xx_led_enable_get(jl_led_group_t group, jl_portmask_t *portmask)
+{
+ jl_ret_t ret;
+ jl_uint64 pmask;
+ jl_uint32 flip_mask;
+ jl_uint32 reg_addr = 0;
+ jl_uint32 led_cfg[1];
+ jl_uint8 *preg_val = NULL;
+
+ reg_addr = APB_TOP_BASE + LED_CFG_0_OFFSET;
+ preg_val = (jl_uint8 *)&led_cfg[0];
+ ret = jl_apb_reg_read(reg_addr, &led_cfg[0]);
+ if (ret)
+ return ret;
+
+ if (group == LED_GROUP0)
+ jl_read_bits(preg_val, &pmask, 0, 8); //port0-port7
+ else if (group == LED_GROUP1)
+ jl_read_bits(preg_val, &pmask, 8, 8); //port0-port7
+ else
+ return JL_ERR_PARAM;
+
+ flip_mask = (jl_portmask_t)pmask;
+ FLIP_BITS(flip_mask, 0, 7);
+
+ flip_mask = JL_PORTMASK_VP2P(flip_mask);
+
+ *portmask = flip_mask;
+ JL_DBG_MSG(JL_FLAG_LED, _DBG_ON,
+ "%s pmask=0x%llxx, portmask=0x%x, led_cfg=0x%x\n",
+ __func__, pmask, *portmask, led_cfg[0]);
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_led_enable_set(jl_led_group_t group, jl_portmask_t portmask)
+{
+ jl_ret_t ret;
+ jl_uint32 reg_addr = 0;
+ jl_uint64 pmask;
+ jl_uint32 led_cfg[1];
+ jl_uint8 *preg_val = NULL;
+ jl_uint32 flip_pmask = JL_PORTMASK_P2VP(portmask);
+
+ if (portmask >= 0x100) {
+ JL_DBG_MSG(JL_FLAG_LED, _DBG_ON,
+ "only port0-port7 is allowed to enable led\n");
+ return JL_ERR_OK;
+ }
+
+ FLIP_BITS(flip_pmask, 0, 7);
+ pmask = flip_pmask;
+
+ reg_addr = APB_TOP_BASE + LED_CFG_0_OFFSET;
+ preg_val = (jl_uint8 *)&led_cfg[0];
+ ret = jl_apb_reg_read(reg_addr, &led_cfg[0]);
+ if (ret)
+ return ret;
+
+ if (group == LED_GROUP0)
+ jl_write_bits(preg_val, pmask, 0, 8); //port0-port7
+ else if (group == LED_GROUP1)
+ jl_write_bits(preg_val, pmask, 8, 8); //port0-port7
+ else
+ return JL_ERR_PARAM;
+ ret = jl_apb_reg_write(reg_addr, led_cfg[0]);
+ if (ret)
+ return ret;
+
+ JL_DBG_MSG(JL_FLAG_LED, _DBG_ON,
+ "%s portmask=0x%x, flip_pmask=0x%x, led_cfg=0x%x\n",
+ __func__, portmask, flip_pmask, led_cfg[0]);
+ return ret;
+}
+
+jl_ret_t jl51xx_led_perport_config_set(jl_port_t phyport, jl_led_group_t group, jl_led_config_t config)
+{
+ jl_ret_t ret;
+ jl_uint32 reg_addr = 0;
+ jl_uint32 val[1];
+ jl_uint8 *preg_val = NULL;
+ jl_uint64 src_mask;
+
+ src_mask = __led_config_to_mask(config);
+ if (src_mask == 0)
+ return JL_ERR_PARAM;
+
+ preg_val = (jl_uint8 *)&val[0];
+ reg_addr = APB_TOP_BASE + LED_CFG_4_OFFSET + JL_PORT_P2VP(phyport);
+ if (group == LED_GROUP1)
+ reg_addr += 8; //LED_CFG_12_OFFSET
+
+ ret = jl_apb_reg_read(reg_addr, &val[0]);
+ if (ret)
+ return ret;
+
+ //do not modify bit8 loop indicator
+ jl_write_bits(preg_val, src_mask, 0, 8);
+ ret = jl_apb_reg_write(reg_addr, val[0]);
+
+ JL_DBG_MSG(JL_FLAG_LED, _DBG_ON,
+ "%s addr=0x%x, src_mask=0x%llx, regval=0x%x\n",
+ __func__, reg_addr, src_mask, val[0]);
+ return ret;
+}
+
+jl_ret_t jl51xx_led_group_config_set(jl_led_group_t group, jl_led_config_t config)
+{
+ jl_ret_t ret;
+ jl_port_t port;
+
+ JL_FOR_EACH_PHY_UTP_PORT(port) {
+ ret = jl51xx_led_perport_config_set(
+ port,
+ group,
+ config);
+ if (ret)
+ return ret;
+ }
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_led_group_config_get(jl_led_group_t group, jl_led_config_t *pconfig)
+{
+ jl_ret_t ret;
+ jl_uint32 reg_addr = 0;
+ jl_uint32 val[1];
+ jl_uint8 *preg_val = NULL;
+ jl_uint64 src_mask = 0;
+
+ preg_val = (jl_uint8 *)&val[0];
+ reg_addr = APB_TOP_BASE + LED_CFG_4_OFFSET; //Each led is same configured
+ if (group == LED_GROUP1)
+ reg_addr += 8; //LED_CFG_12_OFFSET
+
+ ret = jl_apb_reg_read(reg_addr, &val[0]);
+ if (ret)
+ return ret;
+
+ //do not modify bit8 loop indicator
+ jl_read_bits(preg_val, &src_mask, 0, 8);
+ ret = __mask_to_led_config((jl_uint8)src_mask, pconfig);
+
+ JL_DBG_MSG(JL_FLAG_LED, _DBG_ON,
+ "%s src_mask=0x%llx, regval=0x%x\n",
+ __func__, src_mask, val[0]);
+ return ret;
+}
+
+jl_ret_t jl51xx_led_onoff_time_set(jl_uint8 on_time, jl_uint8 off_time)
+{
+ jl_ret_t ret;
+ jl_uint32 reg_addr = 0;
+ jl_uint32 val[1];
+ jl_uint8 *preg_val = NULL;
+ jl_uint64 on = on_time, off = off_time;
+
+ preg_val = (jl_uint8 *)&val[0];
+ reg_addr = APB_TOP_BASE + LED_CFG_2_OFFSET;
+
+ ret = jl_apb_reg_read(reg_addr, &val[0]);
+ if (ret)
+ return ret;
+
+ jl_write_bits(preg_val, on, 0, 7);
+ jl_write_bits(preg_val, off, 7, 7);
+
+ ret = jl_apb_reg_write(reg_addr, val[0]);
+
+ JL_DBG_MSG(JL_FLAG_LED, _DBG_ON,
+ "%s on_time=0x%x, off_time=0x%x, regval=0x%x\n",
+ __func__, on_time, off_time, val[0]);
+ return ret;
+}
+
+jl_ret_t jl51xx_led_onoff_time_get(jl_uint8 *on_time, jl_uint8 *off_time)
+{
+ jl_ret_t ret;
+ jl_uint32 reg_addr = 0;
+ jl_uint32 val[1];
+ jl_uint8 *preg_val = NULL;
+ jl_uint64 on = 0, off = 0;
+
+ preg_val = (jl_uint8 *)&val[0];
+ reg_addr = APB_TOP_BASE + LED_CFG_2_OFFSET;
+
+ ret = jl_apb_reg_read(reg_addr, &val[0]);
+ if (ret)
+ return ret;
+
+ jl_read_bits(preg_val, &on, 0, 7);
+ jl_read_bits(preg_val, &off, 7, 7);
+
+ *on_time = (jl_uint8)on;
+ *off_time = (jl_uint8)off;
+
+ JL_DBG_MSG(JL_FLAG_LED, _DBG_ON,
+ "%s on_time=0x%x, off_time=0x%x, regval=0x%x\n",
+ __func__, *on_time, *off_time, val[0]);
+ return ret;
+}
+
+jl_ret_t jl51xx_led_blink_rate_set(jl_led_blink_rate_t blink_rate)
+{
+ jl_uint8 on_time;
+
+ if (blink_rate > 0x7F)
+ return JL_ERR_OUT_OF_RANGE;
+
+ on_time = (jl_uint8)blink_rate;
+
+ return jl51xx_led_onoff_time_set(on_time, on_time);
+}
+
+jl_ret_t jl51xx_led_blink_rate_get(jl_led_blink_rate_t *blink_rate)
+{
+ jl_ret_t ret;
+ jl_uint8 on_time = 0, off_time = 0;
+
+ ret = jl51xx_led_onoff_time_get(&on_time, &off_time);
+ if (ret)
+ return ret;
+
+ if (on_time != off_time) {
+ JL_DBG_MSG(JL_FLAG_LED, _DBG_ERROR,
+ "LED blinkrate on_time != off_time!\n");
+ return JL_ERR_CONFIG;
+ }
+ if (on_time > LED_BLINKRATE_2032MS)
+ return JL_ERR_OUT_OF_RANGE;
+
+ *blink_rate = on_time;
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_led_group_active_high_set(jl_led_group_t group, jl_portmask_t portmask)
+{
+ jl_ret_t ret;
+ jl_uint32 reg_addr = 0;
+ jl_uint64 pmask;
+ jl_uint32 polarity_cfg[1];
+ jl_uint8 *preg_val = NULL;
+ jl_uint32 flip_pmask = JL_PORTMASK_P2VP(portmask);
+
+ if (portmask >= 0x100) {
+ JL_DBG_MSG(JL_FLAG_LED, _DBG_ERROR,
+ "only port0-port7 is allowed to enable led\n");
+ return JL_ERR_OK;
+ }
+
+ FLIP_BITS(flip_pmask, 0, 7);
+ pmask = flip_pmask;
+
+ reg_addr = APB_TOP_BASE + LED_CFG_1_OFFSET;
+ preg_val = (jl_uint8 *)&polarity_cfg[0];
+ ret = jl_apb_reg_read(reg_addr, &polarity_cfg[0]);
+ if (ret)
+ return ret;
+
+ if (group == LED_GROUP0)
+ jl_write_bits(preg_val, pmask, 0, 8); //port0-port7
+ else if (group == LED_GROUP1)
+ jl_write_bits(preg_val, pmask, 8, 8); //port0-port7
+ else
+ return JL_ERR_PARAM;
+ ret = jl_apb_reg_write(reg_addr, polarity_cfg[0]);
+ if (ret)
+ return ret;
+
+ return ret;
+}
+
+jl_ret_t jl51xx_led_group_active_high_get(jl_led_group_t group, jl_portmask_t *portmask)
+{
+ jl_ret_t ret = JL_ERR_OK;
+ jl_uint64 pmask = 0;
+ jl_uint32 flip_mask = 0;
+ jl_uint32 reg_addr = 0;
+ jl_uint32 polarity_cfg[1] = {0};
+ jl_uint8 *preg_val = NULL;
+
+ reg_addr = APB_TOP_BASE + LED_CFG_1_OFFSET;
+ preg_val = (jl_uint8 *)&polarity_cfg[0];
+ ret = jl_apb_reg_read(reg_addr, &polarity_cfg[0]);
+ if (ret)
+ return ret;
+
+ if (group == LED_GROUP0)
+ jl_read_bits(preg_val, &pmask, 0, 8); //port0-port7
+ else if (group == LED_GROUP1)
+ jl_read_bits(preg_val, &pmask, 8, 8); //port0-port7
+ else
+ return JL_ERR_PARAM;
+
+ flip_mask = (jl_portmask_t)pmask;
+ FLIP_BITS(flip_mask, 0, 7);
+
+ flip_mask = JL_PORTMASK_VP2P(flip_mask);
+ *portmask = flip_mask;
+ JL_DBG_MSG(JL_FLAG_LED, _DBG_ON,
+ "%s pmask=0x%llx, polarity_cfg=0x%x\n",
+ __func__, pmask, polarity_cfg[0]);
+
+ return JL_ERR_OK;
+}
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/jl51xx/jl51xx_drv_lpd.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/jl51xx/jl51xx_drv_lpd.c
new file mode 100644
index 0000000..da3d0cb
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/jl51xx/jl51xx_drv_lpd.c
@@ -0,0 +1,247 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+
+#ifndef __KERNEL__
+#include <string.h>
+#else
+#include <linux/string.h>
+#endif
+#include "jl_base.h"
+
+typedef struct _jl_lpd_config_s {
+ jl_mac_t src_mac;
+ jl_uint16 eth_type;
+ jl_uint16 op_code;
+ jl_uint16 ttl;
+} _jl_lpd_config_t;
+
+
+jl_ret_t jl51xx_lpd_ctrl_set(void *lpd_config)
+{
+ jl_ret_t ret;
+ jl_port_t mac_port;
+ _jl_lpd_config_t *config = (_jl_lpd_config_t *)lpd_config;
+ jl_uint64 tx_flow, lp_frm_etype, lp_frm_opcode, lp_frm_ttl;
+ jl_uint32 txloop_frm_ctrl_val[2] = {0};
+ jl_uint32 mac_addr_val[2] = {0};
+ jl_uint32 ctrl_moder_val[1] = {0};
+ jl_uint32 reg_addr = 0;
+ jl_uint8 * preg_val = NULL;
+
+ JL_FOR_EACH_MAC_PORT(mac_port) {
+ reg_addr = ETHMAC0_BASE + ETHMAC0_BLOCK_SIZE * mac_port + CTRL_MODER_OFFSET;
+ ret = jl_apb_reg_burst_read(reg_addr, &ctrl_moder_val[0], 1);
+ if (ret)
+ return ret;
+ preg_val = (jl_uint8 *)&ctrl_moder_val[0];
+ tx_flow = 1;
+ jl_write_bits(preg_val, tx_flow, 2, 1);
+ ret = jl_apb_reg_burst_write(reg_addr, &ctrl_moder_val[0], 1);
+ if (ret)
+ return ret;
+
+ reg_addr = ETHMAC0_BASE + ETHMAC0_BLOCK_SIZE * mac_port + TXLOOP_FRAME_CONTROL_OFFSET;
+ ret = jl_apb_reg_burst_read(reg_addr, &txloop_frm_ctrl_val[0], 2);
+ if (ret)
+ return ret;
+ preg_val = (jl_uint8 *)&txloop_frm_ctrl_val[0];
+ lp_frm_etype = config->eth_type;
+ lp_frm_opcode = config->op_code;
+ lp_frm_ttl = config->ttl;
+ jl_write_bits(preg_val, lp_frm_etype, 0, 16);
+ jl_write_bits(preg_val, lp_frm_opcode, 16, 16);
+ jl_write_bits(preg_val, lp_frm_ttl, 32, 16);
+ ret = jl_apb_reg_burst_write(reg_addr, &txloop_frm_ctrl_val[0], 2);
+ if (ret)
+ return ret;
+
+ reg_addr = ETHMAC0_BASE + ETHMAC0_BLOCK_SIZE * mac_port + MAC_ADDR_OFFSET;
+ preg_val = (jl_uint8 *)&mac_addr_val[0];
+ preg_val[0]=config->src_mac.octet[5];
+ preg_val[1]=config->src_mac.octet[4];
+ preg_val[2]=config->src_mac.octet[3];
+ preg_val[3]=config->src_mac.octet[2];
+ preg_val[4]=config->src_mac.octet[1];
+ preg_val[5]=config->src_mac.octet[0];
+ ret = jl_apb_reg_burst_write(reg_addr, &mac_addr_val[0], 2);
+ if (ret)
+ return ret;
+ }
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_lpd_ctrl_get(void *lpd_config)
+{
+ jl_ret_t ret;
+ jl_port_t mac_port;
+ _jl_lpd_config_t *config = (_jl_lpd_config_t *)lpd_config;
+ jl_uint64 lp_frm_etype, lp_frm_opcode, lp_frm_ttl;
+ jl_uint32 txloop_frm_ctrl_val[2] = {0};
+ jl_uint32 mac_addr_val[2] = {0};
+ jl_uint32 reg_addr = 0;
+ jl_uint8 * preg_val = NULL;
+
+ JL_FOR_EACH_MAC_PORT(mac_port) {
+ reg_addr = ETHMAC0_BASE + ETHMAC0_BLOCK_SIZE * mac_port + TXLOOP_FRAME_CONTROL_OFFSET;
+ ret = jl_apb_reg_burst_read(reg_addr, &txloop_frm_ctrl_val[0], 2);
+ if (ret)
+ return ret;
+ preg_val = (jl_uint8 *)&txloop_frm_ctrl_val[0];
+ jl_read_bits(preg_val, &lp_frm_etype, 0, 16);
+ jl_read_bits(preg_val, &lp_frm_opcode, 16, 16);
+ jl_read_bits(preg_val, &lp_frm_ttl, 32, 16);
+ config->eth_type = (jl_uint16)lp_frm_etype;
+ config->op_code = (jl_uint16)lp_frm_opcode;
+ config->ttl = (jl_uint16)lp_frm_ttl;
+
+ reg_addr = ETHMAC0_BASE + ETHMAC0_BLOCK_SIZE * mac_port + MAC_ADDR_OFFSET;
+ ret = jl_apb_reg_burst_read(reg_addr, &mac_addr_val[0], 2);
+ if (ret)
+ return ret;
+ memcpy(&config->src_mac.octet[0], &mac_addr_val[0], ETHER_ADDR_LEN);
+
+ break;
+ }
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t __jl51xx_lpd_enable(jl_uint8 enable)
+{
+ jl_ret_t ret;
+ jl_uint64 lp_detect_en;
+ jl_uint32 lpd_ctrl_val[1];
+ jl_uint32 reg_addr = 0;
+ jl_uint8 *preg_val = (jl_uint8 *)&lpd_ctrl_val[0];
+
+ reg_addr = MAG_BASE + LOOP_DETECT_CONTROL_OFFSET;
+ ret = jl_apb_reg_burst_read(reg_addr, &lpd_ctrl_val[0], 1);
+ if (ret)
+ return ret;
+
+ if (enable)
+ lp_detect_en = JL_MAC_PORTMASK;
+ else
+ lp_detect_en = 0;
+ jl_write_bits(preg_val, lp_detect_en, 0, 10);
+
+ ret = jl_apb_reg_burst_write(reg_addr, &lpd_ctrl_val[0], 1);
+ if (ret)
+ return ret;
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_lpd_enable(void)
+{
+ return __jl51xx_lpd_enable(1);
+}
+jl_ret_t jl51xx_lpd_disable(void)
+{
+ return __jl51xx_lpd_enable(0);
+}
+
+jl_ret_t jl51xx_lpd_trigger_check(void)
+{
+ jl_ret_t ret;
+ jl_uint64 lp_detect_chk;
+ jl_uint32 lpd_ctrl_val[1];
+ jl_uint32 reg_addr = 0;
+ jl_uint8 *preg_val = (jl_uint8 *)&lpd_ctrl_val[0];
+
+ reg_addr = MAG_BASE + LOOP_DETECT_CONTROL_OFFSET;
+ ret = jl_apb_reg_burst_read(reg_addr, &lpd_ctrl_val[0], 1);
+ if (ret)
+ return ret;
+
+ lp_detect_chk = 1;
+ jl_write_bits(preg_val, lp_detect_chk, 12, 1);
+
+ ret = jl_apb_reg_burst_write(reg_addr, &lpd_ctrl_val[0], 1);
+ if (ret)
+ return ret;
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_lpd_trigger_once(jl_port_t port)
+{
+ jl_ret_t ret;
+ jl_uint8 count = 10;
+ jl_uint64 tx_pause_en, tx_pause_rq;
+ jl_uint32 txpause_frm_ctrl_val[1];
+ jl_uint32 reg_addr = ETHMAC0_BASE + ETHMAC0_BLOCK_SIZE * JL_PORT_P2M(port) + TXPAUSE_FRAME_CONTROL_OFFSET;
+ jl_uint8 * preg_val = (jl_uint8 *)&txpause_frm_ctrl_val[0];
+
+ ret = jl_apb_reg_burst_read(reg_addr, &txpause_frm_ctrl_val[0], 1);
+ if (ret)
+ return ret;
+
+ /*
+ * insertion control frame selection: tx_pause_en
+ * 0 for loop frame
+ * 1 for pause control frame
+ */
+ tx_pause_rq = 1;
+ tx_pause_en = 0;
+ jl_write_bits(preg_val, tx_pause_rq, 16, 1);
+ jl_write_bits(preg_val, tx_pause_en, 17, 1);
+
+ ret = jl_apb_reg_burst_write(reg_addr, &txpause_frm_ctrl_val[0], 1);
+ if (ret)
+ return ret;
+
+ /* wait loop frame send successfully */
+ while (--count) {
+ port_udelay(1);
+ ret = jl_apb_reg_burst_read(reg_addr, &txpause_frm_ctrl_val[0], 1);
+ if (ret)
+ return ret;
+
+ jl_read_bits(preg_val, &tx_pause_rq, 16, 1);
+
+ if (!tx_pause_rq)
+ break;
+ }
+
+ if (!count)
+ return JL_ERR_TIMEOUT;
+
+ /* delay 1us before loop detect check */
+ port_udelay(1);
+ jl51xx_lpd_trigger_check();
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_lpd_ports_get(jl_portmask_t *port_mask)
+{
+ jl_ret_t ret;
+ jl_uint64 lp_detect;
+ jl_uint32 lpd_stat_val[1];
+ jl_uint32 reg_addr = MAG_BASE + LOOP_DETECT_STATUS_OFFSET;
+ jl_uint8 *preg_val = (jl_uint8 *)&lpd_stat_val[0];
+
+ ret = jl_apb_reg_burst_read(reg_addr,
+ &lpd_stat_val[0], 1);
+ if (ret)
+ return ret;
+
+ jl_read_bits(preg_val, &lp_detect, 0, 10);
+
+ *port_mask = JL_PORTMASK_M2P(lp_detect);
+
+ return JL_ERR_OK;
+}
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/jl51xx/jl51xx_drv_mib.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/jl51xx/jl51xx_drv_mib.c
new file mode 100644
index 0000000..448c713
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/jl51xx/jl51xx_drv_mib.c
@@ -0,0 +1,479 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+
+#include "jl_base.h"
+#include "driver/jl_reg_io.h"
+#include "jl51xx/reg_ethmac.h"
+#include "jl51xx/jl51xx_drv_mib.h"
+#include "mib.h"
+
+#define ETHMAC_REG_ADDR(idx, ofs) (ETHMAC0_BASE + idx * ETHMAC0_BLOCK_SIZE + ofs)
+jl_ret_t jl51xx_mib_port_rc_mode_get(jl_port_t port, jl_enable_t *pregval)
+{
+ jl_ret_t ret;
+ jl_uint32 val;
+
+ ret = jl_apb_reg_read(ETHMAC_REG_ADDR(JL_PORT_P2M(port), STATISTIC_MODE_0_OFFSET),
+ &val);
+ if (ret)
+ return ret;
+
+ if (val & BIT(0))
+ *pregval = 1;
+ else
+ *pregval = 0;
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_mib_port_rc_mode_set(jl_port_t port, jl_uint32 regval)
+{
+ jl_ret_t ret;
+ jl_uint32 val;
+
+ ret = jl_apb_reg_read(ETHMAC_REG_ADDR(JL_PORT_P2M(port), STATISTIC_MODE_0_OFFSET),
+ &val);
+ if (ret)
+ return ret;
+
+ if (regval == 1)
+ SET_BIT(val, 0);
+ else if (regval == 0)
+ CLR_BIT(val, 0);
+ else
+ return JL_ERR_PARAM;
+
+ ret = jl_apb_reg_write(
+ ETHMAC_REG_ADDR(JL_PORT_P2M(port), STATISTIC_MODE_0_OFFSET),
+ val);
+ return ret;
+}
+
+jl_ret_t jl51xx_mib_port_clear(jl_port_t port, jl_uint16 type)
+{
+ jl_ret_t ret;
+ jl_uint32 val = 0;
+
+ val = (jl_uint32)type << 4;
+ val |= BIT(0);
+
+ ret = jl_apb_reg_write(
+ ETHMAC_REG_ADDR(JL_PORT_P2M(port), STATISTIC_MODE_1_OFFSET),
+ val);
+ return ret;
+}
+#define MIB_TYPE_END 21
+jl_ret_t jl51xx_mib_port_get(jl_port_t port, jl_uint16 type, jl_uint64 *pregval)
+{
+ jl_ret_t ret;
+ jl_uint32 burst = 0;
+ jl_uint32 buf[2] = {0};
+ jl_uint32 *ptr = (jl_uint32 *)pregval;
+
+ jl_uint32 mib_base_addr = ETHMAC_REG_ADDR(JL_PORT_P2M(port), TX_PKT_CNT_OFFSET);
+ CONST_T jl_uint8 mib_reg_offset[MIB_TYPE_END] = {
+ 0, 2, 4, 6, 8, 10, 12, 14, 16, 17,
+ 18, 20, 22, 24, 26, 28, 30, 32, 34, 35, 36 };
+
+ if (type >= MIB_TYPE_END)
+ return JL_ERR_PARAM;
+
+ switch(type) {
+ case PORT_MIB_TX_PKT_CNT:
+ case PORT_MIB_TX_PKT_BYTE_CNT:
+ case PORT_MIB_TX_PKT_UC_CNT:
+ case PORT_MIB_TX_PKT_UC_BYTE_CNT:
+ case PORT_MIB_TX_PKT_MC_CNT:
+ case PORT_MIB_TX_PKT_MC_BYTE_CNT:
+ case PORT_MIB_TX_PKT_BC_CNT:
+ case PORT_MIB_TX_PKT_BC_BYTE_CNT:
+ case PORT_MIB_RX_PKT_CNT:
+ case PORT_MIB_RX_PKT_BYTE_CNT:
+ case PORT_MIB_RX_PKT_UC_CNT:
+ case PORT_MIB_RX_PKT_UC_BYTE_CNT:
+ case PORT_MIB_RX_PKT_MC_CNT:
+ case PORT_MIB_RX_PKT_MC_BYTE_CNT:
+ case PORT_MIB_RX_PKT_BC_CNT:
+ case PORT_MIB_RX_PKT_BC_BYTE_CNT:
+ burst = 2;
+ break;
+ case PORT_MIB_TX_PKT_DRP_CNT:
+ case PORT_MIB_TX_PKT_ERR_CNT:
+ case PORT_MIB_RX_PKT_DRP_CNT:
+ case PORT_MIB_RX_PKT_CRC_ERR_CNT:
+ case PORT_MIB_RX_FRAG_ERR_CNT:
+ burst = 1;
+ break;
+ default:
+ JL_DBG_MSG(JL_FLAG_EMAC, _DBG_ERROR, "mib type overflow!\n");
+ break;
+ }
+ ret = jl_apb_reg_burst_read(mib_base_addr + mib_reg_offset[type], buf, burst);
+ JL_DBG_MSG(JL_FLAG_EMAC, _DBG_ON, "%s regaddr=0x%4x, buf[0]=0x%4x, buf[1]=0x%4x, burst=%d errmsg:%s!\n",
+ __func__, mib_base_addr + mib_reg_offset[type],
+ buf[0], buf[1], burst, JL_ERRMSG(ret));
+
+ *ptr++= buf[0];
+ *ptr = buf[1];
+
+ return ret;
+}
+
+jl_ret_t jl51xx_mib_swc_global_drop_get(jl_mib_swc_glb_drop_t *pport_cnt)
+{
+ jl_ret_t ret = JL_ERR_OK;
+ jl_uint32 reg_addr = 0;
+ jl_uint32 val = 0;
+
+ JL_CHECK_POINTER(pport_cnt);
+
+ reg_addr = SWCORE_BASE + IPP_BROKEN_PACKETS_OFFSET;
+ ret = jl_apb_reg_burst_read(reg_addr, &val, 1);
+ if (ret)
+ return ret;
+ pport_cnt->ipp_broken_pkt = val;
+
+ val = 0;
+ reg_addr = SWCORE_BASE + IPP_PM_DROP_OFFSET;
+ ret = jl_apb_reg_burst_read(reg_addr, &val, 1);
+ if (ret)
+ return ret;
+ pport_cnt->ipp_pm_drop = val;
+
+ val = 0;
+ reg_addr = SWCORE_BASE + EPP_PM_DROP_OFFSET;
+ ret = jl_apb_reg_burst_read(reg_addr, &val, 1);
+ if (ret)
+ return ret;
+ pport_cnt->epp_pm_drop = val;
+
+ val = 0;
+ reg_addr = SWCORE_BASE + UNKNOWN_INGRESS_DROP_OFFSET;
+ ret = jl_apb_reg_burst_read(reg_addr, &val, 1);
+ if (ret)
+ return ret;
+ pport_cnt->unknown_ingress_drop = val;
+
+ val = 0;
+ reg_addr = SWCORE_BASE + EMPTY_MASK_DROP_OFFSET;
+ ret = jl_apb_reg_burst_read(reg_addr, &val, 1);
+ if (ret)
+ return ret;
+ pport_cnt->empty_mask_drop = val;
+
+ val = 0;
+ reg_addr = SWCORE_BASE + INGRESS_SPANNING_TREE_DROP_LISTEN_OFFSET;
+ ret = jl_apb_reg_burst_read(reg_addr, &val, 1);
+ if (ret)
+ return ret;
+ pport_cnt->ingress_stp_listen_drop = val;
+
+ val = 0;
+ reg_addr = SWCORE_BASE + INGRESS_SPANNING_TREE_DROP_LEARNING_OFFSET;
+ ret = jl_apb_reg_burst_read(reg_addr, &val, 1);
+ if (ret)
+ return ret;
+ pport_cnt->ingress_stp_learn_drop = val;
+
+ val = 0;
+ reg_addr = SWCORE_BASE + INGRESS_SPANNING_TREE_DROP_BLOCKING_OFFSET;
+ ret = jl_apb_reg_burst_read(reg_addr, &val, 1);
+ if (ret)
+ return ret;
+ pport_cnt->ingress_stp_block_drop = val;
+
+ val = 0;
+ reg_addr = SWCORE_BASE + L2_FLAG_DROP_OFFSET;
+ ret = jl_apb_reg_burst_read(reg_addr, &val, 1);
+ if (ret)
+ return ret;
+ pport_cnt->l2_lookup_drop = val;
+
+ val = 0;
+ reg_addr = SWCORE_BASE + INGRESS_L2_ACL_DROP_OFFSET;
+ ret = jl_apb_reg_burst_read(reg_addr, &val, 1);
+ if (ret)
+ return ret;
+ pport_cnt->ingress_config_acl_drop = val;
+
+ val = 0;
+ reg_addr = SWCORE_BASE + VLAN_MEMBER_DROP_OFFSET;
+ ret = jl_apb_reg_burst_read(reg_addr, &val, 1);
+ if (ret)
+ return ret;
+ pport_cnt->vlan_member_drop = val;
+
+ val = 0;
+ reg_addr = SWCORE_BASE + MINIMUM_ALLOWED_VLAN_DROP_OFFSET;
+ ret = jl_apb_reg_burst_read(reg_addr, &val, 1);
+ if (ret)
+ return ret;
+ pport_cnt->mini_allow_vlan_drop = val;
+
+ val = 0;
+ reg_addr = SWCORE_BASE + MAXIMUM_ALLOWED_VLAN_DROP_OFFSET;
+ ret = jl_apb_reg_burst_read(reg_addr, &val, 1);
+ if (ret)
+ return ret;
+ pport_cnt->max_allow_vlan_drop = val;
+
+ val = 0;
+ reg_addr = SWCORE_BASE + BUFFER_OVERFLOW_DROP_OFFSET;
+ ret = jl_apb_reg_burst_read(reg_addr, &val, 1);
+ if (ret)
+ return ret;
+ pport_cnt->buf_overflow_drop = val;
+
+ val = 0;
+ reg_addr = SWCORE_BASE + INGRESS_RESOURCE_MANAGER_DROP_OFFSET;
+ ret = jl_apb_reg_burst_read(reg_addr, &val, 1);
+ if (ret)
+ return ret;
+ pport_cnt->ingress_res_manager_drop = val;
+
+ val = 0;
+ reg_addr = SWCORE_BASE + RE_QUEUE_OVERFLOW_DROP_OFFSET;
+ ret = jl_apb_reg_burst_read(reg_addr, &val, 1);
+ if (ret)
+ return ret;
+ pport_cnt->re_queue_overflow_drop = val;
+
+ return ret;
+}
+
+jl_ret_t jl51xx_mib_swc_global_drop_clear(void)
+{
+ jl_ret_t ret = JL_ERR_OK;
+ jl_uint32 reg_addr = 0;
+ jl_uint32 val = 0;
+
+ reg_addr = SWCORE_BASE + IPP_BROKEN_PACKETS_OFFSET;
+ ret = jl_apb_reg_burst_write(reg_addr, &val, 1);
+ if (ret)
+ return ret;
+
+ reg_addr = SWCORE_BASE + IPP_PM_DROP_OFFSET;
+ ret = jl_apb_reg_burst_write(reg_addr, &val, 1);
+ if (ret)
+ return ret;
+
+ reg_addr = SWCORE_BASE + EPP_PM_DROP_OFFSET;
+ ret = jl_apb_reg_burst_write(reg_addr, &val, 1);
+ if (ret)
+ return ret;
+
+ reg_addr = SWCORE_BASE + UNKNOWN_INGRESS_DROP_OFFSET;
+ ret = jl_apb_reg_burst_write(reg_addr, &val, 1);
+ if (ret)
+ return ret;
+
+ reg_addr = SWCORE_BASE + EMPTY_MASK_DROP_OFFSET;
+ ret = jl_apb_reg_burst_write(reg_addr, &val, 1);
+ if (ret)
+ return ret;
+
+ reg_addr = SWCORE_BASE + INGRESS_SPANNING_TREE_DROP_LISTEN_OFFSET;
+ ret = jl_apb_reg_burst_write(reg_addr, &val, 1);
+ if (ret)
+ return ret;
+
+ reg_addr = SWCORE_BASE + INGRESS_SPANNING_TREE_DROP_LEARNING_OFFSET;
+ ret = jl_apb_reg_burst_write(reg_addr, &val, 1);
+ if (ret)
+ return ret;
+
+ reg_addr = SWCORE_BASE + INGRESS_SPANNING_TREE_DROP_BLOCKING_OFFSET;
+ ret = jl_apb_reg_burst_write(reg_addr, &val, 1);
+ if (ret)
+ return ret;
+
+ reg_addr = SWCORE_BASE + L2_FLAG_DROP_OFFSET;
+ ret = jl_apb_reg_burst_write(reg_addr, &val, 1);
+ if (ret)
+ return ret;
+
+ reg_addr = SWCORE_BASE + INGRESS_L2_ACL_DROP_OFFSET;
+ ret = jl_apb_reg_burst_write(reg_addr, &val, 1);
+ if (ret)
+ return ret;
+
+ reg_addr = SWCORE_BASE + VLAN_MEMBER_DROP_OFFSET;
+ ret = jl_apb_reg_burst_write(reg_addr, &val, 1);
+ if (ret)
+ return ret;
+
+ reg_addr = SWCORE_BASE + MINIMUM_ALLOWED_VLAN_DROP_OFFSET;
+ ret = jl_apb_reg_burst_write(reg_addr, &val, 1);
+ if (ret)
+ return ret;
+
+ reg_addr = SWCORE_BASE + MAXIMUM_ALLOWED_VLAN_DROP_OFFSET;
+ ret = jl_apb_reg_burst_write(reg_addr, &val, 1);
+ if (ret)
+ return ret;
+
+ reg_addr = SWCORE_BASE + BUFFER_OVERFLOW_DROP_OFFSET;
+ ret = jl_apb_reg_burst_write(reg_addr, &val, 1);
+ if (ret)
+ return ret;
+
+ reg_addr = SWCORE_BASE + INGRESS_RESOURCE_MANAGER_DROP_OFFSET;
+ ret = jl_apb_reg_burst_write(reg_addr, &val, 1);
+ if (ret)
+ return ret;
+
+ reg_addr = SWCORE_BASE + RE_QUEUE_OVERFLOW_DROP_OFFSET;
+ ret = jl_apb_reg_burst_write(reg_addr, &val, 1);
+
+ return ret;
+}
+
+jl_ret_t jl51xx_mib_swc_port_drop_get(jl_port_t port, jl_mib_swc_port_drop_t *pport_cnt)
+{
+ jl_ret_t ret = JL_ERR_OK;
+ jl_uint32 reg_addr = 0;
+ jl_uint32 ps_error_val[2] = {0};
+ jl_uint8 *preg_val = (jl_uint8 *)&ps_error_val[0];
+ jl_uint64 data1 = 0;
+ jl_uint64 data2 = 0;
+
+ /* Check Port Valid */
+ JL_CHECK_PORT(port);
+ JL_CHECK_POINTER(pport_cnt);
+
+ reg_addr = SWCORE_BASE + SP_OVERFLOW_DROP_OFFSET + JL_PORT_P2M(port);
+ ret = jl_apb_reg_burst_read(reg_addr, &pport_cnt->sp_overflow_drop, 1);
+ if (ret)
+ return ret;
+
+ reg_addr = SWCORE_BASE + PS_ERROR_COUNTER_OFFSET + JL_PORT_P2M(port);
+ ret = jl_apb_reg_burst_read(reg_addr, &ps_error_val[0], 2);
+ if (ret)
+ return ret;
+ jl_read_bits(preg_val, &data1, 0, 24);
+ jl_read_bits(preg_val, &data2, 24, 24);
+ pport_cnt->ps_err_underrun = data1&0xffffff;
+ pport_cnt->ps_err_overflow = data2&0xffffff;
+
+ reg_addr = SWCORE_BASE + UNKNOWN_EGRESS_DROP_OFFSET + JL_PORT_P2M(port);
+ ret = jl_apb_reg_burst_read(reg_addr, &pport_cnt->unknown_egress_drop, 1);
+ if (ret)
+ return ret;
+
+ reg_addr = SWCORE_BASE + EGRESS_PORT_DISABLED_DROP_OFFSET + JL_PORT_P2M(port);
+ ret = jl_apb_reg_burst_read(reg_addr, &pport_cnt->egress_port_dis_drop, 1);
+ if (ret)
+ return ret;
+
+ reg_addr = SWCORE_BASE + QUEUE_OFF_DROP_OFFSET + JL_PORT_P2M(port);
+ ret = jl_apb_reg_burst_read(reg_addr, &pport_cnt->queue_off_drop, 1);
+ if (ret)
+ return ret;
+
+ reg_addr = SWCORE_BASE + EGRESS_SPANNING_TREE_DROP_OFFSET + JL_PORT_P2M(port);
+ ret = jl_apb_reg_burst_read(reg_addr, &pport_cnt->egress_stp_drop, 1);
+ if (ret)
+ return ret;
+
+ reg_addr = SWCORE_BASE + MBSC_DROP_OFFSET + JL_PORT_P2M(port);
+ ret = jl_apb_reg_burst_read(reg_addr, &pport_cnt->mbsc_drop, 1);
+ if (ret)
+ return ret;
+
+ reg_addr = SWCORE_BASE + DRAIN_PORT_DROP_OFFSET + JL_PORT_P2M(port);
+ ret = jl_apb_reg_burst_read(reg_addr, &pport_cnt->drain_port_drop, 1);
+ if (ret)
+ return ret;
+
+ reg_addr = SWCORE_BASE + MAC_RX_BROKEN_PACKETS_OFFSET + JL_PORT_P2M(port);
+ ret = jl_apb_reg_burst_read(reg_addr, &pport_cnt->mac_rx_broken_pkt, 1);
+ if (ret)
+ return ret;
+
+ reg_addr = SWCORE_BASE + MAC_RX_SHORT_PACKET_DROP_OFFSET + JL_PORT_P2M(port);
+ ret = jl_apb_reg_burst_read(reg_addr, &pport_cnt->mac_rx_short_pkt_drop, 1);
+ if (ret)
+ return ret;
+
+ reg_addr = SWCORE_BASE + EGRESS_RESOURCE_MANAGEMENT_DROP_OFFSET + JL_PORT_P2M(port);
+ ret = jl_apb_reg_burst_read(reg_addr, &pport_cnt->egress_res_manage_drop, 1);
+
+ return ret;
+}
+
+jl_ret_t jl51xx_mib_swc_port_drop_clear(jl_port_t port)
+{
+ jl_ret_t ret = JL_ERR_OK;
+ jl_uint32 reg_addr = 0;
+ jl_uint32 val = 0;
+ jl_uint32 ps_error_val[2] = {0};
+
+ /* Check Port Valid */
+ JL_CHECK_PORT(port);
+
+ reg_addr = SWCORE_BASE + SP_OVERFLOW_DROP_OFFSET + JL_PORT_P2M(port);
+ ret = jl_apb_reg_burst_write(reg_addr, &val, 1);
+ if (ret)
+ return ret;
+
+ reg_addr = SWCORE_BASE + PS_ERROR_COUNTER_OFFSET + JL_PORT_P2M(port);
+ ret = jl_apb_reg_burst_write(reg_addr, &ps_error_val[0], 2);
+ if (ret)
+ return ret;
+
+ reg_addr = SWCORE_BASE + UNKNOWN_EGRESS_DROP_OFFSET + JL_PORT_P2M(port);
+ ret = jl_apb_reg_burst_write(reg_addr, &val, 1);
+ if (ret)
+ return ret;
+
+ reg_addr = SWCORE_BASE + EGRESS_PORT_DISABLED_DROP_OFFSET + JL_PORT_P2M(port);
+ ret = jl_apb_reg_burst_write(reg_addr, &val, 1);
+ if (ret)
+ return ret;
+
+ reg_addr = SWCORE_BASE + QUEUE_OFF_DROP_OFFSET + JL_PORT_P2M(port);
+ ret = jl_apb_reg_burst_write(reg_addr, &val, 1);
+ if (ret)
+ return ret;
+
+ reg_addr = SWCORE_BASE + EGRESS_SPANNING_TREE_DROP_OFFSET + JL_PORT_P2M(port);
+ ret = jl_apb_reg_burst_write(reg_addr, &val, 1);
+ if (ret)
+ return ret;
+
+ reg_addr = SWCORE_BASE + MBSC_DROP_OFFSET + JL_PORT_P2M(port);
+ ret = jl_apb_reg_burst_write(reg_addr, &val, 1);
+ if (ret)
+ return ret;
+
+ reg_addr = SWCORE_BASE + DRAIN_PORT_DROP_OFFSET + JL_PORT_P2M(port);
+ ret = jl_apb_reg_burst_write(reg_addr, &val, 1);
+ if (ret)
+ return ret;
+
+ reg_addr = SWCORE_BASE + MAC_RX_BROKEN_PACKETS_OFFSET + JL_PORT_P2M(port);
+ ret = jl_apb_reg_burst_write(reg_addr, &val, 1);
+ if (ret)
+ return ret;
+
+ reg_addr = SWCORE_BASE + MAC_RX_SHORT_PACKET_DROP_OFFSET + JL_PORT_P2M(port);
+ ret = jl_apb_reg_burst_write(reg_addr, &val, 1);
+ if (ret)
+ return ret;
+
+ reg_addr = SWCORE_BASE + EGRESS_RESOURCE_MANAGEMENT_DROP_OFFSET + JL_PORT_P2M(port);
+ ret = jl_apb_reg_burst_write(reg_addr, &val, 1);
+
+ return ret;
+}
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/jl51xx/jl51xx_drv_mirror.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/jl51xx/jl51xx_drv_mirror.c
new file mode 100644
index 0000000..8d0f64f
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/jl51xx/jl51xx_drv_mirror.c
@@ -0,0 +1,162 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+
+#include "jl_base.h"
+
+jl_ret_t jl51xx_mirror_input_mr_get(jl_port_t mirrored_port,
+ jl_port_t *mirroring_port)
+{
+ jl_ret_t ret;
+ jl_uint64 inputmirrorenabled, destinputmirror;
+ jl_uint32 src_port_tab_val[2] = {0};
+ jl_uint32 src_port_tab_addr = SOURCE_PORT_TABLE_OFFSET + (JL_PORT_P2M(mirrored_port) * 2) + SWCORE_BASE;
+ jl_uint8 * preg_val = (jl_uint8 *)&src_port_tab_val[0];
+
+ ret = jl_apb_reg_burst_read(src_port_tab_addr, &src_port_tab_val[0], 2);
+ if (ret)
+ return ret;
+
+ jl_read_bits(preg_val, &inputmirrorenabled, 35, 1);
+ jl_read_bits(preg_val, &destinputmirror, 36, 4);
+
+ if (inputmirrorenabled) {
+ *mirroring_port = JL_PORT_M2P(destinputmirror);
+
+ return JL_ERR_OK;
+ }
+
+ *mirroring_port = UNDEF_PORT;
+
+ return JL_ERR_UNAVAIL;
+}
+
+jl_ret_t jl51xx_mirror_output_mr_get(jl_port_t mirrored_port,
+ jl_port_t *mirroring_port)
+{
+ jl_ret_t ret;
+ jl_uint64 outputmirrorenabled, outputmirrorport;
+ jl_uint32 output_mr_tab_val[1] = {0};
+ jl_uint32 output_mr_tab_addr = OUTPUT_MIRRORING_TABLE_OFFSET + (JL_PORT_P2M(mirrored_port) * 1) + SWCORE_BASE;
+
+ ret = jl_apb_reg_burst_read(output_mr_tab_addr, &output_mr_tab_val[0], 1);
+ if (ret)
+ return ret;
+
+ jl_read_bits((jl_uint8 *)&output_mr_tab_val[0], &outputmirrorenabled, 0, 1);
+ jl_read_bits((jl_uint8 *)&output_mr_tab_val[0], &outputmirrorport, 1, 4);
+
+ if (outputmirrorenabled) {
+ *mirroring_port = JL_PORT_M2P(outputmirrorport);
+
+ return JL_ERR_OK;
+ }
+
+ *mirroring_port = UNDEF_PORT;
+
+ return JL_ERR_UNAVAIL;
+}
+
+jl_ret_t jl51xx_mirror_input_mr_set(jl_port_t mirrored_port,
+ jl_port_t mirroring_port)
+{
+ jl_ret_t ret;
+ jl_uint64 inputmirrorenabled, destinputmirror;
+ jl_uint32 src_port_tab_val[2] = {0};
+ jl_uint32 src_port_tab_addr = SOURCE_PORT_TABLE_OFFSET + (JL_PORT_P2M(mirrored_port) * 2) + SWCORE_BASE;
+ jl_uint8 *preg_val = (jl_uint8 *)&src_port_tab_val[0];
+
+ ret = jl_apb_reg_burst_read(src_port_tab_addr, &src_port_tab_val[0], 2);
+ if (ret)
+ return ret;
+
+ destinputmirror = JL_PORT_P2M(mirroring_port);
+ inputmirrorenabled = 1;
+ jl_write_bits(preg_val, inputmirrorenabled, 35, 1);
+ jl_write_bits(preg_val, destinputmirror, 36, 4);
+
+ ret = jl_apb_reg_burst_write(src_port_tab_addr, &src_port_tab_val[0], 2);
+ if (ret)
+ return ret;
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_mirror_input_mr_clear(jl_port_t mirrored_port)
+{
+ jl_ret_t ret;
+ jl_uint64 inputmirrorenabled;
+ jl_uint32 src_port_tab_val[2] = {0};
+ jl_uint32 src_port_tab_addr = SOURCE_PORT_TABLE_OFFSET + (JL_PORT_P2M(mirrored_port) * 2) + SWCORE_BASE;
+ jl_uint8 *preg_val = (jl_uint8 *)&src_port_tab_val[0];
+
+ ret = jl_apb_reg_burst_read(src_port_tab_addr, &src_port_tab_val[0], 2);
+ if (ret)
+ return ret;
+
+ inputmirrorenabled = 0;
+ jl_write_bits(preg_val, inputmirrorenabled, 35, 1);
+
+ ret = jl_apb_reg_burst_write(src_port_tab_addr, &src_port_tab_val[0], 2);
+ if (ret)
+ return ret;
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_mirror_output_mr_set(jl_port_t mirrored_port,
+ jl_port_t mirroring_port)
+{
+ jl_ret_t ret;
+ jl_uint64 outputmirrorenabled, outputmirrorport;
+ jl_uint32 output_mr_tab_val[1] = {0};
+ jl_uint32 output_mr_tab_addr = OUTPUT_MIRRORING_TABLE_OFFSET + (JL_PORT_P2M(mirrored_port) * 1) + SWCORE_BASE;
+ jl_uint8 *preg_val = (jl_uint8 *)&output_mr_tab_val[0];
+
+ ret = jl_apb_reg_burst_read(output_mr_tab_addr, &output_mr_tab_val[0], 1);
+ if (ret)
+ return ret;
+
+ outputmirrorport = JL_PORT_P2M(mirroring_port);
+ outputmirrorenabled = 1;
+ jl_write_bits(preg_val, outputmirrorenabled, 0, 1);
+ jl_write_bits(preg_val, outputmirrorport, 1, 4);
+
+ ret = jl_apb_reg_burst_write(output_mr_tab_addr, &output_mr_tab_val[0], 1);
+ if (ret)
+ return ret;
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_mirror_output_mr_clear(jl_port_t mirrored_port)
+{
+ jl_ret_t ret;
+ jl_uint64 outputmirrorenabled;
+ jl_uint32 output_mr_tab_val[1] = {0};
+ jl_uint32 output_mr_tab_addr = OUTPUT_MIRRORING_TABLE_OFFSET + (JL_PORT_P2M(mirrored_port) * 1) + SWCORE_BASE;
+ jl_uint8 *preg_val = (jl_uint8 *)&output_mr_tab_val[0];
+
+ ret = jl_apb_reg_burst_read(output_mr_tab_addr, &output_mr_tab_val[0], 1);
+ if (ret)
+ return ret;
+
+ outputmirrorenabled = 0;
+ jl_write_bits(preg_val, outputmirrorenabled, 0, 1);
+
+ ret = jl_apb_reg_burst_write(output_mr_tab_addr, &output_mr_tab_val[0], 1);
+ if (ret)
+ return ret;
+
+ return JL_ERR_OK;
+}
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/jl51xx/jl51xx_drv_phy.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/jl51xx/jl51xx_drv_phy.c
new file mode 100644
index 0000000..841f32a
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/jl51xx/jl51xx_drv_phy.c
@@ -0,0 +1,70 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+
+#include "jl_base.h"
+#include "driver/jl_reg_io.h"
+#include "jl51xx/jl51xx_drv_phy.h"
+#include "jl51xx/reg_phy.h"
+
+jl_ret_t jl51xx_phy_indirect_read(jl_uint32 phy, jl_uint32 regaddr, jl_uint32 *pregval)
+{
+ jl_ret_t ret = JL_ERR_OK;
+ jl_uint32 fephy_id = JL_PORT_P2VP(phy);
+ jl_uint32 addr;
+
+ addr = FEPHY0_BASE + fephy_id * FEPHY0_BLOCK_SIZE + regaddr;
+
+ ret = jl_apb_reg_read(addr, pregval);
+ if (ret)
+ JL_DBG_MSG(JL_FLAG_PHY, _DBG_ERROR,
+ "%s addr=0x%x regaddr=0x%x regval=0x%x fail: %s\n",
+ __func__, addr, regaddr, *pregval, JL_ERRMSG(ret));
+ return ret;
+}
+
+jl_ret_t jl51xx_phy_indirect_write(jl_uint32 phy, jl_uint32 regaddr, jl_uint32 regval)
+{
+ jl_ret_t ret = JL_ERR_OK;
+ jl_uint32 fephy_id = JL_PORT_P2VP(phy);
+ jl_uint32 addr;
+
+ addr = FEPHY0_BASE + fephy_id * FEPHY0_BLOCK_SIZE + regaddr;
+
+ ret = jl_apb_reg_write(addr, regval);
+ if (ret)
+ JL_DBG_MSG(JL_FLAG_PHY, _DBG_ERROR,
+ "%s addr=0x%x regaddr=0x%x regval=0x%x fail: %s\n",
+ __func__, addr, regaddr, regval, JL_ERRMSG(ret));
+ return ret;
+}
+
+jl_ret_t jl51xx_phy_direct_read_ext(jl_uint32 phy, jl_uint32 page, jl_uint32 reg, jl_uint32 *pregval)
+{
+ if ((page > PHY_REG_MASK) || (reg > PHY_REG_MASK))
+ return JL_ERR_PARAM;
+
+ *pregval = jl_phy_reg_read_ext(phy, page, reg);
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_phy_direct_write_ext(jl_uint32 phy, jl_uint32 page, jl_uint32 reg, jl_uint32 regval)
+{
+ if ((page > PHY_REG_MASK) || (reg > PHY_REG_MASK))
+ return JL_ERR_PARAM;
+
+ jl_phy_reg_write_ext(phy, page, reg, (jl_uint16)(regval & PHY_DATA_MASK));
+
+ return JL_ERR_OK;
+}
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/jl51xx/jl51xx_drv_port.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/jl51xx/jl51xx_drv_port.c
new file mode 100644
index 0000000..d9df3a1
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/jl51xx/jl51xx_drv_port.c
@@ -0,0 +1,366 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+
+#include "jl_base.h"
+#include "jl51xx/jl51xx_drv_phy.h"
+#include "jl51xx/reg_phy.h"
+#include "jl51xx/jl51xx_drv_port.h"
+#include "jl51xx/jl51xx_mac_uctrl.h"
+
+jl_ret_t jl51xx_port_phy_control_reg_set(jl_port_t port, jl_uint32 regval)
+{
+ jl_ret_t ret = JL_ERR_OK;
+
+ ret = jl51xx_phy_direct_write_ext(port, 0, BMCR_OFFSET, regval);
+
+ JL_DBG_MSG(JL_FLAG_PHY, _DBG_ON, "%s reg=0x%4x\n", __func__, regval);
+ return ret;
+}
+
+jl_ret_t jl51xx_port_phy_control_reg_get(jl_port_t port, jl_uint32 *pregval)
+{
+ jl_ret_t ret;
+
+ *pregval = 0;
+ ret = jl51xx_phy_direct_read_ext(port, 0, BMCR_OFFSET, pregval);
+
+ JL_DBG_MSG(JL_FLAG_PHY, _DBG_ON, "%s reg=0x%4x\n", __func__, *pregval);
+ return ret;
+}
+
+jl_ret_t jl51xx_port_phy_an_adv_reg_set(jl_port_t port, jl_uint32 regval)
+{
+ jl_ret_t ret;
+
+ JL_DBG_MSG(JL_FLAG_PHY, _DBG_ON, "%s reg=0x%4x\n", __func__, regval);
+
+ ret = jl51xx_phy_direct_write_ext(port, 0, ANAR_OFFSET, regval);
+ return ret;
+}
+
+jl_ret_t jl51xx_port_phy_an_adv_reg_get(jl_port_t port, jl_uint32 *pregval)
+{
+ jl_ret_t ret;
+
+ ret = jl51xx_phy_direct_read_ext(port, 0, ANAR_OFFSET, pregval);
+
+ JL_DBG_MSG(JL_FLAG_PHY, _DBG_ON, "%s reg=0x%4x\n", __func__, *pregval);
+
+ return ret;
+}
+
+jl_ret_t jl51xx_port_phy_status_reg_get(jl_port_t port, jl_uint32 *pregval)
+{
+ jl_ret_t ret;
+
+
+ ret = jl51xx_sw_rsvd_read(port, pregval);
+
+ JL_DBG_MSG(JL_FLAG_PHY, _DBG_ON, "%s reg=0x%4x\n", __func__, *pregval);
+ return ret;
+}
+
+jl_ret_t jl51xx_port_phy_enable_set(jl_port_t port, jl_enable_t enable)
+{
+ jl_uint32 regval;
+ jl_ret_t ret = JL_ERR_OK;
+
+ if (port >= JL_PORT_MAX)
+ return JL_ERR_PARAM;
+
+ ret = jl51xx_phy_direct_read_ext(port, 0, BMCR_OFFSET,
+ ®val);
+ if (ret)
+ return ret;
+ if (enable == 0)
+ SET_BIT(regval, 11);
+ else
+ CLR_BIT(regval, 11);
+
+ return jl51xx_phy_direct_write_ext(port, 0, BMCR_OFFSET, regval);
+}
+
+jl_ret_t jl51xx_port_phy_enable_get(jl_port_t port, jl_enable_t *penable)
+{
+ jl_uint32 regval;
+ jl_ret_t ret = JL_ERR_OK;
+
+ if (port >= JL_PORT_MAX)
+ return JL_ERR_PARAM;
+
+ ret = jl51xx_phy_direct_read_ext(port, 0, BMCR_OFFSET,
+ ®val);
+ if (ret)
+ return ret;
+
+ *penable = (regval & BIT(11)) ? 0 : 1;
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_port_phy_isolate_set(jl_port_t port, jl_enable_t enable)
+{
+ jl_uint32 regval;
+ jl_ret_t ret = JL_ERR_OK;
+
+ if (port >= JL_PORT_MAX)
+ return JL_ERR_PARAM;
+
+ ret = jl51xx_phy_direct_read_ext(port, 0, BMCR_OFFSET,
+ ®val);
+ if (ret)
+ return ret;
+ if (enable == 1)
+ SET_BIT(regval, 10);
+ else
+ CLR_BIT(regval, 10);
+
+ return jl51xx_phy_direct_write_ext(port, 0, BMCR_OFFSET, regval);
+}
+
+jl_ret_t jl51xx_port_phy_isolate_get(jl_port_t port, jl_enable_t *penable)
+{
+ jl_uint32 regval;
+ jl_ret_t ret = JL_ERR_OK;
+
+ if (port >= JL_PORT_MAX)
+ return JL_ERR_PARAM;
+
+ ret = jl51xx_phy_direct_read_ext(port, 0, BMCR_OFFSET,
+ ®val);
+ if (ret)
+ return ret;
+
+ *penable = (regval & BIT(10)) ? 1 : 0;
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_port_phy_loopback_get(jl_port_t port, jl_enable_t *pen_loopback)
+{
+ jl_uint32 regval;
+ jl_ret_t ret = JL_ERR_OK;
+
+ if (port >= JL_PORT_MAX)
+ return JL_ERR_PARAM;
+
+ ret = jl51xx_phy_direct_read_ext(port, 0, BMCR_OFFSET,
+ ®val);
+ if (ret)
+ return ret;
+
+ *pen_loopback = (regval & BIT(14)) ? 1 : 0;
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_port_phy_loopback_set(jl_port_t port, jl_enable_t en_loopback)
+{
+ jl_uint32 regval;
+ jl_ret_t ret = JL_ERR_OK;
+
+ if (port >= JL_PORT_MAX)
+ return JL_ERR_PARAM;
+
+ ret = jl51xx_phy_direct_read_ext(port, 0, BMCR_OFFSET,
+ ®val);
+ if (ret)
+ return ret;
+ if (en_loopback == 1)
+ SET_BIT(regval, 14);
+ else
+ CLR_BIT(regval, 14);
+
+ return jl51xx_phy_direct_write_ext(port, 0, BMCR_OFFSET, regval);
+}
+
+jl_ret_t jl51xx_port_mac_force_link_set(jl_port_t phy_port, jl_port_mac_ability_t *pability)
+{
+ jl_ret_t ret;
+ jl_uint64 mac_is_link, mac_duplex, mac_speed;
+ jl_uint64 mac_tx_fc_en, mac_rx_fc_en, mac_force_fc_en, mac_force_status_en;
+ jl_uint32 mac_user_ctrl_val[1];
+ jl_uint8 *preg_val = NULL;
+
+ preg_val = (jl_uint8 *)&mac_user_ctrl_val[0];
+
+ ret = jl51xx_mac_uctrl_read(phy_port, &mac_user_ctrl_val[0]);
+ if (ret)
+ return ret;
+
+ //mac_user_ctrl_val[0] &= ~(0x40B7);
+ /* mac force status control set*/
+ mac_force_status_en = pability->force_mode;
+ mac_is_link = pability->link;
+ mac_duplex = pability->duplex;
+ mac_speed = pability->speed;
+ /* mac force flow contorl set*/
+ mac_force_fc_en = pability->force_fc_en;
+ mac_tx_fc_en = pability->tx_pause;
+ mac_rx_fc_en = pability->rx_pause;
+
+ jl_write_bits(preg_val, mac_is_link, 0, 1);
+ jl_write_bits(preg_val, mac_duplex, 1, 1);
+ jl_write_bits(preg_val, mac_speed, 2, 1);
+ jl_write_bits(preg_val, mac_tx_fc_en, 4, 1);
+ jl_write_bits(preg_val, mac_rx_fc_en, 5, 1);
+ jl_write_bits(preg_val, mac_force_fc_en, 7, 1);
+ jl_write_bits(preg_val, mac_force_status_en, 14, 1);
+
+ ret = jl51xx_mac_uctrl_write(phy_port, mac_user_ctrl_val[0]);
+ if (ret)
+ return ret;
+
+ JL_DBG_MSG(JL_FLAG_PHY, _DBG_ON, "%s reg=0x%4x\n", __func__, mac_user_ctrl_val[0]);
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_port_mac_force_link_get(jl_port_t phy_port, jl_port_mac_ability_t *pability)
+{
+ jl_ret_t ret;
+ jl_uint64 mac_is_link, mac_duplex, mac_speed,
+ mac_tx_fc_en, mac_rx_fc_en, mac_force_status_en;
+ jl_uint32 mac_user_ctrl_val[1];
+ jl_uint8 *preg_val = NULL;
+
+ preg_val = (jl_uint8 *)&mac_user_ctrl_val[0];
+
+ ret = jl51xx_mac_uctrl_read(phy_port, &mac_user_ctrl_val[0]);
+ if (ret)
+ return ret;
+ jl_read_bits(preg_val, &mac_is_link, 0, 1);
+ jl_read_bits(preg_val, &mac_duplex, 1, 1);
+ jl_read_bits(preg_val, &mac_speed, 2, 1);
+ jl_read_bits(preg_val, &mac_force_status_en, 14, 1);
+ if (mac_user_ctrl_val[0] & BIT(7)) {
+ jl_read_bits(preg_val, &mac_tx_fc_en, 4, 1);
+ jl_read_bits(preg_val, &mac_rx_fc_en, 5, 1);
+ } else {
+ mac_tx_fc_en = 0;
+ mac_rx_fc_en = 0;
+ }
+
+ pability->link = (jl_uint32)mac_is_link;
+ pability->duplex = (jl_uint32)mac_duplex;
+ pability->speed = (jl_uint32)mac_speed;
+ pability->tx_pause = (jl_uint32)mac_tx_fc_en;
+ pability->rx_pause = (jl_uint32)mac_rx_fc_en;
+ pability->force_mode = (jl_uint32)mac_force_status_en;
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_port_mac_force_link_ext_set(jl_port_t port, jl_port_ext_mac_ability_t *pability)
+{
+ jl_ret_t ret;
+ jl_uint64 mac_is_link, mac_duplex, mac_speed;
+ jl_uint64 mac_tx_fc_en, mac_rx_fc_en;
+ jl_uint32 mac_user_ctrl_val[1];
+ jl_uint8 *preg_val = NULL;
+
+ /* set EXT MAC force link ability */
+ preg_val = (jl_uint8 *)&mac_user_ctrl_val[0];
+
+ ret = jl51xx_mac_uctrl_read(port, &mac_user_ctrl_val[0]);
+ if (ret)
+ return ret;
+
+ mac_duplex = pability->duplex;
+ mac_speed = pability->speed;
+ mac_tx_fc_en = pability->tx_pause;
+ mac_rx_fc_en = pability->rx_pause;
+ mac_is_link = pability->link;
+
+ pability->force_mode = 1;
+
+ jl_write_bits(preg_val, mac_is_link, 0, 1);
+ jl_write_bits(preg_val, mac_duplex, 1, 1);
+ jl_write_bits(preg_val, mac_speed, 2, 1);
+ jl_write_bits(preg_val, mac_tx_fc_en, 4, 1);
+ jl_write_bits(preg_val, mac_rx_fc_en, 5, 1);
+
+ ret = jl51xx_mac_uctrl_write(port, mac_user_ctrl_val[0]);
+ if (ret)
+ return ret;
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_port_mac_force_link_ext_get(jl_port_t port, jl_port_ext_mac_ability_t *pability)
+{
+ jl_uint32 mac_user_ctrl_val[1];
+ jl_ret_t ret;
+ jl_uint64 mac_is_link, mac_duplex, mac_speed,
+ mac_tx_fc_en, mac_rx_fc_en;
+ jl_uint8 *preg_val = NULL;
+
+ /* get ext mac force link ability */
+ preg_val = (jl_uint8 *)&mac_user_ctrl_val[0];
+
+ ret = jl51xx_mac_uctrl_read(port, &mac_user_ctrl_val[0]);
+ if (ret)
+ return ret;
+
+ jl_read_bits(preg_val, &mac_is_link, 0, 1);
+ jl_read_bits(preg_val, &mac_duplex, 1, 1);
+ jl_read_bits(preg_val, &mac_speed, 2, 1);
+ jl_read_bits(preg_val, &mac_tx_fc_en, 4, 1);
+ jl_read_bits(preg_val, &mac_rx_fc_en, 5, 1);
+
+ pability->link = (jl_uint32)mac_is_link;
+ pability->duplex = (jl_uint32)mac_duplex;
+ pability->speed = (jl_uint32)mac_speed;
+ pability->tx_pause = (jl_uint32)mac_tx_fc_en;
+ pability->rx_pause = (jl_uint32)mac_rx_fc_en;
+ pability->force_mode = 1;
+
+ return JL_ERR_OK;
+}
+
+#define ETHMAC_REG_ADDR(idx, ofs) (ETHMAC0_BASE + idx * ETHMAC0_BLOCK_SIZE + ofs)
+jl_ret_t jl51xx_port_mac_loopback_set(jl_port_t port, jl_enable_t en_loopback)
+{
+ jl_ret_t ret;
+ jl_uint32 val;
+ jl_uint32 regaddr;
+
+ regaddr = ETHMAC_REG_ADDR(JL_PORT_P2M(port), MAC_MODER_OFFSET);
+
+ ret = jl_apb_reg_read(regaddr, &val);
+ if (ret)
+ return ret;
+
+ if (en_loopback == 1)
+ SET_BIT(val, 3);
+ else if (en_loopback == 0)
+ CLR_BIT(val, 3);
+ else
+ return JL_ERR_PARAM;
+
+ return jl_apb_reg_write(regaddr, val);
+}
+
+jl_ret_t jl51xx_port_mac_loopback_get(jl_port_t port, jl_enable_t *pen_loopback)
+{
+ jl_ret_t ret;
+ jl_uint32 val;
+ jl_uint32 regaddr;
+
+ regaddr = ETHMAC_REG_ADDR(JL_PORT_P2M(port), MAC_MODER_OFFSET);
+
+ ret = jl_apb_reg_read(regaddr, &val);
+ if (ret)
+ return ret;
+
+ *pen_loopback = (val & BIT(3)) ? 1 : 0;
+
+ return JL_ERR_OK;
+}
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/jl51xx/jl51xx_drv_qos.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/jl51xx/jl51xx_drv_qos.c
new file mode 100644
index 0000000..6242c0a
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/jl51xx/jl51xx_drv_qos.c
@@ -0,0 +1,1120 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+
+#include "jl_base.h"
+#include "qos.h"
+#include "jl51xx/jl51xx_drv_qos.h"
+
+#define QOS_L3_PROR_MAX_IDX 3
+#define QOS_L3_TOS_MAX_IDX 256
+#define QOS_L3_EXP_MAX_IDX 8
+#define QOS_L3_UNKNOWN_MAX_IDX 1
+
+jl_qos_res_mng_t g_res_mngt;
+
+static jl_ret_t jl51xx_qos_resource_info_get(void);
+static jl_ret_t jl51xx_qos_drain_port(jl_uint16 l_mask);
+static jl_ret_t jl51xx_qos_recover_port(jl_uint16 l_mask);
+static jl_ret_t jl51xx_qos_check_port_empty(jl_uint16 l_mask);
+static jl_ret_t jl51xx_qos_dwrr_res_check(void);
+
+
+static jl_ret_t __check_l3_args(struct qos_l3_config *config)
+{
+ switch (config->type) {
+ case QOS_L3_IPV4:
+ if (config->qos_l3.ipv4.priority > QOS_L3_PROR_MAX_IDX)
+ return JL_ERR_PARAM;
+ if (config->qos_l3.ipv4.tos >= QOS_L3_TOS_MAX_IDX)
+ return JL_ERR_PARAM;
+ break;
+ case QOS_L3_IPV6:
+ if (config->qos_l3.ipv6.priority > QOS_L3_PROR_MAX_IDX)
+ return JL_ERR_PARAM;
+ if (config->qos_l3.ipv6.tos >= QOS_L3_TOS_MAX_IDX)
+ return JL_ERR_PARAM;
+ break;
+ case QOS_L3_MPLS:
+ if (config->qos_l3.mpls.priority > QOS_L3_PROR_MAX_IDX)
+ return JL_ERR_PARAM;
+ if (config->qos_l3.mpls.exp >= QOS_L3_EXP_MAX_IDX)
+ return JL_ERR_PARAM;
+ break;
+ case QOS_L3_UNKNOWN:
+ if (config->qos_l3.unknown.priority > QOS_L3_PROR_MAX_IDX)
+ return JL_ERR_PARAM;
+ break;
+ default:
+ return JL_ERR_PARAM;
+ }
+
+ return JL_ERR_OK;
+}
+
+/* L3 Based assign */
+jl_ret_t jl51xx_qos_l3_set(struct qos_l3_config *config)
+{
+ jl_ret_t ret;
+ jl_uint32 reg_addr = 0;
+ jl_uint8 *preg_val = NULL;
+
+ if (__check_l3_args(config))
+ return JL_ERR_PARAM;
+
+ switch (config->type) {
+ case QOS_L3_IPV4:
+ {
+ jl_uint32 ipv4_egress_val[1] = {0};
+ jl_uint64 p_queue;
+
+ reg_addr = SWCORE_BASE + IP_TOS_FIELD_TO_EGRESS_QUEUE_MAPPING_TABLE_OFFSET + config->qos_l3.ipv4.tos * 1;
+ preg_val = (jl_uint8 *)&ipv4_egress_val[0];
+ ret = jl_apb_reg_burst_read(reg_addr, &ipv4_egress_val[0], 1);
+ if (ret)
+ return ret;
+ p_queue = config->qos_l3.ipv4.priority;
+ jl_write_bits(preg_val, p_queue, 0, 2);
+ ret = jl_apb_reg_burst_write(reg_addr, &ipv4_egress_val[0], 1);
+ if (ret)
+ return ret;
+ break;
+ }
+ case QOS_L3_IPV6:
+ {
+ jl_uint32 ipv6_egress_val[1] = {0};
+ jl_uint64 p_queue;
+
+ reg_addr = SWCORE_BASE + IP_TOS_FIELD_TO_EGRESS_QUEUE_MAPPING_TABLE_OFFSET + config->qos_l3.ipv6.tos * 1;
+ preg_val = (jl_uint8 *)&ipv6_egress_val[0];
+ ret = jl_apb_reg_burst_read(reg_addr, &ipv6_egress_val[0], 1);
+ if (ret)
+ return ret;
+ p_queue = config->qos_l3.ipv6.priority;
+ jl_write_bits(preg_val, p_queue, 0, 2);
+ ret = jl_apb_reg_burst_write(reg_addr, &ipv6_egress_val[0], 1);
+ if (ret)
+ return ret;
+ break;
+ }
+ case QOS_L3_MPLS:
+ {
+ jl_uint32 mplsmap_val[1] = {0};
+ jl_uint64 p_queue;
+
+ reg_addr = SWCORE_BASE + MPLS_EXP_FIELD_TO_EGRESS_QUEUE_MAPPING_TABLE_OFFSET + config->qos_l3.mpls.exp * 1;
+ preg_val = (jl_uint8 *)&mplsmap_val[0];
+ ret = jl_apb_reg_burst_read(reg_addr, &mplsmap_val[0], 1);
+ if (ret)
+ return ret;
+ p_queue = config->qos_l3.mpls.priority;
+ jl_write_bits(preg_val, p_queue, 0, 2);
+ ret = jl_apb_reg_burst_write(reg_addr, &mplsmap_val[0], 1);
+ if (ret)
+ return ret;
+ break;
+ }
+ case QOS_L3_UNKNOWN:
+ {
+ jl_uint32 unknown_type_val[1] = {0};
+ jl_uint64 force_queue;
+ jl_uint64 e_queue;
+
+ reg_addr = SWCORE_BASE + FORCE_UNKNOWN_L3_PACKET_TO_SPECIFIC_EGRESS_QUEUE_OFFSET;
+ preg_val = (jl_uint8 *)&unknown_type_val[0];
+ force_queue = config->qos_l3.unknown.force_en;
+ e_queue = config->qos_l3.unknown.priority;
+ jl_write_bits(preg_val, force_queue, 0, 1);
+ jl_write_bits(preg_val, e_queue, 1, 2);
+ ret = jl_apb_reg_burst_write(reg_addr, &unknown_type_val[0], 1);
+ if (ret)
+ return ret;
+ break;
+ }
+ default:
+ return JL_ERR_PARAM;
+ }
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_qos_l3_get(struct qos_l3_config *config)
+{
+ jl_ret_t ret;
+ jl_uint32 reg_addr = 0;
+ jl_uint8 *preg_val = NULL;
+
+ if (__check_l3_args(config))
+ return JL_ERR_PARAM;
+
+ do {
+ jl_uint32 ipv4_egress_val[1];
+ jl_uint64 p_queue;
+
+ reg_addr = SWCORE_BASE + IP_TOS_FIELD_TO_EGRESS_QUEUE_MAPPING_TABLE_OFFSET + config->qos_l3.ipv4.tos * 1;
+ preg_val = (jl_uint8 *)&ipv4_egress_val[0];
+ ret = jl_apb_reg_burst_read(reg_addr, &ipv4_egress_val[0], 1);
+ if (ret)
+ return ret;
+ jl_read_bits(preg_val, &p_queue, 0, 2);
+ config->qos_l3.ipv4.priority = p_queue;
+ } while (0);
+
+ do {
+ jl_uint32 ipv6_egress_val[1];
+ jl_uint64 p_queue;
+
+ reg_addr = SWCORE_BASE + IP_TOS_FIELD_TO_EGRESS_QUEUE_MAPPING_TABLE_OFFSET + config->qos_l3.ipv6.tos * 1;
+ preg_val = (jl_uint8 *)&ipv6_egress_val[0];
+ ret = jl_apb_reg_burst_read(reg_addr, &ipv6_egress_val[0], 1);
+ if (ret)
+ return ret;
+ jl_read_bits(preg_val, &p_queue, 0, 2);
+ config->qos_l3.ipv6.priority = p_queue;
+ } while (0);
+
+ do {
+ jl_uint32 mplsmap_val[1];
+ jl_uint64 p_queue;
+
+ reg_addr = SWCORE_BASE + MPLS_EXP_FIELD_TO_EGRESS_QUEUE_MAPPING_TABLE_OFFSET + config->qos_l3.mpls.exp * 1;
+ preg_val = (jl_uint8 *)&mplsmap_val[0];
+ ret = jl_apb_reg_burst_read(reg_addr, &mplsmap_val[0], 1);
+ if (ret)
+ return ret;
+ jl_read_bits(preg_val, &p_queue, 0, 2);
+ config->qos_l3.mpls.priority = p_queue;
+ } while (0);
+
+ do {
+ jl_uint32 unknown_type_val[1];
+ jl_uint64 force_queue;
+ jl_uint64 e_queue;
+
+ reg_addr = SWCORE_BASE + FORCE_UNKNOWN_L3_PACKET_TO_SPECIFIC_EGRESS_QUEUE_OFFSET;
+ preg_val = (jl_uint8 *)&unknown_type_val[0];
+ ret = jl_apb_reg_burst_read(reg_addr, &unknown_type_val[0], 1);
+ if (ret)
+ return ret;
+ jl_read_bits(preg_val, &force_queue, 0, 1);
+ jl_read_bits(preg_val, &e_queue, 1, 2);
+ config->qos_l3.unknown.force_en = force_queue;
+ config->qos_l3.unknown.priority = e_queue;
+ } while (0);
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_qos_l3_port_enable_set(jl_port_t port, jl_uint8 enable)
+{
+ jl_ret_t ret;
+ jl_uint64 prio_from_l3;
+ jl_uint32 src_port_tab_val[2];
+ jl_uint32 reg_addr = SWCORE_BASE + SOURCE_PORT_TABLE_OFFSET + JL_PORT_P2M(port) * 2;
+ jl_uint8 *preg_val = (jl_uint8 *)&src_port_tab_val[0];
+
+ ret = jl_apb_reg_burst_read(reg_addr, &src_port_tab_val[0], 2);
+ if (ret)
+ return ret;
+
+ prio_from_l3 = enable;
+ jl_write_bits(preg_val, prio_from_l3, 0, 1);
+
+ ret = jl_apb_reg_burst_write(reg_addr, &src_port_tab_val[0], 2);
+ if (ret)
+ return ret;
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_qos_l3_port_enable_get(jl_port_t port, jl_uint8 *enable)
+{
+ jl_ret_t ret;
+ jl_uint64 prio_from_l3;
+ jl_uint32 src_port_tab_val[2];
+ jl_uint32 reg_addr = SWCORE_BASE + SOURCE_PORT_TABLE_OFFSET + JL_PORT_P2M(port) * 2;
+ jl_uint8 *preg_val = (jl_uint8 *)&src_port_tab_val[0];
+
+ ret = jl_apb_reg_burst_read(reg_addr, &src_port_tab_val[0], 2);
+ if (ret)
+ return ret;
+
+ jl_read_bits(preg_val, &prio_from_l3, 0, 1);
+ *enable = prio_from_l3;
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_qos_port_set(jl_port_t port, struct qos_port_config *config)
+{
+ jl_ret_t ret;
+ jl_uint64 default_pcp;
+ jl_uint32 src_port_tab_val[2];
+ jl_uint32 reg_addr = SWCORE_BASE + SOURCE_PORT_TABLE_OFFSET + JL_PORT_P2M(port) * 2;
+ jl_uint8 *preg_val = (jl_uint8 *)&src_port_tab_val[0];
+
+ ret = jl_apb_reg_burst_read(reg_addr, &src_port_tab_val[0], 2);
+ if (ret)
+ return ret;
+
+ default_pcp = config->pcp_priority;
+ jl_write_bits(preg_val, default_pcp, 27, 3);
+
+ ret = jl_apb_reg_burst_write(reg_addr, &src_port_tab_val[0], 2);
+ if (ret)
+ return ret;
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_qos_port_get(jl_port_t port, struct qos_port_config *config)
+{
+ jl_ret_t ret;
+ jl_uint64 default_pcp;
+ jl_uint32 src_port_tab_val[2];
+ jl_uint32 reg_addr = SWCORE_BASE + SOURCE_PORT_TABLE_OFFSET + JL_PORT_P2M(port) * 2;
+ jl_uint8 *preg_val = (jl_uint8 *)&src_port_tab_val[0];
+
+ ret = jl_apb_reg_burst_read(reg_addr, &src_port_tab_val[0], 2);
+ if (ret)
+ return ret;
+
+ jl_read_bits(preg_val, &default_pcp, 27, 3);
+ config->pcp_priority = default_pcp;
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_qos_vlan_set(struct qos_vlan_config *config)
+{
+ jl_ret_t ret;
+ jl_uint64 p_queue;
+ jl_uint32 vlan_pcp_map_val[1];
+ jl_uint32 reg_addr = SWCORE_BASE + VLAN_PCP_TO_EGRESS_QUEUE_MAPPING_TABLE_OFFSET + config->pcp * 1;
+ jl_uint8 *preg_val = (jl_uint8 *)&vlan_pcp_map_val[0];
+
+ ret = jl_apb_reg_burst_read(reg_addr, &vlan_pcp_map_val[0], 1);
+ if (ret)
+ return ret;
+
+ p_queue = config->vlan_priority;
+ jl_write_bits(preg_val, p_queue, 0, 2);
+
+ ret = jl_apb_reg_burst_write(reg_addr, &vlan_pcp_map_val[0], 1);
+ if (ret)
+ return ret;
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_qos_vlan_get(struct qos_vlan_config *config)
+{
+ jl_ret_t ret;
+ jl_uint64 p_queue;
+ jl_uint32 vlan_pcp_map_val[1];
+ jl_uint32 reg_addr = SWCORE_BASE + VLAN_PCP_TO_EGRESS_QUEUE_MAPPING_TABLE_OFFSET + config->pcp * 1;
+ jl_uint8 *preg_val = (jl_uint8 *)&vlan_pcp_map_val[0];
+
+ ret = jl_apb_reg_burst_read(reg_addr, &vlan_pcp_map_val[0], 1);
+ if (ret)
+ return ret;
+
+ jl_read_bits(preg_val, &p_queue, 0, 2);
+ config->vlan_priority = p_queue;
+
+ return JL_ERR_OK;
+}
+
+/*new qos api*/
+jl_ret_t jl51xx_qos_table_init(void)
+{
+ jl_ret_t ret = JL_ERR_OK;
+ jl_port_t port = UTP_PORT0;
+ jl_uint32 dscp = 0;
+ jl_uint32 exp = 0;
+ jl_uint32 pcp = 0;
+ jl_uint32 queue = 0;
+
+ jl_qos_schedule_t t_sche;
+
+ for (queue = 0; queue < QOS_QUEUE_NUM; queue++) {
+ t_sche.type[queue] = QOS_SCHE_SP;
+ }
+
+ JL_FOR_EACH_PHY_PORT(port) {
+ /*set default l3pri disable*/
+ ret = jl51xx_qos_l3_queue_assign_enable_set(port, DISABLED);
+ JL_CHECK_RETURN(ret);
+
+ /*set default port pcp 0*/
+ ret = jl51xx_qos_l2_port_pcp_set(port, 0);
+ JL_CHECK_RETURN(ret);
+
+ /*set default Egress Queue weight 1 */
+ for (queue = 0; queue < MAX_QUEUE_NUM; queue++) {
+ ret = jl51xx_qos_queue_dwrr_set(port, queue, 1);
+ JL_CHECK_RETURN(ret);
+ }
+
+ ret = jl51xx_qos_schedule_set(port, &t_sche);
+ JL_CHECK_RETURN(ret);
+ }
+
+ for (dscp = 0; dscp <= MAX_DSCP; dscp++) {
+ ret = jl51xx_qos_l3_dscp2queue_map_set(dscp, 1);
+ JL_CHECK_RETURN(ret);
+ }
+
+ for (exp = 0; exp <= MAX_EXP; exp++) {
+ ret = jl51xx_qos_l3_exp2queue_map_set(exp, 1);
+ JL_CHECK_RETURN(ret);
+ }
+
+ for (pcp = 0; pcp <= MAX_PCP; pcp++) {
+ ret = jl51xx_qos_l2_pcp2queue_map_set(pcp, 1);
+ JL_CHECK_RETURN(ret);
+ }
+
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_qos_init(void)
+{
+ jl_ret_t ret = JL_ERR_OK;
+
+ ret = jl51xx_qos_resource_info_get();
+ JL_CHECK_RETURN(ret);
+
+ ret = jl51xx_qos_table_init();
+ JL_CHECK_RETURN(ret);
+
+ return JL_ERR_OK;
+}
+
+
+jl_ret_t jl51xx_qos_deinit(void)
+{
+ jl_ret_t ret = JL_ERR_OK;
+
+ ret = jl51xx_qos_table_init();
+ JL_CHECK_RETURN(ret);
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_qos_buf_manage_set(jl_port_t port, jl_uint32 mode)
+{
+ jl_ret_t ret = JL_ERR_OK;
+ jl_uint32 reg_addr = 0;
+ jl_uint32 reg_val = 0;
+
+ JL_CHECK_PORT(port);
+
+ reg_addr = SWCORE_BASE + EGRESS_RESOURCE_MANAGEMENT_MODE_OFFSET + JL_PORT_P2M(port);
+ ret = jl_apb_reg_read(reg_addr, ®_val);
+ if (ret)
+ return ret;
+
+ /*limit mode:0; Guarantee mode:1*/
+ WRITE_BIT(reg_val, 0, mode);
+ ret = jl_apb_reg_write(reg_addr, reg_val);
+ if (ret)
+ return ret;
+
+ g_res_mngt.mng_mode[port] = mode & 0x1;
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_qos_buf_manage_get(jl_port_t port, jl_uint32 *pmode)
+{
+ jl_ret_t ret = JL_ERR_OK;
+ jl_uint32 reg_addr = 0;
+ jl_uint32 reg_val = 0;
+
+ JL_CHECK_PORT(port);
+
+ reg_addr = SWCORE_BASE + EGRESS_RESOURCE_MANAGEMENT_MODE_OFFSET + JL_PORT_P2M(port);
+ ret = jl_apb_reg_read(reg_addr, ®_val);
+ if (ret)
+ return ret;
+
+ /*limit mode:0; Guarantee mode:1*/
+ *pmode = GET_BIT(reg_val, 0);
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_qos_queue_guarantee_set(jl_uint32 index, jl_uint32 cells)
+{
+ jl_ret_t ret = JL_ERR_OK;
+ jl_uint32 reg_addr = 0;
+ jl_uint32 reg_val = 0;
+
+ JL_ASSERT(index <= 3);
+ JL_ASSERT(cells <= 0x3ff);
+
+ reg_addr = SWCORE_BASE + EGRESS_QUEUE_GUARANTEE_SET_OFFSET + index;
+ ret = jl_apb_reg_read(reg_addr, ®_val);
+ if (ret)
+ return ret;
+
+ WRITE_BITS(reg_val, 0, 9, cells);
+ ret = jl_apb_reg_write(reg_addr, reg_val);
+ if (ret)
+ return ret;
+
+ g_res_mngt.guarantee[index] = cells;
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_qos_queue_guarantee_get(jl_uint32 index, jl_uint32 *pcells)
+{
+ jl_ret_t ret = JL_ERR_OK;
+ jl_uint32 reg_addr = 0;
+ jl_uint32 reg_val = 0;
+
+ JL_ASSERT(index <= 3);
+ JL_CHECK_POINTER(pcells);
+
+ reg_addr = SWCORE_BASE + EGRESS_QUEUE_GUARANTEE_SET_OFFSET + index;
+ ret = jl_apb_reg_read(reg_addr, ®_val);
+ if (ret)
+ return ret;
+
+ /*limit mode:0; Guarantee mode:1*/
+ *pcells = GET_BITS(reg_val, 0, 9);
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_qos_l3_queue_assign_enable_set(jl_port_t port, jl_enable_t enable)
+{
+ jl_ret_t ret;
+ jl_uint64 prio_from_l3;
+ jl_uint32 src_port_tab_val[2];
+ jl_uint32 reg_addr = SWCORE_BASE + SOURCE_PORT_TABLE_OFFSET + JL_PORT_P2M(port) * 2;
+ jl_uint8 *preg_val = (jl_uint8 *)&src_port_tab_val[0];
+
+ JL_ASSERT(enable < JL_ENABLE_END);
+
+ ret = jl_apb_reg_burst_read(reg_addr, &src_port_tab_val[0], 2);
+ if (ret)
+ return ret;
+
+ prio_from_l3 = enable;
+ jl_write_bits(preg_val, prio_from_l3, 0, 1);
+
+ ret = jl_apb_reg_burst_write(reg_addr, &src_port_tab_val[0], 2);
+ if (ret)
+ return ret;
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_qos_l3_queue_assign_enable_get(jl_port_t port, jl_enable_t *penable)
+{
+ jl_ret_t ret;
+ jl_uint64 prio_from_l3;
+ jl_uint32 src_port_tab_val[2];
+ jl_uint32 reg_addr = SWCORE_BASE + SOURCE_PORT_TABLE_OFFSET + JL_PORT_P2M(port) * 2;
+ jl_uint8 *preg_val = (jl_uint8 *)&src_port_tab_val[0];
+
+ ret = jl_apb_reg_burst_read(reg_addr, &src_port_tab_val[0], 2);
+ if (ret)
+ return ret;
+
+ jl_read_bits(preg_val, &prio_from_l3, 0, 1);
+ *penable = prio_from_l3;
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_qos_l3_dscp2queue_map_set(jl_uint32 dscp, jl_uint32 queue)
+{
+ jl_ret_t ret = JL_ERR_OK;
+ jl_uint32 reg_addr = 0;
+ jl_uint32 reg_val = 0;
+
+ JL_ASSERT(dscp <= MAX_DSCP);
+ JL_ASSERT(queue < MAX_QUEUE_NUM);
+
+ reg_addr = SWCORE_BASE + IP_TOS_FIELD_TO_EGRESS_QUEUE_MAPPING_TABLE_OFFSET + (dscp << 2);
+ ret = jl_apb_reg_read(reg_addr, ®_val);
+ if (ret)
+ return ret;
+
+ WRITE_BITS(reg_val, 0, 1, queue);
+ ret = jl_apb_reg_write(reg_addr, reg_val);
+ if (ret)
+ return ret;
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_qos_l3_dscp2queue_map_get(jl_uint32 dscp, jl_uint32 *pqueue)
+{
+ jl_ret_t ret = JL_ERR_OK;
+ jl_uint32 reg_addr = 0;
+ jl_uint32 reg_val = 0;
+
+ JL_ASSERT(dscp <= MAX_DSCP);
+ JL_CHECK_POINTER(pqueue);
+
+ reg_addr = SWCORE_BASE + IP_TOS_FIELD_TO_EGRESS_QUEUE_MAPPING_TABLE_OFFSET + (dscp << 2);
+ ret = jl_apb_reg_read(reg_addr, ®_val);
+ if (ret)
+ return ret;
+
+ *pqueue = GET_BITS(reg_val, 0, 1);
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_qos_l3_exp2queue_map_set(jl_uint32 exp, jl_uint32 queue)
+{
+ jl_ret_t ret = JL_ERR_OK;
+ jl_uint32 reg_addr = 0;
+ jl_uint32 reg_val = 0;
+
+ JL_ASSERT(exp <= MAX_EXP);
+ JL_ASSERT(queue < MAX_QUEUE_NUM);
+
+ reg_addr = SWCORE_BASE + MPLS_EXP_FIELD_TO_EGRESS_QUEUE_MAPPING_TABLE_OFFSET + exp;
+ ret = jl_apb_reg_read(reg_addr, ®_val);
+ if (ret)
+ return ret;
+
+ WRITE_BITS(reg_val, 0, 1, queue);
+ ret = jl_apb_reg_write(reg_addr, reg_val);
+ if (ret)
+ return ret;
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_qos_l3_exp2queue_map_get(jl_uint32 exp, jl_uint32 *pqueue)
+{
+ jl_ret_t ret = JL_ERR_OK;
+ jl_uint32 reg_addr = 0;
+ jl_uint32 reg_val = 0;
+
+ JL_ASSERT(exp <= MAX_EXP);
+ JL_CHECK_POINTER(pqueue);
+
+ reg_addr = SWCORE_BASE + MPLS_EXP_FIELD_TO_EGRESS_QUEUE_MAPPING_TABLE_OFFSET + exp;
+ ret = jl_apb_reg_read(reg_addr, ®_val);
+ if (ret)
+ return ret;
+
+ *pqueue = GET_BITS(reg_val, 0, 1);
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_qos_l2_pcp2queue_map_set(jl_uint32 vlan_pcp, jl_uint32 queue)
+{
+ jl_ret_t ret = JL_ERR_OK;
+ jl_uint32 reg_addr = 0;
+ jl_uint32 reg_val = 0;
+
+ JL_ASSERT(vlan_pcp <= MAX_PCP);
+ JL_ASSERT(queue < MAX_QUEUE_NUM);
+
+ reg_addr = SWCORE_BASE + VLAN_PCP_TO_EGRESS_QUEUE_MAPPING_TABLE_OFFSET + vlan_pcp;
+ ret = jl_apb_reg_read(reg_addr, ®_val);
+ if (ret)
+ return ret;
+
+ WRITE_BITS(reg_val, 0, 1, queue);
+ ret = jl_apb_reg_write(reg_addr, reg_val);
+ if (ret)
+ return ret;
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_qos_l2_pcp2queue_map_get(jl_uint32 vlan_pcp, jl_uint32 *pqueue)
+{
+ jl_ret_t ret = JL_ERR_OK;
+ jl_uint32 reg_addr = 0;
+ jl_uint32 reg_val = 0;
+
+ JL_ASSERT(vlan_pcp <= MAX_PCP);
+ JL_CHECK_POINTER(pqueue);
+
+ reg_addr = SWCORE_BASE + VLAN_PCP_TO_EGRESS_QUEUE_MAPPING_TABLE_OFFSET + vlan_pcp;
+ ret = jl_apb_reg_read(reg_addr, ®_val);
+ if (ret)
+ return ret;
+
+ *pqueue = GET_BITS(reg_val, 0, 1);
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_qos_l2_port_pcp_set(jl_port_t port, jl_uint32 pcp)
+{
+ jl_ret_t ret = JL_ERR_OK;
+ jl_uint64 default_pcp = 0;
+ jl_uint32 src_port_tab_val[2];
+ jl_uint32 reg_addr = SWCORE_BASE + SOURCE_PORT_TABLE_OFFSET + JL_PORT_P2M(port) * 2;
+ jl_uint8 *preg_val = (jl_uint8 *)&src_port_tab_val[0];
+
+ JL_ASSERT(pcp <= MAX_PCP);
+
+ ret = jl_apb_reg_burst_read(reg_addr, &src_port_tab_val[0], 2);
+ if (ret)
+ return ret;
+
+ default_pcp = pcp;
+ jl_write_bits(preg_val, default_pcp, 27, 3);
+
+ ret = jl_apb_reg_burst_write(reg_addr, &src_port_tab_val[0], 2);
+ if (ret)
+ return ret;
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_qos_l2_port_pcp_get(jl_port_t port, jl_uint32 *ppcp)
+{
+ jl_ret_t ret = JL_ERR_OK;
+ jl_uint64 default_pcp = 0;
+ jl_uint32 src_port_tab_val[2];
+ jl_uint32 reg_addr = SWCORE_BASE + SOURCE_PORT_TABLE_OFFSET + JL_PORT_P2M(port) * 2;
+ jl_uint8 *preg_val = (jl_uint8 *)&src_port_tab_val[0];
+
+ JL_CHECK_POINTER(ppcp);
+
+ ret = jl_apb_reg_burst_read(reg_addr, &src_port_tab_val[0], 2);
+ if (ret)
+ return ret;
+
+ jl_read_bits(preg_val, &default_pcp, 27, 3);
+ *ppcp = default_pcp;
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_qos_queue_pri_set(jl_port_t port, jl_uint32 queue, jl_uint32 priority)
+{
+ jl_ret_t ret = JL_ERR_OK;
+ jl_uint32 reg_addr = 0;
+ jl_uint32 reg_val = 0;
+
+ JL_ASSERT(queue < MAX_QUEUE_NUM);
+ JL_ASSERT(priority < MAX_QUEUE_NUM); //four priority,same as queue
+
+ reg_addr = SWCORE_BASE + MAP_QUEUE_TO_PRIORITY_OFFSET + JL_PORT_P2M(port);
+ ret = jl_apb_reg_read(reg_addr, ®_val);
+ JL_CHECK_RETURN(ret);
+
+ WRITE_BITS(reg_val, (queue*2 + 0), (queue*2 + 1), priority);
+
+ ret = jl_apb_reg_write(reg_addr, reg_val);
+ JL_CHECK_RETURN(ret);
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_qos_queue_pri_get(jl_port_t port, jl_uint32 queue, jl_uint32 *ppriority)
+{
+ jl_ret_t ret = JL_ERR_OK;
+ jl_uint32 reg_addr = 0;
+ jl_uint32 reg_val = 0;
+
+ JL_ASSERT(queue < MAX_QUEUE_NUM);
+ JL_CHECK_POINTER(ppriority);
+
+ reg_addr = SWCORE_BASE + MAP_QUEUE_TO_PRIORITY_OFFSET + JL_PORT_P2M(port);
+ ret = jl_apb_reg_read(reg_addr, ®_val);
+ JL_CHECK_RETURN(ret);
+
+ *ppriority = GET_BITS(reg_val, (queue*2 + 0), (queue*2 + 1));
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_qos_queue_dwrr_set(jl_port_t port, jl_uint32 queue, jl_uint32 weight)
+{
+ jl_ret_t ret = JL_ERR_OK;
+ jl_uint32 reg_addr = 0;
+ jl_uint32 reg_val = 0;
+
+ JL_ASSERT(queue < MAX_QUEUE_NUM);
+ JL_ASSERT(weight <= MAX_QUEUE_WEIGHT);
+
+ reg_addr = SWCORE_BASE + DWRR_WEIGHT_CONFIGURATION_OFFSET + JL_PORT_P2M(port)*4 + queue;
+ ret = jl_apb_reg_read(reg_addr, ®_val);
+ JL_CHECK_RETURN(ret);
+
+ WRITE_BITS(reg_val, 0, 7, weight);
+
+ ret = jl_apb_reg_write(reg_addr, reg_val);
+ JL_CHECK_RETURN(ret);
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_qos_queue_dwrr_get(jl_port_t port, jl_uint32 queue, jl_uint32 *pweight)
+{
+ jl_ret_t ret = JL_ERR_OK;
+ jl_uint32 reg_addr = 0;
+ jl_uint32 reg_val = 0;
+
+ JL_ASSERT(queue < MAX_QUEUE_NUM);
+ JL_CHECK_POINTER(pweight);
+
+ reg_addr = SWCORE_BASE + DWRR_WEIGHT_CONFIGURATION_OFFSET + JL_PORT_P2M(port)*4 + queue;
+ ret = jl_apb_reg_read(reg_addr, ®_val);
+ JL_CHECK_RETURN(ret);
+
+ *pweight = GET_BITS(reg_val, 0, 7);
+
+ return JL_ERR_OK;
+}
+
+
+
+static jl_ret_t jl51xx_qos_resource_info_get(void)
+{
+ jl_ret_t ret = JL_ERR_OK;
+ jl_ret_t ret2 = JL_ERR_OK;
+ jl_uint8 port, idx;
+ jl_uint32 reg_addr = 0;
+ jl_uint32 reg_val = 0;
+
+ for (idx = 0; idx < 4; idx++)
+ {
+ reg_addr = SWCORE_BASE + EGRESS_QUEUE_GUARANTEE_SET_OFFSET + idx;
+ ret = jl_apb_reg_read(reg_addr, ®_val);
+ JL_CHECK_RETURN(ret);
+
+ g_res_mngt.guarantee[idx] = reg_val;
+ }
+
+ JL_FOR_EACH_PHY_PORT(port) {
+ reg_addr = SWCORE_BASE + EGRESS_RESOURCE_MANAGEMENT_MODE_OFFSET + JL_PORT_P2M(port);
+ ret = jl_apb_reg_read(reg_addr, ®_val);
+ JL_CHECK_RETURN(ret);
+
+ g_res_mngt.mng_mode[port] = reg_val & 0x1;
+ g_res_mngt.grt_pointer[port] = (reg_val >> 1) & 0x3;
+
+ reg_addr = SWCORE_BASE + ENABLE_ENQUEUE_TO_PORTS_AND_QUEUES_OFFSET + JL_PORT_P2M(port);
+ ret = jl_apb_reg_read(reg_addr, ®_val);
+ JL_CHECK_RETURN(ret);
+
+ g_res_mngt.en_mask[port] = reg_val & 0xf;
+ }
+
+ reg_addr = SWCORE_BASE + EGRESS_RESOURCE_MANAGEMENT_MODE_OFFSET + QOS_MULTICAST_RES_MANAGEMENT_ID;
+ ret = jl_apb_reg_read(reg_addr, ®_val);
+ JL_CHECK_RETURN(ret);
+
+ g_res_mngt.mng_mode[QOS_MULTICAST_RES_MANAGEMENT_ID] = reg_val & 0x1;
+ g_res_mngt.grt_pointer[QOS_MULTICAST_RES_MANAGEMENT_ID] = (reg_val >> 1) & 0x3;
+
+ reg_addr = SWCORE_BASE + EGRESS_RESOURCE_MANAGEMENT_MARGIN_OFFSET;
+ ret = jl_apb_reg_read(reg_addr, ®_val);
+ JL_CHECK_RETURN(ret);
+
+ g_res_mngt.global_margin = reg_val & 0x3ff;
+ g_res_mngt.ffa_margin = (reg_val >> 10) & 0x3ff;
+
+
+ if (g_res_mngt.guarantee[0] < 60)
+ {
+ ret = jl51xx_qos_drain_port(0x3ff);
+ JL_CHECK_RETURN(ret);
+
+ ret2 = jl51xx_qos_check_port_empty(0x3ff);
+ if (ret2)
+ goto recover;
+
+ ret2 = jl51xx_qos_queue_guarantee_set(0, 60); //only index 0 is needed in this patch
+
+recover:
+ ret = jl51xx_qos_recover_port(0x3ff);
+ JL_CHECK_RETURN(ret);
+ }
+
+ return ret2;
+}
+
+
+static jl_ret_t jl51xx_qos_drain_port(jl_uint16 l_mask)
+{
+ jl_uint32 reg_addr = 0;
+ jl_uint32 c_mask = 0;
+ jl_ret_t ret = JL_ERR_OK;
+ jl_port_t lport;
+
+ //disable queues
+ JL_FOR_EACH_PHY_PORT(lport) {
+ if (CHECK_BIT(l_mask, lport))
+ {
+ reg_addr = SWCORE_BASE + ENABLE_ENQUEUE_TO_PORTS_AND_QUEUES_OFFSET + JL_PORT_P2M(lport);
+ ret = jl_apb_reg_write(reg_addr, 0);
+ JL_CHECK_RETURN(ret);
+ }
+ }
+ //drain ports
+ reg_addr = SWCORE_BASE + DRAIN_PORT_OFFSET;
+
+ c_mask = JL_PORTMASK_P2M(l_mask);
+
+ ret = jl_apb_reg_write(reg_addr, c_mask);
+ JL_CHECK_RETURN(ret);
+
+ return JL_ERR_OK;
+}
+
+static jl_ret_t jl51xx_qos_recover_port(jl_uint16 l_mask)
+{
+ jl_uint32 reg_addr = 0;
+ jl_ret_t ret = JL_ERR_OK;
+ jl_port_t lport;
+
+ //disable drain
+ reg_addr = SWCORE_BASE + DRAIN_PORT_OFFSET;
+ ret = jl_apb_reg_write(reg_addr, 0);
+ JL_CHECK_RETURN(ret);
+
+ //enable queues
+ JL_FOR_EACH_PHY_PORT(lport) {
+ if (CHECK_BIT(l_mask, lport))
+ {
+ reg_addr = SWCORE_BASE + ENABLE_ENQUEUE_TO_PORTS_AND_QUEUES_OFFSET + JL_PORT_P2M(lport);
+ ret = jl_apb_reg_write(reg_addr, g_res_mngt.en_mask[lport]);
+ JL_CHECK_RETURN(ret);
+ }
+ }
+
+ return JL_ERR_OK;
+}
+
+static jl_ret_t jl51xx_qos_check_port_empty(jl_uint16 l_mask)
+{
+ jl_uint32 reg_addr = 0;
+ jl_uint32 reg_val = 0;
+ jl_portmask_t c_mask = 0;
+ jl_ret_t ret = JL_ERR_OK;
+ jl_uint8 i;
+
+ reg_addr = SWCORE_BASE + PACKET_BUFFER_STATUS_OFFSET;
+
+ c_mask = JL_PORTMASK_P2M(l_mask);
+
+ for (i = 0; i < 10; i++) {
+ ret = jl_apb_reg_read(reg_addr, ®_val);
+ JL_CHECK_RETURN(ret);
+
+ if (((~reg_val) & c_mask) == 0) {
+ return JL_ERR_OK;
+ }
+ port_udelay(50000);
+ }
+
+ return JL_ERR_BUSY;
+}
+
+static jl_ret_t jl51xx_qos_dwrr_res_check(void)
+{
+ jl_uint16 now_res = 0;
+ jl_uint16 need_res = 0;
+ jl_uint8 port;
+
+ JL_FOR_EACH_PHY_PORT(port) {
+ if (g_res_mngt.mng_mode[port] == QOS_RES_GUARANTEE) {
+ now_res += (QOS_QUEUE_NUM * g_res_mngt.guarantee[0]);
+ }
+ }
+
+ if (g_res_mngt.mng_mode[QOS_MULTICAST_RES_MANAGEMENT_ID] == QOS_RES_GUARANTEE) {
+ now_res += g_res_mngt.guarantee[g_res_mngt.grt_pointer[QOS_MULTICAST_RES_MANAGEMENT_ID]];
+ }
+
+ need_res += (QOS_QUEUE_NUM * g_res_mngt.guarantee[0]);
+
+ if ((now_res + need_res) > (QOS_RES_CELLS - g_res_mngt.global_margin - g_res_mngt.ffa_margin))
+ return JL_ERR_RESOURCE;
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_qos_schedule_set(jl_uint8 port, jl_qos_schedule_t *psche)
+{
+ jl_ret_t ret = JL_ERR_OK;
+ jl_ret_t ret2 = JL_ERR_OK;
+ jl_uint16 port_mask = 0;
+ jl_uint8 i, dwrr_num = 0, ori_dwrr = 0;
+ jl_uint8 q_prio = 0, is_change = 0;
+ jl_uint8 crt_pri[QOS_QUEUE_NUM];
+ jl_qos_schedule_t ori_sche;
+
+ JL_CHECK_POINTER(psche);
+
+ ret = jl51xx_qos_schedule_get(port, &ori_sche);
+ JL_CHECK_RETURN(ret);
+
+ for (i = 0; i < QOS_QUEUE_NUM; i++)
+ {
+ if (psche->type[i] > QOS_SCHE_DWRR)
+ return JL_ERR_PARAM;
+
+ if (ori_sche.type[i] != psche->type[i])
+ is_change = 1;
+
+ if (ori_sche.type[i] == QOS_SCHE_DWRR)
+ ori_dwrr = 1;
+
+ if (psche->type[i] == QOS_SCHE_DWRR)
+ {
+ crt_pri[i] = 3;
+ dwrr_num++;
+ }
+ else
+ crt_pri[i] = q_prio++;
+ }
+
+ /*check wether is invalid config*/
+ if (dwrr_num == 1)
+ return JL_ERR_CONFIG;
+
+ /*check wether config is changed*/
+ if (is_change == 0)
+ return JL_ERR_OK;
+
+ SET_BIT(port_mask,port);
+
+ /*resource check is needed when change to guarantee*/
+ if (dwrr_num && !ori_dwrr)
+ {
+ ret = jl51xx_qos_dwrr_res_check();
+ JL_CHECK_RETURN(ret);
+ }
+
+ ret = jl51xx_qos_drain_port(port_mask);
+ JL_CHECK_RETURN(ret);
+
+ /*waiting for port empty*/
+ ret2 = jl51xx_qos_check_port_empty(port_mask);
+
+ if (ret2 == JL_ERR_OK)
+ {
+ /*when change to guarantee*/
+ if (dwrr_num && !ori_dwrr)
+ {
+ ret2 = jl51xx_qos_buf_manage_set(port, QOS_RES_GUARANTEE);
+ if (ret2)
+ goto recover;
+ }
+ else if (!dwrr_num && ori_dwrr) /*when change to limiter*/
+ {
+ ret2 = jl51xx_qos_buf_manage_set(port, QOS_RES_LIMITER);
+ if (ret2)
+ goto recover;
+ }
+
+ for (i = 0; i < QOS_QUEUE_NUM; i++)
+ {
+ ret2 = jl51xx_qos_queue_pri_set(port, i, crt_pri[i]);
+ if (ret2)
+ break;
+ }
+ }
+
+recover:
+ ret = jl51xx_qos_recover_port(port_mask);
+ JL_CHECK_RETURN(ret);
+
+ return ret2;
+}
+
+
+jl_ret_t jl51xx_qos_schedule_get(jl_uint8 port, jl_qos_schedule_t *psche)
+{
+ jl_ret_t ret = JL_ERR_OK;
+ jl_uint32 crt_pri[QOS_QUEUE_NUM];
+ jl_uint8 i = 0, dwrr_num = 0;
+
+ JL_CHECK_POINTER(psche);
+
+ for (i = 0; i < QOS_QUEUE_NUM; i++)
+ {
+ ret = jl51xx_qos_queue_pri_get(port, i, &crt_pri[i]);
+ if (ret)
+ return ret;
+ }
+
+ for (i = 0; i < QOS_QUEUE_NUM; i++)
+ {
+ psche->type[i] = QOS_SCHE_SP;
+
+ if (crt_pri[i] == 3)
+ {
+ psche->type[i] = QOS_SCHE_DWRR;
+ dwrr_num++;
+
+ if ((i == 3) && (dwrr_num == 1))
+ psche->type[i] = QOS_SCHE_SP;
+ }
+ }
+ return JL_ERR_OK;
+}
+
+
+
+jl_ret_t jl51xx_qos_enqueue_set(jl_uint8 port,
+ jl_uint8 enmask)
+{
+ jl_ret_t ret = JL_ERR_OK;
+ jl_uint32 reg_addr = 0;
+ jl_uint32 val = 0;
+
+ if (enmask > 0xf)
+ return JL_ERR_PARAM;
+
+ reg_addr = SWCORE_BASE + ENABLE_ENQUEUE_TO_PORTS_AND_QUEUES_OFFSET + JL_PORT_P2M(port);
+ val = enmask;
+
+ ret = jl_apb_reg_write(reg_addr, val);
+ JL_CHECK_RETURN(ret);
+
+ g_res_mngt.en_mask[port] = enmask;
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_qos_enqueue_get(jl_uint8 port,
+ jl_uint8 *penmask)
+{
+ jl_ret_t ret = JL_ERR_OK;
+ jl_uint32 reg_addr = 0;
+ jl_uint32 val = 0;
+
+ JL_CHECK_POINTER(penmask);
+
+ reg_addr = SWCORE_BASE + ENABLE_ENQUEUE_TO_PORTS_AND_QUEUES_OFFSET + JL_PORT_P2M(port);
+
+ ret = jl_apb_reg_read(reg_addr, &val);
+ JL_CHECK_RETURN(ret);
+
+ *penmask = val & 0xf;
+
+ return JL_ERR_OK;
+}
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/jl51xx/jl51xx_drv_sram_load.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/jl51xx/jl51xx_drv_sram_load.c
new file mode 100644
index 0000000..6307709
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/jl51xx/jl51xx_drv_sram_load.c
@@ -0,0 +1,192 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+
+#include "jl51xx/reg_clkgen.h"
+#include "jl51xx/reg_top.h"
+#include "jl51xx/jl51xx_drv_phy.h"
+#include "jl51xx/jl51xx_drv_sram_load.h"
+#include "jl51xx/jl51xx_drv_sram_load_patch.h"
+
+static jl_ret_t _enter_sram_mode(void)
+{
+ jl_uint32 try = 1000;
+ jl_ret_t ret = JL_ERR_OK;
+ jl_uint32 clkgen0_val = 0;
+ jl_uint32 clkgen0_addr = CLKGEN_BASE + CLKGEN_CTL_0_OFFSET;
+ jl_uint32 load_go_val = 0;
+
+ ret = jl_apb_reg_read(clkgen0_addr, &clkgen0_val);
+ if (ret)
+ goto err;
+ CLR_BIT(clkgen0_val, 1); //mcu_rstn
+ ret = jl_apb_reg_write(clkgen0_addr, clkgen0_val);
+ if (ret)
+ goto err;
+
+ ret = jl51xx_phy_direct_write_ext(0, LOAD_GO_OFFSET >> 5, LOAD_GO_OFFSET & 0x1f, 0);
+ if (ret)
+ goto err;
+ port_udelay(5000); //5ms
+ ret = jl51xx_phy_direct_write_ext(0, LOAD_DATA0_OFFSET >> 5, LOAD_DATA0_OFFSET & 0x1f, 0xe0c6);
+ if (ret)
+ goto err;
+ port_udelay(5000); //5ms
+ ret = jl_apb_reg_read(clkgen0_addr, &clkgen0_val);
+ if (ret)
+ goto err;
+ SET_BIT(clkgen0_val, 1); //mcu_rstn
+ ret = jl_apb_reg_write(clkgen0_addr, clkgen0_val);
+ if (ret)
+ goto err;
+
+ ret = jl51xx_phy_direct_write_ext(0, LOAD_GO_OFFSET >> 5, LOAD_GO_OFFSET & 0x1f, 0x8000);
+ if (ret)
+ goto err;
+
+ while (--try) {
+ ret = jl51xx_phy_direct_read_ext(0, LOAD_GO_OFFSET >> 5, LOAD_GO_OFFSET & 0x1f, &load_go_val);
+ if (ret)
+ goto err;
+ if (load_go_val == 0)
+ break;
+ }
+
+ if (!try) {
+ JL_DBG_MSG(JL_FLAG_SYS, _DBG_ERROR, "Timeout get load_go_val failed !!!\n");
+ return JL_ERR_TIMEOUT;
+ }
+ JL_DBG_MSG(JL_FLAG_SYS, _DBG_INFO, "Switch enter sram load mode ok[%d]!!!\n", ret);
+ return ret;
+err:
+ JL_DBG_MSG(JL_FLAG_SYS, _DBG_ERROR, "Switch enter sram load mode failed[%d]!!!\n", ret);
+ return ret;
+}
+
+static jl_ret_t _patch_load(jl_uint8 *patch_data, jl_uint32 patch_size)
+{
+ jl_ret_t ret = JL_ERR_OK;
+ jl_uint32 try = 100;
+ jl_uint32 i = 0;
+ jl_uint32 block = 0;
+ jl_uint32 data[8] = {0};
+ jl_uint32 load_go_val = 0;
+
+ JL_CHECK_POINTER(patch_data);
+ JL_DBG_MSG(JL_FLAG_SYS, _DBG_INFO, "Switch enter patch load!!!\n");
+ for (block = 0; block < patch_size/BLOCK_SIZE; block++) {
+ //address high
+ data[0] = ((SRAM_START_ADDR + block*BLOCK_SIZE) & 0xffff0000) >> 16;
+ //address low
+ data[1] = (SRAM_START_ADDR + block*BLOCK_SIZE) & 0x0000ffff;
+ //data
+ for (i = 0; i < 6; i++) {
+ data[i+2] = ((patch_data[block*BLOCK_SIZE+(2*i+1)]) << 8) + patch_data[block*BLOCK_SIZE+2*i];
+ }
+ for (i = 0; i < 8; i++) {
+ ret = jl51xx_phy_direct_write_ext(0, LOAD_DATA0_OFFSET >> 5, (LOAD_DATA0_OFFSET & 0x1f) + i, data[i]);
+ if (ret)
+ goto err;
+ }
+
+ ret = jl51xx_phy_direct_write_ext(0, LOAD_GO_OFFSET >> 5, (LOAD_GO_OFFSET & 0x1f), 0x8006);
+ if (ret)
+ goto err;
+
+ /* check if ready to receive image data */
+ try = 100;
+ while (--try) {
+ ret = jl51xx_phy_direct_read_ext(0, LOAD_GO_OFFSET >> 5, LOAD_GO_OFFSET & 0x1f, &load_go_val);
+ if (ret)
+ goto err;
+ if (load_go_val == 0)
+ break;
+ }
+
+ if (!try) {
+ JL_DBG_MSG(JL_FLAG_SYS, _DBG_ERROR, "Timeout check receive data failed !!!\n");
+ return JL_ERR_TIMEOUT;
+ }
+ }
+ JL_DBG_MSG(JL_FLAG_SYS, _DBG_INFO, "Switch patch load ok[%d]!!!\n", ret);
+ return ret;
+
+err:
+ JL_DBG_MSG(JL_FLAG_SYS, _DBG_ERROR, "patch load reg read/write fail[%d]!!!\n", ret);
+
+ return ret;
+}
+
+static jl_ret_t _patch_boot(void)
+{
+ jl_ret_t ret = JL_ERR_OK;
+ JL_DBG_MSG(JL_FLAG_SYS, _DBG_INFO, "Switch enter patch boot!!!\n");
+ /*deliver execute patch instruction*/
+ ret = jl51xx_phy_direct_write_ext(0, LOAD_DATA0_OFFSET >> 5, LOAD_DATA0_OFFSET & 0x1f, 0);
+ if (ret)
+ goto err;
+ ret = jl51xx_phy_direct_write_ext(0, LOAD_DATA0_OFFSET >> 5, (LOAD_DATA0_OFFSET & 0x1f) + 1, SRAM_START_ADDR);
+ if (ret)
+ goto err;
+ ret = jl51xx_phy_direct_write_ext(0, LOAD_GO_OFFSET >> 5, LOAD_GO_OFFSET & 0x1f, 0x4000);
+ if (ret)
+ goto err;
+ JL_DBG_MSG(JL_FLAG_SYS, _DBG_INFO, "Switch patch boot ok[%d]!!!\n", ret);
+ return ret;
+
+err:
+ JL_DBG_MSG(JL_FLAG_SYS, _DBG_ERROR, "patch boat reg read/write fail[%d]!!!\n", ret);
+
+ return ret;
+}
+
+jl_ret_t jl51xx_drv_sram_load(void)
+{
+ jl_ret_t ret = JL_ERR_OK;
+ jl_uint32 patch_size = 0;
+ jl_uint8 *patch_data = NULL;
+
+ patch_size = JL_ARRAY_SIZE(sram_firmware_bin);
+ patch_data = sram_firmware_bin;
+
+ if (patch_size == 0) {
+ JL_DBG_MSG(JL_FLAG_SYS, _DBG_ERROR, "patch_size is zero!\n");
+ return JL_ERR_OK;
+ }
+ if ((patch_size % BLOCK_SIZE) != 0) {
+ JL_DBG_MSG(JL_FLAG_SYS, _DBG_ERROR, "Abort,patch size error!\n");
+ return JL_ERR_PARAM;
+ }
+ JL_DBG_MSG(JL_FLAG_SYS, _DBG_INFO, "patch size[%d]bytes\n", patch_size);
+
+ ret = _enter_sram_mode();
+ if (ret)
+ goto err;
+
+ ret = _patch_load(patch_data, patch_size);
+ if (ret)
+ goto err;
+
+ ret = _patch_boot();
+ if (ret)
+ goto err;
+
+ JL_DBG_MSG(JL_FLAG_SYS, _DBG_INFO, "Switch sram load patch finish.\n");
+
+ return ret;
+
+err:
+ JL_DBG_MSG(JL_FLAG_SYS, _DBG_ERROR, "Switch sram load patch failed[%d]!!!\n", ret);
+
+ return ret;
+}
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/jl51xx/jl51xx_drv_storm.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/jl51xx/jl51xx_drv_storm.c
new file mode 100644
index 0000000..d9ccf05
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/jl51xx/jl51xx_drv_storm.c
@@ -0,0 +1,416 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+
+#include "jl_base.h"
+#include "driver/jl_reg_io.h"
+#include "jl51xx/jl51xx_drv_storm.h"
+#include "jl51xx/jl51xx_drv_l2.h"
+
+enum MBSC_MODE {
+ MBSC_BYTE_MODE = 0,
+ MBSC_PKT_MODE = 1,
+};
+
+#define STORM_REG_BASE (SWCORE_BASE + L2_BROADCAST_STORM_CONTROL_RATE_CONFIGURATION_OFFSET)
+#define STORM_BLOCK_SIZE (31)
+#define STORM_RATE_OFFSET (0)
+#define STORM_CAP_OFFSET (10)
+#define STORM_THR_OFFSET (20)
+#define STORM_ENABLE_OFFSET (30)
+
+#define TICK_NUM (5)
+#define MIN_LEN (64)
+#define SWITCH_SLICE (1)
+//6.25MHz
+#define SYSTEM_TICK (6250000)
+//default tick freq(Hz), rounding off
+jl_uint32 tick_freq_list[TICK_NUM] = {625000, 62500, 6250, 625, 62};
+
+static jl_uint32 __power(jl_uint8 base, jl_uint8 powerRaised)
+{
+ if (powerRaised != 0)
+ return (base*__power(base, powerRaised-1));
+ else
+ return 1;
+}
+
+static jl_ret_t __calc_tick_freq(jl_uint16 *div, jl_uint8 *step)
+{
+ jl_ret_t ret;
+ jl_uint8 i = 0;
+ jl_uint32 result = 0;
+
+ if ((ret = jl51xx_l2_tick_configuration_get(
+ div, step)) != JL_ERR_OK)
+ return ret;
+
+ //default configure
+ if (*div == 0xa && *step == 0xa)
+ return JL_ERR_OK;
+
+ for (i = 0; i < TICK_NUM; i++) {
+ result = __power(*step, i);
+ tick_freq_list[i] = SYSTEM_TICK/((*div) * result);
+ }
+
+ return JL_ERR_OK;
+}
+
+static jl_ret_t __storm_control_config_set(jl_port_t mac_port, jl_storm_type_t type, jl_uint8 mode, jl_uint16 token_in, jl_uint16 tick_in, jl_uint16 bucket_cap, jl_uint16 bucket_thr)
+{
+ jl_ret_t ret;
+ jl_uint32 reg;
+ jl_uint32 val_tab[1];
+ jl_uint8 *ptr = NULL;
+ jl_uint64 packets_not_bytes = mode;
+ jl_uint64 tokens = token_in;
+ jl_uint64 tick = tick_in;
+ jl_uint64 capability = bucket_cap;
+ jl_uint64 threshold = bucket_thr;
+
+ reg = STORM_REG_BASE + STORM_BLOCK_SIZE * type + mac_port;
+ //Set storm rate configuration
+ do {
+ ptr = (jl_uint8 *)&val_tab[0];
+ if ((ret = jl_apb_reg_read(reg + STORM_RATE_OFFSET,
+ &val_tab[0])) != JL_ERR_OK)
+ return ret;
+
+ JL_DBG_MSG(JL_FLAG_ALL, _DBG_ON,
+ "%s addr=0x%x, val=0x%x, tick=%llu, tokens=%llu\n",
+ __func__, reg + STORM_RATE_OFFSET,
+ val_tab[0], tick, tokens);
+ jl_write_bits(ptr, packets_not_bytes, 0, 1);
+ jl_write_bits(ptr, tokens, 1, 12);
+ jl_write_bits(ptr, tick, 13, 3);
+
+ if ((ret = jl_apb_reg_write(reg + STORM_RATE_OFFSET,
+ val_tab[0])) != JL_ERR_OK)
+ return ret;
+
+ } while(0);
+
+ //Set storm bucket capacity
+ do {
+ ptr = (jl_uint8 *)&val_tab[0];
+ if ((ret = jl_apb_reg_read(reg + STORM_CAP_OFFSET,
+ &val_tab[0])) != JL_ERR_OK)
+ return ret;
+
+ jl_write_bits(ptr, capability, 0, 16);
+
+ JL_DBG_MSG(JL_FLAG_ALL, _DBG_ON,
+ "%s addr=0x%x, val=0x%x, capa=%llu\n",
+ __func__, reg + STORM_CAP_OFFSET,
+ val_tab[0], capability);
+
+ if ((ret = jl_apb_reg_write(reg + STORM_CAP_OFFSET,
+ val_tab[0])) != JL_ERR_OK)
+ return ret;
+ } while(0);
+
+ do {
+ ptr = (jl_uint8 *)&val_tab[0];
+ if ((ret = jl_apb_reg_read(reg + STORM_THR_OFFSET,
+ &val_tab[0])) != JL_ERR_OK)
+ return ret;
+
+ JL_DBG_MSG(JL_FLAG_ALL, _DBG_ON,
+ "%s addr=0x%x, val=0x%x, capa=%llu\n",
+ __func__, reg + STORM_THR_OFFSET,
+ val_tab[0], threshold);
+
+ jl_write_bits(ptr, threshold, 0, 16);
+
+ if ((ret = jl_apb_reg_write(reg + STORM_THR_OFFSET,
+ val_tab[0])) != JL_ERR_OK)
+ return ret;
+ } while(0);
+
+ return JL_ERR_OK;
+}
+
+static jl_ret_t __storm_control_config_get(jl_port_t mac_port, jl_storm_type_t type, jl_uint8 *pmode, jl_uint16 *ptoken_in, jl_uint8 *ptick)
+{
+ jl_ret_t ret;
+ jl_uint32 reg;
+ jl_uint32 val_tab[1];
+ jl_uint8 *ptr = NULL;
+ jl_uint64 packets_not_bytes;
+ jl_uint64 tokens;
+ jl_uint64 tick;
+
+ reg = STORM_REG_BASE + STORM_BLOCK_SIZE * type + mac_port;
+ //get storm rate configuration
+ do {
+ ptr = (jl_uint8 *)&val_tab[0];
+ if ((ret = jl_apb_reg_read(reg + STORM_RATE_OFFSET,
+ &val_tab[0])) != JL_ERR_OK)
+ return ret;
+
+ jl_read_bits(ptr, &packets_not_bytes, 0, 1);
+ jl_read_bits(ptr, &tokens, 1, 12);
+ jl_read_bits(ptr, &tick, 13, 3);
+
+ JL_DBG_MSG(JL_FLAG_ALL, _DBG_ON,
+ "%s addr=0x%x, val=0x%x, tick=%llu\n",
+ __func__, reg, val_tab[0], tick);
+
+ *pmode = (jl_uint8)packets_not_bytes;
+ *ptoken_in = (jl_uint16)tokens;
+ *ptick = (jl_uint8)tick;
+ } while(0);
+
+ return JL_ERR_OK;
+}
+
+static jl_ret_t _storm_control_byte_rate_set(jl_port_t mac_port, jl_storm_type_t type, jl_rate_t rate)
+{
+ jl_ret_t ret;
+ jl_uint16 div = 0;
+ jl_uint8 step = 0, tick = 3, i = 0;
+ jl_uint16 byte_token_in = 0;
+ jl_uint16 bucket_cap = 0, bucket_thr = 0;
+ jl_uint32 byte_rate = 0;
+
+ ret = __calc_tick_freq(&div, &step);
+ if (ret)
+ return ret;
+
+ byte_token_in = div * SWITCH_SLICE;
+ //byte_rate = (rate * 1024)/8;
+ byte_rate = rate << 7;
+
+ for (i = 0; i < TICK_NUM; i++) {
+ //precision: 5%
+#ifndef __KERNEL__
+ if (tick_freq_list[i] * byte_token_in <= 1.05 * (byte_rate))
+#else
+ if (tick_freq_list[i] * byte_token_in <= (105 * (byte_rate) / 100))
+#endif
+ {
+ tick = i;
+ byte_token_in = byte_rate/(tick_freq_list[tick]);
+ bucket_cap = byte_token_in * 20;
+ bucket_thr = byte_token_in * 10;
+ break;
+ }
+ }
+
+ //adjust, if cap is too small
+ while (bucket_cap < 0x1000) {
+ if (tick == TICK_NUM - 1) {
+ bucket_cap = byte_token_in * 300;
+ bucket_thr = byte_token_in * 150;
+ break;
+ }
+ tick = tick + 1;
+ byte_token_in = byte_rate/(tick_freq_list[tick]);
+
+ bucket_cap = byte_token_in * 20;
+ bucket_thr = byte_token_in * 10;
+ }
+
+ JL_DBG_MSG(JL_FLAG_ALL, _DBG_ON,
+ "byteRate = %u, byteTokenIn=%u, tick=%u",
+ byte_rate, byte_token_in, tick);
+
+ return __storm_control_config_set(mac_port, type,
+ (jl_uint8)MBSC_BYTE_MODE,
+ byte_token_in, tick,
+ bucket_cap,
+ bucket_thr);
+}
+
+static jl_ret_t _storm_control_pkt_rate_set(jl_port_t mac_port, jl_storm_type_t type, jl_rate_t pkt_rate)
+{
+ jl_ret_t ret;
+ jl_uint16 div = 0;
+ jl_uint8 step = 0, tick = 0, i = 0;
+ jl_uint16 pkt_token_in = 0;
+ jl_uint16 bucket_cap = 0, bucket_thr = 0;
+
+ ret = __calc_tick_freq(&div, &step);
+ if (ret)
+ return ret;
+
+ pkt_token_in = div * SWITCH_SLICE;
+ tick = TICK_NUM - 1;
+ for (i = 0; i < TICK_NUM; i++) {
+#ifndef __KERNEL__
+ if (tick_freq_list[i] * pkt_token_in <= 1.05 * pkt_rate)
+#else
+ if (tick_freq_list[i] * pkt_token_in <= (105 * (pkt_rate) / 100))
+#endif
+ {
+ tick = i;
+ break;
+ }
+ }
+
+ pkt_token_in = pkt_rate/(tick_freq_list[tick]);
+ bucket_cap = pkt_token_in * 20;
+ bucket_thr = pkt_token_in * 10;
+
+ JL_DBG_MSG(JL_FLAG_ALL, _DBG_ON,
+ "pktRate = %u, pktTokenIn=%u, tick=%u",
+ pkt_rate, pkt_token_in, tick);
+
+ return __storm_control_config_set(mac_port, type,
+ (jl_uint8)MBSC_PKT_MODE,
+ pkt_token_in, tick,
+ bucket_cap,
+ bucket_thr);
+}
+
+jl_ret_t jl51xx_storm_control_rate_set(jl_port_t egress_port, jl_storm_type_t type, jl_rate_unit_t unit, jl_rate_t rate)
+{
+ if (unit == RATE_UNIT_KBPS)
+ return _storm_control_byte_rate_set(
+ JL_PORT_P2M(egress_port),
+ type,
+ rate);
+ else if (unit == RATE_UNIT_PPS)
+ return _storm_control_pkt_rate_set(
+ JL_PORT_P2M(egress_port),
+ type,
+ rate);
+ else
+ return JL_ERR_PARAM;
+}
+
+jl_ret_t jl51xx_storm_control_rate_get(jl_port_t egress_port, jl_storm_type_t type, jl_rate_unit_t *punit, jl_rate_t *prate)
+{
+ jl_ret_t ret;
+ jl_uint8 mode;
+ jl_uint16 token;
+ jl_uint8 tick;
+ jl_uint16 div;
+ jl_uint8 step;
+
+ ret = __storm_control_config_get(
+ JL_PORT_P2M(egress_port),
+ type, &mode, &token, &tick);
+ if (ret)
+ return ret;
+
+ if ((ret = __calc_tick_freq(&div, &step)) != JL_ERR_OK)
+ return ret;
+
+ if (mode == 1) {
+ //packet mode
+ *punit = RATE_UNIT_PPS;
+ *prate = token * tick_freq_list[tick];
+ } else if (mode == 0) {
+ //byte mode
+ *punit = RATE_UNIT_KBPS;
+ *prate = (token * tick_freq_list[tick]) >> 7;
+ } else
+ return JL_ERR_PARAM;
+
+ JL_DBG_MSG(JL_FLAG_ALL, _DBG_ON,
+ "mode=%u, token=%u, tick=%u, unit=%u, rate=%u\n",
+ mode, token, tick, *punit, *prate);
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_storm_control_enable_set(jl_port_t egress_port, jl_storm_type_t type, jl_enable_t enable)
+{
+ jl_ret_t ret;
+ jl_port_t mac_port = JL_PORT_P2M(egress_port);
+ jl_uint32 reg_addr;
+ jl_uint32 val = 0;
+
+ if (type == STORM_TYPE_UNKNOWN)
+ reg_addr = L2_FLOODING_STORM_CONTROL_ENABLE_OFFSET;
+ else if (type == STORM_TYPE_MULTICAST)
+ reg_addr = L2_MULTICAST_STORM_CONTROL_ENABLE_OFFSET;
+ else if (type == STORM_TYPE_BROADCAST)
+ reg_addr = L2_BROADCAST_STORM_CONTROL_ENABLE_OFFSET;
+ else
+ return JL_ERR_PARAM;
+ reg_addr += SWCORE_BASE;
+
+ ret = jl_apb_reg_read(reg_addr, &val);
+ if (ret)
+ return ret;
+
+ if (enable == 1)
+ SET_BIT(val, mac_port);
+ else if (enable == 0)
+ CLR_BIT(val, mac_port);
+ else
+ return ret;
+
+ JL_DBG_MSG(JL_FLAG_ALL, _DBG_ON,
+ "%s addr=0x%x, val=0x%x, mac_port=%u\n",
+ __func__, reg_addr, val, mac_port);
+ return jl_apb_reg_write(reg_addr, val);
+}
+
+jl_ret_t jl51xx_storm_control_enable_get(jl_port_t egress_port, jl_storm_type_t type, jl_enable_t *penable)
+{
+ jl_ret_t ret;
+ jl_port_t mac_port = JL_PORT_P2M(egress_port);
+ jl_uint32 reg_addr;
+ jl_uint32 val = 0;
+
+ if (type == STORM_TYPE_UNKNOWN)
+ reg_addr = L2_FLOODING_STORM_CONTROL_ENABLE_OFFSET;
+ else if (type == STORM_TYPE_MULTICAST)
+ reg_addr = L2_MULTICAST_STORM_CONTROL_ENABLE_OFFSET;
+ else if (type == STORM_TYPE_BROADCAST)
+ reg_addr = L2_BROADCAST_STORM_CONTROL_ENABLE_OFFSET;
+ else
+ return JL_ERR_PARAM;
+ reg_addr += SWCORE_BASE;
+
+ ret = jl_apb_reg_read(reg_addr, &val);
+ if (ret)
+ return ret;
+
+ if (val & BIT(mac_port))
+ *penable = 1;
+ else
+ *penable = 0;
+
+ JL_DBG_MSG(JL_FLAG_ALL, _DBG_ON,
+ "%s addr=0x%x, val=0x%x, mac_port=%u\n",
+ __func__, reg_addr, val, mac_port);
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_storm_control_drop_counter_get(jl_port_t egress_port, jl_uint32 *pcntr)
+{
+ jl_ret_t ret;
+ jl_uint32 reg;
+ jl_uint32 val_tab[1];
+ jl_uint8 *ptr = NULL;
+ jl_uint64 counter = 0;
+
+ reg = SWCORE_BASE + MBSC_DROP_OFFSET + JL_PORT_P2M(egress_port);
+
+ ptr = (jl_uint8 *)&val_tab[0];
+
+ if ((ret = jl_apb_reg_read(reg,
+ &val_tab[0])) != JL_ERR_OK)
+ return ret;
+
+ jl_read_bits(ptr, &counter, 0, 24);
+
+ *pcntr = (jl_uint32)counter;
+
+ return JL_ERR_OK;
+}
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/jl51xx/jl51xx_drv_stp.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/jl51xx/jl51xx_drv_stp.c
new file mode 100644
index 0000000..6e48e83
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/jl51xx/jl51xx_drv_stp.c
@@ -0,0 +1,167 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+
+#include "jl_base.h"
+#include "driver/jl_reg_io.h"
+#include "jl51xx/reg_swcore.h"
+#include "jl51xx/jl51xx_drv_stp.h"
+
+jl_ret_t jl51xx_stp_port_egress_state_get(jl_port_t port, jl_stp_state_t *pstp_state)
+{
+ jl_ret_t ret;
+ jl_uint64 stp;
+ jl_uint32 src_port_tab_val[1];
+ jl_uint32 reg_addr = SWCORE_BASE + EGRESS_SPANNING_TREE_STATE_OFFSET;
+ jl_uint8 *preg_val = (jl_uint8 *)&src_port_tab_val[0];
+ jl_uint32 bit_offset = 3 * JL_PORT_P2M(port);
+
+ ret = jl_apb_reg_read(reg_addr, &src_port_tab_val[0]);
+ if (ret)
+ return ret;
+
+ //check the states
+ jl_read_bits(preg_val, &stp, bit_offset, 3);
+
+ *pstp_state = stp;
+
+ JL_DBG_MSG(JL_FLAG_SWCORE, _DBG_ON,
+ "%s reg=0x%x, val[0]=0x%x, stp=0x%x\n",
+ __func__, reg_addr, src_port_tab_val[0], *pstp_state);
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_stp_port_egress_state_set(jl_port_t port, jl_stp_state_t stp_state)
+{
+ jl_ret_t ret;
+ jl_uint64 stp;
+ jl_uint32 src_port_tab_val[1];
+ jl_uint32 reg_addr = SWCORE_BASE + EGRESS_SPANNING_TREE_STATE_OFFSET;
+ jl_uint8 *preg_val = (jl_uint8 *)&src_port_tab_val[0];
+ jl_uint32 bit_offset = 3 * JL_PORT_P2M(port);
+
+ ret = jl_apb_reg_read(reg_addr, &src_port_tab_val[0]);
+ if (ret)
+ return ret;
+
+ stp = stp_state;
+ jl_write_bits(preg_val, stp, bit_offset, 3);
+
+ ret = jl_apb_reg_write(reg_addr, src_port_tab_val[0]);
+ if (ret)
+ return ret;
+
+ JL_DBG_MSG(JL_FLAG_SWCORE, _DBG_ON,
+ "%s reg=0x%x, val[0]=0x%x, counter=0x%x\n",
+ __func__, reg_addr, src_port_tab_val[0], stp_state);
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_stp_port_ingress_state_set(jl_port_t port, jl_stp_state_t stp_state)
+{
+ jl_ret_t ret;
+ jl_uint64 stp;
+ jl_uint32 src_port_tab_val[2];
+ jl_uint32 reg_addr = SWCORE_BASE + SOURCE_PORT_TABLE_OFFSET + JL_PORT_P2M(port) * 2;
+ jl_uint8 *preg_val = (jl_uint8 *)&src_port_tab_val[0];
+
+ ret = jl_apb_reg_burst_read(reg_addr, &src_port_tab_val[0], 2);
+ if (ret)
+ return ret;
+
+ stp = stp_state;
+ jl_write_bits(preg_val, stp, 40, 3);
+
+ ret = jl_apb_reg_burst_write(reg_addr, &src_port_tab_val[0], 2);
+ if (ret)
+ return ret;
+
+ JL_DBG_MSG(JL_FLAG_SWCORE, _DBG_ON,
+ "%s reg=0x%x, val[0]=0x%x, val[1]=0x%x, stp=0x%x\n",
+ __func__, reg_addr, src_port_tab_val[0], src_port_tab_val[1], stp_state);
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_stp_port_ingress_state_get(jl_port_t port, jl_stp_state_t *pstp_state)
+{
+ jl_ret_t ret;
+ jl_uint64 stp;
+ jl_uint32 src_port_tab_val[2];
+ jl_uint32 reg_addr = SWCORE_BASE + SOURCE_PORT_TABLE_OFFSET + JL_PORT_P2M(port) * 2;
+ jl_uint8 *preg_val = (jl_uint8 *)&src_port_tab_val[0];
+
+ ret = jl_apb_reg_burst_read(reg_addr, &src_port_tab_val[0], 2);
+ if (ret)
+ return ret;
+
+ jl_read_bits(preg_val, &stp, 40, 3);
+ *pstp_state = (jl_stp_state_t)stp;
+
+ JL_DBG_MSG(JL_FLAG_SWCORE, _DBG_ON,
+ "%s reg=0x%x, val[0]=0x%x, val[1]=0x%x, stp=0x%x\n",
+ __func__, reg_addr, src_port_tab_val[0], src_port_tab_val[1], *pstp_state);
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_stp_ingress_drop_counter_get(jl_stp_state_t stp_state, jl_uint32 *pcntr)
+{
+ jl_ret_t ret;
+ jl_uint64 counter;
+ jl_uint32 src_port_tab_val[1];
+ jl_uint32 reg_addr;
+ jl_uint8 *preg_val = (jl_uint8 *)&src_port_tab_val[0];
+
+ if (stp_state == STP_STATE_BLOCKING)
+ reg_addr = SWCORE_BASE + INGRESS_SPANNING_TREE_DROP_BLOCKING_OFFSET;
+ else if (stp_state == STP_STATE_LISTENING)
+ reg_addr = SWCORE_BASE + INGRESS_SPANNING_TREE_DROP_LISTEN_OFFSET;
+ else if (stp_state == STP_STATE_LEARNING)
+ reg_addr = SWCORE_BASE + INGRESS_SPANNING_TREE_DROP_LEARNING_OFFSET;
+ else
+ return JL_ERR_PARAM;
+
+ ret = jl_apb_reg_read(reg_addr, &src_port_tab_val[0]);
+ if (ret)
+ return ret;
+
+ jl_read_bits(preg_val, &counter, 0, 24);
+ *pcntr = (jl_uint32)counter;
+
+ JL_DBG_MSG(JL_FLAG_SWCORE, _DBG_ON,
+ "%s reg=0x%x, val[0]=0x%x, counter=0x%x\n",
+ __func__, reg_addr, src_port_tab_val[0], *pcntr);
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_stp_port_egress_drop_counter_get(jl_port_t port, jl_uint32 *pcntr)
+{
+ jl_ret_t ret;
+ jl_uint64 counter;
+ jl_uint32 src_port_tab_val[1];
+ jl_uint32 reg_addr = SWCORE_BASE + EGRESS_SPANNING_TREE_DROP_OFFSET + JL_PORT_P2M(port);
+ jl_uint8 *preg_val = (jl_uint8 *)&src_port_tab_val[0];
+
+ ret = jl_apb_reg_read(reg_addr, &src_port_tab_val[0]);
+ if (ret)
+ return ret;
+
+ jl_read_bits(preg_val, &counter, 0, 24);
+ *pcntr = (jl_uint32)counter;
+
+ JL_DBG_MSG(JL_FLAG_SWCORE, _DBG_ON,
+ "%s reg=0x%x, val[0]=0x%x, counter=0x%x\n",
+ __func__, reg_addr, src_port_tab_val[0], *pcntr);
+
+ return JL_ERR_OK;
+}
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/jl51xx/jl51xx_drv_switch.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/jl51xx/jl51xx_drv_switch.c
new file mode 100644
index 0000000..b17656d
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/jl51xx/jl51xx_drv_switch.c
@@ -0,0 +1,775 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+
+#include "jl_base.h"
+#include "driver/jl_reg_io.h"
+#include "jl51xx/reg_mag.h"
+#include "jl51xx/reg_swcore.h"
+#include "jl51xx/reg_apb_frontend.h"
+#include "jl51xx/reg_clkgen.h"
+#include "jl51xx/reg_pinmux.h"
+#include "jl51xx/jl51xx_drv_vlan.h"
+#include "jl51xx/jl51xx_drv_cpu.h"
+#include "jl51xx/jl51xx_drv_phy.h"
+#include "jl51xx/jl51xx_drv_led.h"
+#include "jl51xx/jl51xx_mac_uctrl.h"
+#ifdef CONFIG_JLFE_LOAD_FORMAL_PATCH
+#include "jl51xx/jl51xx_drv_formal_patch.h"
+#endif
+#ifdef CONFIG_JLFE_LOAD_CUSTOMIZED_PATCH
+#include "jl51xx/jl51xx_drv_customized_patch.h"
+#endif
+
+/* enable/disable LED group0&group1 by reset led pinmux */
+jl_ret_t _led_enable_set(jl_uint8 led_group, jl_uint8 enable)
+{
+ jl_ret_t ret;
+ jl_uint32 pinmux0_val;
+ jl_uint32 pinmux1_val;
+ jl_uint32 pinmux0_addr = PINMUX_BASE + PIN_MUX_0_OFFSET;
+ jl_uint32 pinmux1_addr = PINMUX_BASE + PIN_MUX_1_OFFSET;
+
+ ret = jl_apb_reg_read(pinmux0_addr, &pinmux0_val);
+ if (ret)
+ return ret;
+ ret = jl_apb_reg_read(pinmux1_addr, &pinmux1_val);
+ if (ret)
+ return ret;
+
+
+ if (led_group == 0) {
+ if (enable)
+ SET_BITS(pinmux0_val, 7, 14);
+ else
+ CLR_BITS(pinmux0_val, 7, 14);
+
+ ret = jl_apb_reg_write(pinmux0_addr, pinmux0_val);
+ if (ret)
+ return ret;
+ }
+
+ if (led_group == 1) {
+ if (enable) {
+ SET_BIT(pinmux0_val, 15);
+ SET_BITS(pinmux1_val, 0, 5);
+ } else {
+ CLR_BIT(pinmux0_val, 15);
+ CLR_BITS(pinmux1_val, 0, 5);
+ }
+
+ ret = jl_apb_reg_write(pinmux0_addr, pinmux0_val);
+ if (ret)
+ return ret;
+ ret = jl_apb_reg_write(pinmux1_addr, pinmux1_val);
+ if (ret)
+ return ret;
+ }
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t _led_reset_blink_set(jl_uint8 led_blink)
+{
+ jl_ret_t ret;
+ jl_uint32 cpu_reserved0_val;
+ jl_uint32 rsvd0_addr = APB_FRONTEND_BASE + CPU_RESERVED0_OFFSET;
+
+ ret = jl_apb_reg_read(rsvd0_addr, &cpu_reserved0_val);
+ if (ret)
+ return ret;
+
+ /* enable/disable led reset blink */
+ if (led_blink)
+ CLR_BIT(cpu_reserved0_val, 19);
+ else
+ SET_BIT(cpu_reserved0_val, 19);
+
+ ret = jl_apb_reg_write(rsvd0_addr, cpu_reserved0_val);
+ if (ret)
+ return ret;
+
+ return ret;
+}
+
+jl_ret_t _force_soft_reset(jl_uint8 with_analog,
+ jl_uint8 with_swc, jl_uint8 with_mag,
+ jl_uint8 led_blink)
+{
+ jl_ret_t ret;
+ jl_uint32 cpu_reserved1_val;
+ jl_uint32 rsvd1_addr = APB_FRONTEND_BASE + CPU_RESERVED1_OFFSET;
+ jl_uint32 clkgen0_val;
+ jl_uint32 clkgen0_addr = CLKGEN_BASE + CLKGEN_CTL_0_OFFSET;
+ jl_uint32 count = 10;
+ jl_uint32 port_mask = 0;
+
+ _led_reset_blink_set(led_blink);
+
+ ret = jl_apb_reg_read(rsvd1_addr, &cpu_reserved1_val);
+ if (ret)
+ return ret;
+
+ ret = jl_apb_reg_read(clkgen0_addr, &clkgen0_val);
+ if (ret)
+ return ret;
+
+
+ /* fast soft reset, for led blink conern */
+ if (!with_analog && !with_swc && !with_mag) {
+ SET_BIT(cpu_reserved1_val, 31);
+ ret = jl_apb_reg_write(rsvd1_addr, cpu_reserved1_val);
+ if (ret)
+ return ret;
+
+ goto exit;
+ }
+
+ /* XXX rm this line, if led reset status is fixed in fw */
+ _led_enable_set(0, 0);
+
+ /* Set switch_pd = 1, switch_pd_with_ana = 1 */
+ /* Set disable_ext_eeprom = 1 */
+ if (with_analog)
+ cpu_reserved1_val |= 0x30000008;
+ else
+ cpu_reserved1_val |= 0x20000008;
+ ret = jl_apb_reg_write(rsvd1_addr, cpu_reserved1_val);
+ if (ret)
+ return ret;
+
+ /* Set MAG_RSTN = 0, CORE_6P25 = 0 */
+ if (with_swc)
+ CLR_BIT(clkgen0_val, 4);
+ if (with_mag)
+ CLR_BIT(clkgen0_val, 7);
+ ret = jl_apb_reg_write(clkgen0_addr, clkgen0_val);
+ if (ret)
+ return ret;
+
+ port_udelay(10000);
+ /* XXX rm this line, if led reset status is fixed in fw */
+ _led_enable_set(0, 1);
+
+ ret = jl_apb_reg_read(rsvd1_addr, &cpu_reserved1_val);
+ if (ret)
+ return ret;
+
+ /* Set switch_pd = 0, switch_pd_witch_ana = 0 */
+ CLR_BITS(cpu_reserved1_val, 28, 29);
+ ret = jl_apb_reg_write(rsvd1_addr, cpu_reserved1_val);
+ if (ret)
+ return ret;
+
+exit:
+ if (!led_blink) {
+ while (count--) {
+ port_udelay(1000);
+
+ /*read ADDR_LOAD_DATA4,capture signal FLAG_PROCESS for enabling leds */
+ ret = jl51xx_phy_direct_read_ext(0, 7, 0x15, &port_mask);
+ if (ret)
+ return ret;
+
+ if (port_mask == 0xb) {
+ ret = jl51xx_led_enable_set(LED_GROUP0, 0xff);
+ if (ret)
+ return ret;
+
+ break;
+ }
+ };
+ }
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t __check_ext_port_mode_param(void)
+{
+ jl_chip_id_t chip;
+
+ chip = gp_switch_dev->chip_id;
+ if (chip == CHIP_ID_JL5105 || chip == CHIP_ID_JL5108)
+ return JL_ERR_CONFIG;
+
+#if (defined CONFIG_JLFE_EXT_PORT0_MII_MAC_MODE) || (defined CONFIG_JLFE_EXT_PORT0_MII_PHY_MODE)
+ if (chip == CHIP_ID_JL5104) {
+ JL_DBG_MSG(JL_FLAG_SYS, _DBG_ERROR,
+ "JL5104 support RMII mode only, check your EXT_PORT0 config\n");
+ return JL_ERR_CONFIG;
+ }
+#endif
+
+ return JL_ERR_OK;
+ }
+
+static void __setup_5110_ext_port_mode(jl_uint32 *cpu_reserved0_val)
+{
+ jl_uint32 val = *cpu_reserved0_val;
+
+ /* setup MAC8 */
+ do {
+#ifdef CONFIG_JLFE_EXT_PORT0_DISABLE_MODE
+ CLR_BIT(val, 7); //disable MAC8
+#elif defined CONFIG_JLFE_EXT_PORT0_MII_MAC_MODE
+ SET_BIT(val, 7); //enable MAC8
+ CLR_BIT(val, 4); //MII
+ CLR_BIT(val, 5); //MAC_MODE: clock_out=0
+#elif defined CONFIG_JLFE_EXT_PORT0_MII_PHY_MODE
+ SET_BIT(val, 7); //enable MAC8
+ CLR_BIT(val, 4); //MII
+ SET_BIT(val, 5); //PHY_MODE: clock_out=1
+#elif defined CONFIG_JLFE_EXT_PORT0_RMII_MAC_MODE
+ SET_BIT(val, 7); //enable MAC8
+ SET_BIT(val, 4); //RMII
+ CLR_BIT(val, 5); //PHY_MODE: clock_out=0
+#elif defined CONFIG_JLFE_EXT_PORT0_RMII_PHY_MODE
+ SET_BIT(val, 7); //enable MAC8
+ SET_BIT(val, 4); //RMII
+ SET_BIT(val, 5); //PHY_MODE: clock_out=1
+#endif
+ } while (0);
+
+ /* setup MAC9 */
+ do {
+#if defined CONFIG_JLFE_EXT_PORT1_DISABLE_MODE
+ CLR_BIT(val, 15); //disable MAC9
+#elif defined CONFIG_JLFE_EXT_PORT1_RMII_MAC_MODE
+ SET_BIT(val, 15); //enable MAC9
+ SET_BIT(val, 12); //RMII
+ CLR_BIT(val, 13); //MAC_MODE: clock_out=0
+#elif defined CONFIG_JLFE_EXT_PORT1_RMII_PHY_MODE
+ SET_BIT(val, 15); //enable MAC9
+ SET_BIT(val, 12); //RMII
+ SET_BIT(val, 13); //PHY_MODE: clock_out=1
+#endif
+ } while (0);
+
+
+ *cpu_reserved0_val = val;
+}
+
+static void __setup_mac9_mode(jl_uint32 *cpu_reserved0_val)
+{
+ jl_uint32 val = *cpu_reserved0_val;
+
+ /* setup MAC9 */
+ do {
+#ifdef CONFIG_JLFE_EXT_PORT0_DISABLE_MODE
+ CLR_BIT(val, 15); //disable mac9
+#elif defined CONFIG_JLFE_EXT_PORT0_MII_MAC_MODE
+ SET_BIT(val, 15); //enable mac9
+ CLR_BIT(val, 12); //MII
+ CLR_BIT(val, 13); //MAC_MODE: clock_out=0
+#elif defined CONFIG_JLFE_EXT_PORT0_MII_PHY_MODE
+ SET_BIT(val, 15); //enable mac9
+ CLR_BIT(val, 12); //MII
+ SET_BIT(val, 13); //PHY_MODE: clock_out=1
+#elif defined CONFIG_JLFE_EXT_PORT0_RMII_MAC_MODE
+ SET_BIT(val, 15); //enable mac9
+ SET_BIT(val, 12); //RMII
+ CLR_BIT(val, 13); //MAC_MODE: clock_out=0
+#elif defined CONFIG_JLFE_EXT_PORT0_RMII_PHY_MODE
+ SET_BIT(val, 15); //enable mac9
+ SET_BIT(val, 12); //RMII
+ SET_BIT(val, 13); //PHY_MODE: clock_out=1
+#endif
+ } while (0);
+
+ *cpu_reserved0_val = val;
+}
+
+jl_ret_t _force_ext_port_mode(void)
+{
+ jl_ret_t ret;
+ jl_uint32 cpu_reserved0_val;
+ jl_uint32 rsvd0_addr = APB_FRONTEND_BASE + CPU_RESERVED0_OFFSET;
+
+ ret = __check_ext_port_mode_param();
+ if (ret == JL_ERR_CONFIG) {
+ JL_DBG_MSG(JL_FLAG_SYS, _DBG_INFO,
+ "Wrong rmii/mii config, skip the ext port mode setting!\n");
+ return JL_ERR_OK; /* Skip wrong configs */
+ }
+
+ ret = jl_apb_reg_read(rsvd0_addr, &cpu_reserved0_val);
+ if (ret)
+ return ret;
+
+ if (gp_switch_dev->chip_id == CHIP_ID_JL5110)
+ __setup_5110_ext_port_mode(&cpu_reserved0_val);
+ else
+ __setup_mac9_mode(&cpu_reserved0_val);
+
+ ret = jl_apb_reg_write(rsvd0_addr, cpu_reserved0_val);
+ if (ret)
+ return ret;
+
+ ret = _force_soft_reset(0, 0, 0, 0);
+ return ret;
+}
+
+jl_ret_t _uplink_mac_set_link(void)
+{
+ jl_ret_t ret;
+ jl_port_t phy_port;
+ jl_uint64 mac_is_link;
+ jl_uint32 mac_user_ctrl_val[1];
+ jl_uint8 *preg_val = NULL;
+
+ preg_val = (jl_uint8 *)&mac_user_ctrl_val[0];
+
+ JL_FOR_EACH_PHY_EXT_PORT(phy_port) {
+ ret = jl51xx_mac_uctrl_read(phy_port, &mac_user_ctrl_val[0]);
+ if (ret)
+ return ret;
+
+ mac_is_link = 1;
+ jl_write_bits(preg_val, mac_is_link, 0, 1);
+
+ ret = jl51xx_mac_uctrl_write(phy_port, mac_user_ctrl_val[0]);
+ if (ret)
+ return ret;
+ }
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t _chk_core_ver(void)
+{
+ jl_ret_t ret;
+ jl_uint64 core_ver = 0;
+ jl_uint32 reg_val[1] = {0};
+ jl_uint32 reg_addr = 0;
+ jl_uint8 *preg_val = (jl_uint8 *)®_val[0];
+
+ /* check switch core version */
+ reg_addr = SWCORE_BASE + CORE_VERSION_OFFSET;
+ ret = jl_apb_reg_burst_read(reg_addr, ®_val[0], 1);
+ if (ret)
+ return ret;
+
+ core_ver = 0;
+ jl_read_bits(preg_val, &core_ver, 0, 16);
+
+ switch (core_ver) {
+ case CORE_VER0:
+ g_switch_ctrl.core_ver = CORE_VER0;
+ break;
+ case CORE_VER1:
+ g_switch_ctrl.core_ver = CORE_VER1;
+ break;
+ default:
+ return JL_ERR_BADID;
+ }
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t _chk_pkg_mode(void)
+{
+ jl_ret_t ret;
+ jl_uint64 chip_id = 0;
+ jl_uint32 reg_val[1] = {0};
+ jl_uint32 reg_addr = 0;
+ jl_uint8 *preg_val = (jl_uint8 *)®_val[0];
+
+ reg_addr = APB_FRONTEND_BASE + CPU_RESERVED0_OFFSET;
+ reg_val[0] = 0;
+ ret = jl_apb_reg_burst_read(reg_addr, ®_val[0], 1);
+ if (ret)
+ return ret;
+
+ chip_id = 0;
+ jl_read_bits(preg_val, &chip_id, 28, 4);
+
+#ifdef CONFIG_JLFE_CHIP_ID_51XX
+ switch (chip_id) {
+ case (CHIP_ID_JL5104):
+ gp_switch_dev = &g_switch_dev_5104;
+ break;
+ case (CHIP_ID_JL5105):
+ gp_switch_dev = &g_switch_dev_5105;
+ break;
+ case (CHIP_ID_JL5106):
+ gp_switch_dev = &g_switch_dev_5106;
+ break;
+ case (CHIP_ID_JL5108):
+ gp_switch_dev = &g_switch_dev_5108;
+ break;
+ case (CHIP_ID_JL5109):
+ gp_switch_dev = &g_switch_dev_5109;
+ break;
+ case (CHIP_ID_JL5110):
+ gp_switch_dev = &g_switch_dev_5110;
+ break;
+ default:
+ JL_DBG_MSG(JL_FLAG_SYS, _DBG_ERROR,
+ "Unknown package mode [0x%llx]!!!\n", chip_id);
+ return JL_ERR_BADID;
+ }
+#else
+ if (chip_id != gp_switch_dev->chip_id) {
+ JL_DBG_MSG(JL_FLAG_SYS, _DBG_ERROR,
+ "Wrong package mode [0x%x], expect [0x%llx]!!!\n",
+ gp_switch_dev->chip_id, chip_id);
+ JL_DBG_MSG(JL_FLAG_SYS, _DBG_ERROR,
+ "Package mode:JL5104[0x0], JL5105[0x1], JL5106[0x2], JL5108[0x3], JL5109[0x4], JL5110[0x5]\n");
+
+ return JL_ERR_BADID;
+ }
+#endif
+ return JL_ERR_OK;
+}
+
+jl_ret_t _get_eco_ver(void)
+{
+ jl_ret_t ret;
+ jl_uint64 eco_ver = 0;
+ jl_uint32 reg_val[1] = {0};
+ jl_uint32 reg_addr = 0;
+ jl_uint8 *preg_val = (jl_uint8 *)®_val[0];
+
+ reg_addr = APB_FRONTEND_BASE + CPU_RESERVED6_OFFSET;
+ reg_val[0] = 0;
+ ret = jl_apb_reg_burst_read(reg_addr, ®_val[0], 1);
+ if (ret)
+ return ret;
+
+ eco_ver = 0;
+ jl_read_bits(preg_val, &eco_ver, 0, 4);
+
+ g_switch_ctrl.eco_ver = eco_ver;
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t _check_hw_info(void)
+{
+ jl_ret_t ret;
+
+ /* check switch core version */
+ ret = _chk_core_ver();
+ if (ret)
+ return ret;
+
+ /* check package mode */
+ ret = _chk_pkg_mode();
+ if (ret)
+ return ret;
+
+ /* get eco version */
+ ret = _get_eco_ver();
+ if (ret)
+ return ret;
+
+ JL_DBG_MSG(JL_FLAG_SYS, _DBG_INFO, "Switch Chip HW information:\n");
+ JL_DBG_MSG(JL_FLAG_SYS, _DBG_INFO, "\tpackage mode: [0x%x]\n",
+ gp_switch_dev->chip_id);
+ return JL_ERR_OK;
+}
+
+/* register LOAD_DATA4 stores fw flag information
+ * LOAD_DATA4 page_id = 7, reg_id = 21;
+ */
+#define JL_FW_FLAG_PROCESS 0xb
+jl_ret_t _check_fw_stat(void)
+{
+ jl_uint16 load_data4 = 0;
+
+ load_data4 = jl_phy_reg_read_ext(0, 7, 21);
+ if (load_data4 != JL_FW_FLAG_PROCESS) {
+ JL_DBG_MSG(JL_FLAG_SYS, _DBG_ERROR,
+ "Switch Initialize fail with wrong firmware flag [%d]!!!\n",
+ load_data4);
+ return JL_ERR_NOT_READY;
+ }
+
+ return JL_ERR_OK;
+}
+
+#ifdef CONFIG_JLFE_LOAD_PATCH
+#define PHY_ID(x) (((x) >> 0x15U) & 0x1FU)
+#define PAGE_ID(x) (((x) >> 0x5U) & 0xFFFFU)
+#define REG_ID(x) ((x) & 0x1FU)
+#define MAX_BURST_SIZE 8U
+
+static jl_ret_t __do_write(struct jl_cmd_line_s *cmd_line)
+{
+ jl_api_ret_t ret = JL_ERR_OK;
+
+ if ((cmd_line->flag != JL_CMD_FLAG_DA) &&
+ ((cmd_line->flag != JL_CMD_FLAG_IDA))) {
+ JL_DBG_MSG(JL_FLAG_SYS, _DBG_ERROR, "Abort, Unknown WRITE command flag!!!\n");
+ return JL_ERR_PARAM;
+ }
+
+ if (cmd_line->flag == JL_CMD_FLAG_DA)
+ jl_phy_reg_write_ext(PHY_ID(cmd_line->addr),
+ PAGE_ID(cmd_line->addr),
+ REG_ID(cmd_line->addr),
+ (jl_uint16)cmd_line->val);
+ else if (cmd_line->flag == JL_CMD_FLAG_IDA) {
+ ret = jl_apb_reg_write(cmd_line->addr, cmd_line->val);
+ if (ret)
+ return ret;
+ }
+
+ return ret;
+}
+
+static jl_ret_t __do_burst_write(struct jl_cmd_line_s *cmd_line)
+{
+ jl_api_ret_t ret = JL_ERR_OK;
+ jl_uint32 burst_val[8] = {0};
+ jl_uint32 size = (jl_uint32)cmd_line->flag;
+ jl_uint32 i = 0;
+
+ if ((size == 0) || (size > MAX_BURST_SIZE)) {
+ JL_DBG_MSG(JL_FLAG_SYS, _DBG_ERROR, "Abort, BURST WRITE command with wrong size!!!\n");
+ return JL_ERR_PARAM;
+ }
+
+ for (i = 0; i < size; i++) {
+ if ((i > 0) && (cmd_line[i].cmd ||
+ cmd_line[i].flag ||
+ cmd_line[i].addr)) {
+ JL_DBG_MSG(JL_FLAG_SYS, _DBG_ERROR, "Abort, BRUST WRITE with wrong burst value format!!!\n");
+ return JL_ERR_PARAM;
+ }
+
+ burst_val[i] = cmd_line[i].val;
+ }
+
+ ret = jl_apb_reg_burst_write(cmd_line->addr, &burst_val[0], size);
+ if (ret)
+ return ret;
+
+ return (jl_ret_t)size;
+}
+
+#ifdef CONFIG_JLFE_LOAD_FORMAL_PATCH
+static jl_ret_t __patch_select(void)
+{
+ jl_uint8 i;
+
+ for (i = 0; g_eco_patch_tbl[i].pkg_ver != 0xff; i++) {
+ if ((gp_switch_dev->chip_id == g_eco_patch_tbl[i].pkg_ver)
+ && (g_switch_ctrl.eco_ver == g_eco_patch_tbl[i].eco_ver)) {
+ g_cmd_line_desc.p_line_set = g_eco_patch_tbl[i].peco_patch;
+ g_cmd_line_desc.lines = g_eco_patch_tbl[i].eco_patch_size;
+
+ JL_DBG_MSG(JL_FLAG_SYS, _DBG_INFO, "patch size[%d]lines\n",
+ g_eco_patch_tbl[i].eco_patch_size);
+
+ return JL_ERR_OK;
+ }
+ }
+
+ return JL_ERR_UNAVAIL;
+}
+#endif
+
+jl_ret_t _load_source_patch(void)
+{
+ jl_uint32 lines = 0;
+ jl_uint32 i = 0;
+ struct jl_cmd_line_s *cmd_line = NULL;
+ jl_ret_t ret = 0;
+
+#ifdef CONFIG_JLFE_LOAD_FORMAL_PATCH
+ ret = __patch_select();
+ if (ret) {
+ JL_DBG_MSG(JL_FLAG_SYS, _DBG_INFO, "Could not find patch file, skip load patch!!!\n");
+ return JL_ERR_OK;
+ }
+
+#endif
+
+ lines = g_cmd_line_desc.lines;
+
+ while (lines) {
+ cmd_line = &g_cmd_line_desc.p_line_set[i];
+
+ switch (cmd_line->cmd) {
+ case (JL_CMD_WRITE):
+ ret = __do_write(cmd_line);
+ if (ret)
+ goto error;
+
+ lines--;
+ i++;
+ break;
+ case (JL_CMD_BWRITE):
+ ret = __do_burst_write(cmd_line);
+ if (ret < 0)
+ goto error;
+
+ lines -= ret;
+ i += ret;
+ break;
+ case (JL_CMD_DELAY):
+ port_udelay(cmd_line->val);
+#ifdef CONFIG_JLFE_DUMP_REG_WRITE
+ jl_dump_add_delay(cmd_line->val);
+#endif
+
+ lines--;
+ i++;
+ break;
+ default:
+ JL_DBG_MSG(JL_FLAG_SYS, _DBG_ERROR, "Abort, Unknown command!!!\n");
+ goto error;
+ }
+ }
+
+ return JL_ERR_OK;
+
+error:
+ JL_DBG_MSG(JL_FLAG_SYS, _DBG_ERROR, "Load source patch fail!!!\n");
+ return JL_ERR_FAIL;
+}
+#endif
+
+jl_ret_t jl51xx_sw_core_init(void)
+{
+ jl_ret_t ret;
+ jl_uint64 allow_bpdu, disable, answer, tickcnt, tickindex;
+ jl_uint32 send2cpu_val[2];
+ jl_uint32 disable_cpu_tag_val[1];
+ jl_uint32 vid2vtab_tcam_answer_val[1];
+ jl_uint32 time2age_val[2];
+ jl_uint32 reg_addr = 0;
+ jl_uint8 *preg_val = NULL;
+ printk("cy: %s %d\n", __func__, __LINE__);
+ ret = _check_fw_stat();
+ printk("cy: %s %d\n", __func__, __LINE__);
+ if (ret)
+ return ret;
+
+ printk("cy: %s %d\n", __func__, __LINE__);
+ ret = _check_hw_info();
+ printk("cy: %s %d\n", __func__, __LINE__);
+ if (ret)
+ return ret;
+
+ /* disable led group 0 */
+ /* XXX rm this line, if led reset status is fixed in fw */
+ _led_enable_set(0, 0);
+ _led_reset_blink_set(0);
+
+#ifdef CONFIG_JLFE_LOAD_PATCH
+ ret = _load_source_patch();
+ if (ret)
+ return ret;
+#endif
+
+#ifdef CONFIG_JLFE_EXT_PORT_MODE
+ ret = _force_ext_port_mode();
+ if (ret)
+ return ret;
+#endif
+
+ /* XXX rm this line, if led reset status is fixed in fw */
+ jl51xx_led_group_active_high_set(LED_GROUP0,
+ gp_switch_dev->phy_portmask & UTP_PORT_MASK);
+
+ /* enable led group 0 */
+ _led_enable_set(0, 1);
+
+ ret = _uplink_mac_set_link();
+ if (ret)
+ return ret;
+
+ printk("cy: %s %d\n", __func__, __LINE__);
+ ret = jl51xx_cpu_allow_lldp_enable_set(DISABLED);
+ if (ret)
+ return ret;
+
+ do {
+ reg_addr = SWCORE_BASE + SEND_TO_CPU_OFFSET;
+ preg_val = (jl_uint8 *)&send2cpu_val[0];
+ ret = jl_apb_reg_burst_read(reg_addr, &send2cpu_val[0], 2);
+ if (ret)
+ return ret;
+
+ allow_bpdu = 0;
+ jl_write_bits(preg_val, allow_bpdu, 0, 1);
+
+ ret = jl_apb_reg_burst_write(reg_addr, &send2cpu_val[0], 2);
+ if (ret)
+ return ret;
+ } while (0);
+
+ do {
+ reg_addr = SWCORE_BASE + DISABLE_CPU_TAG_ON_CPU_PORT_OFFSET;
+ preg_val = (jl_uint8 *)&disable_cpu_tag_val[0];
+ ret = jl_apb_reg_burst_read(reg_addr, &disable_cpu_tag_val[0], 1);
+ if (ret)
+ return ret;
+
+ disable = 1;
+ jl_write_bits(preg_val, disable, 0, 1);
+
+ ret = jl_apb_reg_burst_write(reg_addr, &disable_cpu_tag_val[0], 1);
+ if (ret)
+ return ret;
+ } while (0);
+
+ /* disable vlan by default */
+ do {
+ reg_addr = SWCORE_BASE + VID_TO_VLAN_TABLE_TCAM_ANSWER_OFFSET + VLAN_IDX_DROP * 1;
+ preg_val = (jl_uint8 *)&vid2vtab_tcam_answer_val[0];
+ ret = jl_apb_reg_burst_read(reg_addr, &vid2vtab_tcam_answer_val[0], 1);
+ if (ret)
+ return ret;
+
+ answer = VLAN_IDX_DEFAULT;
+ jl_write_bits(preg_val, answer, 0, 4);
+
+ ret = jl_apb_reg_burst_write(reg_addr, &vid2vtab_tcam_answer_val[0], 1);
+ if (ret)
+ return ret;
+ } while (0);
+
+ /* set time to age tickCnt:0x7735940 by default */
+ do {
+ reg_addr = SWCORE_BASE + TIME_TO_AGE_OFFSET;
+ preg_val = (jl_uint8 *)&time2age_val[0];
+ ret = jl_apb_reg_burst_read(reg_addr, &time2age_val[0], 2);
+ if (ret)
+ return ret;
+
+ tickcnt = DEFAULT_TICK_NUM;
+ tickindex = DEFAULT_TICK_ID;
+ jl_write_bits(preg_val, tickcnt, 0, 32);
+ jl_write_bits(preg_val, tickindex, 32, 3);
+ ret = jl_apb_reg_burst_write(reg_addr, &time2age_val[0], 2);
+ if (ret)
+ return ret;
+ } while (0);
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_sw_core_deinit(void)
+{
+ jl_ret_t ret;
+
+ ret = _force_soft_reset(1, 1, 1, 1);
+ if (ret)
+ JL_DBG_MSG(JL_FLAG_SYS, _DBG_ERROR, "soft reset fail!\n"); \
+
+ return ret;
+}
+
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/jl51xx/jl51xx_drv_vlan.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/jl51xx/jl51xx_drv_vlan.c
new file mode 100644
index 0000000..d0798bd
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/jl51xx/jl51xx_drv_vlan.c
@@ -0,0 +1,593 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+
+#include "jl51xx/jl51xx_drv_vlan.h"
+
+static jl_ret_t __vlan_table_reset(void)
+{
+ jl_ret_t ret;
+ jl_uint32 v;
+ jl_uint64 valid, in_vmask, in_vid, v_portmask, gid;
+ jl_uint32 vlan_tab_val[2];
+ jl_uint32 v2v_tab_tcam_val[1];
+ jl_uint32 reg_addr = 0;
+ jl_uint8 *preg_val = NULL;
+
+ /* create Default VLAN Entry & Drop VLAN Entry */
+ for (v = 0; v <= VLAN_IDX_MAX; v++) {
+ if (v == VLAN_IDX_DEFAULT) {
+ valid = 1;
+ in_vid = DEFAULT_VLAN_ID;
+ in_vmask = 0xfff;
+ v_portmask = 0x3ff;
+ } else if (v == VLAN_IDX_DROP) {
+ valid = 1;
+ in_vid = 0;
+ in_vmask = 0;
+ v_portmask = 0;
+ } else {
+ valid = 0;
+ in_vid = 0;
+ in_vmask = 0xfff;
+ v_portmask = 0;
+ }
+
+ gid = 0;
+
+ do {
+ reg_addr = SWCORE_BASE + VLAN_TABLE_OFFSET + v * 2;
+ preg_val = (jl_uint8 *)&vlan_tab_val[0];
+ ret = jl_apb_reg_burst_read(reg_addr, &vlan_tab_val[0], 2);
+ if (ret)
+ return ret;
+
+ jl_write_bits(preg_val, v_portmask, 0, 10);
+ jl_write_bits(preg_val, gid, 10, 4);
+
+ ret = jl_apb_reg_burst_write(reg_addr, &vlan_tab_val[0], 2);
+ if (ret)
+ return ret;
+ } while (0);
+
+ do {
+ reg_addr = SWCORE_BASE + VID_TO_VLAN_TABLE_TCAM_OFFSET + v * 1;
+ preg_val = (jl_uint8 *)&v2v_tab_tcam_val[0];
+ ret = jl_apb_reg_burst_read(reg_addr, &v2v_tab_tcam_val[0], 1);
+ if (ret)
+ return ret;
+
+ jl_write_bits(preg_val, valid, 0, 1);
+ jl_write_bits(preg_val, in_vmask, 1, 12);
+ jl_write_bits(preg_val, in_vid, 13, 12);
+
+ ret = jl_apb_reg_burst_write(reg_addr, &v2v_tab_tcam_val[0], 1);
+ if (ret)
+ return ret;
+ } while (0);
+ }
+
+ return JL_ERR_OK;
+}
+
+static jl_ret_t __vlan_prepare(void)
+{
+ jl_ret_t ret;
+ jl_port_t port;
+ jl_uint32 v;
+ jl_uint64 use_lookup, miss_vid, answer;
+ jl_uint32 in_vid_trans_val[1];
+ jl_uint32 vid2vtab_tcam_answer_val[1];
+ jl_uint32 reg_addr = 0;
+ jl_uint8 *preg_val = NULL;
+
+ for (port = 0; port < SWITCH_PORT_NUM; port++) {
+ do {
+ reg_addr = SWCORE_BASE + INGRESS_VID_TRANSLATION_ACTION_OFFSET + port * 1;
+ preg_val = (jl_uint8 *)&in_vid_trans_val[0];
+ ret = jl_apb_reg_burst_read(reg_addr, &in_vid_trans_val[0], 1);
+ if (ret)
+ return ret;
+
+ use_lookup = 1;
+ miss_vid = VLAN_IDX_DROP;
+ jl_write_bits(preg_val, use_lookup, 0, 1);
+ jl_write_bits(preg_val, miss_vid, 1, 12);
+
+ ret = jl_apb_reg_burst_write(reg_addr, &in_vid_trans_val[0], 1);
+ if (ret)
+ return ret;
+ } while (0);
+ }
+
+ /* bind vlan-index to TCAMAnswer table*/
+ for (v = 0; v <= VLAN_IDX_MAX; v++) {
+ do {
+ reg_addr = SWCORE_BASE + VID_TO_VLAN_TABLE_TCAM_ANSWER_OFFSET + v * 1 ;
+ preg_val = (jl_uint8 *)&vid2vtab_tcam_answer_val[0];
+ ret = jl_apb_reg_burst_read(reg_addr, &vid2vtab_tcam_answer_val[0], 1);
+ if (ret)
+ return ret;
+
+ answer = v;
+ jl_write_bits(preg_val, answer, 0, 4);
+
+ ret = jl_apb_reg_burst_write(reg_addr, &vid2vtab_tcam_answer_val[0], 1);
+ if (ret)
+ return ret;
+ } while (0);
+ }
+
+ return JL_ERR_OK;
+}
+
+static jl_ret_t __check_vlan_index(jl_uint32 vlan_index, jl_uint8 is_setting)
+{
+ if (vlan_index > VLAN_IDX_MAX)
+ return JL_ERR_PARAM;
+
+ if (!is_setting)
+ return JL_ERR_OK;
+
+ /* not allow to change index for drop vidx */
+ if (vlan_index == VLAN_IDX_DROP)
+ return JL_ERR_PARAM;
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_vlan_init(void)
+{
+ jl_ret_t ret;
+ jl_port_t port;
+
+ ret = __vlan_prepare();
+ if (ret)
+ return ret;
+
+ ret = __vlan_table_reset();
+ if (ret)
+ return ret;
+
+ /* set all ports default vid = 1 */
+ JL_FOR_EACH_PHY_PORT(port) {
+ ret = jl51xx_port_vlan_set(port, DEFAULT_VLAN_ID);
+ if (ret)
+ return ret;
+ }
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_vlan_deinit(void)
+{
+ jl_ret_t ret;
+ jl_port_t port;
+ jl_uint64 answer;
+ jl_uint32 vid2vtab_tcam_answer_val[1];
+ jl_uint32 reg_addr = 0;
+ jl_uint8 *preg_val = NULL;
+
+ JL_FOR_EACH_PHY_PORT(port) {
+ /* reset vlan assignment */
+ ret = jl51xx_port_vlan_assignment_set(port, VLAN_ASSIGN_PKT);
+ if (ret)
+ return ret;
+
+ /* reset vlan ingress operation */
+ ret = jl51xx_port_vlan_ingress_operation_set(port, VLAN_OPERATION_NONE);
+ if (ret)
+ return ret;
+
+ /* reset vlan egress operation */
+ ret = jl51xx_port_vlan_egress_operation_set(port, VLAN_OPERATION_NONE);
+ if (ret)
+ return ret;
+
+ /* set all ports default vid = 1 */
+ ret = jl51xx_port_vlan_set(port, DEFAULT_VLAN_ID);
+ if (ret)
+ return ret;
+ }
+
+ ret = __vlan_table_reset();
+ if (ret)
+ return ret;
+
+ /* disable vlan */
+ do {
+ reg_addr = SWCORE_BASE + VID_TO_VLAN_TABLE_TCAM_ANSWER_OFFSET + VLAN_IDX_DROP * 1 ;
+ preg_val = (jl_uint8 *)&vid2vtab_tcam_answer_val[0];
+ ret = jl_apb_reg_burst_read(reg_addr, &vid2vtab_tcam_answer_val[0], 1);
+ if (ret)
+ return ret;
+
+ answer = VLAN_IDX_DEFAULT;
+ jl_write_bits(preg_val, answer, 0, 4);
+
+ ret = jl_apb_reg_burst_write(reg_addr, &vid2vtab_tcam_answer_val[0], 1);
+ if (ret)
+ return ret;
+ } while (0);
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_vlan_set(jl_uint32 vlan_index, struct vlan_config *config)
+{
+ jl_ret_t ret;
+ jl_uint64 valid, in_vid, fid, vportmask, operation, vid_sel, new_vid;
+ jl_uint32 vid2vtab_tcam_val[1];
+ jl_uint32 vtab_val[2];
+ jl_uint32 reg_addr = 0;
+ jl_uint8 *preg_val = NULL;
+
+ JL_CHECK_POINTER(config);
+ JL_CHECK_PORTMASK(config->port_mask);
+ JL_ASSERT(config->operation < VLAN_OPERATION_END);
+ JL_ASSERT(config->vid_sel < VLANID_INHERIT_FROM_END);
+ JL_ASSERT(config->vid <= MAX_VLAN_ID);
+ JL_ASSERT(config->new_vid <= MAX_VLAN_ID);
+
+ if (config->fid > VLAN_IDX_MAX)
+ return JL_ERR_PARAM;
+
+ if (__check_vlan_index(vlan_index, 1))
+ return JL_ERR_PARAM;
+
+ do {
+ reg_addr = SWCORE_BASE + VLAN_TABLE_OFFSET + vlan_index * 2;
+ preg_val = (jl_uint8 *)&vtab_val[0];
+ ret = jl_apb_reg_burst_read(reg_addr, &vtab_val[0], 2);
+ if (ret)
+ return ret;
+
+ vportmask = JL_PORTMASK_P2M(config->port_mask);
+ fid = config->fid;
+ jl_write_bits(preg_val, vportmask, 0, 10);
+ jl_write_bits(preg_val, fid, 10, 4);
+
+ operation = config->operation;
+ vid_sel = config->vid_sel;
+ new_vid = config->new_vid;
+ jl_write_bits(preg_val, operation, 14, 3);
+ jl_write_bits(preg_val, vid_sel, 17, 2);
+ jl_write_bits(preg_val, new_vid, 25, 12);
+
+ ret = jl_apb_reg_burst_write(reg_addr, &vtab_val[0], 2);
+ if (ret)
+ return ret;
+ } while (0);
+
+ do {
+ reg_addr = SWCORE_BASE + VID_TO_VLAN_TABLE_TCAM_OFFSET + vlan_index * 1;
+ preg_val = (jl_uint8 *)&vid2vtab_tcam_val[0];
+ ret = jl_apb_reg_burst_read(reg_addr, &vid2vtab_tcam_val[0], 1);
+ if (ret)
+ return ret;
+
+ valid = config->valid;
+ in_vid = config->vid;
+ jl_write_bits(preg_val, valid, 0, 1);
+ jl_write_bits(preg_val, in_vid, 13, 12);
+
+ ret = jl_apb_reg_burst_write(reg_addr, &vid2vtab_tcam_val[0], 1);
+ if (ret)
+ return ret;
+ } while (0);
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_vlan_get(jl_uint32 vlan_index, struct vlan_config *config)
+{
+ jl_ret_t ret;
+ jl_uint64 vid, in_vid, fid, vportmask, operation, vid_sel, new_vid;
+ jl_uint32 vid2vtab_tcam_val[1];
+ jl_uint32 vtab_val[2];
+ jl_uint32 reg_addr = 0;
+ jl_uint8 *preg_val = NULL;
+
+ if (__check_vlan_index(vlan_index, 0))
+ return JL_ERR_PARAM;
+
+ do {
+ reg_addr = SWCORE_BASE + VID_TO_VLAN_TABLE_TCAM_OFFSET + vlan_index * 1;
+ preg_val = (jl_uint8 *)&vid2vtab_tcam_val[0];
+ ret = jl_apb_reg_burst_read(reg_addr, &vid2vtab_tcam_val[0], 1);
+ if (ret)
+ return ret;
+
+ jl_read_bits(preg_val, &vid, 0, 1);
+ jl_read_bits(preg_val, &in_vid, 13, 12);
+
+ config->valid = vid;
+ config->vid = in_vid;
+ } while (0);
+
+ do {
+ reg_addr = SWCORE_BASE + VLAN_TABLE_OFFSET + vlan_index * 2;
+ preg_val = (jl_uint8 *)&vtab_val[0];
+ ret = jl_apb_reg_burst_read(reg_addr, &vtab_val[0], 2);
+ if (ret)
+ return ret;
+
+ jl_read_bits(preg_val, &vportmask, 0, 10);
+ jl_read_bits(preg_val, &fid, 10, 4);
+ config->port_mask = JL_PORTMASK_M2P(vportmask);
+ config->fid = fid;
+
+ jl_read_bits(preg_val, &operation, 14, 3);
+ jl_read_bits(preg_val, &vid_sel, 17, 2);
+ jl_read_bits(preg_val, &new_vid, 25, 12);
+ config->operation = operation;
+ config->vid_sel = vid_sel;
+ config->new_vid = new_vid;
+ } while (0);
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_vlan_set_batch(struct vlan_item *v_list, uint16_t size)
+{
+ jl_ret_t ret;
+ jl_uint32 i;
+
+ for (i = 0; i < size; i++) {
+ jl_uint32 idx = v_list[i].index;
+ struct vlan_config *cfg = &v_list[i].config;
+
+ ret = jl51xx_vlan_set(idx, cfg);
+ if (ret)
+ return ret;
+ }
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_port_vlan_set(jl_port_t port, jl_uint32 vid)
+{
+ jl_ret_t ret;
+ jl_uint64 default_vid;
+ jl_uint32 src_port_tab_val[2];
+ jl_uint32 reg_addr = SWCORE_BASE + SOURCE_PORT_TABLE_OFFSET + JL_PORT_P2M(port) * 2;
+ jl_uint8 *preg_val = (jl_uint8 *)&src_port_tab_val[0];
+
+ ret = jl_apb_reg_burst_read(reg_addr, &src_port_tab_val[0], 2);
+ if (ret)
+ return ret;
+
+ default_vid = vid;
+ jl_write_bits(preg_val, default_vid, 14, 12);
+
+ ret = jl_apb_reg_burst_write(reg_addr, &src_port_tab_val[0], 2);
+ if (ret)
+ return ret;
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_port_vlan_get(jl_port_t port, jl_uint32 *vid)
+{
+ jl_ret_t ret;
+ jl_uint64 default_vid;
+ jl_uint32 src_port_tab_val[2];
+ jl_uint32 reg_addr = SWCORE_BASE + SOURCE_PORT_TABLE_OFFSET + JL_PORT_P2M(port) * 2;
+ jl_uint8 *preg_val = (jl_uint8 *)&src_port_tab_val[0];
+
+ ret = jl_apb_reg_burst_read(reg_addr, &src_port_tab_val[0], 2);
+ if (ret)
+ return ret;
+
+ jl_read_bits(preg_val, &default_vid, 14, 12);
+ *vid = default_vid;
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_port_vlan_assignment_set(jl_port_t port, enum vlan_assignment opt)
+{
+ jl_ret_t ret;
+ jl_uint64 vlan_assign;
+ jl_uint32 src_port_tab_val[2];
+ jl_uint32 reg_addr = SWCORE_BASE + SOURCE_PORT_TABLE_OFFSET + JL_PORT_P2M(port) * 2;
+ jl_uint8 *preg_val = (jl_uint8 *)&src_port_tab_val[0];
+
+ if (opt > VLAN_ASSIGN_MIXED)
+ return JL_ERR_PARAM;
+
+ ret = jl_apb_reg_burst_read(reg_addr, &src_port_tab_val[0], 2);
+ if (ret)
+ return ret;
+
+ vlan_assign = opt;
+ jl_write_bits(preg_val, vlan_assign, 12, 2);
+
+ ret = jl_apb_reg_burst_write(reg_addr, &src_port_tab_val[0], 2);
+ if (ret)
+ return ret;
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_port_vlan_assignment_get(jl_port_t port, enum vlan_assignment *opt)
+{
+ jl_ret_t ret;
+ jl_uint64 vlan_assign;
+ jl_uint32 src_port_tab_val[2];
+ jl_uint32 reg_addr = SWCORE_BASE + SOURCE_PORT_TABLE_OFFSET + JL_PORT_P2M(port) * 2;
+ jl_uint8 *preg_val = (jl_uint8 *)&src_port_tab_val[0];
+
+ ret = jl_apb_reg_burst_read(reg_addr, &src_port_tab_val[0], 2);
+ if (ret)
+ return ret;
+
+ jl_read_bits(preg_val, &vlan_assign, 12, 2);
+ *opt = vlan_assign;
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_port_vlan_ingress_operation_set(jl_uint32 port, enum vlan_operation opt)
+{
+ jl_ret_t ret;
+ jl_uint64 vlan_single_op, vidsel;
+ jl_uint32 src_port_tab_val[2];
+ jl_uint32 reg_addr = SWCORE_BASE + SOURCE_PORT_TABLE_OFFSET + JL_PORT_P2M(port) * 2;
+ jl_uint8 *preg_val = (jl_uint8 *)&src_port_tab_val[0];
+
+ if (opt > VLAN_OPERATION_REMOVE_ALL)
+ return JL_ERR_PARAM;
+
+ ret = jl_apb_reg_burst_read(reg_addr, &src_port_tab_val[0], 2);
+ if (ret)
+ return ret;
+
+ vlan_single_op = opt;
+ vidsel = 1; // From source port table entry’s defaultVid.
+ jl_write_bits(preg_val, vlan_single_op, 1, 3);
+ jl_write_bits(preg_val, vidsel, 4, 2);
+
+ ret = jl_apb_reg_burst_write(reg_addr, &src_port_tab_val[0], 2);
+ if (ret)
+ return ret;
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_port_vlan_ingress_operation_get(jl_uint32 port, enum vlan_operation *opt)
+{
+ jl_ret_t ret;
+ jl_uint64 vlan_single_op;
+ jl_uint32 src_port_tab_val[2];
+ jl_uint32 reg_addr = SWCORE_BASE + SOURCE_PORT_TABLE_OFFSET + JL_PORT_P2M(port) * 2;
+ jl_uint8 *preg_val = (jl_uint8 *)&src_port_tab_val[0];
+
+ ret = jl_apb_reg_burst_read(reg_addr, &src_port_tab_val[0], 2);
+ if (ret)
+ return ret;
+
+ jl_read_bits(preg_val, &vlan_single_op, 1, 3);
+ *opt = vlan_single_op;
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_port_vlan_egress_operation_set(jl_uint32 port, enum vlan_operation opt)
+{
+ jl_ret_t ret;
+ jl_uint64 vlan_single_op;
+ jl_uint32 egress_port_tab_val[1];
+ jl_uint32 reg_addr = SWCORE_BASE + EGRESS_PORT_CONFIGURATION_OFFSET + JL_PORT_P2M(port)*1;
+ jl_uint8 *preg_val = (jl_uint8 *)&egress_port_tab_val[0];
+
+ if ((opt == VLAN_OPERATION_SWAP) || (opt == VLAN_OPERATION_PUSH))
+ return JL_ERR_PARAM;
+
+ ret = jl_apb_reg_burst_read(reg_addr, &egress_port_tab_val[0], 1);
+ if (ret)
+ return ret;
+
+ vlan_single_op = opt;
+ jl_write_bits(preg_val, vlan_single_op, 0, 3);
+
+ ret = jl_apb_reg_burst_write(reg_addr, &egress_port_tab_val[0], 1);
+ if (ret)
+ return ret;
+
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_port_vlan_egress_operation_get(jl_uint32 port, enum vlan_operation *opt)
+{
+ jl_ret_t ret;
+ jl_uint64 vlan_single_op;
+ jl_uint32 egress_port_tab_val[1];
+ jl_uint32 reg_addr = SWCORE_BASE + EGRESS_PORT_CONFIGURATION_OFFSET + JL_PORT_P2M(port) * 1;
+ jl_uint8 *preg_val = (jl_uint8 *)&egress_port_tab_val[0];
+
+ ret = jl_apb_reg_burst_read(reg_addr, &egress_port_tab_val[0], 1);
+ if (ret)
+ return ret;
+
+ jl_read_bits(preg_val, &vlan_single_op, 0, 3);
+ *opt = vlan_single_op;
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_vlan_acpt_frmt_set(jl_uint32 port, jl_vlan_acpt_frmt_t frmt)
+{
+ jl_ret_t ret;
+ jl_uint64 min_allowed_vlans;
+ jl_uint64 max_allowed_vlans;
+ jl_uint32 src_port_tab_val[2];
+ jl_uint32 reg_addr = SWCORE_BASE + SOURCE_PORT_TABLE_OFFSET + JL_PORT_P2M(port) * 2;
+ jl_uint8 *preg_val = (jl_uint8 *)&src_port_tab_val[0];
+
+ ret = jl_apb_reg_burst_read(reg_addr, &src_port_tab_val[0], 2);
+ if (ret)
+ return ret;
+
+ if (frmt == VLAN_ACCEPT_FRAME_TYPE_ALL) {
+ min_allowed_vlans = 0; /*0 = All packets are accepted*/
+ max_allowed_vlans = 2; /*2 = Any number of VLANs are accepted*/
+ } else if (frmt == VLAN_ACCEPT_FRAME_TYPE_TAG_ONLY) {
+ min_allowed_vlans = 1; /*1 = 1 or more tags are accepted*/
+ max_allowed_vlans = 2; /*2 = Any number of VLANs are accepted*/
+ } else if (frmt == VLAN_ACCEPT_FRAME_TYPE_UNTAG_ONLY) {
+ min_allowed_vlans = 0; /*0 = All packets are accepted*/
+ max_allowed_vlans = 0; /*0 = Only untagged packets are accepted*/
+ } else
+ return JL_ERR_PARAM;
+
+ jl_write_bits(preg_val, min_allowed_vlans, 30, 2);
+ jl_write_bits(preg_val, max_allowed_vlans, 32, 2);
+
+ ret = jl_apb_reg_burst_write(reg_addr, &src_port_tab_val[0], 2);
+ if (ret)
+ return ret;
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_vlan_acpt_frmt_get(jl_uint32 port, jl_vlan_acpt_frmt_t *pfrmt)
+{
+ jl_ret_t ret;
+ jl_uint64 min_allowed_vlans;
+ jl_uint64 max_allowed_vlans;
+ jl_uint32 src_port_tab_val[2];
+ jl_uint32 reg_addr = SWCORE_BASE + SOURCE_PORT_TABLE_OFFSET + JL_PORT_P2M(port) * 2;
+ jl_uint8 *preg_val = (jl_uint8 *)&src_port_tab_val[0];
+
+ ret = jl_apb_reg_burst_read(reg_addr, &src_port_tab_val[0], 2);
+ if (ret)
+ return ret;
+
+ jl_read_bits(preg_val, &min_allowed_vlans, 30, 2);
+ jl_read_bits(preg_val, &max_allowed_vlans, 32, 2);
+
+ if ((min_allowed_vlans == 0) && (max_allowed_vlans == 2)) {
+ *pfrmt = VLAN_ACCEPT_FRAME_TYPE_ALL;
+ } else if ((min_allowed_vlans == 1) && (max_allowed_vlans == 2)) {
+ *pfrmt = VLAN_ACCEPT_FRAME_TYPE_TAG_ONLY;
+ } else if ((min_allowed_vlans == 0) && (max_allowed_vlans == 0)) {
+ *pfrmt = VLAN_ACCEPT_FRAME_TYPE_UNTAG_ONLY;
+ } else {
+ *pfrmt = VLAN_ACCEPT_FRAME_TYPE_END;
+ return JL_ERR_PARAM;
+ }
+
+ return JL_ERR_OK;
+}
\ No newline at end of file
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/jl51xx/jl51xx_mac_uctrl.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/jl51xx/jl51xx_mac_uctrl.c
new file mode 100644
index 0000000..424e3a5
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/jl51xx/jl51xx_mac_uctrl.c
@@ -0,0 +1,95 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+
+#include "jl_types.h"
+#include "jl_switch.h"
+#include "jl51xx/jl51xx_mac_uctrl.h"
+#include "jl51xx/jl51xx_drv_phy.h"
+
+jl_ret_t jl51xx_mac_uctrl_read(jl_port_t port, jl_uint32 *pregval)
+{
+ jl_ret_t ret = JL_ERR_OK;
+
+ if (pregval == NULL)
+ return JL_ERR_PARAM;
+
+ if ((ret = jl51xx_phy_direct_read_ext(0, MAC_UCTRL_PAGE_ID,
+ MAC_UCTRL_REG_ID(JL_PORT_P2M(port)),
+ pregval)) != JL_ERR_OK)
+ return ret;
+
+ JL_DBG_MSG(JL_FLAG_MAC_UCTRL, _DBG_ON,
+ "read port=0x%x, regval=0x%x errmsg: %s\n",
+ port, *pregval, JL_ERRMSG(ret));
+ return ret;
+}
+
+jl_ret_t jl51xx_mac_uctrl_write(jl_port_t port, jl_uint32 regval)
+{
+ jl_ret_t ret;
+
+ if (port >= JL_PORT_MAX) {
+ ret = JL_ERR_PARAM;
+
+ return ret;
+ }
+
+ if ((ret = jl51xx_phy_direct_write_ext(0, MAC_UCTRL_PAGE_ID,
+ MAC_UCTRL_REG_ID(JL_PORT_P2M(port)),
+ regval)) != JL_ERR_OK)
+ return ret;
+
+ JL_DBG_MSG(JL_FLAG_MAC_UCTRL, _DBG_ON, "write port=0x%x, regval=0x%x errmsg:%s\n",
+ port, regval, JL_ERRMSG(ret));
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl51xx_sw_rsvd_read(jl_port_t port, jl_uint32 *pregval)
+{
+ jl_ret_t ret = JL_ERR_OK;
+
+ if (pregval == NULL)
+ return JL_ERR_PARAM;
+
+ if ((ret = jl51xx_phy_direct_read_ext(0, SW_RSVD_PAGE_ID,
+ SW_RSVD_REG_ID(JL_PORT_P2M(port)),
+ pregval)) != JL_ERR_OK)
+ return ret;
+
+ JL_DBG_MSG(JL_FLAG_MAC_UCTRL, _DBG_ON,
+ "read port=0x%x, regval=0x%x errmsg: %s\n",
+ port, *pregval, JL_ERRMSG(ret));
+ return ret;
+}
+
+jl_ret_t jl51xx_sw_rsvd_write(jl_port_t port, jl_uint32 regval)
+{
+ jl_ret_t ret;
+
+ if (port >= JL_PORT_MAX) {
+ ret = JL_ERR_PARAM;
+
+ return ret;
+ }
+
+ if ((ret = jl51xx_phy_direct_write_ext(0, SW_RSVD_PAGE_ID,
+ SW_RSVD_REG_ID(JL_PORT_P2M(port)),
+ regval)) != JL_ERR_OK)
+ return ret;
+
+ JL_DBG_MSG(JL_FLAG_MAC_UCTRL, _DBG_ON,
+ "write port=0x%x, regval=0x%x errmsg:%s\n",
+ port, regval, JL_ERRMSG(ret));
+ return JL_ERR_OK;
+}
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/jl_error.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/jl_error.c
new file mode 100644
index 0000000..c9ab233
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/jl_error.c
@@ -0,0 +1,16 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+#include "jl_error.h"
+
+char *_jl_errmsg[] = _JL_ERRMSG_STR;
\ No newline at end of file
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/jl_switch.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/jl_switch.c
new file mode 100755
index 0000000..6757dd3
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/jl_switch.c
@@ -0,0 +1,541 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+
+#ifdef __KERNEL__
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/of_device.h>
+#include <linux/device.h>
+
+#endif
+#include "jl_base.h"
+#include "jl51xx/jl51xx_drv_phy.h"
+#include "jl51xx/jl51xx_drv_switch.h"
+#include "version.h"
+
+
+jl_switch_ctrl_t g_switch_ctrl = {STAT_UNINIT, CORE_VER0, ECO_R0P0, NULL};
+
+#if ((defined CONFIG_JLFE_CHIP_ID_5104) || (defined CONFIG_JLFE_CHIP_ID_51XX))
+jl_switch_dev_t g_switch_dev_5104 = {
+ /* switch chip id */
+ CHIP_ID_JL5104,
+
+ /* port transform: phy to mac */
+ {UTP_PORT0, UTP_PORT1, UTP_PORT2, UNDEF_PORT, UNDEF_PORT, UNDEF_PORT, UNDEF_PORT, UNDEF_PORT, EXT_PORT1, UNDEF_PORT},
+
+ /* port transform: mac to phy */
+ {UTP_PORT0, UTP_PORT1, UTP_PORT2, UNDEF_PORT, UNDEF_PORT, UNDEF_PORT, UNDEF_PORT, UNDEF_PORT, UNDEF_PORT, EXT_PORT0},
+
+ /* port transform: logical port to vendor specific port */
+ {UTP_PORT0, UTP_PORT3, UTP_PORT4, UNDEF_PORT, UNDEF_PORT, UNDEF_PORT, UNDEF_PORT, UNDEF_PORT, UNDEF_PORT, UNDEF_PORT},
+
+ /* port transform: vendor specific port to logical port */
+ {UTP_PORT0, UNDEF_PORT, UNDEF_PORT, UTP_PORT1, UTP_PORT2, UNDEF_PORT, UNDEF_PORT, UNDEF_PORT, UNDEF_PORT, UNDEF_PORT},
+
+ /* phy port type */
+ {PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UNDEF, PORT_TYPE_UNDEF, PORT_TYPE_UNDEF, PORT_TYPE_UNDEF, PORT_TYPE_UNDEF, PORT_TYPE_EXT, PORT_TYPE_UNDEF},
+
+ /* mac port type */
+ {PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UNDEF, PORT_TYPE_UNDEF, PORT_TYPE_UNDEF, PORT_TYPE_UNDEF, PORT_TYPE_UNDEF, PORT_TYPE_UNDEF, PORT_TYPE_EXT},
+
+ /* vendor specific port */
+ {PORT_TYPE_UTP, PORT_TYPE_UNDEF, PORT_TYPE_UNDEF, PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UNDEF, PORT_TYPE_UNDEF, PORT_TYPE_UNDEF, PORT_TYPE_UNDEF, PORT_TYPE_UNDEF},
+
+ /* phy port mask */
+ 0x0107,
+
+ /* mac port mask */
+ 0x0207,
+
+ /* vendor port mask */
+ 0x0019,
+};
+#endif
+#if ((defined CONFIG_JLFE_CHIP_ID_5105) || (defined CONFIG_JLFE_CHIP_ID_51XX))
+jl_switch_dev_t g_switch_dev_5105 = {
+ /* switch chip id */
+ CHIP_ID_JL5105,
+
+ /* port transform: phy to mac */
+ {UTP_PORT0, UTP_PORT1, UTP_PORT2, UTP_PORT3, UTP_PORT4, UNDEF_PORT, UNDEF_PORT, UNDEF_PORT, UNDEF_PORT, UNDEF_PORT},
+
+ /* port transform: mac to phy */
+ {UTP_PORT0, UTP_PORT1, UTP_PORT2, UTP_PORT3, UTP_PORT4, UNDEF_PORT, UNDEF_PORT, UNDEF_PORT, UNDEF_PORT, UNDEF_PORT},
+
+ /* port transform: logical port to vendor specific port */
+ {UTP_PORT0, UTP_PORT2, UTP_PORT5, UTP_PORT6, UTP_PORT7, UNDEF_PORT, UNDEF_PORT, UNDEF_PORT, UNDEF_PORT, UNDEF_PORT},
+
+ /* port transform: vendor specific port to logical port */
+ {UTP_PORT0, UNDEF_PORT, UTP_PORT1, UNDEF_PORT, UNDEF_PORT, UTP_PORT2, UTP_PORT3, UTP_PORT4, UNDEF_PORT, UNDEF_PORT},
+
+ /* phy port type */
+ {PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UNDEF, PORT_TYPE_UNDEF, PORT_TYPE_UNDEF, PORT_TYPE_UNDEF, PORT_TYPE_UNDEF},
+
+ /* mac port type */
+ {PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UNDEF, PORT_TYPE_UNDEF, PORT_TYPE_UNDEF, PORT_TYPE_UNDEF, PORT_TYPE_UNDEF},
+
+ /* vendor port type */
+ {PORT_TYPE_UTP, PORT_TYPE_UNDEF, PORT_TYPE_UTP, PORT_TYPE_UNDEF, PORT_TYPE_UNDEF, PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UNDEF, PORT_TYPE_UNDEF},
+
+ /* phy port mask */
+ 0x001f,
+
+ /* mac port mask */
+ 0x001f,
+
+ /* vendor port mask */
+ 0x00e5,
+};
+#endif
+#if ((defined CONFIG_JLFE_CHIP_ID_5106) || (defined CONFIG_JLFE_CHIP_ID_51XX))
+jl_switch_dev_t g_switch_dev_5106 = {
+ /* switch chip id */
+ CHIP_ID_JL5106,
+
+ /* port transform: phy to mac */
+ {UTP_PORT0, UTP_PORT1, UTP_PORT2, UTP_PORT3, UTP_PORT4, UNDEF_PORT, UNDEF_PORT, UNDEF_PORT, EXT_PORT1, UNDEF_PORT},
+
+ /* port transform: mac to phy */
+ {UTP_PORT0, UTP_PORT1, UTP_PORT2, UTP_PORT3, UTP_PORT4, UNDEF_PORT, UNDEF_PORT, UNDEF_PORT, UNDEF_PORT, EXT_PORT0},
+
+ /* port transform: logical port to vendor specific port */
+ {UTP_PORT0, UTP_PORT1, UTP_PORT2, UTP_PORT3, UTP_PORT4, UNDEF_PORT, UNDEF_PORT, UNDEF_PORT, UNDEF_PORT, UNDEF_PORT},
+
+ /* port transform: vendor specific port to logical port */
+ {UTP_PORT0, UTP_PORT1, UTP_PORT2, UTP_PORT3, UTP_PORT4, UNDEF_PORT, UNDEF_PORT, UNDEF_PORT, UNDEF_PORT, UNDEF_PORT},
+
+ /* phy port type */
+ {PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UNDEF, PORT_TYPE_UNDEF, PORT_TYPE_UNDEF, PORT_TYPE_EXT, PORT_TYPE_UNDEF},
+
+ /* mac port type */
+ {PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UNDEF, PORT_TYPE_UNDEF, PORT_TYPE_UNDEF, PORT_TYPE_UNDEF, PORT_TYPE_EXT},
+
+ /* vendor port type */
+ {PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UNDEF, PORT_TYPE_UNDEF, PORT_TYPE_UNDEF, PORT_TYPE_UNDEF, PORT_TYPE_UNDEF},
+
+ /* phy port mask */
+ 0x011f,
+
+ /* mac port mask */
+ 0x021f,
+
+ /* vendor port mask */
+ 0x001f,
+
+};
+#endif
+#if ((defined CONFIG_JLFE_CHIP_ID_5108) || (defined CONFIG_JLFE_CHIP_ID_51XX))
+jl_switch_dev_t g_switch_dev_5108 = {
+ /* switch chip id */
+ CHIP_ID_JL5108,
+
+ /* port transform: phy to mac */
+ {UTP_PORT0, UTP_PORT1, UTP_PORT2, UTP_PORT3, UTP_PORT4, UTP_PORT5, UTP_PORT6, UTP_PORT7, UNDEF_PORT, UNDEF_PORT},
+
+ /* port transform: mac to phy */
+ {UTP_PORT0, UTP_PORT1, UTP_PORT2, UTP_PORT3, UTP_PORT4, UTP_PORT5, UTP_PORT6, UTP_PORT7, UNDEF_PORT, UNDEF_PORT},
+
+ /* port transform: logical port to vendor specific port */
+ {UTP_PORT0, UTP_PORT1, UTP_PORT2, UTP_PORT3, UTP_PORT4, UTP_PORT5, UTP_PORT6, UTP_PORT7, UNDEF_PORT, UNDEF_PORT},
+
+ /* port transform: vendor specific port to logical port */
+ {UTP_PORT0, UTP_PORT1, UTP_PORT2, UTP_PORT3, UTP_PORT4, UTP_PORT5, UTP_PORT6, UTP_PORT7, UNDEF_PORT, UNDEF_PORT},
+
+ /* phy port type */
+ {PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UNDEF, PORT_TYPE_UNDEF},
+
+ /* mac port type */
+ {PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UNDEF, PORT_TYPE_UNDEF},
+
+ /* vendor port type */
+ {PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UNDEF, PORT_TYPE_UNDEF},
+
+ /* phy port mask */
+ 0x00ff,
+
+ /* mac port mask */
+ 0x00ff,
+
+ /* vendor port mask */
+ 0x00ff,
+};
+#endif
+#if ((defined CONFIG_JLFE_CHIP_ID_5109) || (defined CONFIG_JLFE_CHIP_ID_51XX))
+jl_switch_dev_t g_switch_dev_5109 = {
+ /* switch chip id */
+ CHIP_ID_JL5109,
+
+ /* port transform: phy to mac */
+ {UTP_PORT0, UTP_PORT1, UTP_PORT2, UTP_PORT3, UTP_PORT4, UTP_PORT5, UTP_PORT6, UTP_PORT7, EXT_PORT1, UNDEF_PORT},
+
+ /* port transform: mac to phy */
+ {UTP_PORT0, UTP_PORT1, UTP_PORT2, UTP_PORT3, UTP_PORT4, UTP_PORT5, UTP_PORT6, UTP_PORT7, UNDEF_PORT, EXT_PORT0},
+
+ /* port transform: logical port to vendor specific port */
+ {UTP_PORT0, UTP_PORT1, UTP_PORT2, UTP_PORT3, UTP_PORT4, UTP_PORT5, UTP_PORT6, UTP_PORT7, UNDEF_PORT, UNDEF_PORT},
+
+ /* port transform: vendor specific port to logical port */
+ {UTP_PORT0, UTP_PORT1, UTP_PORT2, UTP_PORT3, UTP_PORT4, UTP_PORT5, UTP_PORT6, UTP_PORT7, UNDEF_PORT, UNDEF_PORT},
+
+ /* phy port type */
+ {PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_EXT, PORT_TYPE_UNDEF},
+
+ /* mac port type */
+ {PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UNDEF, PORT_TYPE_EXT},
+
+ /* vendor port type */
+ {PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UNDEF, PORT_TYPE_UNDEF},
+
+ /* phy port mask */
+ 0x01ff,
+
+ /* mac port mask */
+ 0x02ff,
+
+ /* vendor port mask */
+ 0x00ff,
+
+};
+#endif
+#if ((defined CONFIG_JLFE_CHIP_ID_5110) || (defined CONFIG_JLFE_CHIP_ID_51XX))
+jl_switch_dev_t g_switch_dev_5110 = {
+ /* switch chip id */
+ CHIP_ID_JL5110,
+
+ /* port transform: phy to mac */
+ {UTP_PORT0, UTP_PORT1, UTP_PORT2, UTP_PORT3, UTP_PORT4, UTP_PORT5, UTP_PORT6, UTP_PORT7, EXT_PORT0, EXT_PORT1},
+
+ /* port transform: mac to phy */
+ {UTP_PORT0, UTP_PORT1, UTP_PORT2, UTP_PORT3, UTP_PORT4, UTP_PORT5, UTP_PORT6, UTP_PORT7, EXT_PORT0, EXT_PORT1},
+
+ /* port transform: logical port to vendor specific port */
+ {UTP_PORT0, UTP_PORT1, UTP_PORT2, UTP_PORT3, UTP_PORT4, UTP_PORT5, UTP_PORT6, UTP_PORT7, UNDEF_PORT, UNDEF_PORT},
+
+ /* port transform: vendor specific port to logical port */
+ {UTP_PORT0, UTP_PORT1, UTP_PORT2, UTP_PORT3, UTP_PORT4, UTP_PORT5, UTP_PORT6, UTP_PORT7, UNDEF_PORT, UNDEF_PORT},
+
+ /* phy port type */
+ {PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_EXT, PORT_TYPE_EXT},
+
+ /* mac port type */
+ {PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_EXT, PORT_TYPE_EXT},
+
+ /* vendor port type */
+ {PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UTP, PORT_TYPE_UNDEF, PORT_TYPE_UNDEF},
+
+ /* phy port mask */
+ 0x03ff,
+
+ /* mac port mask */
+ 0x03ff,
+
+ /* vendor port mask */
+ 0x00ff,
+};
+#endif
+
+#ifdef CONFIG_JLFE_CHIP_ID_51XX
+jl_switch_dev_t *gp_switch_dev;
+#elif defined(CONFIG_JLFE_CHIP_ID_5104)
+jl_switch_dev_t *gp_switch_dev = &g_switch_dev_5104;
+#elif defined(CONFIG_JLFE_CHIP_ID_5105)
+jl_switch_dev_t *gp_switch_dev = &g_switch_dev_5105;
+#elif defined(CONFIG_JLFE_CHIP_ID_5106)
+jl_switch_dev_t *gp_switch_dev = &g_switch_dev_5106;
+#elif defined(CONFIG_JLFE_CHIP_ID_5108)
+jl_switch_dev_t *gp_switch_dev = &g_switch_dev_5108;
+#elif defined(CONFIG_JLFE_CHIP_ID_5109)
+jl_switch_dev_t *gp_switch_dev = &g_switch_dev_5109;
+#elif defined(CONFIG_JLFE_CHIP_ID_5110)
+jl_switch_dev_t *gp_switch_dev = &g_switch_dev_5110;
+#endif
+
+
+void _jl_switch_info(jl_switch_info_t *pinfo)
+{
+ pinfo->core_ver = g_switch_ctrl.core_ver;
+ pinfo->pkg = gp_switch_dev->chip_id;
+ pinfo->eco_ver = g_switch_ctrl.eco_ver;
+ pinfo->sdk_ver = (VERSION_JL_SDK_MAJOR << 28)
+ | (VERSION_JL_SDK_MINOR << 16)
+ | (VERSION_JL_SDK_MAINTENANCE);
+}
+
+jl_api_ret_t jl_switch_init(void)
+{
+ jl_api_ret_t ret = JL_ERR_OK;
+
+ printk("cy: %s %d\n", __func__, __LINE__);
+ if (JL_STAT_IS_READY())
+ return JL_ERR_OK;
+
+ printk("cy: %s %d\n", __func__, __LINE__);
+ JL_API_MUTEX_INIT();
+
+ printk("cy: %s %d\n", __func__, __LINE__);
+ ret = jl_reg_io_init();
+ if (ret)
+ return ret;
+
+#ifdef CONFIG_JLFE_DUMP_REG_WRITE
+ jl_dump_enable();
+ jl_dump_add_comment("======jl switch init======");
+#endif
+
+ printk("cy: %s %d\n", __func__, __LINE__);
+ ret = jl51xx_sw_core_init();
+ printk("cy: %s %d\n", __func__, __LINE__);
+ if (ret)
+ return ret;
+
+ printk("cy: %s %d\n", __func__, __LINE__);
+ JL_STAT_INIT();
+ printk("cy: %s %d\n", __func__, __LINE__);
+
+ return JL_ERR_OK;
+}
+EXPORT_SYMBOL(jl_switch_init);
+
+jl_api_ret_t jl_switch_deinit(void)
+{
+ jl_api_ret_t ret = JL_ERR_OK;
+
+ if (JL_STAT_IS_UNINIT())
+ return JL_ERR_OK;
+
+ JL_API_MUTEX_LOCK();
+
+#ifdef CONFIG_JLFE_DUMP_REG_WRITE
+ jl_dump_add_comment("======jl switch deinit======");
+#endif
+
+ ret = jl51xx_sw_core_deinit();
+ if (ret)
+ goto exit;
+
+ ret = jl_reg_io_deinit();
+ if (ret)
+ goto exit;
+
+exit:
+ JL_API_MUTEX_UNLOCK();
+
+ JL_API_MUTEX_DEINIT();
+ JL_STAT_DEINIT();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_switch_deinit);
+
+jl_api_ret_t jl_switch_info(jl_switch_info_t *pinfo)
+{
+ JL_CHECK_STAT();
+
+ JL_CHECK_POINTER(pinfo);
+
+ _jl_switch_info(pinfo);
+
+ return JL_ERR_OK;
+}
+EXPORT_SYMBOL(jl_switch_info);
+
+jl_ret_t jl_switch_phyport_check(jl_port_t phy_port)
+{
+ if (phy_port >= JL_PORT_MAX)
+ return JL_ERR_PORT;
+
+ if (gp_switch_dev->phy_port_type[phy_port] == PORT_TYPE_UNDEF)
+ return JL_ERR_PORT;
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl_switch_phyport_check_utp(jl_port_t phy_port)
+{
+ if (phy_port >= JL_PORT_MAX)
+ return JL_ERR_PORT;
+
+ if (gp_switch_dev->phy_port_type[phy_port] != PORT_TYPE_UTP)
+ return JL_ERR_PORT;
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl_switch_phyport_check_ext(jl_port_t phy_port)
+{
+ if (phy_port >= JL_PORT_MAX)
+ return JL_ERR_PORT;
+
+ if (gp_switch_dev->phy_port_type[phy_port] != PORT_TYPE_EXT)
+ return JL_ERR_PORT;
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl_switch_macport_check(jl_port_t mac_port)
+{
+ if (mac_port >= JL_PORT_MAX)
+ return JL_ERR_PORT;
+
+ if (gp_switch_dev->mac_port_type[mac_port] == PORT_TYPE_UNDEF)
+ return JL_ERR_PORT;
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl_switch_vendorport_check(jl_port_t vendor_port)
+{
+ if (vendor_port >= JL_PORT_MAX)
+ return JL_ERR_PORT;
+
+ if (gp_switch_dev->vendor_port_type[vendor_port] != PORT_TYPE_UTP)
+ return JL_ERR_PORT;
+
+ return JL_ERR_OK;
+}
+
+jl_portmask_t jl_switch_portmask_p2m(jl_portmask_t phy_portmask)
+{
+ jl_portmask_t mac_portmask = 0;
+ jl_port_t phy_port;
+ jl_port_t mac_port;
+
+ JL_FOR_EACH_PHY_PORT(phy_port) {
+ if (phy_portmask & (1 << phy_port)) {
+ mac_port = JL_PORT_P2M(phy_port);
+ mac_portmask |= 1 << mac_port;
+ }
+ }
+
+ return mac_portmask;
+}
+
+jl_portmask_t jl_switch_portmask_m2p(jl_portmask_t mac_portmask)
+{
+ jl_portmask_t phy_portmask = 0;
+ jl_port_t mac_port;
+ jl_port_t phy_port;
+
+ JL_FOR_EACH_MAC_PORT(mac_port) {
+ if (mac_portmask & (1 << mac_port)) {
+ phy_port = JL_PORT_M2P(mac_port);
+ phy_portmask |= 1 << phy_port;
+ }
+ }
+
+ return phy_portmask;
+}
+
+jl_portmask_t jl_switch_portmask_p2vp(jl_portmask_t phy_portmask)
+{
+ jl_portmask_t vendor_portmask = 0;
+ jl_port_t phy_port;
+ jl_port_t vendor_port;
+
+ JL_FOR_EACH_PHY_UTP_PORT(phy_port) {
+ if (phy_portmask & (1 << phy_port)) {
+ vendor_port = JL_PORT_P2VP(phy_port);
+ vendor_portmask |= 1 << vendor_port;
+ }
+ }
+
+ return vendor_portmask;
+}
+
+jl_portmask_t jl_switch_portmask_vp2p(jl_portmask_t vendor_portmask)
+{
+ jl_portmask_t phy_portmask = 0;
+ jl_port_t vendor_port;
+ jl_port_t phy_port;
+
+ JL_FOR_EACH_VENDOR_PORT(vendor_port) {
+ if (vendor_portmask & (1 << vendor_port)) {
+ phy_port = JL_PORT_VP2P(vendor_port);
+ phy_portmask |= 1 << phy_port;
+ }
+ }
+
+ return phy_portmask;
+}
+
+jl_ret_t jl_switch_init_state_set(jl_stat_t state)
+{
+ if (state >= STAT_END)
+ return JL_ERR_PARAM;
+
+ g_switch_ctrl.stat = state;
+
+ return JL_ERR_OK;
+}
+EXPORT_SYMBOL(jl_switch_init_state_set);
+
+jl_ret_t jl_switch_init_state_get(jl_stat_t *pstate)
+{
+ JL_CHECK_POINTER(pstate);
+
+ *pstate = g_switch_ctrl.stat;
+
+ return JL_ERR_OK;
+}
+EXPORT_SYMBOL(jl_switch_init_state_get);
+
+#ifdef __KERNEL__
+static int jl_switch_probe(struct platform_device *pdev)
+{
+ printk(KERN_INFO "jl_switch: Initializing the switch\n");
+ jl_switch_init();
+ return 0;
+}
+static int jl_switch_remove(struct platform_device *pdev)
+{
+ printk(KERN_INFO "jl_switch: Removing the switch\n");
+ return 0;
+}
+
+static const struct of_device_id jl_switch_match_table[] = {
+ {.compatible = "jl, jl_switch",},
+};
+
+static struct platform_driver jl_switch_driver = {
+ .probe = jl_switch_probe,
+ .remove = jl_switch_remove,
+ .driver = {
+ .name = "jl_switch",
+ .owner = THIS_MODULE,
+ .of_match_table = jl_switch_match_table,
+ },
+};
+
+static int __init jl_driver_init(void)
+{
+ printk(KERN_INFO "jl_switch: Registering switch driver\n");
+ return platform_driver_register(&jl_switch_driver);
+}
+
+module_init(jl_driver_init);
+
+static void __exit jl_driver_exit(void)
+{
+ printk(KERN_INFO "jl_switch: Unregistering switch driver\n");
+ platform_driver_unregister(&jl_switch_driver);
+}
+module_exit(jl_driver_exit);
+
+
+MODULE_DESCRIPTION("JLSemi ethernet switch main module");
+MODULE_AUTHOR("JLSemi Limited");
+MODULE_LICENSE("GPL v2");
+#endif
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/l2.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/l2.c
new file mode 100644
index 0000000..d52776b
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/l2.c
@@ -0,0 +1,329 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+
+#include "jl_base.h"
+#include "jl_switch.h"
+#include "vlan.h"
+#include "jl51xx/jl51xx_drv_l2.h"
+#include "l2.h"
+
+static jl_ret_t _jl_l2_aging_learning_get(jl_enable_t *penable_aging, jl_enable_t *penable_learning)
+{
+ return jl51xx_l2_aging_learning_get(penable_aging,
+ penable_learning);
+}
+
+static jl_ret_t _jl_l2_aging_learning_set(jl_enable_t enable_aging, jl_enable_t enable_learning)
+{
+ return jl51xx_l2_aging_learning_set(enable_aging,
+ enable_learning);
+}
+
+static jl_ret_t _jl_l2_aging_time_get(jl_uint32 *ptime, jl_uint8 *punit)
+{
+ return jl51xx_l2_aging_time_get(ptime, punit);
+}
+
+static jl_ret_t _jl_l2_aging_time_set(jl_uint32 time, jl_uint8 unit)
+{
+ return jl51xx_l2_aging_time_set(time, unit);
+}
+static jl_ret_t _jl_l2_fib_col_clear(void)
+{
+ return jl51xx_l2_fib_col_clear();
+}
+
+static jl_ret_t _jl_l2_fib_hash_clear(void)
+{
+ return jl51xx_l2_fib_hash_clear();
+}
+
+static jl_ret_t _jl_l2_mc_port_mask_get(jl_l2_table_entry_idx_t index, jl_uint32 *pport_mask)
+{
+
+ return jl51xx_l2_mc_port_mask_get(index, pport_mask);
+}
+
+static jl_ret_t _jl_l2_mc_port_mask_set(jl_l2_table_entry_idx_t index, jl_uint32 port_mask)
+{
+ return jl51xx_l2_mc_port_mask_set(index, port_mask);
+}
+
+static jl_ret_t _jl_l2_mc_port_learning_set(jl_port_t port, jl_enable_t en_learning)
+{
+ return jl51xx_l2_mc_port_learning_set(port, en_learning);
+}
+
+static jl_ret_t _jl_l2_mc_port_learning_get(jl_port_t port, jl_enable_t *pen_learning)
+{
+ return jl51xx_l2_mc_port_learning_get(port, pen_learning);
+}
+
+static jl_ret_t _jl_l2_fib_config_get(jl_l2_fib_key_t *pkey, jl_l2_fib_config_t *pcfg)
+{
+ return jl51xx_l2_fib_config_get(pkey, pcfg);
+}
+
+static jl_ret_t _jl_l2_fib_config_get_by_index(jl_uint32 entry_index, jl_l2_fib_key_t *pkey, jl_l2_fib_config_t *pcfg)
+{
+ return jl51xx_l2_fib_config_get_by_index(entry_index, pkey, pcfg);
+}
+
+jl_ret_t _jl_l2_fib_config_set_auto(jl_l2_fib_key_t *key, jl_l2_fib_config_t *cfg)
+{
+ return jl51xx_l2_fib_config_set_auto(key, cfg);
+}
+
+jl_api_ret_t jl_l2_aging_learning_get(jl_enable_t *penable_aging, jl_enable_t *penable_learning)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+
+ JL_CHECK_POINTER(penable_aging);
+
+ JL_CHECK_POINTER(penable_learning);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_l2_aging_learning_get(penable_aging, penable_learning);
+ JL_API_MUTEX_UNLOCK();
+ return ret;
+}
+EXPORT_SYMBOL(jl_l2_aging_learning_get);
+
+jl_api_ret_t jl_l2_aging_learning_set(jl_enable_t enable_aging, jl_enable_t enable_learning)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+
+ if (enable_aging > JL_ENABLE_END || enable_learning > JL_ENABLE_END)
+ return JL_ERR_PARAM;
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_l2_aging_learning_set(enable_aging, enable_learning);
+ JL_API_MUTEX_UNLOCK();
+ return ret;
+}
+EXPORT_SYMBOL(jl_l2_aging_learning_set);
+
+jl_api_ret_t jl_l2_mc_port_mask_get(jl_l2_table_entry_idx_t index, jl_uint32 *pport_mask)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+
+ JL_CHECK_POINTER(pport_mask);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_l2_mc_port_mask_get(index, pport_mask);
+ JL_API_MUTEX_UNLOCK();
+ return ret;
+}
+EXPORT_SYMBOL(jl_l2_mc_port_mask_get);
+
+jl_api_ret_t jl_l2_mc_port_mask_set(jl_l2_table_entry_idx_t index, jl_uint32 port_mask)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_l2_mc_port_mask_set(index, port_mask);
+ JL_API_MUTEX_UNLOCK();
+ return ret;
+}
+EXPORT_SYMBOL(jl_l2_mc_port_mask_set);
+
+jl_api_ret_t jl_l2_mc_port_learning_get(jl_port_t port, jl_enable_t *pen_learning)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_POINTER(pen_learning);
+
+ JL_CHECK_STAT();
+
+ JL_CHECK_PORT(port);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_l2_mc_port_learning_get(port, pen_learning);
+ JL_API_MUTEX_UNLOCK();
+ return ret;
+}
+EXPORT_SYMBOL(jl_l2_mc_port_learning_get);
+
+jl_api_ret_t jl_l2_mc_port_learning_set(jl_port_t port, jl_enable_t en_learning)
+{
+ jl_api_ret_t ret;
+
+ if (en_learning >= JL_ENABLE_END)
+ return JL_ERR_PARAM;
+
+ JL_CHECK_STAT();
+
+ JL_CHECK_PORT(port);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_l2_mc_port_learning_set(port, en_learning);
+ JL_API_MUTEX_UNLOCK();
+ return ret;
+}
+EXPORT_SYMBOL(jl_l2_mc_port_learning_set);
+
+jl_api_ret_t jl_l2_fib_config_get_by_index(jl_uint32 entry_index, jl_l2_fib_key_t *pkey, jl_l2_fib_config_t *pcfg)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+
+ JL_CHECK_POINTER(pkey);
+
+ JL_CHECK_POINTER(pcfg);
+
+ if (entry_index >= JL_L2_DA_TABLE_SIZE)
+ return JL_ERR_PARAM;
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_l2_fib_config_get_by_index(entry_index, pkey, pcfg);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_l2_fib_config_get_by_index);
+
+jl_api_ret_t jl_l2_fib_config_get(jl_l2_fib_key_t *pkey, jl_l2_fib_config_t *pcfg)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+
+ JL_CHECK_POINTER(pcfg);
+
+ if (pkey == NULL || pkey->fid > VLAN_IDX_MAX)
+ return JL_ERR_PARAM;
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_l2_fib_config_get(pkey, pcfg);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_l2_fib_config_get);
+
+jl_api_ret_t jl_l2_fib_config_set_auto(jl_l2_fib_key_t *pkey, jl_l2_fib_config_t *pcfg)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+
+ JL_CHECK_POINTER(pkey);
+
+ JL_CHECK_POINTER(pcfg);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_l2_fib_config_set_auto(pkey, pcfg);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_l2_fib_config_set_auto);
+
+jl_api_ret_t jl_l2_fib_clear(jl_bool is_collision)
+{
+ jl_api_ret_t ret;
+
+ /* Check System state */
+ JL_CHECK_STAT();
+
+ JL_API_MUTEX_LOCK();
+ if (is_collision == TRUE)
+ ret = _jl_l2_fib_col_clear();
+ else if (is_collision == FALSE)
+ ret = _jl_l2_fib_hash_clear();
+ else
+ ret = JL_ERR_PARAM;
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_l2_fib_clear);
+
+jl_api_ret_t jl_l2_fib_clear_all(void)
+{
+ jl_api_ret_t ret;
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_l2_fib_col_clear();
+ ret += _jl_l2_fib_hash_clear();
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_l2_fib_clear_all);
+
+jl_api_ret_t jl_l2_fib_fast_clear_dynamic(void)
+{
+ jl_uint32 cur_tick_cnt = 0;
+ jl_uint8 cur_tick_index = 0;
+ jl_ret_t ret;
+ jl_uint16 delay;
+
+ JL_CHECK_STAT();
+
+ JL_API_MUTEX_LOCK();
+ (void)_jl_l2_aging_time_get(&cur_tick_cnt, &cur_tick_index);
+
+ (void)_jl_l2_aging_time_set(0, 1);
+ for (delay = 1000; delay > 0; delay--) {
+ /* wait for timeout */
+ }
+
+ ret = _jl_l2_aging_time_set(cur_tick_cnt, cur_tick_index);
+
+ JL_API_MUTEX_UNLOCK();
+ return ret;
+}
+EXPORT_SYMBOL(jl_l2_fib_fast_clear_dynamic);
+
+jl_api_ret_t jl_l2_aging_time_set(jl_uint32 time, jl_uint8 unit)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_l2_aging_time_set(time, unit);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_l2_aging_time_set);
+
+jl_api_ret_t jl_l2_aging_time_get(jl_uint32 *ptime, jl_uint8 *punit)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+
+ JL_CHECK_POINTER(ptime);
+
+ JL_CHECK_POINTER(punit);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_l2_aging_time_get(ptime, punit);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_l2_aging_time_get);
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/led.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/led.c
new file mode 100644
index 0000000..77ed689
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/led.c
@@ -0,0 +1,212 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+
+#include "jl_switch.h"
+
+#include "jl51xx/jl51xx_drv_led.h"
+#include "led.h"
+
+static jl_ret_t _jl_led_enable_set(jl_led_group_t group, jl_portmask_t portmask)
+{
+ if (group >= LED_GROUP_END)
+ return JL_ERR_PARAM;
+ /* Check Port Mask Valid */
+ JL_CHECK_PORTMASK(portmask);
+
+ return jl51xx_led_enable_set(group, portmask);
+}
+
+static jl_ret_t _jl_led_enable_get(jl_led_group_t group, jl_portmask_t *portmask)
+{
+ return jl51xx_led_enable_get(group, portmask);
+}
+
+static jl_ret_t _jl_led_group_config_set(jl_led_group_t group, jl_led_config_t config)
+{
+ return jl51xx_led_group_config_set(group, config);
+}
+
+static jl_ret_t _jl_led_group_config_get(jl_led_group_t group, jl_led_config_t *pconfig)
+{
+ return jl51xx_led_group_config_get(group, pconfig);
+}
+
+static jl_ret_t _jl_led_blink_rate_set(jl_led_blink_rate_t blink_rate)
+{
+ return jl51xx_led_blink_rate_set(blink_rate);
+}
+
+static jl_ret_t _jl_led_blink_rate_get(jl_led_blink_rate_t *blink_rate)
+{
+ return jl51xx_led_blink_rate_get(blink_rate);
+}
+
+static jl_ret_t _jl_led_group_active_high_set(jl_led_group_t group, jl_portmask_t portmask)
+{
+ if (group >= LED_GROUP_END)
+ return JL_ERR_PARAM;
+ /* Check Port Mask Valid */
+ JL_CHECK_PORTMASK(portmask);
+
+ return jl51xx_led_group_active_high_set(group, portmask);
+}
+
+static jl_ret_t _jl_led_group_active_high_get(jl_led_group_t group, jl_portmask_t *portmask)
+{
+ return jl51xx_led_group_active_high_get(group, portmask);
+}
+
+jl_api_ret_t jl_led_enable_set(jl_led_group_t group, jl_portmask_t portmask)
+{
+ jl_api_ret_t ret;
+
+ /* Check System state */
+ JL_CHECK_STAT();
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_led_enable_set(group, portmask);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_led_enable_set);
+
+jl_api_ret_t jl_led_enable_get(jl_led_group_t group, jl_portmask_t *portmask)
+{
+ jl_api_ret_t ret;
+
+ /* Check System state */
+ JL_CHECK_STAT();
+
+ JL_CHECK_POINTER(portmask);
+
+ if (group >= LED_GROUP_END)
+ return JL_ERR_PARAM;
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_led_enable_get(group, portmask);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_led_enable_get);
+
+jl_api_ret_t jl_led_group_config_set(jl_led_group_t group, jl_led_config_t config)
+{
+ jl_api_ret_t ret;
+
+ /* Check System state */
+ JL_CHECK_STAT();
+
+ if (config >= LED_CONFIG_END ||
+ group >= LED_GROUP_END)
+ return JL_ERR_PARAM;
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_led_group_config_set(group, config);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_led_group_config_set);
+
+jl_api_ret_t jl_led_group_config_get(jl_led_group_t group, jl_led_config_t *pconfig)
+{
+ jl_api_ret_t ret;
+
+ /* Check System state */
+ JL_CHECK_STAT();
+
+ JL_CHECK_POINTER(pconfig);
+
+ if (group >= LED_GROUP_END)
+ return JL_ERR_PARAM;
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_led_group_config_get(group, pconfig);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_led_group_config_get);
+
+jl_api_ret_t jl_led_blink_rate_set(jl_led_blink_rate_t blink_rate)
+{
+ jl_api_ret_t ret;
+
+ /* Check System state */
+ JL_CHECK_STAT();
+
+ if (blink_rate >= LED_BLINKRATE_END)
+ return JL_ERR_PARAM;
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_led_blink_rate_set(blink_rate);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_led_blink_rate_set);
+
+jl_api_ret_t jl_led_blink_rate_get(jl_led_blink_rate_t *blink_rate)
+{
+ jl_api_ret_t ret;
+
+ /* Check System state */
+ JL_CHECK_STAT();
+
+ JL_CHECK_POINTER(blink_rate);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_led_blink_rate_get(blink_rate);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_led_blink_rate_get);
+
+jl_api_ret_t jl_led_group_active_high_set(jl_led_group_t group, jl_portmask_t portmask)
+{
+ jl_api_ret_t ret;
+
+ /* Check System state */
+ JL_CHECK_STAT();
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_led_group_active_high_set(group, portmask);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_led_group_active_high_set);
+
+jl_api_ret_t jl_led_group_active_high_get(jl_led_group_t group, jl_portmask_t *portmask)
+{
+ jl_api_ret_t ret;
+
+ /* Check System state */
+ JL_CHECK_STAT();
+
+ JL_CHECK_POINTER(portmask);
+
+ if (group >= LED_GROUP_END)
+ return JL_ERR_PARAM;
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_led_group_active_high_get(group, portmask);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_led_group_active_high_get);
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/lpd.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/lpd.c
new file mode 100644
index 0000000..f825d35
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/lpd.c
@@ -0,0 +1,135 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+
+#include "jl_base.h"
+#include "jl51xx/jl51xx_drv_lpd.h"
+#include "lpd.h"
+
+jl_api_ret_t _jl_lpd_config_set(jl_lpd_config_t *lpd_config)
+{
+ return jl51xx_lpd_ctrl_set(lpd_config);
+}
+
+jl_api_ret_t _jl_lpd_config_get(jl_lpd_config_t *lpd_config)
+{
+ return jl51xx_lpd_ctrl_get(lpd_config);
+}
+
+jl_api_ret_t _jl_lpd_enable(void)
+{
+ return jl51xx_lpd_enable();
+}
+
+jl_api_ret_t _jl_lpd_disable(void)
+{
+ return jl51xx_lpd_disable();
+}
+
+jl_api_ret_t _jl_lpd_trigger_once(jl_port_t port)
+{
+ return jl51xx_lpd_trigger_once(port);
+}
+
+jl_api_ret_t _jl_lpd_lp_ports_get(jl_portmask_t *port_mask)
+{
+ return jl51xx_lpd_ports_get(port_mask);
+}
+
+jl_api_ret_t jl_lpd_config_set(jl_lpd_config_t *lpd_config)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+ JL_CHECK_POINTER(lpd_config);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_lpd_config_set(lpd_config);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_lpd_config_set);
+
+jl_api_ret_t jl_lpd_config_get(jl_lpd_config_t *lpd_config)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+ JL_CHECK_POINTER(lpd_config);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_lpd_config_get(lpd_config);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_lpd_config_get);
+
+jl_api_ret_t jl_lpd_enable(void)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_lpd_enable();
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_lpd_enable);
+
+jl_api_ret_t jl_lpd_disable(void)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_lpd_disable();
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_lpd_disable);
+
+jl_api_ret_t jl_lpd_trigger_once(jl_port_t port)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+ JL_CHECK_PORT(port);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_lpd_trigger_once(port);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_lpd_trigger_once);
+
+jl_api_ret_t jl_lpd_lp_ports_get(jl_portmask_t *port_mask)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+ JL_CHECK_POINTER(port_mask);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_lpd_lp_ports_get(port_mask);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_lpd_lp_ports_get);
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/mib.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/mib.c
new file mode 100644
index 0000000..ab16ee5
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/mib.c
@@ -0,0 +1,262 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+
+#include "jl_switch.h"
+
+#include "jl51xx/jl51xx_drv_port.h"
+#include "jl51xx/jl51xx_drv_mib.h"
+#include "mib.h"
+
+static jl_ret_t _jl_mib_port_rc_mode_get(jl_port_t port, jl_enable_t *penable)
+{
+ return jl51xx_mib_port_rc_mode_get(port, penable);
+}
+
+static jl_ret_t _jl_mib_port_rc_mode_set(jl_port_t port, jl_enable_t enable)
+{
+ return jl51xx_mib_port_rc_mode_set(port, enable);
+}
+
+static jl_ret_t _jl_mib_port_clear(jl_port_t port, jl_port_mib_type_t type)
+{
+ return jl51xx_mib_port_clear(port, type);
+}
+
+static jl_ret_t _jl_mib_port_clear_all(jl_port_t port)
+{
+ jl_ret_t ret;
+ jl_uint16 type;
+
+ for (type = 0; type < PORT_MIB_TYPE_END; type++) {
+ ret = jl51xx_mib_port_clear(port, type);
+ if (ret)
+ return ret;
+ }
+
+ return JL_ERR_OK;
+}
+
+static jl_ret_t _jl_mib_port_get(jl_port_t port, jl_port_mib_type_t type, jl_mib_counter_t *pcnt)
+{
+ return jl51xx_mib_port_get(port, type, pcnt);
+}
+
+static jl_ret_t _jl_mib_port_get_all(jl_port_t port, jl_port_mib_cnt_t *pport_cnt)
+{
+ jl_ret_t ret;
+ jl_mib_counter_t counter;
+ jl_uint32 *ptr;
+ jl_enable_t rc;
+ jl_port_mib_type_t idx;
+ CONST_T jl_uint8 mib_reg_width[PORT_MIB_TYPE_END] = {
+ 2, 2, 2, 2, 2, 2, 2, 2, 1, 1,
+ 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1 };
+
+ ret = jl51xx_mib_port_rc_mode_get(port, &rc);
+ if (ret)
+ return ret;
+ pport_cnt->rc_enable = rc;
+ ptr = (jl_uint32 *)(&(pport_cnt->tx_pkt_cnt));
+
+ for (idx = 0; idx < PORT_MIB_TYPE_END; idx++) {
+ counter = 0;
+ ret = jl51xx_mib_port_get(port, idx, &counter);
+ if (ret) {
+ return ret;
+ }
+ if (mib_reg_width[idx] == 2)
+ *((jl_uint64 *)ptr) = counter;
+ else if (mib_reg_width[idx] == 1)
+ *ptr = (counter & 0xFFFFFFFF);
+ else
+ return JL_ERR_FAIL;
+ ptr += mib_reg_width[idx];
+ }
+
+ return ret;
+}
+
+jl_api_ret_t jl_mib_port_rc_mode_get(jl_port_t port, jl_enable_t *penable)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+
+ JL_CHECK_PORT(port);
+
+ JL_CHECK_POINTER(penable);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_mib_port_rc_mode_get(port, penable);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_mib_port_rc_mode_get);
+
+jl_api_ret_t jl_mib_port_rc_mode_set(jl_port_t port, jl_enable_t enable)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+
+ JL_CHECK_PORT(port);
+
+ if (enable >= JL_ENABLE_END)
+ return JL_ERR_PARAM;
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_mib_port_rc_mode_set(port, enable);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_mib_port_rc_mode_set);
+
+jl_api_ret_t jl_mib_port_clear(jl_port_t port, jl_port_mib_type_t type)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+
+ JL_CHECK_PORT(port);
+
+ JL_MIB_CHECK_TYPE(type);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_mib_port_clear(port, type);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_mib_port_clear);
+
+jl_api_ret_t jl_mib_port_clear_all(jl_port_t port)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+
+ JL_CHECK_PORT(port);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_mib_port_clear_all(port);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_mib_port_clear_all);
+
+jl_api_ret_t jl_mib_port_get(jl_port_t port, jl_port_mib_type_t type, jl_mib_counter_t *pcnt)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+
+ JL_CHECK_PORT(port);
+
+ JL_CHECK_POINTER(pcnt);
+
+ JL_MIB_CHECK_TYPE(type);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_mib_port_get(port, type, pcnt);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_mib_port_get);
+
+jl_api_ret_t jl_mib_port_get_all(jl_port_t port, jl_port_mib_cnt_t *pport_cnt)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+
+ JL_CHECK_PORT(port);
+
+ JL_CHECK_POINTER(pport_cnt);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_mib_port_get_all(port, pport_cnt);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_mib_port_get_all);
+
+jl_api_ret_t jl_mib_swc_global_drop_get(jl_mib_swc_glb_drop_t *pport_cnt)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+
+ JL_CHECK_POINTER(pport_cnt);
+
+ JL_API_MUTEX_LOCK();
+ ret = jl51xx_mib_swc_global_drop_get(pport_cnt);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_mib_swc_global_drop_get);
+
+jl_api_ret_t jl_mib_swc_global_drop_clear(void)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+
+ JL_API_MUTEX_LOCK();
+ ret = jl51xx_mib_swc_global_drop_clear();
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_mib_swc_global_drop_clear);
+
+jl_api_ret_t jl_mib_swc_port_drop_get(jl_port_t port, jl_mib_swc_port_drop_t *pport_cnt)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+
+ JL_CHECK_PORT(port);
+
+ JL_CHECK_POINTER(pport_cnt);
+
+ JL_API_MUTEX_LOCK();
+ ret = jl51xx_mib_swc_port_drop_get(port, pport_cnt);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_mib_swc_port_drop_get);
+
+jl_api_ret_t jl_mib_swc_port_drop_clear(jl_port_t port)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+
+ JL_CHECK_PORT(port);
+
+ JL_API_MUTEX_LOCK();
+ ret = jl51xx_mib_swc_port_drop_clear(port);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_mib_swc_port_drop_clear);
+
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/mirror.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/mirror.c
new file mode 100644
index 0000000..397f0a1
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/mirror.c
@@ -0,0 +1,141 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+
+#include "jl_base.h"
+#include "jl51xx/jl51xx_drv_mirror.h"
+#include "mirror.h"
+
+jl_api_ret_t _jl_mirror_input_mr_get(jl_port_t mirrored_port, jl_port_t *mirroring_port)
+{
+ return jl51xx_mirror_input_mr_get(mirrored_port, mirroring_port);
+}
+
+jl_api_ret_t _jl_mirror_output_mr_get(jl_port_t mirrored_port, jl_port_t *mirroring_port)
+{
+ return jl51xx_mirror_output_mr_get(mirrored_port, mirroring_port);
+}
+
+jl_api_ret_t _jl_mirror_input_mr_set(jl_port_t mirrored_port, jl_port_t mirroring_port)
+{
+ return jl51xx_mirror_input_mr_set(mirrored_port, mirroring_port);
+}
+
+jl_api_ret_t _jl_mirror_input_mr_clear(jl_port_t mirrored_port)
+{
+ return jl51xx_mirror_input_mr_clear(mirrored_port);
+}
+
+jl_api_ret_t _jl_mirror_output_mr_set(jl_port_t mirrored_port, jl_port_t mirroring_port)
+{
+ return jl51xx_mirror_output_mr_set(mirrored_port, mirroring_port);
+}
+
+jl_api_ret_t _jl_mirror_output_mr_clear(jl_port_t mirrored_port)
+{
+ return jl51xx_mirror_output_mr_clear(mirrored_port);
+}
+
+jl_api_ret_t jl_mirror_input_mr_get(jl_port_t mirrored_port, jl_port_t *mirroring_port)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+ JL_CHECK_PORT(mirrored_port);
+ JL_CHECK_POINTER(mirroring_port);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_mirror_input_mr_get(mirrored_port, mirroring_port);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_mirror_input_mr_get);
+
+jl_api_ret_t jl_mirror_output_mr_get(jl_port_t mirrored_port, jl_port_t *mirroring_port)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+ JL_CHECK_PORT(mirrored_port);
+ JL_CHECK_POINTER(mirroring_port);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_mirror_output_mr_get(mirrored_port, mirroring_port);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_mirror_output_mr_get);
+
+jl_api_ret_t jl_mirror_input_mr_set(jl_port_t mirrored_port, jl_port_t mirroring_port)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+ JL_CHECK_PORT(mirrored_port);
+ JL_CHECK_PORT(mirroring_port);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_mirror_input_mr_set(mirrored_port, mirroring_port);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_mirror_input_mr_set);
+
+jl_api_ret_t jl_mirror_input_mr_clear(jl_port_t mirrored_port)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+ JL_CHECK_PORT(mirrored_port);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_mirror_input_mr_clear(mirrored_port);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_mirror_input_mr_clear);
+
+jl_api_ret_t jl_mirror_output_mr_set(jl_port_t mirrored_port, jl_port_t mirroring_port)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+ JL_CHECK_PORT(mirrored_port);
+ JL_CHECK_PORT(mirroring_port);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_mirror_output_mr_set(mirrored_port, mirroring_port);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_mirror_output_mr_set);
+
+jl_api_ret_t jl_mirror_output_mr_clear(jl_port_t mirrored_port)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+ JL_CHECK_PORT(mirrored_port);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_mirror_output_mr_clear(mirrored_port);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_mirror_output_mr_clear);
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/port.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/port.c
new file mode 100755
index 0000000..a29fddd
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/port.c
@@ -0,0 +1,896 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+
+#include "jl_switch.h"
+
+#include "jl51xx/jl51xx_drv_phy.h"
+#include "jl51xx/jl51xx_drv_port.h"
+#include "jl51xx/jl51xx_mac_uctrl.h"
+#include "port.h"
+
+static jl_ret_t _jl_port_phy_autoneg_ability_set(jl_port_t port, jl_port_phy_ability_t *pability)
+{
+ jl_ret_t ret;
+ jl_uint32 reg_val;
+ jl_uint32 reg0_mask = 0;
+ jl_uint32 reg4_mask = 0;
+ jl_uint32 macuctrl_mask = 0;
+
+ if (pability->half_duplex_10 >= JL_ENABLE_END || pability->full_duplex_10 >= JL_ENABLE_END || \
+ pability->half_duplex_100 >= JL_ENABLE_END || pability->full_duplex_100 >= JL_ENABLE_END || \
+ pability->flow_control >= JL_ENABLE_END || pability->asym_flow_control >= JL_ENABLE_END)
+ return JL_ERR_PARAM;
+
+ /*for PHY auto mode setup*/
+ pability->auto_negotiation = 1;
+
+ /*
+ * 0.6 0.13 speed_selection
+ * 0 0 10Mbps
+ * 0 1 100Mbps
+ * 1 0 1000Mbps
+ * 1 1 Reserved
+ */
+
+ if (pability->half_duplex_10 == 1)
+ reg4_mask |= BIT(5);
+
+ if (pability->full_duplex_10 == 1)
+ reg4_mask |= BIT(6);
+
+ if (pability->half_duplex_100 == 1)
+ reg4_mask |= BIT(7);
+
+ if (pability->full_duplex_100 == 1)
+ reg4_mask |= BIT(8);
+
+ if (pability->auto_negotiation == 1) {
+ reg0_mask |= BIT(12);
+ macuctrl_mask &= (~BIT(4));
+ macuctrl_mask &= (~BIT(5));
+ macuctrl_mask &= (~BIT(7));
+ }
+
+ if (pability->flow_control == 1)
+ reg4_mask |= BIT(10);
+
+ if (pability->asym_flow_control == 1)
+ reg4_mask |= BIT(11);
+
+ /* If auto negotiation is capable, restart it */
+ if (1 == pability->auto_negotiation)
+ reg0_mask |= BIT(9);
+ /* Auto-Negotiation Advertisement Register setting*/
+ if ((ret = jl51xx_port_phy_an_adv_reg_get(
+ port,
+ ®_val)) != JL_ERR_OK)
+ return ret;
+ reg_val = (reg_val & (~0x0DE0)) | reg4_mask;
+
+ if ((ret = jl51xx_port_phy_an_adv_reg_set(
+ port,
+ reg_val)) != JL_ERR_OK)
+ return ret;
+
+ /* Mac User Control Register setting */
+ ret = jl51xx_mac_uctrl_read(port, ®_val);
+ if (ret != JL_ERR_OK)
+ return ret;
+
+ reg_val = (reg_val & (~0xB0)) | macuctrl_mask;
+
+ ret = jl51xx_mac_uctrl_write(port, reg_val);
+ if (ret != JL_ERR_OK)
+ return ret;
+
+ /* Basic Mode Control Register setting */
+ if ((ret = jl51xx_port_phy_control_reg_get(
+ port,
+ ®_val)) != JL_ERR_OK)
+ return ret;
+
+ reg_val = (reg_val & (~0x1200)) | reg0_mask;
+
+ if ((ret = jl51xx_port_phy_control_reg_set(
+ port,
+ reg_val)) != JL_ERR_OK)
+ return ret;
+
+ return JL_ERR_OK;
+}
+
+static jl_ret_t _jl_port_phy_autoneg_ability_get(jl_port_t port, jl_port_phy_ability_t *pability)
+{
+ jl_ret_t ret;
+ jl_uint32 reg0_val;
+ jl_uint32 reg4_val = 0;
+
+ /* Auto-Negotiation Advertisement Register setting*/
+ if ((ret = jl51xx_port_phy_an_adv_reg_get(
+ port,
+ ®4_val)) != JL_ERR_OK)
+ return ret;
+
+ if (reg4_val & BIT(11))
+ pability->asym_flow_control = 1;
+ else
+ pability->asym_flow_control = 0;
+
+ if (reg4_val & BIT(10))
+ pability->flow_control = 1;
+ else
+ pability->flow_control = 0;
+
+ if (reg4_val & BIT(8))
+ pability->full_duplex_100 = 1;
+ else
+ pability->full_duplex_100 = 0;
+
+ if (reg4_val & BIT(7))
+ pability->half_duplex_100 = 1;
+ else
+ pability->half_duplex_100 = 0;
+
+ if (reg4_val & BIT(6))
+ pability->full_duplex_10 = 1;
+ else
+ pability->full_duplex_10 = 0;
+
+ if (reg4_val & BIT(5))
+ pability->half_duplex_10 = 1;
+ else
+ pability->half_duplex_10 = 0;
+
+ /* Basic Mode Control Register setting */
+ if ((ret = jl51xx_port_phy_control_reg_get(
+ port,
+ ®0_val)) != JL_ERR_OK)
+ return ret;
+
+ if (reg0_val & BIT(12))
+ pability->auto_negotiation = 1;
+ else
+ pability->auto_negotiation = 0;
+
+ return JL_ERR_OK;
+}
+
+static jl_ret_t _jl_port_phy_force_ability_set(jl_port_t port, jl_port_phy_ability_t *pability)
+{
+ jl_ret_t ret;
+ jl_uint32 reg_val;
+ jl_uint32 reg0_mask = 0;
+ jl_uint32 macuctrl_mask = 0;
+
+ if (pability->half_duplex_10 >= JL_ENABLE_END || pability->full_duplex_10 >= JL_ENABLE_END || \
+ pability->half_duplex_100 >= JL_ENABLE_END || pability->full_duplex_100 >= JL_ENABLE_END || \
+ pability->flow_control >= JL_ENABLE_END || pability->asym_flow_control >= JL_ENABLE_END)
+ return JL_ERR_PARAM;
+
+ /*for PHY auto mode setup*/
+ pability->auto_negotiation = 0;
+
+ /*
+ * 0.6 0.13 speed_selection
+ * 0 0 10Mbps
+ * 0 1 100Mbps
+ * 1 0 1000Mbps
+ * 1 1 Reserved
+ */
+
+ if (pability->half_duplex_10 == 1) {
+ reg0_mask &= (~BIT(8));
+ reg0_mask &= (~BIT(13));
+ }
+
+ if (pability->full_duplex_10 == 1) {
+ reg0_mask |= BIT(8);
+ reg0_mask &= (~BIT(13));
+ }
+
+ if (pability->half_duplex_100 == 1) {
+ reg0_mask &= (~BIT(8));
+ reg0_mask |= BIT(13);
+ }
+
+ if (pability->full_duplex_100 == 1) {
+ reg0_mask |= BIT(8);
+ reg0_mask |= BIT(13);
+ }
+
+ if (pability->auto_negotiation == 0)
+ reg0_mask &= (~BIT(12));
+
+ if (pability->flow_control == 1) {
+ macuctrl_mask |= BIT(4);
+ macuctrl_mask |= BIT(5);
+ macuctrl_mask |= BIT(7);
+ }
+
+ /* If auto negotiation is capable, restart it */
+ reg0_mask |= BIT(9);
+
+ /* Mac User Control Register setting */
+ ret = jl51xx_mac_uctrl_read(port, ®_val);
+ if (ret != JL_ERR_OK)
+ return ret;
+
+ reg_val = (reg_val & (~0xB0)) | macuctrl_mask;
+
+ ret = jl51xx_mac_uctrl_write(port, reg_val);
+ if (ret != JL_ERR_OK)
+ return ret;
+
+ /* Basic Mode Control Register setting */
+ if ((ret = jl51xx_port_phy_control_reg_get(
+ port,
+ ®_val)) != JL_ERR_OK)
+ return ret;
+
+ reg_val = (reg_val & (~0x3300)) | reg0_mask;
+
+ if ((ret = jl51xx_port_phy_control_reg_set(
+ port,
+ reg_val)) != JL_ERR_OK)
+ return ret;
+
+ return JL_ERR_OK;
+}
+
+static jl_ret_t _jl_port_phy_force_ability_get(jl_port_t port, jl_port_phy_ability_t *pability)
+{
+ jl_ret_t ret;
+ jl_uint32 reg0_val = 0;
+ jl_uint32 macuctrl_val = 0;
+
+ /* Basic Mode Control Register setting */
+ if ((ret = jl51xx_port_phy_control_reg_get(
+ port,
+ ®0_val)) != JL_ERR_OK)
+ return ret;
+
+ if (reg0_val & BIT(12))
+ pability->auto_negotiation = 1;
+ else
+ pability->auto_negotiation = 0;
+
+ if ((reg0_val & BIT(8)) &&
+ (reg0_val & BIT(13)))
+ pability->full_duplex_100 = 1;
+ else if ((!(reg0_val & BIT(8))) &&
+ (reg0_val & BIT(13)))
+ pability->half_duplex_100 = 1;
+ else if ((reg0_val & BIT(8)) &&
+ (!(reg0_val & BIT(13))))
+ pability->full_duplex_10 = 1;
+ else
+ pability->half_duplex_10 = 1;
+
+ /* Mac User Control Register setting */
+ if ((ret = jl51xx_mac_uctrl_read(
+ port,
+ &macuctrl_val)) != JL_ERR_OK)
+ return ret;
+
+ if ((macuctrl_val & BIT(7)) &&
+ (macuctrl_val & BIT(5)) &&
+ (macuctrl_val & BIT(4))
+ )
+ pability->flow_control = 1;
+ else
+ pability->flow_control = 0;
+
+ pability->asym_flow_control = 0;
+
+ /* Auto-Negotiation Advertisement Register setting */
+
+ return JL_ERR_OK;
+}
+
+static jl_ret_t _jl_port_mac_status_get(jl_port_t port, jl_port_mac_ability_t *pability)
+{
+ jl_ret_t ret;
+ jl_uint32 reg1_val;
+ jl_uint8 phy_speed = 0;
+ jl_uint8 fsm = 0;
+
+ //Get MAC_force_mode flag
+ if ((ret = jl51xx_port_mac_force_link_get(
+ port,
+ pability)) != JL_ERR_OK)
+ return ret;
+
+ if ((ret = jl51xx_port_phy_status_reg_get(
+ port,
+ ®1_val)) != JL_ERR_OK)
+ return ret;
+
+ fsm = reg1_val & 0x0F;
+ if (fsm != 2) {
+ pability->link = 0; //FW not ready
+ return JL_ERR_OK;
+ }
+ pability->link = 1;
+
+ phy_speed = (reg1_val >> 4) & 0xF;
+ if (phy_speed == 0) {
+ pability->duplex = PORT_HALF_DUPLEX;
+ pability->speed = PORT_SPEED_10M;
+ } else if (phy_speed == 1) {
+ pability->duplex = PORT_FULL_DUPLEX;
+ pability->speed = PORT_SPEED_10M;
+ } else if (phy_speed == 2) {
+ pability->duplex = PORT_HALF_DUPLEX;
+ pability->speed = PORT_SPEED_100M;
+ } else if (phy_speed == 3) {
+ pability->duplex = PORT_FULL_DUPLEX;
+ pability->speed = PORT_SPEED_100M;
+ } else if (phy_speed == 4) {
+ pability->link = 0;
+ }
+
+ if (reg1_val & BIT(14))
+ pability->rx_pause = 1;
+ else
+ pability->rx_pause = 0;
+
+ if (reg1_val & BIT(15))
+ pability->tx_pause = 1;
+ else
+ pability->tx_pause = 0;
+
+ return JL_ERR_OK;
+}
+
+static jl_ret_t _jl_port_phy_status_get(jl_port_t port, jl_port_link_status_t *pstatus, jl_port_duplex_t *pduplex, jl_port_speed_t *pspeed)
+{
+ jl_ret_t ret;
+ jl_uint32 reg1_val;
+ jl_uint8 phy_speed = 0;
+ jl_uint8 fsm = 0;
+
+ if ((ret = jl51xx_port_phy_status_reg_get(
+ port,
+ ®1_val)) != JL_ERR_OK)
+ return ret;
+
+ *pduplex = 0;
+ *pspeed = 0;
+ fsm = reg1_val & 0x0F;
+ if (fsm != 2) {
+ *pstatus = 0; //FW not ready
+ return JL_ERR_OK;
+ }
+ *pstatus = 1;
+
+ phy_speed = (reg1_val >> 4) & 0x0F;
+ if (phy_speed == 0) {
+ *pduplex = PORT_HALF_DUPLEX;
+ *pspeed = PORT_SPEED_10M;
+ } else if (phy_speed == 1) {
+ *pduplex = PORT_FULL_DUPLEX;
+ *pspeed = PORT_SPEED_10M;
+ } else if (phy_speed == 2) {
+ *pduplex = PORT_HALF_DUPLEX;
+ *pspeed = PORT_SPEED_100M;
+ } else if (phy_speed == 3) {
+ *pduplex = PORT_FULL_DUPLEX;
+ *pspeed = PORT_SPEED_100M;
+ } else if (phy_speed == 4) {
+ *pstatus = 0;
+ }
+
+ return JL_ERR_OK;
+}
+
+static jl_ret_t _jl_port_phy_isolate_set(jl_port_t port, jl_enable_t isolate)
+{
+ return jl51xx_port_phy_isolate_set(port, isolate);
+}
+
+static jl_ret_t _jl_port_phy_isolate_get(jl_port_t port, jl_enable_t *pisolate)
+{
+ return jl51xx_port_phy_isolate_get(port, pisolate);
+}
+
+static jl_ret_t _jl_port_phy_enable_set(jl_port_t port, jl_enable_t enable)
+{
+ return jl51xx_port_phy_enable_set(port, enable);
+}
+
+static jl_ret_t _jl_port_phy_enable_get(jl_port_t port, jl_enable_t *penable)
+{
+ return jl51xx_port_phy_enable_get(port, penable);
+}
+
+static jl_ret_t _jl_port_phy_indirect_reg_set(jl_port_t port, jl_port_phy_reg_t reg, jl_port_phy_data_t regval)
+{
+ return jl51xx_phy_indirect_write(port, reg, regval);
+}
+
+static jl_ret_t _jl_port_phy_indirect_reg_get(jl_port_t port, jl_port_phy_reg_t reg, jl_port_phy_data_t *pregval)
+{
+ return jl51xx_phy_indirect_read(port, reg, pregval);
+}
+
+static jl_ret_t _jl_port_mac_force_link_set(jl_port_t port, jl_port_mac_ability_t *pability)
+{
+ if (pability->speed > 1 || pability->force_mode > 1 ||
+ pability->duplex > 1 || pability->link > 1 ||
+ pability->tx_pause > 1 ||
+ pability->rx_pause > 1)
+ return JL_ERR_PARAM;
+ return jl51xx_port_mac_force_link_set(port, pability);
+}
+
+static jl_ret_t _jl_port_mac_force_link_ext_set(jl_port_t port, jl_port_ext_mac_ability_t *pability)
+{
+ if (pability->speed > 1 || pability->force_mode > 1 ||
+ pability->duplex > 1 || pability->link > 1 ||
+ pability->tx_pause > 1 ||
+ pability->rx_pause > 1)
+ return JL_ERR_PARAM;
+ return jl51xx_port_mac_force_link_ext_set(port, pability);
+}
+
+static jl_ret_t _jl_port_mac_force_link_ext_get(jl_port_t port, jl_port_ext_mac_ability_t *pability)
+{
+ return jl51xx_port_mac_force_link_ext_get(port, pability);
+}
+static jl_ret_t _jl_port_mac_force_link_get(jl_port_t port, jl_port_mac_ability_t *pability)
+{
+ return jl51xx_port_mac_force_link_get(port, pability);
+}
+
+static jl_ret_t _jl_port_mac_loopback_get(jl_port_t port, jl_enable_t *pen_loopback)
+{
+ return jl51xx_port_mac_loopback_get(port, pen_loopback);
+}
+
+static jl_ret_t _jl_port_mac_loopback_set(jl_port_t port, jl_enable_t en_loopback)
+{
+ return jl51xx_port_mac_loopback_set(port, en_loopback);
+}
+
+jl_api_ret_t jl_port_phy_autoneg_ability_set(jl_port_t port, jl_port_phy_ability_t *pability)
+{
+ jl_api_ret_t ret;
+
+ /* Check System state */
+ JL_CHECK_STAT();
+
+ /* Check Port Valid */
+ JL_CHECK_UTP_PORT(port);
+
+ JL_CHECK_POINTER(pability);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_port_phy_autoneg_ability_set(port, pability);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_port_phy_autoneg_ability_set);
+
+jl_api_ret_t jl_port_phy_autoneg_ability_get(jl_port_t port, jl_port_phy_ability_t *pability)
+{
+ jl_api_ret_t ret;
+
+ /* Check System state */
+ JL_CHECK_STAT();
+
+ /* Check Port Valid */
+ JL_CHECK_UTP_PORT(port);
+
+ JL_CHECK_POINTER(pability);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_port_phy_autoneg_ability_get(port, pability);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_port_phy_autoneg_ability_get);
+
+jl_api_ret_t jl_port_phy_force_ability_set(jl_port_t port, jl_port_phy_ability_t *pability)
+{
+ jl_api_ret_t ret;
+
+ /* Check System state */
+ JL_CHECK_STAT();
+
+ /* Check Port Valid */
+ JL_CHECK_UTP_PORT(port);
+
+ JL_CHECK_POINTER(pability);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_port_phy_force_ability_set(port, pability);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_port_phy_force_ability_set);
+
+jl_api_ret_t jl_port_phy_force_ability_get(jl_port_t port, jl_port_phy_ability_t *pability)
+{
+ jl_api_ret_t ret;
+
+ /* Check System state */
+ JL_CHECK_STAT();
+
+ /* Check Port Valid */
+ JL_CHECK_UTP_PORT(port);
+
+ JL_CHECK_POINTER(pability);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_port_phy_force_ability_get(port, pability);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_port_phy_force_ability_get);
+
+jl_api_ret_t jl_port_phy_link_status_get(jl_port_t port, jl_port_link_status_t *pstatus, jl_port_duplex_t *pduplex, jl_port_speed_t *pspeed)
+{
+ jl_api_ret_t ret;
+
+ /* Check System state */
+ JL_CHECK_STAT();
+
+ /* Check Port Valid */
+ JL_CHECK_UTP_PORT(port);
+
+ if (NULL == pstatus || NULL == pduplex || NULL == pspeed)
+ return JL_ERR_PARAM;
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_port_phy_status_get(port, pstatus, pduplex, pspeed);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_port_phy_link_status_get);
+
+jl_api_ret_t jl_port_phy_reg_set(jl_port_t port, jl_port_phy_page_t page, jl_port_phy_reg_t reg, jl_port_phy_data_t regval)
+{
+ jl_api_ret_t ret;
+
+ /* Check System state */
+ JL_CHECK_STAT();
+
+ /* Check Port Valid */
+ JL_CHECK_UTP_PORT(port);
+
+ JL_API_MUTEX_LOCK();
+ ret = jl51xx_phy_direct_write_ext(port, page, reg, regval);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_port_phy_reg_set);
+
+jl_api_ret_t jl_port_phy_reg_get(jl_port_t port, jl_port_phy_page_t page, jl_port_phy_reg_t reg, jl_port_phy_data_t *pregval)
+{
+ jl_api_ret_t ret;
+
+ /* Check System state */
+ JL_CHECK_STAT();
+
+ /* Check Port Valid */
+ JL_CHECK_UTP_PORT(port);
+
+ JL_CHECK_POINTER(pregval);
+
+ JL_API_MUTEX_LOCK();
+ ret = jl51xx_phy_direct_read_ext(port, page, reg, pregval);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_port_phy_reg_get);
+
+jl_api_ret_t jl_port_phy_indirect_reg_set(jl_port_t port, jl_port_phy_reg_t reg, jl_port_phy_data_t regval)
+{
+ jl_api_ret_t ret;
+
+ /* Check System state */
+ JL_CHECK_STAT();
+
+ /* Check Port Valid */
+ JL_CHECK_UTP_PORT(port);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_port_phy_indirect_reg_set(port, reg, regval);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_port_phy_indirect_reg_set);
+
+jl_api_ret_t jl_port_phy_indirect_reg_get(jl_port_t port, jl_port_phy_reg_t reg, jl_port_phy_data_t *pregval)
+{
+ jl_api_ret_t ret;
+
+ /* Check System state */
+ JL_CHECK_STAT();
+
+ /* Check Port Valid */
+ JL_CHECK_UTP_PORT(port);
+
+ JL_CHECK_POINTER(pregval);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_port_phy_indirect_reg_get(port, reg, pregval);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_port_phy_indirect_reg_get);
+
+jl_api_ret_t jl_port_phy_isolate_set(jl_port_t port, jl_enable_t isolate)
+{
+ jl_api_ret_t ret;
+
+ /* Check System state */
+ JL_CHECK_STAT();
+
+ /* Check Port Valid */
+ JL_CHECK_UTP_PORT(port);
+
+ if (isolate >= JL_ENABLE_END)
+ return JL_ERR_PARAM;
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_port_phy_isolate_set(port, isolate);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_port_phy_isolate_set);
+
+jl_api_ret_t jl_port_phy_isolate_get(jl_port_t port, jl_enable_t *pisolate)
+{
+ jl_api_ret_t ret;
+
+ /* Check System state */
+ JL_CHECK_STAT();
+
+ /* Check Port Valid */
+ JL_CHECK_UTP_PORT(port);
+
+ JL_CHECK_POINTER(pisolate);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_port_phy_isolate_get(port, pisolate);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_port_phy_isolate_get);
+
+jl_api_ret_t jl_port_phy_enable_set(jl_port_t port, jl_enable_t enable)
+{
+ jl_api_ret_t ret;
+
+ /* Check System state */
+ JL_CHECK_STAT();
+
+ /* Check Port Valid */
+ JL_CHECK_UTP_PORT(port);
+
+ if (enable >= JL_ENABLE_END)
+ return JL_ERR_PARAM;
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_port_phy_enable_set(port, enable);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_port_phy_enable_set);
+
+jl_api_ret_t jl_port_phy_enable_get(jl_port_t port, jl_enable_t *penable)
+{
+ jl_api_ret_t ret;
+
+ /* Check System state */
+ JL_CHECK_STAT();
+
+ /* Check Port Valid */
+ JL_CHECK_UTP_PORT(port);
+
+ JL_CHECK_POINTER(penable);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_port_phy_enable_get(port, penable);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_port_phy_enable_get);
+
+jl_api_ret_t jl_port_phy_all_enable_set(jl_enable_t enable)
+{
+ jl_api_ret_t ret = JL_ERR_OK;
+ jl_port_t port;
+
+ /* Check System state */
+ JL_CHECK_STAT();
+
+ if (enable >= JL_ENABLE_END)
+ return JL_ERR_PARAM;
+
+ JL_API_MUTEX_LOCK();
+ JL_FOR_EACH_PHY_UTP_PORT(port) {
+ if ((ret = _jl_port_phy_enable_set(port, enable)) != JL_ERR_OK)
+ break;
+ }
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_port_phy_all_enable_set);
+
+jl_api_ret_t jl_port_mac_force_link_set(jl_port_t port, jl_port_mac_ability_t *pability)
+{
+ jl_api_ret_t ret;
+
+ /* Check System state */
+ JL_CHECK_STAT();
+
+ /* Check Port Valid */
+ JL_CHECK_UTP_PORT(port);
+
+ JL_CHECK_POINTER(pability);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_port_mac_force_link_set(port, pability);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_port_mac_force_link_set);
+
+jl_api_ret_t jl_port_mac_force_link_get(jl_port_t port, jl_port_mac_ability_t *pability)
+{
+ jl_api_ret_t ret;
+
+ /* Check System state */
+ JL_CHECK_STAT();
+
+ /* Check Port Valid */
+ JL_CHECK_UTP_PORT(port);
+
+ JL_CHECK_POINTER(pability);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_port_mac_force_link_get(port, pability);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_port_mac_force_link_get);
+
+jl_ret_t jl_port_mac_force_link_ext_set(jl_port_t port, jl_port_ext_mac_ability_t *pability)
+{
+ jl_api_ret_t ret;
+
+ /* Check System state */
+ JL_CHECK_STAT();
+
+ /* Check Ext Port */
+ JL_CHECK_EXT_PORT(port);
+
+ JL_CHECK_POINTER(pability);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_port_mac_force_link_ext_set(port, pability);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_port_mac_force_link_ext_set);
+
+jl_api_ret_t jl_port_mac_force_link_ext_get(jl_port_t port, jl_port_ext_mac_ability_t *pability)
+{
+ jl_api_ret_t ret;
+
+ /* Check System state */
+ JL_CHECK_STAT();
+
+ /* Check Ext Port */
+ JL_CHECK_EXT_PORT(port);
+
+ JL_CHECK_POINTER(pability);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_port_mac_force_link_ext_get(port, pability);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_port_mac_force_link_ext_get);
+
+jl_api_ret_t jl_port_mac_status_get(jl_port_t port, jl_port_mac_ability_t *pability)
+{
+ jl_api_ret_t ret;
+
+ /* Check System state */
+ JL_CHECK_STAT();
+
+ /* Check Port Valid */
+ JL_CHECK_PORT(port);
+
+ JL_CHECK_POINTER(pability);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_port_mac_status_get(port, pability);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_port_mac_status_get);
+
+jl_api_ret_t jl_port_mac_loopback_set(jl_port_t port, jl_enable_t enable)
+{
+ jl_api_ret_t ret;
+
+ /* Check System state */
+ JL_CHECK_STAT();
+
+ /* Check Port Valid */
+ JL_CHECK_UTP_PORT(port);
+
+ if (enable >= JL_ENABLE_END)
+ return JL_ERR_PARAM;
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_port_mac_loopback_set(port, enable);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_port_mac_loopback_set);
+
+jl_api_ret_t jl_port_mac_loopback_get(jl_port_t port, jl_enable_t *penable)
+{
+ jl_api_ret_t ret;
+
+ /* Check System state */
+ JL_CHECK_STAT();
+
+ /* Check Port Valid */
+ JL_CHECK_UTP_PORT(port);
+
+ JL_CHECK_POINTER(penable);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_port_mac_loopback_get(port, penable);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_port_mac_loopback_get);
+
+int get_jl_switch_port1_link_status(void)
+{
+ jl_port_speed_t speed;
+ jl_port_duplex_t duplex;
+ jl_port_link_status_t linkst;
+ jl_port_phy_link_status_get(UTP_PORT1, &linkst, &duplex, &speed);
+ return linkst == PORT_LINKUP;
+}
+
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/portable/demo_gpio.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/portable/demo_gpio.c
new file mode 100644
index 0000000..5602575
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/portable/demo_gpio.c
@@ -0,0 +1,90 @@
+#include <stdlib.h>
+#include <stdio.h>
+#include <string.h>
+#include <errno.h>
+
+#include "jl_types.h"
+#include "jl_error.h"
+
+/* A GPIO (over Raspberrypi 3B+) porting example. */
+
+#include <gpiod.h>
+
+struct gpiod_chip *g_gpio_chip;
+static jl_int32 g_gpio_ref;
+struct gpiod_line *line;
+
+
+jl_ret_t port_gpio_request(struct gpio_descriptor_s *gpio)
+{
+ if (!g_gpio_chip) {
+ g_gpio_chip = gpiod_chip_open("/dev/gpiochip0");
+ if (!g_gpio_chip) {
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_ERROR, "Raspberrypi gpio chip open fail\n");
+ return JL_ERR_FAIL;
+ }
+ }
+
+ gpio->hd = gpiod_chip_get_line(g_gpio_chip, gpio->pin);
+ if (!gpio->hd) {
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_ERROR, "Raspberrypi gpio line get fail\n");
+ return JL_ERR_FAIL;
+ }
+
+ g_gpio_ref++;
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t port_gpio_free(struct gpio_descriptor_s *gpio)
+{
+ (void) gpio;
+
+ g_gpio_ref--;
+ if (!g_gpio_ref && g_gpio_chip) {
+ gpiod_chip_close(g_gpio_chip);
+ g_gpio_chip = NULL;
+ }
+
+ return JL_ERR_OK;
+}
+
+/*dir: 0: input, 1: output*/
+void port_gpio_set_dir(struct gpio_descriptor_s *gpio, jl_int32 dir)
+{
+ jl_int32 ret = 0;
+
+ if (dir) {
+ gpiod_line_release(gpio->hd);
+ ret = gpiod_line_request_output(gpio->hd, gpio->name, 1);
+ if (ret)
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_ERROR, "GPIO set direction out fail, %s\n", strerror(errno));
+ } else {
+ gpiod_line_release(gpio->hd);
+ ret = gpiod_line_request_input_flags(gpio->hd, gpio->name, GPIOD_LINE_REQUEST_FLAG_BIAS_PULL_UP);
+ if (ret)
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_ERROR, "GPIO set direction input fail, %s\n", strerror(errno));
+ }
+}
+
+void port_gpio_set_value(struct gpio_descriptor_s *gpio, jl_int32 val)
+{
+ jl_ret_t ret;
+
+ ret = gpiod_line_set_value(gpio->hd, val);
+ if (ret == -1)
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_ERROR, "GPIO set value fail, %s\n", strerror(errno));
+}
+
+jl_int32 port_gpio_get_value(struct gpio_descriptor_s *gpio)
+{
+ jl_int32 ret;
+
+ ret = gpiod_line_get_value(gpio->hd);
+ if (ret == -1) {
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_ERROR, "GPIO get value fail, %s\n", strerror(errno));
+ return JL_ERR_FAIL;
+ }
+
+ return ret;
+}
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/portable/demo_mdio.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/portable/demo_mdio.c
new file mode 100644
index 0000000..f31cc01
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/portable/demo_mdio.c
@@ -0,0 +1,353 @@
+#include <stdlib.h>
+#include <stdint.h>
+#include <string.h>
+
+#include "jl_error.h"
+#include "jl_debug.h"
+
+#ifdef __USE_MINGW_ANSI_STDIO
+#include <windows.h>
+#include <winusb.h>
+#include <cfgmgr32.h>
+
+#define _unused_ __attribute__((unused))
+
+typedef struct {
+ HANDLE dev;
+ WINUSB_INTERFACE_HANDLE win_itf;
+} libusb_device_handle;
+
+#else
+#include <libusb.h>
+
+#endif
+
+#define CFG_SMI_CMD_BUFSIZE 16
+#define SMI_CLAUSE22 0x22
+#define SMI_SPEED_HIGH 0x00
+#define SMI_SPEED_LOW 0x01
+#define SMI_DATA_LEN 8
+
+#define USBD_VID 0x0483
+#define USBD_PID 0x00DE
+#define EP_OUT 0x03
+#define EP_IN 0x83
+
+static jl_uint8 CMD_SMI_CFG[] = {0x30, 0x00, 0x00, 0x22, 0x00};
+static jl_uint8 CMD_SMI_WRITE[] = {0x31, 0x00, 0x00};
+static jl_uint8 CMD_SMI_READ[] = {0x32, 0x00, 0x00};
+
+static libusb_device_handle *g_device;
+
+#ifdef __USE_MINGW_ANSI_STDIO
+static int libusb_get_first_device_path(GUID guid, PTCHAR path)
+{
+ ULONG list_size = 0;
+ int ret = JL_ERR_FAIL;
+ TCHAR *list = NULL;
+ CONFIGRET cr = CR_SUCCESS;
+
+ cr = CM_Get_Device_Interface_List_Size(&list_size, &guid, NULL,
+ CM_GET_DEVICE_INTERFACE_LIST_PRESENT);
+ if (cr != CR_SUCCESS) {
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_ERROR, "CM_Get_Device_Interface_List_Size fail\n");
+ goto end;
+ }
+
+ list = (TCHAR *)calloc(list_size, sizeof(TCHAR));
+ if (list == NULL) {
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_ERROR, "malloc fail\n");
+ goto end;
+ }
+
+ cr = CM_Get_Device_Interface_List(&guid, NULL, list, list_size,
+ CM_GET_DEVICE_INTERFACE_LIST_PRESENT);
+ if (cr != CR_SUCCESS || list[0] == 0) {
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_ERROR, "CM_Get_Device_Interface_List fail\n");
+ goto end;
+ }
+
+ memcpy(path, list, sizeof(TCHAR) * list_size);
+ ret = JL_ERR_OK;
+
+end:
+ if (list) {
+ free(list);
+ list = NULL;
+ }
+ return ret;
+}
+
+static int libusb_init(_unused_ void *ptr)
+{
+ return JL_ERR_OK;
+}
+
+static int libusb_exit(_unused_ void *ptr)
+{
+ return JL_ERR_OK;
+}
+
+static void libusb_close(libusb_device_handle *dev_handle)
+{
+ CloseHandle(dev_handle->dev);
+ WinUsb_Free(dev_handle->win_itf);
+ free(dev_handle);
+}
+
+static libusb_device_handle *libusb_open_device_with_vid_pid(
+ _unused_ void *ptr, _unused_ uint16_t vid, _unused_ uint16_t pid)
+{
+ libusb_device_handle *dev_handle = malloc(sizeof(libusb_device_handle));
+ TCHAR path[MAX_PATH];
+ GUID guid = {
+ .Data1 = 0x975F44D9,
+ .Data2 = 0x0D08,
+ .Data3 = 0x43FD,
+ .Data4 = {0x8B, 0x3E, 0x12, 0x7C, 0xA8, 0xAF, 0xFF, 0x9D}
+ };
+#if 0
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_INFO,
+ "GUID: %08lX-%04X-%04X-%02X%02X-%02X%02X%02X%02X%2X%02X\n",
+ guid.Data1, guid.Data2, guid.Data3,
+ guid.Data4[0], guid.Data4[1], guid.Data4[2], guid.Data4[3],
+ guid.Data4[4], guid.Data4[5], guid.Data4[6], guid.Data4[7]);
+#endif
+ if (libusb_get_first_device_path(guid, path)) {
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_ERROR, "Device not found\n");
+ return NULL;
+ }
+
+ if (!dev_handle) {
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_ERROR, "Failed to malloc device\n");
+ return NULL;
+ }
+
+ dev_handle->dev = CreateFile(path,
+ GENERIC_READ | GENERIC_WRITE,
+ FILE_SHARE_READ | FILE_SHARE_WRITE,
+ NULL,
+ OPEN_EXISTING,
+ FILE_FLAG_OVERLAPPED,
+ NULL);
+ if (dev_handle->dev == INVALID_HANDLE_VALUE) {
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_ERROR, "CreateFile fail\n");
+ free(dev_handle);
+ return NULL;
+ }
+
+ if (!WinUsb_Initialize(dev_handle->dev, &dev_handle->win_itf)) {
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_ERROR, "WinUsb_Initialize fail\n");
+ CloseHandle(dev_handle->dev);
+ free(dev_handle);
+ return NULL;
+ }
+
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_ON, "Device open success\n");
+
+ return dev_handle;
+}
+
+static int libusb_bulk_transfer(libusb_device_handle *dev_handle,
+ unsigned char endpoint, unsigned char *data, int length,
+ int *transferred, _unused_ unsigned int timeout)
+{
+ int ret = 0;
+
+ if (endpoint == EP_IN) {
+ ret = WinUsb_ReadPipe(dev_handle->win_itf,
+ endpoint, data, length, (PULONG)transferred, 0);
+ } else {
+ ret = WinUsb_WritePipe(dev_handle->win_itf,
+ endpoint, data, length, (PULONG)transferred, 0);
+ }
+ return !ret;
+}
+#endif
+
+static int __win_usb_open(void)
+{
+ libusb_device_handle *dev_handle;
+ int ret = 0;
+
+ ret = libusb_init(NULL);
+ if (ret < 0) {
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_ERROR, "WinUSB Init Error\n");
+ return JL_ERR_FAIL;
+ }
+
+ dev_handle = libusb_open_device_with_vid_pid(NULL, USBD_VID, USBD_PID);
+ if (dev_handle == NULL) {
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_ERROR, "WinUSB can't open device\n");
+ libusb_exit(NULL);
+ return JL_ERR_FAIL;
+ }
+
+ g_device = dev_handle;
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_INFO, "WinUSB Device opened, VID:0x%04x, PID:0x%04x\n", USBD_VID, USBD_PID);
+
+ return JL_ERR_OK;
+}
+
+static int __win_usb_close(void)
+{
+ libusb_close(g_device);
+ libusb_exit(NULL);
+ return JL_ERR_OK;
+}
+
+static int __win_usb_wait_resp(uint8_t *resp, int len)
+{
+ int transferred;
+
+ if (len > CFG_SMI_CMD_BUFSIZE) {
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_ERROR, "WinUSB response buffer size overflow\n");
+ return JL_ERR_OUT_OF_RANGE;
+ }
+ if (libusb_bulk_transfer(g_device, EP_IN, resp, len, &transferred, 1000)) {
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_ERROR, "WinUSB response error\n");
+ return JL_ERR_FAIL;
+ }
+
+ return JL_ERR_OK;
+}
+
+static int __win_usb_write(uint8_t *buf, int len)
+{
+ int transferred;
+
+ if (len > CFG_SMI_CMD_BUFSIZE) {
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_ERROR, "WinUSB write buffer size overflow\n");
+ return JL_ERR_OUT_OF_RANGE;
+ }
+ if (libusb_bulk_transfer(g_device, EP_OUT, buf, len, &transferred, 1000)) {
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_ERROR, "WinUSB write fail\n");
+ return JL_ERR_FAIL;
+ }
+
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_ON, "WinUSB write %d bytes data success\n", transferred);
+ return JL_ERR_OK;
+}
+
+static jl_ret_t __win_usb_config(void)
+{
+ jl_ret_t ret = 0;
+ uint8_t smi_cmd[sizeof(CMD_SMI_CFG)] = {0};
+ jl_uint8 smi_resp[CFG_SMI_CMD_BUFSIZE] = {0};
+
+ memcpy(smi_cmd, CMD_SMI_CFG, sizeof(CMD_SMI_CFG));
+ smi_cmd[3] = SMI_CLAUSE22;
+ smi_cmd[4] = SMI_SPEED_HIGH;
+
+ ret = __win_usb_write(smi_cmd, sizeof(smi_cmd));
+ if (ret) {
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_ERROR, "WinUSB SMI config fail\n");
+ return JL_ERR_FAIL;
+ }
+ ret = __win_usb_wait_resp(smi_resp, sizeof(smi_resp));
+ if (ret) {
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_ERROR, "WinUSB smi config wait response fail\n");
+ exit(EXIT_FAILURE);
+ } else if (smi_resp[1]) {
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_ERROR, "WinUSB smi config response error code:%d\n", smi_resp[1]);
+ exit(EXIT_FAILURE);
+ }
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_INFO, "WinUSB firmware version: %u.%u\n", smi_resp[3], smi_resp[4]);
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t port_mdio_init(void)
+{
+ if (__win_usb_open()) {
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_ERROR, "WinUSB SMI init fail\n");
+ return JL_ERR_FAIL;
+ }
+ if (__win_usb_config()) {
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_ERROR, "WinUSB SMI config fail\n");
+ return JL_ERR_FAIL;
+ }
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t port_mdio_deinit(void)
+{
+ return __win_usb_close();
+}
+
+void port_mdio_write(jl_uint8 phy, jl_uint8 reg, jl_uint16 val)
+{
+ jl_ret_t ret = 0;
+ jl_uint8 smi_frame[sizeof(CMD_SMI_WRITE) + SMI_DATA_LEN] = {0};
+ jl_uint8 *smi_cmd = &smi_frame[0];
+ jl_uint8 *smi_data = &smi_frame[sizeof(CMD_SMI_WRITE)];
+ jl_uint16 op_phy_reg = 0;
+
+ /* operation: 0x5 for smi write */
+ op_phy_reg = (0x5 << 12) | ((jl_uint16)(phy & 0x1f) << 7)
+ | ((jl_uint16)(reg & 0x1f) << 2) | 0x2;
+ smi_data[0] = 0xff;
+ smi_data[1] = 0xff;
+ smi_data[2] = 0xff;
+ smi_data[3] = 0xff;
+ smi_data[4] = op_phy_reg >> 8;
+ smi_data[5] = op_phy_reg & 0xff;
+ smi_data[6] = val >> 8;
+ smi_data[7] = val & 0xff;
+
+ memcpy(smi_cmd, CMD_SMI_WRITE, sizeof(CMD_SMI_WRITE));
+ /* smi data size */
+ smi_cmd[1] = 8;
+
+ ret = __win_usb_write(smi_frame, sizeof(smi_frame));
+ if (ret) {
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_ERROR, "WinUSB smi write fail\n");
+ exit(EXIT_FAILURE);
+ }
+}
+
+jl_uint16 port_mdio_read(jl_uint8 phy, jl_uint8 reg)
+{
+ jl_ret_t ret = 0;
+ jl_uint8 smi_frame[sizeof(CMD_SMI_READ) + SMI_DATA_LEN] = {0};
+ jl_uint8 smi_resp[CFG_SMI_CMD_BUFSIZE] = {0};
+ jl_uint8 *smi_cmd = &smi_frame[0];
+ jl_uint8 *smi_data = &smi_frame[sizeof(CMD_SMI_READ)];
+ jl_uint16 op_phy_reg = 0;
+
+ /* operation: 0x6 for smi read */
+ op_phy_reg = (0x6 << 12) | ((jl_uint16)(phy & 0x1f) << 7)
+ | ((jl_uint16)(reg & 0x1f) << 2) | 0x2;
+ smi_data[0] = 0xff;
+ smi_data[1] = 0xff;
+ smi_data[2] = 0xff;
+ smi_data[3] = 0xff;
+ smi_data[4] = op_phy_reg >> 8;
+ smi_data[5] = op_phy_reg & 0xff;
+ smi_data[6] = 0xff;
+ smi_data[7] = 0xff;
+
+ memcpy(smi_cmd, CMD_SMI_READ, sizeof(CMD_SMI_READ));
+ /* smi data size */
+ smi_cmd[1] = 8;
+
+ ret = __win_usb_write(smi_frame, sizeof(smi_frame));
+ if (ret) {
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_ERROR, "WinUSB smi read fail\n");
+ exit(EXIT_FAILURE);
+ }
+
+ ret = __win_usb_wait_resp(smi_resp, sizeof(smi_resp));
+ if (ret) {
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_ERROR, "WinUSB smi read wait response fail\n");
+ exit(EXIT_FAILURE);
+ } else if (smi_resp[1]) {
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_ERROR, "WinUSB smi read response error code:%d\n", smi_resp[1]);
+ exit(EXIT_FAILURE);
+ }
+
+ return ((jl_uint16)(smi_resp[sizeof(CMD_SMI_READ) + 6] << 8
+ | smi_resp[sizeof(CMD_SMI_READ) + 7]));
+}
+
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/portable/demo_osdep.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/portable/demo_osdep.c
new file mode 100644
index 0000000..25df20b
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/portable/demo_osdep.c
@@ -0,0 +1,82 @@
+#include <stdlib.h>
+#include <unistd.h>
+#include <pthread.h>
+#include <delay.h>
+
+#include "jl_types.h"
+
+#if defined CONFIG_JLFE_PHY_MUTEX || defined CONFIG_JLFE_APB_MUTEX || defined CONFIG_JLFE_API_MUTEX
+#if __MINGW32__ || __MINGW64__
+#pragma message("MINGW GCC does not have native pthread support, keep empty stubs to pass the build.")
+void *port_mutex_init(void)
+{
+ return NULL;
+}
+
+void port_mutex_deinit(void *arg)
+{
+ (void) arg;
+}
+
+void port_mutex_lock(void *arg)
+{
+ (void) arg;
+}
+
+void port_mutex_unlock(void *arg)
+{
+ (void) arg;
+}
+#else
+void *port_mutex_init(void)
+{
+ pthread_mutex_t *mutex;
+
+ mutex = malloc(sizeof(pthread_mutex_t));
+ if (!mutex)
+ return NULL;
+
+ pthread_mutex_init(mutex, NULL);
+
+ return mutex;
+}
+
+void port_mutex_deinit(void *arg)
+{
+ pthread_mutex_t *mutex = (pthread_mutex_t *)arg;
+
+ if (mutex) {
+ pthread_mutex_destroy(mutex);
+ free(mutex);
+ }
+}
+
+void port_mutex_lock(void *arg)
+{
+ pthread_mutex_t *mutex = (pthread_mutex_t *)arg;
+
+ if (mutex)
+ pthread_mutex_lock(mutex);
+}
+
+void port_mutex_unlock(void *arg)
+{
+ pthread_mutex_t *mutex = (pthread_mutex_t *)arg;
+
+ if (mutex)
+ pthread_mutex_unlock(mutex);
+}
+#endif
+#endif
+void port_ndelay(jl_uint32 ns)
+{
+ ndelay(ns);
+}
+
+void port_udelay(jl_uint32 us)
+{
+ if (us > 1000)
+ usleep(us);
+ else
+ udelay(ns);
+}
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/portable/demo_spi.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/portable/demo_spi.c
new file mode 100644
index 0000000..2c41db6
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/portable/demo_spi.c
@@ -0,0 +1,356 @@
+#include <stdlib.h>
+#include <stdio.h>
+#include <string.h>
+#include <errno.h>
+
+#include "jl_types.h"
+#include "jl_error.h"
+#include "jl_debug.h"
+
+/* A SPI (over FT232H) porting example. */
+
+#include <ftd2xx.h>
+
+#ifdef CONFIG_CROSS_COMPILER_MSVC
+#include <Windows.h>
+#else
+#include <unistd.h>
+#endif
+
+#ifdef CONFIG_CROSS_COMPILER_MSVC
+#define MSLEEP Sleep
+#else
+#define MSLEEP(t) usleep((t) * 1000)
+#endif
+
+
+/* SPI_MODE = 0, CPOL = 0, CPHA = 0 */
+/* SPI_MODE = 1, CPOL = 0, CPHA = 1 */
+/* SPI_MODE = 2, CPOL = 1, CPHA = 0 */
+/* SPI_MODE = 3 CPOL = 1, CPHA = 1 */
+#define SPI_MODE 1
+#define SPI_BITS 8
+#define SPI_SPEED 400000 /* 400KHz, 800KHz, 1600KHz */
+#define SPI_DELAY_USEC 0
+#define SPI_CS_CHANGE 0
+
+#define SPI_DEVICE "/dev/spidev0.0"
+
+static FT_HANDLE ftdih;
+
+static const char *ftd2xx_status_string(FT_STATUS status)
+{
+ switch (status) {
+ case FT_OK: return "OK";
+ case FT_INVALID_HANDLE: return "invalid handle";
+ case FT_DEVICE_NOT_FOUND: return "device not found";
+ case FT_DEVICE_NOT_OPENED: return "device not opened";
+ case FT_IO_ERROR: return "io error";
+ case FT_INSUFFICIENT_RESOURCES: return "insufficient resources";
+ case FT_INVALID_PARAMETER: return "invalid parameter";
+ case FT_INVALID_BAUD_RATE: return "invalid baud rate";
+
+ case FT_DEVICE_NOT_OPENED_FOR_ERASE: return "device not opened for erase";
+ case FT_DEVICE_NOT_OPENED_FOR_WRITE: return "device not opened for write";
+ case FT_FAILED_TO_WRITE_DEVICE: return "failed to write device";
+ case FT_EEPROM_READ_FAILED: return "eeprom read failed";
+ case FT_EEPROM_WRITE_FAILED: return "eeprom write failed";
+ case FT_EEPROM_ERASE_FAILED: return "eeprom erase failed";
+ case FT_EEPROM_NOT_PRESENT: return "eeprom not present";
+ case FT_EEPROM_NOT_PROGRAMMED: return "eeprom not programmed";
+ case FT_INVALID_ARGS: return "invalid args";
+ case FT_NOT_SUPPORTED: return "not supported";
+ case FT_OTHER_ERROR: return "other error";
+ }
+
+ return "undefined FTD2xx error";
+}
+
+static jl_ret_t jl_mdio_init_ftd2xx(void)
+{
+ FT_STATUS status;
+ DWORD dw_bytes_read;
+ DWORD nrecv;
+ jl_uint8 buf[32];
+
+ status = FT_Open(0, &ftdih);
+ if (status != FT_OK) {
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_ERROR, "unable to open ftdi device\n");
+ return JL_ERR_RESOURCE;
+ }
+
+ /* Reset USB device */
+ status = FT_ResetDevice(ftdih);
+ if (status != FT_OK) {
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_ERROR, "failed to reset ftdi device");
+ return JL_ERR_INIT;
+ }
+
+ /* Purge USB receive buffer first by reading out all old data from
+ * FT2232H receive buffer */
+
+ /* Get the number of bytes in the FT2232H */
+ dw_bytes_read = 0;
+ status = FT_GetQueueStatus(ftdih, &dw_bytes_read);
+ if (status != FT_OK) {
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_ERROR, "failed to FT_GetQueueStatus");
+ return JL_ERR_FAIL;
+ }
+
+ /* Read out the data from FT2232H receive buffer */
+ if ((status == FT_OK) && (dw_bytes_read > 0)) {
+ FT_Read(ftdih, &buf, dw_bytes_read, &nrecv);
+ if (status != FT_OK) {
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_ERROR, "unable to read, status: %s\n",
+ ftd2xx_status_string(status));
+ return JL_ERR_FAIL;
+ }
+ }
+
+ status = FT_SetTimeouts(ftdih, 100, 5000);
+ if (status != FT_OK) {
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_ERROR, "unable to set timeouts: %s\n",
+ ftd2xx_status_string(status));
+ return JL_ERR_FAIL;
+ }
+
+ status = FT_SetBitMode(ftdih, 0x0b, 2);
+ if (status != FT_OK) {
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_ERROR, "unable to enable bit i/o mode: %s\n",
+ ftd2xx_status_string(status));
+ return JL_ERR_FAIL;
+ }
+
+ MSLEEP(5);
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t jl_mdio_config(void)
+{
+ FT_STATUS status;
+ /* SCL Frequency = 40/((1+0x004F)*2) (MHz) = 250khz */
+ DWORD dw_clk_div_mdio = 0x7; /* TODO: should be a config option */
+ DWORD dw_bytes_send;
+ DWORD dw_bytes_sent;
+ jl_uint8 buf[32];
+
+ dw_bytes_send = 0;
+ /* Ensure disable clock divide by 5 for 60Mhz master clock */
+ buf[dw_bytes_send++] = (jl_uint8)0x8A;
+ /* Ensure turn off adaptive clocking */
+ buf[dw_bytes_send++] = (jl_uint8)0x97;
+ /* 0x8D/0x8C Disable/Enable 3 phase data clock, used by I2C to allow data on both clock edges */
+ buf[dw_bytes_send++] = (jl_uint8)0x8D;
+
+ /* Send off the commands */
+ status = FT_Write(ftdih, buf, dw_bytes_send, &dw_bytes_sent);
+ if (status != FT_OK) {
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_ERROR, "failed to FT_Write: %s\n",
+ ftd2xx_status_string(status));
+ return JL_ERR_FAIL;
+ }
+
+ /* Clear output buffer */
+ dw_bytes_send = 0;
+
+ MSLEEP(5);
+
+ /* Command to set directions of lower 8 pins and force value on bits set as output */
+ buf[dw_bytes_send++] = (jl_uint8)0x80;
+ /* Set SDA, SCL high, WP disabled by SK, DO at bit ¡®1¡¯, GPIOL0 at bit ¡®0¡¯ */
+ buf[dw_bytes_send++] = (jl_uint8)0xF3;
+ /* Set SK,DO,GPIOL0 pins as output with bit ¡¯1¡¯, other pins as input with bit ¡®0¡¯ */
+ buf[dw_bytes_send++] = (jl_uint8)0xF3;
+
+ /* The SK clock frequency can be worked out by below algorithm with divide by 5 set as off */
+ /* SK frequency = 60MHz /((1 + [(1 +0xValueH*256) OR 0xValueL])*2) */
+ /* Command to set clock divisor */
+ buf[dw_bytes_send++] = (jl_uint8)0x86;
+ /* Set 0xValueL of clock divisor */
+ buf[dw_bytes_send++] = (jl_uint8)(dw_clk_div_mdio & 0xFF);
+ /* Set 0xValueH of clock divisor */
+ buf[dw_bytes_send++] = (jl_uint8)((dw_clk_div_mdio >> 8) & 0xFF);
+ /* Send off the commands */
+ status = FT_Write(ftdih, buf, dw_bytes_send, &dw_bytes_sent);
+ if (status != FT_OK) {
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_ERROR, "failed to FT_Write: %s\n",
+ ftd2xx_status_string(status));
+ return JL_ERR_FAIL;
+ }
+
+ /* Delay for a while */
+ MSLEEP(5);
+
+ dw_bytes_send = 0;
+ /* Enable 3 phase clocking */
+ buf[dw_bytes_send++] = (jl_uint8)0x8C;
+ /* Send off the commands */
+ status = FT_Write(ftdih, buf, dw_bytes_send, &dw_bytes_sent);
+ if (status != FT_OK) {
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_ERROR, "failed to FT_Write: %s\n",
+ ftd2xx_status_string(status));
+ return JL_ERR_FAIL;
+ }
+ MSLEEP(5);
+
+ return JL_ERR_OK;
+}
+
+static jl_ret_t jl_mdio_purge_ftd2xx(void)
+{
+ FT_STATUS status;
+
+ status = FT_Purge(ftdih, FT_PURGE_RX | FT_PURGE_TX);
+ if (status != FT_OK) {
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_ERROR, "error purging ftd2xx device: %s\n",
+ ftd2xx_status_string(status));
+ return JL_ERR_FAIL;
+ }
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t port_spi_init(void)
+{
+ jl_ret_t ret;
+
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_INFO, "jl_mdio init\n");
+
+ ret = jl_mdio_init_ftd2xx();
+ if (ret != 0)
+ return ret;
+
+ ret = jl_mdio_config();
+ if (ret != 0)
+ return ret;
+
+ ret = jl_mdio_purge_ftd2xx();
+ if (ret != 0)
+ return ret;
+
+ MSLEEP(10);
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t port_spi_deinit(void)
+{
+ FT_STATUS status;
+
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_INFO, "jl_mdio close\n");
+
+ status = FT_Close(ftdih);
+ if (status != FT_OK) {
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_ERROR, "Failed to close ftd2xx device!");
+ return JL_ERR_FAIL;
+ }
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t port_spi_write(jl_uint8 *tx_buf, jl_uint8 *rx_buf, jl_uint32 size)
+{
+ (void) rx_buf;
+ FT_STATUS status;
+ DWORD i;
+ jl_uint8 buf[32];
+ DWORD len;
+ DWORD nsent;
+ DWORD nsend;
+
+ nsend = 17 - 8;
+ len = nsend+3+1;
+ for (i = 0; i < len; i++) {
+ buf[i] = (jl_uint8)0xff;
+ }
+
+ /* clock data byte in, MSB first */
+ buf[0] = (jl_uint8)0x10;
+ /* length low */
+ buf[1] = 17 - 8 - 1;
+ /* length high */
+ buf[2] = (jl_uint8)0x00;
+
+ memcpy(&buf[3], tx_buf, size);
+ /* buf[ 4+3] = ((jl_uint8)0x0f & (phy >> 1)) | 0x50; */
+ /* buf[ 5+3] = (phy << 7) | (addr << 2) | 0x02; */
+ /* buf[ 6+3] = (jl_uint8)(data >> 8); */
+ /* buf[ 7+3] = (jl_uint8)data; */
+
+ buf[8+3] = (jl_uint8)0x7f;
+
+ buf[12] = (jl_uint8)0x87;
+
+ status = FT_Write(ftdih, buf, len, &nsent);
+ if (status != FT_OK) {
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_ERROR, "unable to FT_Write: %s\n",
+ ftd2xx_status_string(status));
+ return JL_ERR_FAIL;
+ }
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t port_spi_read(jl_uint8 *tx_buf, jl_uint8 *rx_buf, jl_uint32 size)
+{
+ DWORD dw_bytes_read;
+ DWORD tot_bytes_read;
+ FT_STATUS status;
+ jl_uint8 buf[32];
+ DWORD i;
+ DWORD len;
+ DWORD nsend;
+ DWORD nsent;
+ jl_int32 timeout;
+
+ nsend = 17 - 8;
+ len = nsend+3+1;
+ for (i = 0; i < len; i++) {
+ buf[i] = (jl_uint8)0xff;
+ }
+
+
+ buf[0] = (jl_uint8)0x34; //clock data byte in, MSB first
+ buf[1] = 17 - 8 - 1; //Length L
+ buf[2] = (jl_uint8)0x00; //Length H
+
+ memcpy(&buf[3], tx_buf, size);
+ /* buf[ 4+3] = ((jl_uint8)0x0f & (phy >> 1)) | 0X060; */
+ /* buf[ 5+3] = (phy << 7) | (addr << 2) | 0x02; */
+
+ buf[8+3] = (jl_uint8)0x7f;
+ /* Send answer back immediate command */
+ buf[12] = (jl_uint8)0x87;
+
+ status = FT_Write(ftdih, buf, len, &nsent);
+ if (status != FT_OK) {
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_ERROR, "unable to FT_Write: %s\n",
+ ftd2xx_status_string(status));
+ return JL_ERR_FAIL;
+ }
+
+
+ tot_bytes_read = 0;
+ timeout = 5;
+ while (tot_bytes_read < nsend && timeout--) {
+ status = FT_Read(ftdih, &buf[tot_bytes_read], nsend - tot_bytes_read, &dw_bytes_read);
+ if (status != FT_OK) {
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_ERROR, "FT_Read returned: %s\n", ftd2xx_status_string(status));
+ return JL_ERR_FAIL;
+ }
+ tot_bytes_read += dw_bytes_read;
+ }
+
+ if (tot_bytes_read < nsend) {
+ JL_DBG_MSG(JL_FLAG_SMI, _DBG_ERROR, "couldn't read enough bytes from "
+ "ftd2xx addrice (%i < %i)",
+ (unsigned)tot_bytes_read,
+ (unsigned)nsend);
+ return JL_ERR_FAIL;
+ }
+
+ memcpy(rx_buf, buf, size);
+
+ return JL_ERR_OK;
+}
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/portable/jl_portable_gpio.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/portable/jl_portable_gpio.c
new file mode 100644
index 0000000..0a12b6a
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/portable/jl_portable_gpio.c
@@ -0,0 +1,38 @@
+#include "jl_types.h"
+#include "jl_error.h"
+
+#include "portable/jl_portable.h"
+
+jl_ret_t port_gpio_request(struct gpio_descriptor_s *gpio)
+{
+ (void) gpio;
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t port_gpio_free(struct gpio_descriptor_s *gpio)
+{
+ (void) gpio;
+
+ return JL_ERR_OK;
+}
+
+/*dir: 0: input, 1: output*/
+void port_gpio_set_dir(struct gpio_descriptor_s *gpio, jl_int32 dir)
+{
+ (void) gpio;
+ (void) dir;
+}
+
+void port_gpio_set_value(struct gpio_descriptor_s *gpio, jl_int32 val)
+{
+ (void) gpio;
+ (void) val;
+}
+
+jl_int32 port_gpio_get_value(struct gpio_descriptor_s *gpio)
+{
+ (void) gpio;
+
+ return JL_ERR_OK;
+}
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/portable/jl_portable_mdio.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/portable/jl_portable_mdio.c
new file mode 100755
index 0000000..0260436
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/portable/jl_portable_mdio.c
@@ -0,0 +1,90 @@
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/phy.h>
+
+/*struct mii_bus;
+extern struct mii_bus *mdiobus_alloc_size(size_t);
+extern int mdiobus_read(struct mii_bus *bus, int addr, u32 regnum);
+extern int mdiobus_write(struct mii_bus *bus, int addr, u32 regnum, u16 val);
+*/
+#include "jl_types.h"
+#include "jl_error.h"
+
+//static struct platform_device *pdev;
+struct mii_bus * g_mdio_bus = NULL;
+extern struct mii_bus * get_gmac_mii_bus(void);
+jl_ret_t port_mdio_init(void)
+{
+ //int ret;
+ printk("cy: port mdio init\n");
+ /*
+ pdev = platform_device_register_simple("Jl Switch MDIO bus", 0, NULL, 0);
+ if (IS_ERR(pdev)) {
+ ret = PTR_ERR(pdev);
+ goto err_pdev;
+ }
+
+ g_mdio_bus = mdiobus_alloc();
+ if (g_mdio_bus == NULL) {
+ ret = -ENOMEM;
+ goto err_mdiobus_reg;
+ }
+
+ snprintf(g_mdio_bus->id, MII_BUS_ID_SIZE, "jl-0");
+ g_mdio_bus->name = "Jl MDIO Bus";
+ //g_mdio_bus->priv = fmb;
+ g_mdio_bus->parent = &pdev->dev;
+ //g_mdio_bus->read = &fixed_mdio_read;
+ //g_mdio_bus->write = &fixed_mdio_write;
+ //g_mdio_bus->irq = fmb->irqs;
+
+ ret = mdiobus_register(g_mdio_bus);
+ if (ret)
+ goto err_mdiobus_alloc;
+
+ return JL_ERR_OK;
+
+ err_mdiobus_alloc:
+ mdiobus_free(g_mdio_bus);
+ err_mdiobus_reg:
+ platform_device_unregister(pdev);
+ err_pdev:
+ return ret;
+ */
+ g_mdio_bus = get_gmac_mii_bus();
+ if (g_mdio_bus != NULL)
+ return JL_ERR_OK;
+ else
+ return -1;
+}
+
+jl_ret_t port_mdio_deinit(void)
+{
+ return JL_ERR_OK;
+}
+
+void port_mdio_write(jl_uint8 phy, jl_uint8 reg, jl_uint16 val)
+{
+ int ret;
+ //printk("cy: write phy %d, reg %d, val %d\n",phy, reg, val);
+ if (g_mdio_bus == NULL)
+ {
+ printk("cy: no mdio bus\n");
+ return;
+ }
+ //printk("cy: %s %d\n", __func__, __LINE__);
+ ret = mdiobus_write(g_mdio_bus, phy, reg, val);
+ //printk("cy: %s %d\n", __func__, __LINE__);
+ if (ret != 0)
+ printk("cy: write phy %d, reg %d, val %d fail\n", phy, reg, val);
+}
+
+jl_uint16 port_mdio_read(jl_uint8 phy, jl_uint8 reg)
+{
+ //printk("cy: read phy %d, reg %d\n",phy, reg);
+ if (g_mdio_bus == NULL)
+ return -1;
+
+ return mdiobus_read(g_mdio_bus, phy, reg);
+}
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/portable/jl_portable_osdep.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/portable/jl_portable_osdep.c
new file mode 100644
index 0000000..b19790f
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/portable/jl_portable_osdep.c
@@ -0,0 +1,32 @@
+#include "jl_types.h"
+
+void *port_mutex_init(void)
+{
+ return NULL;
+ /* return mutex; */
+}
+
+void port_mutex_deinit(void *arg)
+{
+ (void) arg;
+}
+
+void port_mutex_lock(void *arg)
+{
+ (void) arg;
+}
+
+void port_mutex_unlock(void *arg)
+{
+ (void) arg;
+}
+
+void port_ndelay(jl_uint32 ns)
+{
+ (void) ns;
+}
+
+void port_udelay(jl_uint32 us)
+{
+ (void) us;
+}
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/portable/jl_portable_spi.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/portable/jl_portable_spi.c
new file mode 100644
index 0000000..5732561
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/portable/jl_portable_spi.c
@@ -0,0 +1,31 @@
+#include "jl_types.h"
+#include "jl_error.h"
+#include "jl_debug.h"
+
+jl_ret_t port_spi_init(void)
+{
+ return JL_ERR_OK;
+}
+
+jl_ret_t port_spi_deinit(void)
+{
+ return JL_ERR_OK;
+}
+
+jl_ret_t port_spi_write(jl_uint8 *tx_buf, jl_uint8 *rx_buf, jl_uint32 size)
+{
+ (void) tx_buf;
+ (void) rx_buf;
+ (void) size;
+
+ return JL_ERR_OK;
+}
+
+jl_ret_t port_spi_read(jl_uint8 *tx_buf, jl_uint8 *rx_buf, jl_uint32 size)
+{
+ (void) tx_buf;
+ (void) rx_buf;
+ (void) size;
+
+ return JL_ERR_OK;
+}
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/qos.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/qos.c
new file mode 100644
index 0000000..e162602
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/qos.c
@@ -0,0 +1,584 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+
+#include "jl_base.h"
+#include "jl51xx/jl51xx_drv_qos.h"
+#include "qos.h"
+
+jl_ret_t _jl_qos_l3_set(struct qos_l3_config *config)
+{
+ return jl51xx_qos_l3_set(config);
+}
+
+jl_ret_t _jl_qos_l3_get(struct qos_l3_config *config)
+{
+ return jl51xx_qos_l3_get(config);
+}
+
+jl_api_ret_t _jl_qos_l3_port_enable_set(jl_port_t port, jl_uint8 enable)
+{
+ return jl51xx_qos_l3_port_enable_set(port, enable);
+}
+
+jl_api_ret_t _jl_qos_l3_port_enable_get(jl_port_t port, jl_uint8 *enable)
+{
+ return jl51xx_qos_l3_port_enable_get(port, enable);
+}
+
+jl_api_ret_t _jl_qos_port_set(jl_port_t port, struct qos_port_config *config)
+{
+ return jl51xx_qos_port_set(port, config);
+}
+
+jl_api_ret_t _jl_qos_port_get(jl_port_t port, struct qos_port_config *config)
+{
+ return jl51xx_qos_port_get(port, config);
+}
+
+jl_api_ret_t _jl_qos_vlan_set(struct qos_vlan_config *config)
+{
+ return jl51xx_qos_vlan_set(config);
+}
+
+jl_api_ret_t _jl_qos_vlan_get(struct qos_vlan_config *config)
+{
+ return jl51xx_qos_vlan_get(config);
+}
+
+jl_api_ret_t jl_qos_l3_set(struct qos_l3_config *config)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+ JL_CHECK_POINTER(config);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_qos_l3_set(config);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_qos_l3_set);
+
+jl_api_ret_t jl_qos_l3_get(struct qos_l3_config *config)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+ JL_CHECK_POINTER(config);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_qos_l3_get(config);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_qos_l3_get);
+
+jl_api_ret_t jl_qos_l3_port_enable_set(jl_port_t port, jl_uint8 enable)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+ JL_CHECK_PORT(port);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_qos_l3_port_enable_set(port, enable);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_qos_l3_port_enable_set);
+
+jl_api_ret_t jl_qos_l3_port_enable_get(jl_port_t port, jl_uint8 *enable)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+ JL_CHECK_PORT(port);
+ JL_CHECK_POINTER(enable);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_qos_l3_port_enable_get(port, enable);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_qos_l3_port_enable_get);
+
+jl_api_ret_t jl_qos_port_set(jl_port_t port, struct qos_port_config *config)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+ JL_CHECK_PORT(port);
+ JL_CHECK_POINTER(config);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_qos_port_set(port, config);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_qos_port_set);
+
+jl_api_ret_t jl_qos_port_get(jl_port_t port, struct qos_port_config *config)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+ JL_CHECK_PORT(port);
+ JL_CHECK_POINTER(config);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_qos_port_get(port, config);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_qos_port_get);
+
+jl_api_ret_t jl_qos_vlan_set(struct qos_vlan_config *config)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+ JL_CHECK_POINTER(config);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_qos_vlan_set(config);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_qos_vlan_set);
+
+jl_api_ret_t jl_qos_vlan_get(struct qos_vlan_config *config)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+ JL_CHECK_POINTER(config);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_qos_vlan_get(config);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_qos_vlan_get);
+
+/*new qos api*/
+jl_api_ret_t _jl_qos_init(void)
+{
+ return jl51xx_qos_init();
+}
+
+jl_api_ret_t _jl_qos_deinit(void)
+{
+ return jl51xx_qos_deinit();
+}
+
+jl_api_ret_t _jl_qos_l3_queue_assign_enable_set(jl_port_t port, jl_enable_t enable)
+{
+ return jl51xx_qos_l3_queue_assign_enable_set(port, enable);
+}
+
+jl_api_ret_t _jl_qos_l3_queue_assign_enable_get(jl_port_t port, jl_enable_t *penable)
+{
+ return jl51xx_qos_l3_queue_assign_enable_get(port, penable);
+}
+
+jl_api_ret_t _jl_qos_l3_dscp2queue_map_set(jl_uint32 dscp, jl_uint32 queue)
+{
+ return jl51xx_qos_l3_dscp2queue_map_set(dscp, queue);
+}
+
+jl_api_ret_t _jl_qos_l3_dscp2queue_map_get(jl_uint32 dscp, jl_uint32 *pqueue)
+{
+ return jl51xx_qos_l3_dscp2queue_map_get(dscp, pqueue);
+}
+
+jl_api_ret_t _jl_qos_l3_exp2queue_map_set(jl_uint32 exp, jl_uint32 queue)
+{
+ return jl51xx_qos_l3_exp2queue_map_set(exp, queue);
+}
+
+jl_api_ret_t _jl_qos_l3_exp2queue_map_get(jl_uint32 exp, jl_uint32 *pqueue)
+{
+ return jl51xx_qos_l3_exp2queue_map_get(exp, pqueue);
+}
+
+jl_api_ret_t _jl_qos_l2_pcp2queue_map_set(jl_uint32 vlan_pcp, jl_uint32 queue)
+{
+ return jl51xx_qos_l2_pcp2queue_map_set(vlan_pcp, queue);
+}
+
+jl_api_ret_t _jl_qos_l2_pcp2queue_map_get(jl_uint32 vlan_pcp, jl_uint32 *pqueue)
+{
+ return jl51xx_qos_l2_pcp2queue_map_get(vlan_pcp, pqueue);
+}
+
+jl_api_ret_t _jl_qos_l2_port_pcp_set(jl_port_t port, jl_uint32 pcp)
+{
+ return jl51xx_qos_l2_port_pcp_set(port, pcp);
+}
+
+jl_api_ret_t _jl_qos_l2_port_pcp_get(jl_port_t port, jl_uint32 *ppcp)
+{
+ return jl51xx_qos_l2_port_pcp_get(port, ppcp);
+}
+
+jl_api_ret_t _jl_qos_queue_pri_set(jl_port_t port, jl_uint32 queue, jl_uint32 priority)
+{
+ return jl51xx_qos_queue_pri_set(port, queue, priority);
+}
+
+jl_api_ret_t _jl_qos_queue_pri_get(jl_port_t port, jl_uint32 queue, jl_uint32 *ppriority)
+{
+ return jl51xx_qos_queue_pri_get(port, queue, ppriority);
+}
+
+jl_api_ret_t _jl_qos_queue_dwrr_set(jl_port_t port, jl_uint32 queue, jl_uint32 weight)
+{
+ return jl51xx_qos_queue_dwrr_set(port, queue, weight);
+}
+
+jl_api_ret_t _jl_qos_queue_dwrr_get(jl_port_t port, jl_uint32 queue, jl_uint32 *pweight)
+{
+ return jl51xx_qos_queue_dwrr_get(port, queue, pweight);
+}
+
+jl_api_ret_t _jl_qos_schedule_set(jl_uint8 port, jl_qos_schedule_t *psche)
+{
+ return jl51xx_qos_schedule_set(port, psche);
+}
+
+jl_api_ret_t _jl_qos_schedule_get(jl_uint8 port, jl_qos_schedule_t *psche)
+{
+ return jl51xx_qos_schedule_get(port, psche);
+}
+
+jl_api_ret_t _jl_qos_enqueue_set(jl_uint8 port, jl_uint8 enmask)
+{
+ return jl51xx_qos_enqueue_set(port, enmask);
+}
+
+jl_api_ret_t _jl_qos_enqueue_get(jl_uint8 port, jl_uint8 *penmask)
+{
+ return jl51xx_qos_enqueue_get(port, penmask);
+}
+
+jl_api_ret_t jl_qos_init(void)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_qos_init();
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_qos_init);
+
+jl_api_ret_t jl_qos_deinit(void)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_qos_deinit();
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_qos_deinit);
+
+jl_api_ret_t jl_qos_l3_queue_assign_enable_set(jl_port_t port, jl_enable_t enable)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+ JL_CHECK_PORT(port);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_qos_l3_queue_assign_enable_set(port, enable);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_qos_l3_queue_assign_enable_set);
+
+
+jl_api_ret_t jl_qos_l3_queue_assign_enable_get(jl_port_t port, jl_enable_t *penable)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+ JL_CHECK_PORT(port);
+ JL_CHECK_POINTER(penable);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_qos_l3_queue_assign_enable_get(port, penable);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_qos_l3_queue_assign_enable_get);
+
+jl_api_ret_t jl_qos_l3_dscp2queue_map_set(jl_uint32 dscp, jl_uint32 queue)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_qos_l3_dscp2queue_map_set(dscp, queue);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_qos_l3_dscp2queue_map_set);
+
+jl_api_ret_t jl_qos_l3_dscp2queue_map_get(jl_uint32 dscp, jl_uint32 *pqueue)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+ JL_CHECK_POINTER(pqueue);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_qos_l3_dscp2queue_map_get(dscp, pqueue);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_qos_l3_dscp2queue_map_get);
+
+jl_api_ret_t jl_qos_l3_exp2queue_map_set(jl_uint32 exp, jl_uint32 queue)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_qos_l3_exp2queue_map_set(exp, queue);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_qos_l3_exp2queue_map_set);
+
+jl_api_ret_t jl_qos_l3_exp2queue_map_get(jl_uint32 exp, jl_uint32 *pqueue)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+ JL_CHECK_POINTER(pqueue);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_qos_l3_exp2queue_map_get(exp, pqueue);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_qos_l3_exp2queue_map_get);
+
+jl_api_ret_t jl_qos_l2_pcp2queue_map_set(jl_uint32 vlan_pcp, jl_uint32 queue)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_qos_l2_pcp2queue_map_set(vlan_pcp, queue);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_qos_l2_pcp2queue_map_set);
+
+jl_api_ret_t jl_qos_l2_pcp2queue_map_get(jl_uint32 vlan_pcp, jl_uint32 *pqueue)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+ JL_CHECK_POINTER(pqueue);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_qos_l2_pcp2queue_map_get(vlan_pcp, pqueue);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_qos_l2_pcp2queue_map_get);
+
+jl_api_ret_t jl_qos_l2_port_pcp_set(jl_port_t port, jl_uint32 pcp)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+ JL_CHECK_PORT(port);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_qos_l2_port_pcp_set(port, pcp);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_qos_l2_port_pcp_set);
+
+jl_api_ret_t jl_qos_l2_port_pcp_get(jl_port_t port, jl_uint32 *ppcp)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+ JL_CHECK_PORT(port);
+ JL_CHECK_POINTER(ppcp);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_qos_l2_port_pcp_get(port, ppcp);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_qos_l2_port_pcp_get);
+
+jl_api_ret_t jl_qos_queue_pri_set(jl_port_t port, jl_uint32 queue, jl_uint32 priority)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+ JL_CHECK_PORT(port);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_qos_queue_pri_set(port, queue, priority);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_qos_queue_pri_set);
+
+jl_api_ret_t jl_qos_queue_pri_get(jl_port_t port, jl_uint32 queue, jl_uint32 *ppriority)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+ JL_CHECK_PORT(port);
+ JL_CHECK_POINTER(ppriority);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_qos_queue_pri_get(port, queue, ppriority);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_qos_queue_pri_get);
+
+jl_api_ret_t jl_qos_queue_dwrr_set(jl_port_t port, jl_uint32 queue, jl_uint32 weight)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+ JL_CHECK_PORT(port);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_qos_queue_dwrr_set(port, queue, weight);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_qos_queue_dwrr_set);
+
+jl_api_ret_t jl_qos_queue_dwrr_get(jl_port_t port, jl_uint32 queue, jl_uint32 *pweight)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+ JL_CHECK_PORT(port);
+ JL_CHECK_POINTER(pweight);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_qos_queue_dwrr_get(port, queue, pweight);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_qos_queue_dwrr_get);
+
+jl_api_ret_t jl_qos_schedule_set(jl_uint8 port, jl_qos_schedule_t *psche)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+ JL_CHECK_PORT(port);
+ JL_CHECK_POINTER(psche);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_qos_schedule_set(port, psche);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_qos_schedule_set);
+
+jl_api_ret_t jl_qos_schedule_get(jl_uint8 port, jl_qos_schedule_t *psche)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+ JL_CHECK_PORT(port);
+ JL_CHECK_POINTER(psche);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_qos_schedule_get(port, psche);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_qos_schedule_get);
+
+jl_api_ret_t jl_qos_enqueue_set(jl_uint8 port, jl_uint8 enmask)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+ JL_CHECK_PORT(port);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_qos_enqueue_set(port, enmask);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_qos_enqueue_set);
+
+jl_api_ret_t jl_qos_enqueue_get(jl_uint8 port, jl_uint8 *penmask)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+ JL_CHECK_PORT(port);
+ JL_CHECK_POINTER(penmask);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_qos_enqueue_get(port, penmask);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_qos_enqueue_get);
\ No newline at end of file
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/sram_load.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/sram_load.c
new file mode 100644
index 0000000..e16c52f
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/sram_load.c
@@ -0,0 +1,36 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+
+#include "jl51xx/jl51xx_drv_sram_load.h"
+#include "sram_load.h"
+
+
+static jl_ret_t _jl_sram_load(void)
+{
+ return jl51xx_drv_sram_load();
+}
+
+jl_api_ret_t jl_sram_load(void)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_sram_load();
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_sram_load);
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/storm.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/storm.c
new file mode 100644
index 0000000..ba8fa26
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/storm.c
@@ -0,0 +1,164 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+
+#include "jl_base.h"
+#include "jl_switch.h"
+#include "storm.h"
+#include "jl51xx/jl51xx_drv_storm.h"
+
+static jl_ret_t _jl_storm_control_drop_counter_get(jl_port_t egress_port, jl_uint32 *pcntr)
+{
+ return jl51xx_storm_control_drop_counter_get(egress_port, pcntr);
+}
+
+static jl_ret_t _jl_storm_control_rate_set(jl_port_t egress_port, jl_storm_type_t type, jl_rate_unit_t unit, jl_rate_t rate)
+{
+ return jl51xx_storm_control_rate_set(egress_port,
+ type,
+ unit,
+ rate);
+}
+
+static jl_ret_t _jl_storm_control_rate_get(jl_port_t egress_port, jl_storm_type_t type, jl_rate_unit_t *punit, jl_rate_t *prate)
+{
+ return jl51xx_storm_control_rate_get(egress_port,
+ type,
+ punit,
+ prate);
+}
+
+static jl_ret_t _jl_storm_control_enable_set(jl_port_t egress_port, jl_storm_type_t type, jl_enable_t enable)
+{
+ return jl51xx_storm_control_enable_set(egress_port, type, enable);
+}
+
+static jl_ret_t _jl_storm_control_enable_get(jl_port_t egress_port, jl_storm_type_t type, jl_enable_t *penable)
+{
+ return jl51xx_storm_control_enable_get(egress_port, type, penable);
+}
+
+jl_api_ret_t jl_storm_control_enable_set(jl_port_t egress_port, jl_storm_type_t type, jl_enable_t enable)
+{
+ jl_api_ret_t ret;
+
+ /* Check System state */
+ JL_CHECK_STAT();
+
+ JL_CHECK_PORT(egress_port);
+
+ if (type >= STORM_TYPE_END || enable >= JL_ENABLE_END)
+ return JL_ERR_PARAM;
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_storm_control_enable_set(egress_port, type, enable);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_storm_control_enable_set);
+
+jl_api_ret_t jl_storm_control_enable_get(jl_port_t egress_port, jl_storm_type_t type, jl_enable_t *penable)
+{
+ jl_api_ret_t ret;
+
+ /* Check System state */
+ JL_CHECK_STAT();
+
+ JL_CHECK_PORT(egress_port);
+
+ JL_CHECK_POINTER(penable);
+
+ if (type >= STORM_TYPE_END)
+ return JL_ERR_PARAM;
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_storm_control_enable_get(egress_port, type, penable);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_storm_control_enable_get);
+
+jl_api_ret_t jl_storm_control_rate_set(jl_port_t egress_port, jl_storm_type_t type, jl_rate_unit_t unit, jl_rate_t rate)
+{
+ jl_api_ret_t ret;
+
+ /* Check System state */
+ JL_CHECK_STAT();
+
+ JL_CHECK_PORT(egress_port);
+
+ if (type >= STORM_TYPE_END || unit >= RATE_UNIT_END)
+ return JL_ERR_PARAM;
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_storm_control_rate_set(
+ egress_port,
+ type,
+ unit,
+ rate);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_storm_control_rate_set);
+
+jl_api_ret_t jl_storm_control_rate_get(jl_port_t egress_port, jl_storm_type_t type, jl_rate_unit_t *punit, jl_rate_t *prate)
+{
+ jl_api_ret_t ret;
+
+ /* Check System state */
+ JL_CHECK_STAT();
+
+ JL_CHECK_PORT(egress_port);
+
+ if (type >= STORM_TYPE_END)
+ return JL_ERR_PARAM;
+
+ JL_CHECK_POINTER(punit);
+
+ JL_CHECK_POINTER(prate);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_storm_control_rate_get(
+ egress_port,
+ type,
+ punit,
+ prate);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_storm_control_rate_get);
+
+jl_api_ret_t jl_storm_control_drop_counter_get(jl_port_t egress_port, jl_uint32 *pcntr)
+{
+ jl_api_ret_t ret;
+
+ /* Check System state */
+ JL_CHECK_STAT();
+
+ JL_CHECK_PORT(egress_port);
+
+ JL_CHECK_POINTER(pcntr);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_storm_control_drop_counter_get(
+ egress_port,
+ pcntr);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_storm_control_drop_counter_get);
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/stp.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/stp.c
new file mode 100644
index 0000000..3a23ff4
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/stp.c
@@ -0,0 +1,169 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+
+#include "jl_switch.h"
+
+#include "jl51xx/jl51xx_drv_stp.h"
+#include "stp.h"
+
+jl_ret_t _jl_stp_port_ingress_state_set(jl_port_t port, jl_stp_state_t stp_state)
+{
+ return jl51xx_stp_port_ingress_state_set(port, stp_state);
+}
+
+jl_ret_t _jl_stp_port_ingress_state_get(jl_port_t port, jl_stp_state_t *pstp_state)
+{
+ return jl51xx_stp_port_ingress_state_get(port, pstp_state);
+}
+
+jl_ret_t _jl_stp_port_egress_state_set(jl_port_t port, jl_stp_state_t stp_state)
+{
+ return jl51xx_stp_port_egress_state_set(port, stp_state);
+}
+
+jl_ret_t _jl_stp_port_egress_state_get(jl_port_t port, jl_stp_state_t *pstp_state)
+{
+ return jl51xx_stp_port_egress_state_get(port, pstp_state);
+}
+
+jl_ret_t _jl_stp_ingress_drop_counter_get(jl_stp_state_t stp_state, jl_uint32 *pcntr)
+{
+ return jl51xx_stp_ingress_drop_counter_get(stp_state, pcntr);
+}
+
+jl_ret_t _jl_stp_port_egress_drop_counter_get(jl_port_t port, jl_uint32 *pcntr)
+{
+ return jl51xx_stp_port_egress_drop_counter_get(port, pcntr);
+}
+
+jl_api_ret_t jl_stp_port_egress_state_set(jl_port_t port, jl_stp_state_t stp_state)
+{
+ jl_api_ret_t ret;
+
+ /* Check System state */
+ JL_CHECK_STAT();
+
+ JL_CHECK_PORT(port);
+
+ if (stp_state >= STP_STATE_END)
+ return JL_ERR_PARAM;
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_stp_port_egress_state_set(port, stp_state);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_stp_port_egress_state_set);
+
+jl_api_ret_t jl_stp_port_egress_state_get(jl_port_t port, jl_stp_state_t *pstp_state)
+{
+ jl_api_ret_t ret;
+
+ /* Check System state */
+ JL_CHECK_STAT();
+
+ JL_CHECK_PORT(port);
+
+ JL_CHECK_POINTER(pstp_state);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_stp_port_egress_state_get(port, pstp_state);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_stp_port_egress_state_get);
+
+jl_api_ret_t jl_stp_port_ingress_state_set(jl_port_t port, jl_stp_state_t stp_state)
+{
+ jl_api_ret_t ret;
+
+ /* Check System state */
+ JL_CHECK_STAT();
+
+ JL_CHECK_PORT(port);
+
+ if (stp_state >= STP_STATE_END)
+ return JL_ERR_PARAM;
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_stp_port_ingress_state_set(port, stp_state);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_stp_port_ingress_state_set);
+
+jl_api_ret_t jl_stp_port_ingress_state_get(jl_port_t port, jl_stp_state_t *pstp_state)
+{
+ jl_api_ret_t ret;
+
+ /* Check System state */
+ JL_CHECK_STAT();
+
+ JL_CHECK_PORT(port);
+
+ JL_CHECK_POINTER(pstp_state);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_stp_port_ingress_state_get(port, pstp_state);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_stp_port_ingress_state_get);
+
+jl_api_ret_t jl_stp_ingress_drop_counter_get(jl_stp_state_t stp_state, jl_uint32 *pcntr)
+{
+ jl_api_ret_t ret;
+
+ /* Check System state */
+ JL_CHECK_STAT();
+
+ /* Packets will be forwarded as normal when set to
+ * STP_STATE_DISABLED or STP_STATE_FORWARDING
+ */
+ if (stp_state == STP_STATE_DISABLED || \
+ stp_state == STP_STATE_FORWARDING)
+ return JL_ERR_PARAM;
+
+ JL_CHECK_POINTER(pcntr);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_stp_ingress_drop_counter_get(stp_state, pcntr);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_stp_ingress_drop_counter_get);
+
+jl_api_ret_t jl_stp_port_egress_drop_counter_get(jl_port_t port, jl_uint32 *pcntr)
+{
+ jl_api_ret_t ret;
+
+ /* Check System state */
+ JL_CHECK_STAT();
+
+ JL_CHECK_PORT(port);
+
+ JL_CHECK_POINTER(pcntr);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_stp_port_egress_drop_counter_get(port, pcntr);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_stp_port_egress_drop_counter_get);
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/vlan.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/vlan.c
new file mode 100644
index 0000000..2ee18c8
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/src/vlan.c
@@ -0,0 +1,290 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+
+#include "jl_base.h"
+#include "jl51xx/jl51xx_drv_vlan.h"
+#include "vlan.h"
+
+jl_api_ret_t _jl_vlan_init(void)
+{
+ return jl51xx_vlan_init();
+}
+
+jl_api_ret_t jl_vlan_init(void)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_vlan_init();
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_vlan_init);
+
+jl_api_ret_t _jl_vlan_deinit(void)
+{
+ return jl51xx_vlan_deinit();
+}
+
+jl_api_ret_t jl_vlan_deinit(void)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_vlan_deinit();
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_vlan_deinit);
+
+jl_api_ret_t _jl_vlan_set(jl_uint32 vlan_index, struct vlan_config *config)
+{
+ return jl51xx_vlan_set(vlan_index, config);
+}
+
+jl_api_ret_t jl_vlan_set(jl_uint32 vlan_index, struct vlan_config *config)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+ JL_CHECK_POINTER(config);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_vlan_set(vlan_index, config);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_vlan_set);
+
+jl_api_ret_t _jl_vlan_get(jl_uint32 vlan_index, struct vlan_config *config)
+{
+ return jl51xx_vlan_get(vlan_index, config);
+}
+
+jl_api_ret_t jl_vlan_get(jl_uint32 vlan_index, struct vlan_config *config)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+ JL_CHECK_POINTER(config);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_vlan_get(vlan_index, config);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_vlan_get);
+
+jl_api_ret_t _jl_vlan_set_batch(struct vlan_item *v_list, jl_uint16 size)
+{
+ return jl51xx_vlan_set_batch(v_list, size);
+}
+
+jl_api_ret_t jl_vlan_set_batch(struct vlan_item *v_list, jl_uint16 size)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+ JL_CHECK_POINTER(v_list);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_vlan_set_batch(v_list, size);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_vlan_set_batch);
+
+
+
+/* ---- vlan: port level --------------- */
+jl_api_ret_t _jl_port_vlan_set(jl_port_t port, jl_uint32 vid)
+{
+ return jl51xx_port_vlan_set(port, vid);
+}
+
+jl_api_ret_t jl_port_vlan_set(jl_port_t port, jl_uint32 vid)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+ JL_CHECK_PORT(port);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_port_vlan_set(port, vid);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_port_vlan_set);
+
+jl_api_ret_t _jl_port_vlan_get(jl_port_t port, jl_uint32 *vid)
+{
+ return jl51xx_port_vlan_get(port, vid);
+}
+
+jl_api_ret_t jl_port_vlan_get(jl_port_t port, jl_uint32 *vid)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+ JL_CHECK_PORT(port);
+ JL_CHECK_POINTER(vid);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_port_vlan_get(port, vid);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_port_vlan_get);
+
+jl_api_ret_t _jl_port_vlan_assignment_set(jl_port_t port, enum vlan_assignment opt)
+{
+ return jl51xx_port_vlan_assignment_set(port, opt);
+}
+
+jl_api_ret_t jl_port_vlan_assignment_set(jl_port_t port, enum vlan_assignment opt)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+ JL_CHECK_PORT(port);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_port_vlan_assignment_set(port, opt);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_port_vlan_assignment_set);
+
+jl_api_ret_t _jl_port_vlan_assignment_get(jl_port_t port, enum vlan_assignment *opt)
+{
+ return jl51xx_port_vlan_assignment_get(port, opt);
+}
+
+jl_api_ret_t jl_port_vlan_assignment_get(jl_port_t port, enum vlan_assignment *opt)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+ JL_CHECK_PORT(port);
+ JL_CHECK_POINTER(opt);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_port_vlan_assignment_get(port, opt);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_port_vlan_assignment_get);
+
+jl_api_ret_t _jl_port_vlan_operation_set(jl_port_t port, jl_port_dir_t dir, enum vlan_operation opt)
+{
+
+ if (PORT_DIR_INGRESS == dir)
+ return jl51xx_port_vlan_ingress_operation_set(port, opt);
+ else
+ return jl51xx_port_vlan_egress_operation_set(port, opt);
+}
+
+jl_api_ret_t jl_port_vlan_operation_set(jl_port_t port, jl_port_dir_t dir, enum vlan_operation opt)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+ JL_CHECK_PORT(port);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_port_vlan_operation_set(port, dir,opt);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_port_vlan_operation_set);
+
+jl_api_ret_t _jl_port_vlan_operation_get(jl_port_t port, jl_port_dir_t dir,enum vlan_operation *opt)
+{
+ if (PORT_DIR_INGRESS == dir)
+ return jl51xx_port_vlan_ingress_operation_get(port, opt);
+ else
+ return jl51xx_port_vlan_egress_operation_get(port, opt);
+}
+
+jl_api_ret_t jl_port_vlan_operation_get(jl_port_t port, jl_port_dir_t dir, enum vlan_operation *opt)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+ JL_CHECK_PORT(port);
+ JL_CHECK_POINTER(opt);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_port_vlan_operation_get(port, dir, opt);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_port_vlan_operation_get);
+
+jl_api_ret_t _jl_vlan_acpt_frmt_set(jl_port_t port, jl_vlan_acpt_frmt_t frmt)
+{
+ return jl51xx_vlan_acpt_frmt_set(port, frmt);
+}
+
+jl_api_ret_t jl_vlan_acpt_frmt_set(jl_port_t port, jl_vlan_acpt_frmt_t frmt)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+ JL_CHECK_PORT(port);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_vlan_acpt_frmt_set(port, frmt);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_vlan_acpt_frmt_set);
+
+jl_api_ret_t _jl_vlan_acpt_frmt_get(jl_port_t port, jl_vlan_acpt_frmt_t *pfrmt)
+{
+ return jl51xx_vlan_acpt_frmt_get(port, pfrmt);
+}
+
+jl_api_ret_t jl_vlan_acpt_frmt_get(jl_port_t port, jl_vlan_acpt_frmt_t *pfrmt)
+{
+ jl_api_ret_t ret;
+
+ JL_CHECK_STAT();
+ JL_CHECK_PORT(port);
+ JL_CHECK_POINTER(pfrmt);
+
+ JL_API_MUTEX_LOCK();
+ ret = _jl_vlan_acpt_frmt_get(port, pfrmt);
+ JL_API_MUTEX_UNLOCK();
+
+ return ret;
+}
+EXPORT_SYMBOL(jl_vlan_acpt_frmt_get);
+
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/tools/dbg_io/jl51xx_da.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/tools/dbg_io/jl51xx_da.c
new file mode 100644
index 0000000..a2aa07b
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/tools/dbg_io/jl51xx_da.c
@@ -0,0 +1,121 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+#include <stdio.h>
+#include <stdlib.h>
+#include <stdint.h>
+#include <signal.h>
+#include <string.h>
+
+#include "driver/jl_reg_io.h"
+#include "jl51xx/jl51xx_drv_phy.h"
+
+static int g_exit;
+
+extern jl_ret_t _chk_pkg_mode(void);
+
+static void sig_handle(int sig)
+{
+ (void)sig;
+ g_exit = 1;
+}
+
+void print_usage(char *app)
+{
+ printf("Direct access register tool of JL51XX\n");
+ printf("Usage:\n");
+ printf("\t%s r port page reg_no\n", app);
+ printf("\t%s w port page reg_no hex_value\n", app);
+ printf("Example:\n");
+ printf("\tWrite port 0 PHY's ANAR reg\n");
+ printf("\t %s w 0 0 4 0x5e1\n", app);
+ printf("\tRead port 0 PHY's ANAR reg\n");
+ printf("\t %s r 0 0 4\n", app);
+ printf("\tRead MAC0_USER_CTRL reg\n");
+ printf("\t %s r 0 3 16\n", app);
+ printf("For direct access registers map, please refer to datasheet section 'SMI Direct Access Registers Map'.\n");
+}
+
+int main(int argc, char *argv[])
+{
+ jl_api_ret_t ret = 0;
+ jl_uint32 rw = 0;
+ jl_uint32 port = 0;
+ jl_uint32 page = 0;
+ jl_uint32 reg_no = 0;
+ jl_uint32 val = 0;
+
+ signal(SIGINT, sig_handle);
+ signal(SIGTERM, sig_handle);
+
+ if (argc != 5 && argc != 6) {
+ print_usage(argv[0]);
+ return 0;
+ }
+
+ if (strncmp(argv[1], "w", 1) == 0) {
+ rw = 1;
+ if (argc != 6) {
+ print_usage(argv[0]);
+ exit(0);
+ }
+ } else if (strncmp(argv[1], "r", 1) == 0) {
+ rw = 0;
+ if (argc != 5) {
+ print_usage(argv[0]);
+ exit(0);
+ }
+ } else {
+ print_usage(argv[0]);
+ exit(0);
+ }
+
+ port = strtoul(argv[2], NULL, 10);
+ page = strtoul(argv[3], NULL, 10);
+ reg_no = strtoul(argv[4], NULL, 10);
+ if (rw)
+ val = strtoul(argv[5], NULL, 16);
+
+ ret = jl_reg_io_init();
+ if (ret) {
+ printf("smi init fail\n");
+ return -1;
+ }
+ /* need gp_switch_dev initialised for port mapping Macro to work */
+ _chk_pkg_mode();
+
+ if (rw) {
+ /* write */
+ ret = jl51xx_phy_direct_write_ext(JL_PORT_P2M(port), page, reg_no, val);
+ if (ret) {
+ printf("####error[%d]in func[%s] line[%d]\n", ret, __func__, __LINE__);
+ goto exit;
+ }
+ } else {
+ /* read */
+ ret = jl51xx_phy_direct_read_ext(JL_PORT_P2M(port), page, reg_no, &val);
+ if (ret) {
+ printf("####error[%d]in func[%s] line[%d]\n", ret, __func__, __LINE__);
+ goto exit;
+ }
+
+ printf("read port %d, page %d, reg %d\n", port, page, reg_no);
+ printf("\t0x%04x", val);
+ }
+
+ exit:
+ printf("\n");
+
+ jl_reg_io_deinit();
+ return 0;
+}
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/tools/dbg_io/jl51xx_ida.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/tools/dbg_io/jl51xx_ida.c
new file mode 100644
index 0000000..05fb449
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/tools/dbg_io/jl51xx_ida.c
@@ -0,0 +1,170 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+#include <stdio.h>
+#include <stdlib.h>
+#include <stdint.h>
+#include <signal.h>
+//#include <getopt.h>
+#include <string.h>
+
+#include "getopt.h"
+#include "driver/jl_reg_io.h"
+#include "jl51xx/jl51xx_drv_phy.h"
+
+struct option longopts[] = {
+ {"address", required_argument, NULL, 'a'},
+ {"value", required_argument, NULL, 'v'},
+ {"size", required_argument, NULL, 's'},
+ {"read", no_argument, NULL, 'r'},
+ {"write", no_argument, NULL, 'w'},
+ {"help", no_argument, NULL, 'h'},
+ {0, 0, 0, 0}
+};
+
+static int g_exit;
+
+static void sig_handle(int sig)
+{
+ (void)sig;
+ g_exit = 1;
+}
+
+void print_usage(char *app)
+{
+ printf("Indirect access register tools of JL51XX\n");
+ printf("Example:\n");
+ printf("\twrite:%s -w -a <register address> -v <value0,vlaue1,...> -s <the number of values to write, in decimal>\n", app);
+ printf("\twrite:%s -w -a 0x200000 -v 0x10222345,0x2087 -s 2\n", app);
+ printf("\tread:%s -r -a <register address> -s <the number of values to read, in decimal>\n", app);
+ printf("\tread:%s -r -a 0x200000 -s 2\n", app);
+ printf("Parameters:\n");
+ printf("-w: write operation.\n");
+ printf("-r: read operation.\n");
+ printf("-a: register address in hex format, which is the reg module base + reg offset, e.g.:\n");
+ printf(" for the reg CPU_RESERVED0 in APB_FRONTEND module, the register address is 0x500006(calculated from 0x500000+0x6).\n");
+ printf(" All IDA registers are defined in inc/jl51xx/reg_xxx.h. except reg_phy.h & reg_top.h\n");
+ printf("-v: value in hex format, each value is 32-bit.\n");
+ printf("-s: the number of values to read or write, max number is 8.\n");
+}
+
+int main(int argc, char *argv[])
+{
+ (void)argc;
+ int opt;
+ char value_str[256] = { 0 };
+ char *str0 = NULL;
+ char *str1 = NULL;
+ char value[16] = { 0 };
+ uint32_t buf[8] = { 0 };
+ uint32_t register_addr = 0;
+ uint8_t size = 1;
+ /* 0:read, 1:write */
+ uint8_t rw = 0;
+ int i = 0;
+ jl_api_ret_t ret;
+
+ signal(SIGINT, sig_handle);
+ signal(SIGTERM, sig_handle);
+
+ if (argc == 1) {
+ print_usage(argv[0]);
+ return 0;
+ }
+
+ while ((opt = getopt_long(argc, argv, ":a:v:s:rwh", longopts, NULL)) != -1) {
+ switch (opt) {
+ case 'a':
+ register_addr = strtoul(optarg, NULL, 16);
+ break;
+ case 'v':
+ strncpy(value_str, optarg, sizeof(value_str) - 1);
+ break;
+ case 's':
+ size = strtoul(optarg, NULL, 10);
+ break;
+ case 'r':
+ rw = 0;
+ break;
+ case 'w':
+ rw = 1;
+ break;
+ case 'h':
+ print_usage(argv[0]);
+ return 0;
+ case ':':
+ fprintf(stdout, "required argument : -%c\n", optopt);
+ return -1;
+ case '?':
+ fprintf(stdout, "invalid param: -%c\n", optopt);
+ print_usage(argv[0]);
+ return -1;
+ }
+ }
+
+ ret = jl_reg_io_init();
+ if (ret) {
+ printf("smi init fail\n");
+ return -1;
+ }
+
+ if (rw) {
+ /* write */
+ str0 = value_str;
+ str1 = strstr(str0, ",");
+ int i = 0;
+
+ if (str1 == NULL)
+ buf[i] = strtoul(str0, NULL, 16);
+
+ while (str1 != NULL) {
+ memset(value, 0, 16);
+ memcpy(value, str0, str1 - str0);
+ buf[i] = strtoul(value, NULL, 16);
+ printf("0x%08x\t", buf[i]);
+
+ str0 = str1 + 1;
+ str1 = strstr(str0, ",");
+ i++;
+
+ if (str1 == NULL) {
+ buf[i] = strtoul(str0, NULL, 16);
+ printf("0x%08x\t", buf[i]);
+ }
+
+ }
+
+ ret = jl_apb_reg_burst_write(register_addr, &buf[0], size);
+ if (ret) {
+ printf("####error[%d]in func[%s] line[%d]\n", ret, __func__, __LINE__);
+ goto exit;
+ }
+ } else {
+ /* read */
+ ret = jl_apb_reg_burst_read(register_addr, &buf[0], size);
+ if (ret) {
+ printf("####error[%d]in func[%s] line[%d]\n", ret, __func__, __LINE__);
+ goto exit;
+ }
+
+ printf("read register[0x%08x]\n", register_addr);
+ for (i = 0; i < size; i++)
+ printf("\t0x%08x", buf[i]);
+ }
+
+ exit:
+ printf("\n");
+ jl_reg_io_deinit();
+
+ return 0;
+}
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/tools/dbg_io/jl51xx_iotest.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/tools/dbg_io/jl51xx_iotest.c
new file mode 100644
index 0000000..0dc0b2c
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/tools/dbg_io/jl51xx_iotest.c
@@ -0,0 +1,132 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+#include <stdio.h>
+#include <stdlib.h>
+#include <stdint.h>
+#include <sys/time.h>
+#include <getopt.h>
+
+#include "driver/jl_reg_io.h"
+
+#if (RAND_MAX < 256)
+#error "RAND_MAX is expected bigger than 256"
+#endif
+
+struct option longopts[] = {
+ {"round", required_argument, NULL, 'r'},
+ {"help", no_argument, NULL, 'h'},
+ {0, 0, 0, 0}
+};
+
+void print_usage(char *app)
+{
+ printf("======IO over SMI Pressure Test======\n");
+ printf("Generate a random register value, write, read, compare\n");
+ printf("Using LLDP Configuration register by default\n");
+ printf("Usage: %s -r <test_round>\n", app);
+ printf("Example:\n");
+ printf("\t%s -r 1000\n", app);
+}
+
+uint32_t _rand_uint32(void)
+{
+ uint32_t r0, r1, r2, r3;
+ struct timeval tv;
+
+ gettimeofday(&tv, NULL);
+ srand(tv.tv_usec);
+ r0 = rand() % 256;
+ gettimeofday(&tv, NULL);
+ srand(tv.tv_usec);
+ r1 = rand() % 256;
+ gettimeofday(&tv, NULL);
+ srand(tv.tv_usec);
+ r2 = rand() % 256;
+ gettimeofday(&tv, NULL);
+ srand(tv.tv_usec);
+ r3 = rand() % 256;
+
+ return (r0 << 24| r1 << 16 | r2 << 8 | r3);
+}
+
+int main(int argc, char *argv[])
+{
+ (void) argc;
+ (void) argv;
+ int opt;
+ uint32_t buf[8] = {0};
+ uint32_t buf_0[8] = {0};
+ uint32_t count = 0;
+ uint32_t round = 0;
+ uint8_t i = 0;
+ jl_api_ret_t ret;
+
+ while ((opt = getopt_long(argc, argv,
+ "r:h", longopts, NULL)) != -1) {
+ switch (opt) {
+ case 'r':
+ round = strtoul(optarg, NULL, 10);
+ break;
+ case 'h':
+ print_usage(argv[0]);
+ return 0;
+ case ':':
+ fprintf(stdout, "required argument : -%c\n", optopt);
+ return -1;
+ case '?':
+ fprintf(stdout, "invalid param: -%c\n", optopt);
+ print_usage(argv[0]);
+ return -1;
+ }
+ }
+
+ ret = jl_reg_io_init();
+ if (ret) {
+ printf("smi init fail\n");
+ return -1;
+ }
+
+ while (count++ <= round) {
+ buf_0[0] = _rand_uint32();
+ buf_0[1] = _rand_uint32();
+ buf_0[2] = _rand_uint32();
+ buf_0[3] = _rand_uint32();
+ buf_0[4] = _rand_uint32();
+ buf_0[5] = _rand_uint32() % 0x3ff;
+
+ ret = jl_apb_reg_burst_write(0x102aee, &buf_0[0], 8);
+ if (ret) {
+ printf("####error[%d]int func[%s] line[%d]\n", ret, __func__, __LINE__);
+ goto exit;
+ }
+ ret = jl_apb_reg_burst_read(0x102aee, &buf[0], 8);
+ if (ret) {
+ printf("####error[%d]int func[%s] line[%d]\n", ret, __func__, __LINE__);
+ goto exit;
+ }
+
+ for (i = 0; i < 8; i++)
+ if (buf[i] != buf_0[i]) {
+ printf("ERROR write != read, count:%d\n", count);
+ printf("read index: %d, value: 0x%08x, write: 0x%08x\n", i, buf[i], buf_0[i]);
+ }
+ }
+
+ printf("Done successfully.\n");
+
+exit:
+ jl_reg_io_deinit();
+
+ return 0;
+}
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/tools/load_config/README.md b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/tools/load_config/README.md
new file mode 100644
index 0000000..b3e1318
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/tools/load_config/README.md
@@ -0,0 +1,155 @@
+# Description
+
+Tool *load_config* is used to load register configurations to Switch Chip over SMI interface.
+
+# Application Guide
+
+- Write your configurations in config_source.txt
+- Export *config_source.txt* into *config.h* via script *gen_config.py*
+- Build and get tool *load_config*
+
+# Configuration Source File Format
+
+*config_source.txt* is a human readable file. It's composed of a set of syntax lines.
+There are 2 types of syntax line:
+- Comment Line
+- Command Line
+
+## Comment Line
+*Commnet Line* starts with "#" or ";". Write your comments here.
+
+## Command Line
+There's 5 types of Command:
+- Write
+- Burst Write(write a set of consecutive registers, at most 8 words could be written in a single Burst Write Command Line)
+- Delay(milliseconds)
+- Only for SDK(tell script that those lines are only SDK specified)
+- Only for EE(tell script that those lines are only EE specified)
+
+### Write Command Line
+Command line format:
+```
+# Write Command Line format
+<cmd> <flag> <register address> <value>
+
+# cmd
+cmd = WRITE
+
+# flag
+flag == 0, Register Direct Access over SMI interface
+flag == 1, Register Indirect Access over SMI interface
+
+# register address
+if (flag == 0)
+register address = ((phy_id << 21) & 0x1F) | ((page_id << 5) & 0xFF) | (reg_id & 0x1F)
+
+if (flag == 1)
+register address = register indirect access address
+
+# value
+if (flag == 0)
+value bitwidth = 16 bits
+
+if (flag == 1)
+value bitwidth = 32 bits
+```
+
+.e.g:
+```
+WRITE 0 0x200004 0xde1
+WRITE 1 0x100002 0x2800a
+```
+
+### Burst Write Command Line
+Command line format:
+```
+# Burst Write Command Line format
+<cmd> <flag> <register address> <value0 ...>
+
+# cmd
+cmd = BWRITE
+
+# flag
+flag = value length in word(should be less than 8)
+
+# register address
+register address = register indirect access address
+
+# value
+value bitwidth = 32 bits
+value length = flag
+```
+
+.e.g:
+```
+BWRITE 3 0x2101077 0x20b8 0x8019 0x7
+```
+
+### Delay Command Line
+Command Line format:
+```
+# Delay Command Line format
+<cmd> <value>
+
+# cmd
+cmd = DELAY
+
+# value
+value = delay time in us
+value bitwidth = 32 bits
+```
+
+.e.g:
+```
+DELAY 0x100
+```
+
+### Only for SDK Command Line
+Command Line format:
+```
+# Only for SDK Command Line format
+<cmd> <flag>
+
+# cmd
+cmd = ONLY_FOR_SDK
+
+# flag
+BEGIN
+END
+```
+
+.e.g:
+```
+ONLY_FOR_SDK BEGIN
+;lines SDK specified
+WRITE 0 0x200004 0xde1
+WRITE 1 0x100002 0x2800a
+BWRITE 3 0x2101077 0x20b8 0x8019 0x7
+DELAY 1000
+ONLY_FOR_SDK END
+```
+
+### Only for EE Command Line
+Command Line format:
+```
+# Only for EE Command Line format
+<cmd> <flag>
+
+# cmd
+cmd = ONLY_FOR_EE
+
+# flag
+BEGIN
+END
+```
+
+.e.g:
+```
+ONLY_FOR_EE BEGIN
+;lines EE specified
+WRITE 0 0x200004 0xde1
+WRITE 1 0x100002 0x2800a
+BWRITE 3 0x2101077 0x20b8 0x8019 0x7
+DELAY 1000
+ONLY_FOR_EE END
+```
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/tools/load_config/config.h b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/tools/load_config/config.h
new file mode 100644
index 0000000..ea66a50
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/tools/load_config/config.h
@@ -0,0 +1,39 @@
+#include <stdlib.h>
+
+#include "jl_types.h"
+
+/* Autogenerated file, do not modify */
+
+enum cmd_e {
+ JL_CMD_NONE = 0,
+ JL_CMD_WRITE,
+ JL_CMD_BWRITE,
+ JL_CMD_DELAY
+};
+
+enum cmd_flag_e {
+ JL_CMD_FLAG_DA = 0,
+ JL_CMD_FLAG_IDA,
+ /* burst write size in word */
+};
+
+struct cmd_line_s {
+ jl_uint8 cmd; //cmd=1, write;cmd=2, burst write;cmd=3, dealy
+ jl_uint8 flag; //flag=0, DA；flag=1, IDA;if cmd==2,flag=burst size
+ jl_uint32 addr; //regiter SMI access address
+ jl_uint32 val; //register value;dealy time ms
+}__attribute__ ((__packed__));
+
+/* TODO this file only for example */
+const struct cmd_line_s cmd_line_set[] = {
+ /* direct write phy 1, page 3, reg 25, val 0x1234 */
+ {1, 0, 0x20079, 0x1234},
+ /* indirect write addr 0x100000, val 0x12345678 */
+ {1, 1, 0x100000, 0x12345678},
+ /* burst write addr 0x200000, val 0x12345678, 0xffffffff, 0x0 */
+ {2, 3, 0x200000, 0x12345678},
+ {0, 0, 0, 0xffffffff},
+ {0, 0, 0, 0x0},
+ /* delay for 1000us */
+ {3, 0, 0, 1000}
+};
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/tools/load_config/config_source.txt b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/tools/load_config/config_source.txt
new file mode 100644
index 0000000..9cda2f7
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/tools/load_config/config_source.txt
@@ -0,0 +1,5 @@
+;this is only for example
+WRITE 0 0x20079 0x1234
+WRITE 1 0x100000 0x12345678
+BWRITE 3 0x200000 0x12345678 0xffffffff 0x0
+DELAY 1000
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/tools/load_config/gen_config.py b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/tools/load_config/gen_config.py
new file mode 100644
index 0000000..ad59e02
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/tools/load_config/gen_config.py
@@ -0,0 +1,169 @@
+#!/usr/bin/env python
+# coding: utf-8
+
+# Convert source_new.txt to c structure
+
+c_file_header = """#include <stdlib.h>
+
+#include "jl_types.h"
+
+/* Autogenerated file, do not modify */
+
+enum cmd_e {
+ JL_CMD_NONE = 0,
+ JL_CMD_WRITE,
+ JL_CMD_BWRITE,
+ JL_CMD_DELAY
+};
+
+enum cmd_flag_e {
+ JL_CMD_FLAG_DA = 0,
+ JL_CMD_FLAG_IDA,
+ /* burst write size in word */
+};
+
+struct cmd_line_s {
+ jl_uint8 cmd; //cmd=1, write;cmd=2, burst write;cmd=3, dealy
+ jl_uint8 flag; //flag=0, DA；flag=1, IDA;if cmd==2,flag=burst size
+ jl_uint32 addr; //regiter SMI access address
+ jl_uint32 val; //register value;dealy time ms
+}__attribute__ ((__packed__));
+
+const struct cmd_line_s cmd_line_set[] = {
+"""
+JL_CMD_WRITE = 1
+JL_CMD_BWRITE = 2
+JL_CMD_DELAY = 3
+JL_CMD_FLAG_DA = 0
+JL_CMD_FLAG_IDA = 1
+
+normal_struct_line = "\t{{{cmd}, {flag}, {smi_addr}, {value}}},\n"
+last_struct_line = "\t{{{cmd}, {flag}, {smi_addr}, {value}}}\n"
+
+def getCommandLines(lines):
+ new_lines = []
+ skip_ee_specified = 0
+ for i, line in enumerate(lines):
+ #Split line into string list
+ code = line.strip().split(" ")
+
+ #Bypass if an empty line
+ if line in ["\n", '\r\n']:
+ continue
+
+ #Bypass if a commented line
+ if (code[0].startswith('#') or code[0].startswith(';')):
+ continue
+
+ #Bypass EEprom specified settings
+ if (code[0] == "ONLY_FOR_EE"):
+ assert(len(code) == 2)
+ if (code[1] == "BEGIN"):
+ if (skip_ee_specified == 1):
+ raise Exception("Error: 'ONLY_FOR_EE' expected 'END' before 'BEGIN'!!!")
+ skip_ee_specified = 1
+ elif (code[1] == "END"):
+ if (skip_ee_specified == 0):
+ raise Exception("Error: 'ONLY_FOR_EE' expected 'BEGIN' before 'END'!!!")
+ skip_ee_specified = 0
+ else:
+ raise Exception("Error: 'ONLY_FOR_EE' followed by unknown string [%s]!!!" %(code[1]))
+
+ continue
+
+ if (skip_ee_specified == 1):
+ continue
+
+ if (code[0] == "ONLY_FOR_SDK"):
+ continue
+
+ new_lines.append(line)
+
+ return new_lines
+
+
+def main(source, out):
+ try:
+ infile = open(source, 'r')
+ except IOError:
+ print("Open %s failed." %(source))
+ exit(1)
+
+ outfile = open(out, 'w')
+
+ outfile.write(c_file_header)
+
+ lines = infile.readlines()
+ new_lines = getCommandLines(lines)
+
+ line_num = len(new_lines)
+ for index, line in enumerate(new_lines):
+ #Get the C structure array line format
+ struct_line = ""
+ if (index == line_num - 1):
+ struct_line = last_struct_line
+ else:
+ struct_line = normal_struct_line
+
+ #Split line into string list
+ code = line.strip().split(" ")
+
+ if (code[0] == "WRITE"):
+ # SMI Register Direct Access
+ if (int(code[1]) == JL_CMD_FLAG_DA):
+ addr = code[2]
+ value = code[3]
+ s = struct_line.format(cmd = JL_CMD_WRITE, flag = JL_CMD_FLAG_DA, smi_addr = addr, value = value)
+ outfile.write(s)
+ # SMI Register Indirect Direct Access
+ if (int(code[1]) == JL_CMD_FLAG_IDA):
+ addr = code[2]
+ value = code[3]
+ s = struct_line.format(cmd = JL_CMD_WRITE, flag = JL_CMD_FLAG_IDA, smi_addr = addr, value = value)
+ outfile.write(s)
+ continue
+
+ if (code[0] == "DELAY"):
+ delay = code[1]
+ s = struct_line.format(cmd = JL_CMD_DELAY, flag = 0, smi_addr = 0, value = delay)
+ outfile.write(s)
+ continue
+
+ if (code[0] == "BWRITE"):
+ # SMI Register Burst Indirect Access
+ size = int(code[1])
+ addr = code[2]
+ value= code[3]
+ if (size < 1) or (size > 8):
+ raise Exception("Invalid Burst size: {}".format(size))
+ s = struct_line.format(cmd = JL_CMD_BWRITE, flag = size, smi_addr = addr, value = value)
+ outfile.write(s)
+ for i in range(4, 4 + size - 1):
+ s = struct_line.format(cmd = 0, flag = 0, smi_addr = 0, value = code[i])
+ outfile.write(s)
+ continue
+
+ raise Exception("Error: Unknown line [%s]!!" %(line))
+
+ s = "};\n"
+ outfile.write(s)
+
+ infile.close()
+ outfile.close()
+
+
+if __name__ == "__main__":
+ import argparse
+
+ parser = argparse.ArgumentParser(description='Convert Config Source file to C Structure file')
+
+ parser.add_argument(
+ '--source', nargs=1, default=["config_source.txt"], help='path of config source file as input')
+
+ parser.add_argument(
+ '--out', nargs=1, default=["config.h"], help='path of C structure output file')
+
+ args = parser.parse_args() # expose args to global
+
+ main(args.source[0], args.out[0])
+
diff --git a/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/tools/load_config/load_config.c b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/tools/load_config/load_config.c
new file mode 100644
index 0000000..29fc299
--- /dev/null
+++ b/cap/zx297520v3/zxic_code/zxic_source/linux-5.10/drivers/staging/jl_switch_sdk_v4.0.0/libswitch/libjl51xx/tools/load_config/load_config.c
@@ -0,0 +1,153 @@
+/*
+ * Copyright (c) 2014-2024 JLSemi Limited
+ * All Rights Reserved
+ *
+ * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE of JLSemi Limited
+ * The copyright notice above does not evidence any actual or intended
+ * publication of such source code.
+ *
+ * No part of this code may be reproduced, stored in a retrieval system,
+ * or transmitted, in any form or by any means, electronic, mechanical,
+ * photocopying, recording, or otherwise, without the prior written
+ * permission of JLSemi Limited
+ */
+#include <stdlib.h>
+
+#include "portable/jl_portable.h"
+#include "driver/jl_reg_io.h"
+#include "config.h"
+
+#define ARRAY_SIZE(x) (sizeof(x)/sizeof((x)[0]))
+#define PHY_ID(x) (((x) >> 0x15U) & 0x1FU)
+#define PAGE_ID(x) (((x) >> 0x5U) & 0xFFFFU)
+#define REG_ID(x) ((x) & 0x1FU)
+#define MAX_BURST_SIZE 8U
+
+#define CONFIG_DEBUG_ON
+#ifdef CONFIG_DEBUG_ON
+#define LOG printf
+#else
+#define LOG(...)
+#endif
+
+
+static int __do_write(const struct cmd_line_s *cmd_line)
+{
+ jl_api_ret_t ret = JL_ERR_OK;
+
+ if ((cmd_line->flag != JL_CMD_FLAG_DA) &&
+ ((cmd_line->flag != JL_CMD_FLAG_IDA))) {
+ LOG("Abort, Unknown WRITE command flag!!!\n");
+ return -1;
+ }
+
+ if (cmd_line->flag == JL_CMD_FLAG_DA) {
+ jl_phy_reg_write_ext(PHY_ID(cmd_line->addr),
+ PAGE_ID(cmd_line->addr),
+ REG_ID(cmd_line->addr),
+ (jl_uint16)cmd_line->val);
+ } else if (cmd_line->flag == JL_CMD_FLAG_IDA) {
+ ret = jl_apb_reg_write(cmd_line->addr, cmd_line->val);
+ if (ret)
+ return -1;
+ }
+
+ return 0;
+}
+
+static int __do_burst_write(const struct cmd_line_s *cmd_line)
+{
+ jl_api_ret_t ret = JL_ERR_OK;
+ jl_uint32 burst_val[8] = {0};
+ jl_uint32 size = (jl_uint32)cmd_line->flag;
+ unsigned int i = 0;
+
+ if ((size == 0) || (size > MAX_BURST_SIZE)) {
+ LOG("Abort, BURST WRITE command with wrong size!!!\n");
+ return -1;
+ }
+
+ for (i = 0; i < size; i++) {
+ if ((i > 0) && (cmd_line[i].cmd ||
+ cmd_line[i].flag ||
+ cmd_line[i].addr)) {
+ LOG("Abort, BRUST WRITE with wrong burst value format!!!\n");
+ return -1;
+ }
+
+ burst_val[i] = cmd_line[i].val;
+ }
+
+ ret = jl_apb_reg_burst_write(cmd_line->addr, &burst_val[0], size);
+ if (ret)
+ return -1;
+
+ return (int)size;
+}
+
+static int load_config(void)
+{
+ unsigned int size = ARRAY_SIZE(cmd_line_set);
+ unsigned int i = 0;
+ const struct cmd_line_s *cmd_line = NULL;
+ int ret = 0;
+
+ while (size) {
+ cmd_line = &cmd_line_set[i];
+
+ switch (cmd_line->cmd) {
+ case (JL_CMD_WRITE):
+ ret = __do_write(cmd_line);
+ if (ret)
+ goto error;
+
+ size--;
+ i++;
+ break;
+ case (JL_CMD_BWRITE):
+ ret = __do_burst_write(cmd_line);
+ if (ret < 0)
+ goto error;
+
+ size -= ret;
+ i += ret;
+ break;
+ case (JL_CMD_DELAY):
+ port_udelay(cmd_line->val);
+
+ size--;
+ i++;
+ break;
+ default:
+ LOG("Abort, Unknown command!!!\n");
+ goto error;
+ }
+ }
+
+ return 0;
+
+error:
+ LOG("Load configuration fail!!!\n");
+ LOG("CMD Line: CMD:[%d], FLAG:[%d], ADDR:[0x%8x], VALUE:[0x%8x]\n",
+ cmd_line->cmd, cmd_line->flag,
+ cmd_line->addr, cmd_line->val);
+
+ return -1;
+}
+
+int main(int argc, char *argv[])
+{
+ (void) argc;
+ (void) argv;
+ jl_api_ret_t ret;
+
+ ret = jl_reg_io_init();
+ if (ret)
+ return -1;
+
+ load_config();
+
+ jl_reg_io_deinit();
+
+ return ret;
+}