//RL6302_MAC_PHY_Parameter_v018_20140708
//A MODE S0:5180		
0x18	0x13124	
0x40	0x00c00 // RX_A mixer LDO on & POW_TRIQGEN_G	
0x58	0x00F98 //0x80F98	
0x7f	0x68004 //G mode TR_IQGEN_VBN	
////SYN setting		
0xB0	0xFFFFE	
0xB1	0x3FF48	
0xB2	0x6AA3F	
0xB3	0xFFC9A	
0xB4	0x0A78F	
0xB5	0x00A3F	
0xB6	0x0C09C	
0xB7	0x3000C	
0xB8	0x7400E	
0xB9	0x08250	
0xBA	0x50780	
0xBB	0x00000	
0xBC	0x40009	
0xBD	0x00000	
0xBE	0x00000	
0xBF	0x00000	
// VCO bias		
0xEF	0x20000	
0x3E	0x00000	
0x3F	0x90000	
0x3E	0x20000	
0x3F	0xA0000	
0x3E	0x40000	
0x3F	0xA0000	
0x3E	0x60000	
0x3F	0xA0000	
0xEF	0x00000	
// kvco table		
0xEF	0x10000	
0x3E	0x00000	
0x3F	0x06800	
0x3E	0x00080	
0x3F	0x06000	
0x3E	0x00100	
0x3F	0x04800	
0x3E	0x00180	
0x3F	0x04000	
0x3E	0x00200	
0x3F	0x04000	
0x3E	0x00280	
0x3F	0x02800	
0x3E	0x00300	
0x3F	0x02800	
0x3E	0x00380	
0x3F	0x02000	

0xEF	0x00000	
// Ioffset		
0xEF	0x40000	
0x3E	0x00000 //G mode need to check	
0x3F	0x000BC	
0x3E	0x00040	
0x3F	0x00053	
0x3E	0x00050	
0x3F	0x00050	
0x3E	0x00060	
0x3F	0x00050	
0xEF	0x00000	
// LPF		
0xEF	0x00400	
0x3E	0x00006	
0x41	0xEE080 //G mode need to check	
0x3E	0x00008	
0x41	0xEE0C0	
0x3E	0x0000A	
0x41	0xEE100	
0x3E	0x0000C	
0x41	0xEE100	
0xEF	0x00000	
///////////////		
//0x18	0x1312A	

// G mode TRx Setting    				

0x18	0x00006	
0x86	0xE335A // CS	
0x87	0x49f80 // Mixer gain	
0xDF	0x00008	
//RX_G AGC Table         				
0xEF	0x02000	
0x3B	0x3f19b // LNA=3b111	
0x3B	0x37a5b // LNA=3b110	
0x3B	0x2a433 // LNA=3b101	
0x3B	0x27bd3 // LNA=3b100	
0x3B	0x1f80b // LNA=3b011	
0x3B	0x17803 // LNA=3b010	

//TX_G GainTable				
0xEF	0x00100	
// highpower mode		
0x34	0x0A0D0	
0x34	0x090CD	
0x34	0x080CA	
0x34	0x0704D	
0x34	0x0604A	
0x34	0x05047	
0x34	0x0400A	
0x34	0x03007	
0x34	0x02004	
0x34	0x01001	
0x34	0x00001	
// lowpower mode		
0x34	0x0A0D0	
0x34	0x090CD	
0x34	0x080CA	
0x34	0x0704D	
0x34	0x0604A	
0x34	0x05047	
0x34	0x0400A	
0x34	0x03007	
0x34	0x02004	
0x34	0x01001	
0x34	0x00001	
0xEF	0x00000	

//2G PA bias setting				
0xEF	0x020A2 // Wenable biasI/biasII/gain table/LO table	
0xDF	0x00080 // APK setting in debug mode	
0x35	0x00192	
0x35	0x08192	
0x35	0x10192	
0x36	0x00024	
0x36	0x08024	
0x36	0x10024	
0x36	0x18024	
0xEF	0x00000	

0x51	0x00C21	
0x52	0x006D9	
0x53	0xFC649 //APK	
0x54	0x0017E //LC tank (ch01~ch07)	
//0x54	0x0013E //LC tank (ch08~ch13)	


// A mode TRx Setting  		

//RX_A General Settings		
0x18	0x1012a	
0x81	0x7fc00	
0x89	0x50110	
0x8a	0x43e50	
0x8b	0x2e180	
0x8c	0x93c3c	
0x85	0xf0000 // RX_A IQgen	

//RX_A AGC Table		
0xEF	0x01000	
//LB		
0x3A	0x007bc // UHG	
0x3B	0x38021	
0x3C	0xe0000	
0x3A	0x007bc // HG2	
0x3B	0x30221	
0x3C	0x28000	
0x3A	0x007bc // MG1	
0x3B	0x28c21	
0x3C	0x00000	
0x3A	0x007bc // MG2	
0x3B	0x21c31	
0x3C	0x00000	
0x3A	0x007bc // MG3	
0x3B	0x1cc31	
0x3C	0x00000	
0x3A	0x007bc // LG1	
0x3B	0x11091	
0x3C	0x00000	
0x3A	0x007bc // LG2	
0x3B	0x0a591	
0x3C	0x00000	
0x3A	0x007c8 // ULG	
0x3B	0x01389	
0x3C	0x00000	

//MB		
0x3A	0x007bc // UHG	
0x3B	0x78021	
0x3C	0xe0000	
0x3A	0x007bc // HG2	
0x3B	0x70221	
0x3C	0x28000	
0x3A	0x007bc // MG1	
0x3B	0x68c21	
0x3C	0x00000	
0x3A	0x007bc // MG2	
0x3B	0x61c31	
0x3C	0x00000	
0x3A	0x007bc // MG3	
0x3B	0x5cc31	
0x3C	0x00000	
0x3A	0x007bc // LG1	
0x3B	0x51091	
0x3C	0x00000	
0x3A	0x007bc // LG2	
0x3B	0x4a591	
0x3C	0x00000	
0x3A	0x007c8 // ULG	
0x3B	0x41389	
0x3C	0x00000	

//HB		
0x3A	0x007bc // UHG	
0x3B	0xb8021	
0x3C	0xec000	
0x3A	0x007bc // HG2	
0x3B	0xb0221	
0x3C	0x28000	
0x3A	0x007bc // MG1	
0x3B	0xa8c21	
0x3C	0x00000	
0x3A	0x007bc // MG2	
0x3B	0xa1c31	
0x3C	0x00000	
0x3A	0x007bc // MG3	
0x3B	0x9cc31	
0x3C	0x00000	
0x3A	0x007bc // LG1	
0x3B	0x91091	
0x3C	0x00000	
0x3A	0x007bc // LG2	
0x3B	0x8a591	
0x3C	0x00000	
0x3A	0x007c8 // ULG	
0x3B	0x81389	
0x3C	0x00000	

0xEF	0x00000	

// RX_A subband Table		
0xEF	0x00800	
0x3B	0x00000 // LB	
0x3A	0x00801	
0x3B	0x40000 // MB	
0x3A	0x01802	
0x3B	0x80000 // HB	
0x3A	0x01802	
0xEF	0x00000	

// Table_5G_TXAGC_S0		
0x18	0x13124	
0xEF	0x00100	
//TX AGC 5GHB_HP(12dBm)           			
0x34	0x4A0F1 //63	
0x34	0x490EE //57	
0x34	0x480EB //51	
0x34	0x4706D //45	
0x34	0x4606A //39	
0x34	0x45067 //33	
0x34	0x44046 //27	
0x34	0x4300C //21	
0x34	0x42009 //15	
0x34	0x41006 //9 	
0x34	0x40003 //3 	
//TX AGC 5GMB_HP(12dBm)			
0x34	0x2A0F1 //63	
0x34	0x290EE //57	
0x34	0x280EB //51	
0x34	0x2706D //45	
0x34	0x2606A //39	
0x34	0x25067 //33	
0x34	0x24046 //27	
0x34	0x2300C //21	
0x34	0x22009 //15	
0x34	0x21006 //9 	
0x34	0x20003 //3 	
//TX AGC 5GLB_HP(12dBm) 					
0x34	0x0A0F0  //63	
0x34	0x090ED  //57	
0x34	0x080EA //51	
0x34	0x0706D //45	
0x34	0x0606A  //39	
0x34	0x0502D //33	
0x34	0x0402A //27	
0x34	0x03027 //21	
0x34	0x02024 //15	
0x34	0x01007 //9	
0x34	0x00004 //3	
//TX AGC 5GHB_LP(9dBm)            					
0x34	0x4A0F1  //63	
0x34	0x490EE  //57	
0x34	0x480EB //51	
0x34	0x4706D //45	
0x34	0x4606A  //39	
0x34	0x45067 //33	
0x34	0x44046 //27	
0x34	0x4300C //21	
0x34	0x42009 //15	
0x34	0x41006 //9	
0x34	0x40003 //3	
//TX AGC 5GMB_LP(9dBm)					
0x34	0x4A0F1  //63	
0x34	0x490EE  //57	
0x34	0x480EB //51	
0x34	0x4706D //45	
0x34	0x4606A  //39	
0x34	0x45067 //33	
0x34	0x44046 //27	
0x34	0x4300C //21	
0x34	0x42009 //15	
0x34	0x41006 //9	
0x34	0x40003 //3	
//TX AGC 5GLB_LP(9dBm)					
0x34	0x8A0F0  //63	
0x34	0x890ED  //57	
0x34	0x880EA  //51	
0x34	0x8706D //45	
0x34	0x8606A  //39	
0x34	0x8502D //33	
0x34	0x8402A //27	
0x34	0x83027 //21	
0x34	0x82024 //15	
0x34	0x81007 //9	
0x34	0x80004 //3	
0xEF	0x00000	

//Table_5G_Bias_I_S0			
0xDF	0x00001	
0x18	0x1712A	
0xEF	0x00040	
0x35	0x006cc //HP_LB_40M_BS_IPA_PACAS=110_PADYS_ATT=1100_BSCNT_IPA_PA=0101	
0x35	0x086cc //HP_LB_20M_BS_IPA_PACAS=110_PADYS_ATT=1100_BSCNT_IPA_PA=0101	
0x35	0x106cc //HP_LB_10M_BS_IPA_PACAS=110_PADYS_ATT=1100_BSCNT_IPA_PA=0101	
0x35	0x206cc //HP_MB_40M_BS_IPA_PACAS=110_PADYS_ATT=1100_BSCNT_IPA_PA=0101	
0x35	0x286cc //HP_MB_20M_BS_IPA_PACAS=110_PADYS_ATT=1100_BSCNT_IPA_PA=0101	
0x35	0x306cc //HP_MB_10M_BS_IPA_PACAS=110_PADYS_ATT=1100_BSCNT_IPA_PA=0101	
0x35	0x406cc //HP_HB_40M_BS_IPA_PACAS=110_PADYS_ATT=1100_BSCNT_IPA_PA=0101	
0x35	0x486cc //HP_HB_20M_BS_IPA_PACAS=110_PADYS_ATT=1100_BSCNT_IPA_PA=0101	
0x35	0x506cc //HP_HB_10M_BS_IPA_PACAS=110_PADYS_ATT=1100_BSCNT_IPA_PA=0101	
0x35	0x806cc //LP_LB_40M_BS_IPA_PACAS=110_PADYS_ATT=1100_BSCNT_IPA_PA=0101	
0x35	0x886cc //LP_LB_20M_BS_IPA_PACAS=110_PADYS_ATT=1100_BSCNT_IPA_PA=0101	
0x35	0x906cc //LP_LB_10M_BS_IPA_PACAS=110_PADYS_ATT=1100_BSCNT_IPA_PA=0101	
0x35	0xa06cc //LP_MB_40M_BS_IPA_PACAS=110_PADYS_ATT=1100_BSCNT_IPA_PA=0101	
0x35	0xa86cc //LP_MB_20M_BS_IPA_PACAS=110_PADYS_ATT=1100_BSCNT_IPA_PA=0101	
0x35	0xb06cc //LP_MB_10M_BS_IPA_PACAS=110_PADYS_ATT=1100_BSCNT_IPA_PA=0101	
0x35	0xc06cc //LP_HB_40M_BS_IPA_PACAS=110_PADYS_ATT=1100_BSCNT_IPA_PA=0101	
0x35	0xc86cc //LP_HB_20M_BS_IPA_PACAS=110_PADYS_ATT=1100_BSCNT_IPA_PA=0101	
0x35	0xd06cc //LP_HB_10M_BS_IPA_PACAS=110_PADYS_ATT=1100_BSCNT_IPA_PA=0101	
0xEF	0x00000		

//Table_5G_Bias_II_S0					
0xDF	0x00001	
0x18	0x1712A		
0xEF	0x00010		
0x36	0x00473 //HP_LB_40M_BS_IPA_PADCAS=100_PADYS_ATT=0111_BSCNT_IPA_PA=0011	
0x36	0x08473 //HP_LB_20M_BS_IPA_PADCAS=100_PADYS_ATT=0111_BSCNT_IPA_PA=0011	
0x36	0x10473 //HP_LB_10M_BS_IPA_PADCAS=100_PADYS_ATT=0111_BSCNT_IPA_PA=0011	
0x36	0x20473 //HP_MB_40M_BS_IPA_PADCAS=100_PADYS_ATT=0111_BSCNT_IPA_PA=0011	
0x36	0x28473 //HP_MB_20M_BS_IPA_PADCAS=100_PADYS_ATT=0111_BSCNT_IPA_PA=0011	
0x36	0x30473 //HP_MB_10M_BS_IPA_PADCAS=100_PADYS_ATT=0111_BSCNT_IPA_PA=0011	
0x36	0x40473 //HP_HB_40M_BS_IPA_PADCAS=100_PADYS_ATT=0111_BSCNT_IPA_PA=0011	
0x36	0x48473 //HP_HB_20M_BS_IPA_PADCAS=100_PADYS_ATT=0111_BSCNT_IPA_PA=0011	
0x36	0x50473 //HP_HB_10M_BS_IPA_PADCAS=100_PADYS_ATT=0111_BSCNT_IPA_PA=0011	
0x36	0x80473 //LP_LB_40M_BS_IPA_PADCAS=100_PADYS_ATT=0111_BSCNT_IPA_PA=0011	
0x36	0x88473 //LP_LB_20M_BS_IPA_PADCAS=100_PADYS_ATT=0111_BSCNT_IPA_PA=0011	
0x36	0x90473 //LP_LB_10M_BS_IPA_PADCAS=100_PADYS_ATT=0111_BSCNT_IPA_PA=0011	
0x36	0xa0473 //LP_MB_40M_BS_IPA_PADCAS=100_PADYS_ATT=0111_BSCNT_IPA_PA=0011	
0x36	0xa8473 //LP_MB_20M_BS_IPA_PADCAS=100_PADYS_ATT=0111_BSCNT_IPA_PA=0011	
0x36	0xb0473 //LP_MB_10M_BS_IPA_PADCAS=100_PADYS_ATT=0111_BSCNT_IPA_PA=0011	
0x36	0xc0473 //LP_HB_40M_BS_IPA_PADCAS=100_PADYS_ATT=0111_BSCNT_IPA_PA=0011	
0x36	0xc8473 //LP_HB_20M_BS_IPA_PADCAS=100_PADYS_ATT=0111_BSCNT_IPA_PA=0011	
0x36	0xd0473 //LP_HB_10M_BS_IPA_PADCAS=100_PADYS_ATT=0111_BSCNT_IPA_PA=0011	
0xEF	0x00000	


//Table_5G_TX_Tank_S0(MOD_prePAD_PAD tank)					
0xEF	0x00008		



0x3C	0x0017d  //HP_LB_PA_TANK[2:0]	
0x3C	0x0057d  //HP_MB_PA_TANK[2:0]	
0x3C	0x0087d  //HP_HB_PA_TANK[2:0]	
0xEF	0x00000			

//0x59	0x68390	
0x61	0xC0D47	
//LB				
0x62	0x0133c //38F4B		
//MB and HB				
//0x62	0x06DEF //PA cascode=011			
0x63	0x750E7 //32117 	
0x64	0x14FEC //194AC		
0x65	0x931D0	
0x66	0x00040 //00000(high ch)	
//0x58	0x80FEc // LOK	
//0xDF	0x04F8D	
0x57	0x90000	
0x56	0x51Df0	

//RCK		
0x1C	0x739D2 // 0x1c[1]=1	

//LCK		
0x18	0x1b126 //do LCK		
0xfe
0xfe
0xfe
0x18	0x13126 //set channel again	
0x18	0x13124 // switch channel 	
0xffff 0xffff