//RL6286_MAC_PHY_Parameter_v041_20131127
//A MODE S0:5210		
0x00	0x10000 // enter standby mode	
0x18	0x1712A //set ch42             	
0x56	0x51CF2 //R2T turbo_EN[18]=1   	
0x66	0x40000 //TRIQ bus floating    	
0x1E	0x80000 // RX 80M RCK offset   	
0x89	0x00080 // for RX LNA setting	
0x86	0x14B38	
0x8B	0x87180	

//SYN setting		
//0xB0	0xFFFFF	
0xB1	0x1FC1A	
//0xB2	0x4103F	
0xB3	0xF0810	
0xB4	0x1A78D 	
//0xB5	0x04BFF	
//0xB6	0x0A138	
//0xB7	0x30008 //binary search	
//0xB8	0x86000 //A7458; Div to latch & PFD noninvter:A7440	
//0xB9	0x08A00	
0xBA	0x86180	
//0xBB	0x2CE80	
//0xBC	0x40000	

// G mode TRx Setting    		
//RX_G AGC Table         		
0x18	0x00006	
0xEF	0x02000	
0x3B	0x38a58 // LNA=3b111	
0x3B	0x37a58  // LNA=3b110	
0x3B	0x2a590  // LNA=3b101	
0x3B	0x27a50 // LNA=3b100	
0x3B	0x18248  // LNA=3b011	
0x3B	0x10240 // LNA=3b010	
0x3B	0x08240  // LNA=3b001	

//TX_G GainTable		
0xEF	0x00100	
0x34	0x0ADF4	
0x34	0x09DF1	
0x34	0x08DEE	
0x34	0x07DEB	
0x34	0x06DE8	
0x34	0x05CEC	
0x34	0x04CE9	
0x34	0x034EA	
0x34	0x024E7	
0x34	0x0146B	
0x34	0x0006D	
0xEF	0x00000	


//2G PA bias setting		
0xEF	0x020A2 // Wenable biasI/biasII/gain table/LO table	
0xDF	0x00080 // APK setting in debug mode	
0x35	0x00192	
0x35	0x08192	
0x35	0x10192	
0x36	0x00024	
0x36	0x08024	
0x36	0x10024	
0x36	0x18024	
0xEF	0x00000	

0x51	0x00C21	
0x52	0x006D9	
0x53	0xFC649 //APK	
0x54	0x0017E //LC tank (ch01~ch07)	
//0x54	0x0013E //LC tank (ch08~ch13)	

//Table_LOK_S0		
0xEF	0x00002	

//LOK		
0x08	0x08400 //write 2G LOK table default value	

// A mode TRx Setting  		

//RX_A AGC Table		
0x18	0x1712a	
0xEF	0x01000	
//LB		
0x3A	0x00080 //HG1-1	
0x3B	0x3A02C	
0x3C	0x04000	
0x3A	0x00400 //HG1	
0x3B	0x3202C	
0x3C	0x10000	
0x3A	0x000A0 // HG2-1	
0x3B	0x2B064	
0x3C	0x04000	
//0x3A	0x00420 //HG2	
//0x3B	0x23064	
//0x3C	0x10000	
0x3A	0x000d8 // MG1-2	
0x3B	0x23070	
0x3C	0x04000	
0x3A	0x00468 //MG1-3	
0x3B	0x1B870	
0x3C	0x10000	
0x3A	0x00098 //LG0-3	
0x3B	0x12085	
0x3C	0xE4000	
0x3A	0x00418 //LG0-2	
0x3B	0x0A080	
0x3C	0xf0000	
0x3A	0x00418 //LG1	
0x3B	0x02080	
0x3C	0x10000	
//MB		
0x3A	0x00080 //HG1-1	
0x3B	0x7A02C	
0x3C	0x04000	
0x3A	0x00400 //HG1	
0x3B	0x7202C	
0x3C	0x10000	
0x3A	0x000A0 // HG2-1	
0x3B	0x6B064	
0x3C	0x04000	
//0x3A	0x00420 //HG2	
//0x3B	0x63064	
//0x3C	0x10000	
0x3A	0x000d8 //MG1-2	
0x3B	0x63070	
0x3C	0x04000	
0x3A	0x00468 //MG1-3	
0x3B	0x5B870	
0x3C	0x10000	
0x3A	0x00098 //LG0-3	
0x3B	0x52085	
0x3C	0xE4000	
0x3A	0x00418 //LG0-2	
0x3B	0x4A080	
0x3C	0xf0000	
0x3A	0x00418 //LG1	
0x3B	0x42080	
0x3C	0x10000	
//HB		
0x3A	0x00080 //HG1-1	
0x3B	0xBA02C	
0x3C	0x04000	
0x3A	0x00400 //HG1	
0x3B	0xB202C	
0x3C	0x10000	
0x3A	0x000A0 // HG2-1	
0x3B	0xAB064	
0x3C	0x04000	
//0x3A	0x00420 //HG2	
//0x3B	0xA3064	
//0x3C	0x10000	
0x3A	0x000d8 //MG1-2	
0x3B	0xA3070	
0x3C	0x04000	
0x3A	0x00468 //MG1-3	
0x3B	0x9B870	
0x3C	0x10000	
0x3A	0x00098 //LG0-3	
0x3B	0x92085	
0x3C	0xE4000	
0x3A	0x00418 //LG0-2	
0x3B	0x8A080	
0x3C	0xf0000	
0x3A	0x00418 //LG1	
0x3B	0x82080	
0x3C	0x10000	


// Table_5G_TXAGC_S0   		
0xEF	0x01100  	
//TX AGC 5GH           		
0x34	0x4A0B2	
0x34	0x490AF	
0x34	0x48070	
0x34	0x4706D	
0x34	0x46050	
0x34	0x4504D	
0x34	0x4404A	
0x34	0x43047	
0x34	0x4200A	
0x34	0x41007	
0x34	0x40004	
//TX AGC 5GM		
0x34	0x2A0B2	
0x34	0x290AF	
0x34	0x28070	
0x34	0x2706D	
0x34	0x26050	
0x34	0x2504D	
0x34	0x2404A	
0x34	0x23047	
0x34	0x2200A	
0x34	0x21007	
0x34	0x20004	
//TX AGC 5GL		
0x34	0x0A0B2	
0x34	0x090AF	
0x34	0x08070	
0x34	0x0706D	
0x34	0x06050	
0x34	0x0504D	
0x34	0x0404A	
0x34	0x03047	
0x34	0x0200A	
0x34	0x01007	
0x34	0x00004	
0xEF	0x00000	

//Table_5G_Bias_I_S0		
0x18	0x1712A	
0xEF	0x00040	
0x35	0x001D4	
0x35	0x081D4	
0x35	0x101D4	
0x35	0x201B4	
0x35	0x281B4	
0x35	0x301B4	
0x35	0x401B4	
0x35	0x481B4	
0x35	0x501B4	
0xEF	0x00000 	

//Table_5G_Bias_II_S0		
0x18	0x1712A	
0xEF	0x00010	
0x36	0x04BFB	
0x36	0x0CBFB	
0x36	0x14BFB	
0x36	0x1CBFB	
0x36	0x24F4B	
0x36	0x2CF4B	
0x36	0x34F4B	
0x36	0x3CF4B	
0x36	0x44F4B	
0x36	0x4CF4B	
0x36	0x54F4B	
0x36	0x5CF4B	
0xEF	0x00000 	

//Table_5G_Tank_S0		
0xEF	0x00008	
0x3C	0x002CC	
0x3C	0x00522	
0x3C	0x00902	
0xEF	0x00000	

//Table_LOK_S0		
0x18	0x1712A	
0xEF	0x00002	
//0x08	0xB4000	
//0xEF	0x00000	

0xDF	0x00080 //0x00FC0	
0x1F	0x00064 //RC BW for 80M   	

0x61	0xFDD43	
0x62	0x38F4B	
0x63	0x32117	
0x64	0x194AC	
0x65	0x931D1	

//LOK		
0x08	0x08400 //write 5G LOK table default value	

//RCK		
0x1C	0x739D2 // 0x1c[1]=1	

//LCK		
0xB4	0x1E78D	
0x18	0x1F12A //set ch42; do LCK	
0xfe
0xfe
0xfe
0xfe
0xB4	0x1A78D	
0x18	0x1712A //set channel again	

0xffff 0xffff