| lh | 9ed821d | 2023-04-07 01:36:19 -0700 | [diff] [blame] | 1 | /* | 
 | 2 |  *	linux/drivers/video/bt431.h | 
 | 3 |  * | 
 | 4 |  *	Copyright 2003  Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de> | 
 | 5 |  * | 
 | 6 |  *	This file is subject to the terms and conditions of the GNU General | 
 | 7 |  *	Public License. See the file COPYING in the main directory of this | 
 | 8 |  *	archive for more details. | 
 | 9 |  */ | 
 | 10 | #include <linux/types.h> | 
 | 11 |  | 
 | 12 | /* | 
 | 13 |  * Bt431 cursor generator registers, 32-bit aligned. | 
 | 14 |  * Two twin Bt431 are used on the DECstation's PMAG-AA. | 
 | 15 |  */ | 
 | 16 | struct bt431_regs { | 
 | 17 | 	volatile u16 addr_lo; | 
 | 18 | 	u16 pad0; | 
 | 19 | 	volatile u16 addr_hi; | 
 | 20 | 	u16 pad1; | 
 | 21 | 	volatile u16 addr_cmap; | 
 | 22 | 	u16 pad2; | 
 | 23 | 	volatile u16 addr_reg; | 
 | 24 | 	u16 pad3; | 
 | 25 | }; | 
 | 26 |  | 
 | 27 | static inline u16 bt431_set_value(u8 val) | 
 | 28 | { | 
 | 29 | 	return ((val << 8) | (val & 0xff)) & 0xffff; | 
 | 30 | } | 
 | 31 |  | 
 | 32 | static inline u8 bt431_get_value(u16 val) | 
 | 33 | { | 
 | 34 | 	return val & 0xff; | 
 | 35 | } | 
 | 36 |  | 
 | 37 | /* | 
 | 38 |  * Additional registers addressed indirectly. | 
 | 39 |  */ | 
 | 40 | #define BT431_REG_CMD		0x0000 | 
 | 41 | #define BT431_REG_CXLO		0x0001 | 
 | 42 | #define BT431_REG_CXHI		0x0002 | 
 | 43 | #define BT431_REG_CYLO		0x0003 | 
 | 44 | #define BT431_REG_CYHI		0x0004 | 
 | 45 | #define BT431_REG_WXLO		0x0005 | 
 | 46 | #define BT431_REG_WXHI		0x0006 | 
 | 47 | #define BT431_REG_WYLO		0x0007 | 
 | 48 | #define BT431_REG_WYHI		0x0008 | 
 | 49 | #define BT431_REG_WWLO		0x0009 | 
 | 50 | #define BT431_REG_WWHI		0x000a | 
 | 51 | #define BT431_REG_WHLO		0x000b | 
 | 52 | #define BT431_REG_WHHI		0x000c | 
 | 53 |  | 
 | 54 | #define BT431_REG_CRAM_BASE	0x0000 | 
 | 55 | #define BT431_REG_CRAM_END	0x01ff | 
 | 56 |  | 
 | 57 | /* | 
 | 58 |  * Command register. | 
 | 59 |  */ | 
 | 60 | #define BT431_CMD_CURS_ENABLE	0x40 | 
 | 61 | #define BT431_CMD_XHAIR_ENABLE	0x20 | 
 | 62 | #define BT431_CMD_OR_CURSORS	0x10 | 
 | 63 | #define BT431_CMD_AND_CURSORS	0x00 | 
 | 64 | #define BT431_CMD_1_1_MUX	0x00 | 
 | 65 | #define BT431_CMD_4_1_MUX	0x04 | 
 | 66 | #define BT431_CMD_5_1_MUX	0x08 | 
 | 67 | #define BT431_CMD_xxx_MUX	0x0c | 
 | 68 | #define BT431_CMD_THICK_1	0x00 | 
 | 69 | #define BT431_CMD_THICK_3	0x01 | 
 | 70 | #define BT431_CMD_THICK_5	0x02 | 
 | 71 | #define BT431_CMD_THICK_7	0x03 | 
 | 72 |  | 
 | 73 | static inline void bt431_select_reg(struct bt431_regs *regs, int ir) | 
 | 74 | { | 
 | 75 | 	/* | 
 | 76 | 	 * The compiler splits the write in two bytes without these | 
 | 77 | 	 * helper variables. | 
 | 78 | 	 */ | 
 | 79 | 	volatile u16 *lo = &(regs->addr_lo); | 
 | 80 | 	volatile u16 *hi = &(regs->addr_hi); | 
 | 81 |  | 
 | 82 | 	mb(); | 
 | 83 | 	*lo = bt431_set_value(ir & 0xff); | 
 | 84 | 	wmb(); | 
 | 85 | 	*hi = bt431_set_value((ir >> 8) & 0xff); | 
 | 86 | } | 
 | 87 |  | 
 | 88 | /* Autoincrement read/write. */ | 
 | 89 | static inline u8 bt431_read_reg_inc(struct bt431_regs *regs) | 
 | 90 | { | 
 | 91 | 	/* | 
 | 92 | 	 * The compiler splits the write in two bytes without the | 
 | 93 | 	 * helper variable. | 
 | 94 | 	 */ | 
 | 95 | 	volatile u16 *r = &(regs->addr_reg); | 
 | 96 |  | 
 | 97 | 	mb(); | 
 | 98 | 	return bt431_get_value(*r); | 
 | 99 | } | 
 | 100 |  | 
 | 101 | static inline void bt431_write_reg_inc(struct bt431_regs *regs, u8 value) | 
 | 102 | { | 
 | 103 | 	/* | 
 | 104 | 	 * The compiler splits the write in two bytes without the | 
 | 105 | 	 * helper variable. | 
 | 106 | 	 */ | 
 | 107 | 	volatile u16 *r = &(regs->addr_reg); | 
 | 108 |  | 
 | 109 | 	mb(); | 
 | 110 | 	*r = bt431_set_value(value); | 
 | 111 | } | 
 | 112 |  | 
 | 113 | static inline u8 bt431_read_reg(struct bt431_regs *regs, int ir) | 
 | 114 | { | 
 | 115 | 	bt431_select_reg(regs, ir); | 
 | 116 | 	return bt431_read_reg_inc(regs); | 
 | 117 | } | 
 | 118 |  | 
 | 119 | static inline void bt431_write_reg(struct bt431_regs *regs, int ir, u8 value) | 
 | 120 | { | 
 | 121 | 	bt431_select_reg(regs, ir); | 
 | 122 | 	bt431_write_reg_inc(regs, value); | 
 | 123 | } | 
 | 124 |  | 
 | 125 | /* Autoincremented read/write for the cursor map. */ | 
 | 126 | static inline u16 bt431_read_cmap_inc(struct bt431_regs *regs) | 
 | 127 | { | 
 | 128 | 	/* | 
 | 129 | 	 * The compiler splits the write in two bytes without the | 
 | 130 | 	 * helper variable. | 
 | 131 | 	 */ | 
 | 132 | 	volatile u16 *r = &(regs->addr_cmap); | 
 | 133 |  | 
 | 134 | 	mb(); | 
 | 135 | 	return *r; | 
 | 136 | } | 
 | 137 |  | 
 | 138 | static inline void bt431_write_cmap_inc(struct bt431_regs *regs, u16 value) | 
 | 139 | { | 
 | 140 | 	/* | 
 | 141 | 	 * The compiler splits the write in two bytes without the | 
 | 142 | 	 * helper variable. | 
 | 143 | 	 */ | 
 | 144 | 	volatile u16 *r = &(regs->addr_cmap); | 
 | 145 |  | 
 | 146 | 	mb(); | 
 | 147 | 	*r = value; | 
 | 148 | } | 
 | 149 |  | 
 | 150 | static inline u16 bt431_read_cmap(struct bt431_regs *regs, int cr) | 
 | 151 | { | 
 | 152 | 	bt431_select_reg(regs, cr); | 
 | 153 | 	return bt431_read_cmap_inc(regs); | 
 | 154 | } | 
 | 155 |  | 
 | 156 | static inline void bt431_write_cmap(struct bt431_regs *regs, int cr, u16 value) | 
 | 157 | { | 
 | 158 | 	bt431_select_reg(regs, cr); | 
 | 159 | 	bt431_write_cmap_inc(regs, value); | 
 | 160 | } | 
 | 161 |  | 
 | 162 | static inline void bt431_enable_cursor(struct bt431_regs *regs) | 
 | 163 | { | 
 | 164 | 	bt431_write_reg(regs, BT431_REG_CMD, | 
 | 165 | 			BT431_CMD_CURS_ENABLE | BT431_CMD_OR_CURSORS | 
 | 166 | 			| BT431_CMD_4_1_MUX | BT431_CMD_THICK_1); | 
 | 167 | } | 
 | 168 |  | 
 | 169 | static inline void bt431_erase_cursor(struct bt431_regs *regs) | 
 | 170 | { | 
 | 171 | 	bt431_write_reg(regs, BT431_REG_CMD, BT431_CMD_4_1_MUX); | 
 | 172 | } | 
 | 173 |  | 
 | 174 | static inline void bt431_position_cursor(struct bt431_regs *regs, u16 x, u16 y) | 
 | 175 | { | 
 | 176 | 	/* | 
 | 177 | 	 * Magic from the MACH sources. | 
 | 178 | 	 * | 
 | 179 | 	 * Cx = x + D + H - P | 
 | 180 | 	 *  P = 37 if 1:1, 52 if 4:1, 57 if 5:1 | 
 | 181 | 	 *  D = pixel skew between outdata and external data | 
 | 182 | 	 *  H = pixels between HSYNCH falling and active video | 
 | 183 | 	 * | 
 | 184 | 	 * Cy = y + V - 32 | 
 | 185 | 	 *  V = scanlines between HSYNCH falling, two or more | 
 | 186 | 	 *      clocks after VSYNCH falling, and active video | 
 | 187 | 	 */ | 
 | 188 | 	x += 412 - 52; | 
 | 189 | 	y += 68 - 32; | 
 | 190 |  | 
 | 191 | 	/* Use autoincrement. */ | 
 | 192 | 	bt431_select_reg(regs, BT431_REG_CXLO); | 
 | 193 | 	bt431_write_reg_inc(regs, x & 0xff); /* BT431_REG_CXLO */ | 
 | 194 | 	bt431_write_reg_inc(regs, (x >> 8) & 0x0f); /* BT431_REG_CXHI */ | 
 | 195 | 	bt431_write_reg_inc(regs, y & 0xff); /* BT431_REG_CYLO */ | 
 | 196 | 	bt431_write_reg_inc(regs, (y >> 8) & 0x0f); /* BT431_REG_CYHI */ | 
 | 197 | } | 
 | 198 |  | 
 | 199 | static inline void bt431_set_font(struct bt431_regs *regs, u8 fgc, | 
 | 200 | 				  u16 width, u16 height) | 
 | 201 | { | 
 | 202 | 	int i; | 
 | 203 | 	u16 fgp = fgc ? 0xffff : 0x0000; | 
 | 204 | 	u16 bgp = fgc ? 0x0000 : 0xffff; | 
 | 205 |  | 
 | 206 | 	bt431_select_reg(regs, BT431_REG_CRAM_BASE); | 
 | 207 | 	for (i = BT431_REG_CRAM_BASE; i <= BT431_REG_CRAM_END; i++) { | 
 | 208 | 		u16 value; | 
 | 209 |  | 
 | 210 | 		if (height << 6 <= i << 3) | 
 | 211 | 			value = bgp; | 
 | 212 | 		else if (width <= i % 8 << 3) | 
 | 213 | 			value = bgp; | 
 | 214 | 		else if (((width >> 3) & 0xffff) > i % 8) | 
 | 215 | 			value = fgp; | 
 | 216 | 		else | 
 | 217 | 			value = fgp & ~(bgp << (width % 8 << 1)); | 
 | 218 |  | 
 | 219 | 		bt431_write_cmap_inc(regs, value); | 
 | 220 | 	} | 
 | 221 | } | 
 | 222 |  | 
 | 223 | static inline void bt431_init_cursor(struct bt431_regs *regs) | 
 | 224 | { | 
 | 225 | 	/* no crosshair window */ | 
 | 226 | 	bt431_select_reg(regs, BT431_REG_WXLO); | 
 | 227 | 	bt431_write_reg_inc(regs, 0x00); /* BT431_REG_WXLO */ | 
 | 228 | 	bt431_write_reg_inc(regs, 0x00); /* BT431_REG_WXHI */ | 
 | 229 | 	bt431_write_reg_inc(regs, 0x00); /* BT431_REG_WYLO */ | 
 | 230 | 	bt431_write_reg_inc(regs, 0x00); /* BT431_REG_WYHI */ | 
 | 231 | 	bt431_write_reg_inc(regs, 0x00); /* BT431_REG_WWLO */ | 
 | 232 | 	bt431_write_reg_inc(regs, 0x00); /* BT431_REG_WWHI */ | 
 | 233 | 	bt431_write_reg_inc(regs, 0x00); /* BT431_REG_WHLO */ | 
 | 234 | 	bt431_write_reg_inc(regs, 0x00); /* BT431_REG_WHHI */ | 
 | 235 | } |