| lh | 9ed821d | 2023-04-07 01:36:19 -0700 | [diff] [blame] | 1 | /* | 
|  | 2 | *    Disk Array driver for HP Smart Array SAS controllers | 
|  | 3 | *    Copyright 2000, 2009 Hewlett-Packard Development Company, L.P. | 
|  | 4 | * | 
|  | 5 | *    This program is free software; you can redistribute it and/or modify | 
|  | 6 | *    it under the terms of the GNU General Public License as published by | 
|  | 7 | *    the Free Software Foundation; version 2 of the License. | 
|  | 8 | * | 
|  | 9 | *    This program is distributed in the hope that it will be useful, | 
|  | 10 | *    but WITHOUT ANY WARRANTY; without even the implied warranty of | 
|  | 11 | *    MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or | 
|  | 12 | *    NON INFRINGEMENT.  See the GNU General Public License for more details. | 
|  | 13 | * | 
|  | 14 | *    You should have received a copy of the GNU General Public License | 
|  | 15 | *    along with this program; if not, write to the Free Software | 
|  | 16 | *    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | 
|  | 17 | * | 
|  | 18 | *    Questions/Comments/Bugfixes to iss_storagedev@hp.com | 
|  | 19 | * | 
|  | 20 | */ | 
|  | 21 |  | 
|  | 22 | #include <linux/module.h> | 
|  | 23 | #include <linux/interrupt.h> | 
|  | 24 | #include <linux/types.h> | 
|  | 25 | #include <linux/pci.h> | 
|  | 26 | #include <linux/pci-aspm.h> | 
|  | 27 | #include <linux/kernel.h> | 
|  | 28 | #include <linux/slab.h> | 
|  | 29 | #include <linux/delay.h> | 
|  | 30 | #include <linux/fs.h> | 
|  | 31 | #include <linux/timer.h> | 
|  | 32 | #include <linux/seq_file.h> | 
|  | 33 | #include <linux/init.h> | 
|  | 34 | #include <linux/spinlock.h> | 
|  | 35 | #include <linux/compat.h> | 
|  | 36 | #include <linux/blktrace_api.h> | 
|  | 37 | #include <linux/uaccess.h> | 
|  | 38 | #include <linux/io.h> | 
|  | 39 | #include <linux/dma-mapping.h> | 
|  | 40 | #include <linux/completion.h> | 
|  | 41 | #include <linux/moduleparam.h> | 
|  | 42 | #include <scsi/scsi.h> | 
|  | 43 | #include <scsi/scsi_cmnd.h> | 
|  | 44 | #include <scsi/scsi_device.h> | 
|  | 45 | #include <scsi/scsi_host.h> | 
|  | 46 | #include <scsi/scsi_tcq.h> | 
|  | 47 | #include <linux/cciss_ioctl.h> | 
|  | 48 | #include <linux/string.h> | 
|  | 49 | #include <linux/bitmap.h> | 
|  | 50 | #include <linux/atomic.h> | 
|  | 51 | #include <linux/kthread.h> | 
|  | 52 | #include <linux/jiffies.h> | 
|  | 53 | #include "hpsa_cmd.h" | 
|  | 54 | #include "hpsa.h" | 
|  | 55 |  | 
|  | 56 | /* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */ | 
|  | 57 | #define HPSA_DRIVER_VERSION "2.0.2-1" | 
|  | 58 | #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")" | 
|  | 59 | #define HPSA "hpsa" | 
|  | 60 |  | 
|  | 61 | /* How long to wait (in milliseconds) for board to go into simple mode */ | 
|  | 62 | #define MAX_CONFIG_WAIT 30000 | 
|  | 63 | #define MAX_IOCTL_CONFIG_WAIT 1000 | 
|  | 64 |  | 
|  | 65 | /*define how many times we will try a command because of bus resets */ | 
|  | 66 | #define MAX_CMD_RETRIES 3 | 
|  | 67 |  | 
|  | 68 | /* Embedded module documentation macros - see modules.h */ | 
|  | 69 | MODULE_AUTHOR("Hewlett-Packard Company"); | 
|  | 70 | MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \ | 
|  | 71 | HPSA_DRIVER_VERSION); | 
|  | 72 | MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers"); | 
|  | 73 | MODULE_VERSION(HPSA_DRIVER_VERSION); | 
|  | 74 | MODULE_LICENSE("GPL"); | 
|  | 75 |  | 
|  | 76 | static int hpsa_allow_any; | 
|  | 77 | module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR); | 
|  | 78 | MODULE_PARM_DESC(hpsa_allow_any, | 
|  | 79 | "Allow hpsa driver to access unknown HP Smart Array hardware"); | 
|  | 80 | static int hpsa_simple_mode; | 
|  | 81 | module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR); | 
|  | 82 | MODULE_PARM_DESC(hpsa_simple_mode, | 
|  | 83 | "Use 'simple mode' rather than 'performant mode'"); | 
|  | 84 |  | 
|  | 85 | /* define the PCI info for the cards we can control */ | 
|  | 86 | static const struct pci_device_id hpsa_pci_device_id[] = { | 
|  | 87 | {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3241}, | 
|  | 88 | {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3243}, | 
|  | 89 | {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3245}, | 
|  | 90 | {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3247}, | 
|  | 91 | {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3249}, | 
|  | 92 | {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x324a}, | 
|  | 93 | {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x324b}, | 
|  | 94 | {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3233}, | 
|  | 95 | {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3350}, | 
|  | 96 | {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3351}, | 
|  | 97 | {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3352}, | 
|  | 98 | {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3353}, | 
|  | 99 | {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3354}, | 
|  | 100 | {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3355}, | 
|  | 101 | {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3356}, | 
|  | 102 | {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1920}, | 
|  | 103 | {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1921}, | 
|  | 104 | {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1922}, | 
|  | 105 | {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1923}, | 
|  | 106 | {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1924}, | 
|  | 107 | {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1925}, | 
|  | 108 | {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1926}, | 
|  | 109 | {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1928}, | 
|  | 110 | {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x334d}, | 
|  | 111 | {PCI_VENDOR_ID_HP,     PCI_ANY_ID,	PCI_ANY_ID, PCI_ANY_ID, | 
|  | 112 | PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0}, | 
|  | 113 | {0,} | 
|  | 114 | }; | 
|  | 115 |  | 
|  | 116 | MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id); | 
|  | 117 |  | 
|  | 118 | /*  board_id = Subsystem Device ID & Vendor ID | 
|  | 119 | *  product = Marketing Name for the board | 
|  | 120 | *  access = Address of the struct of function pointers | 
|  | 121 | */ | 
|  | 122 | static struct board_type products[] = { | 
|  | 123 | {0x3241103C, "Smart Array P212", &SA5_access}, | 
|  | 124 | {0x3243103C, "Smart Array P410", &SA5_access}, | 
|  | 125 | {0x3245103C, "Smart Array P410i", &SA5_access}, | 
|  | 126 | {0x3247103C, "Smart Array P411", &SA5_access}, | 
|  | 127 | {0x3249103C, "Smart Array P812", &SA5_access}, | 
|  | 128 | {0x324a103C, "Smart Array P712m", &SA5_access}, | 
|  | 129 | {0x324b103C, "Smart Array P711m", &SA5_access}, | 
|  | 130 | {0x3350103C, "Smart Array P222", &SA5_access}, | 
|  | 131 | {0x3351103C, "Smart Array P420", &SA5_access}, | 
|  | 132 | {0x3352103C, "Smart Array P421", &SA5_access}, | 
|  | 133 | {0x3353103C, "Smart Array P822", &SA5_access}, | 
|  | 134 | {0x3354103C, "Smart Array P420i", &SA5_access}, | 
|  | 135 | {0x3355103C, "Smart Array P220i", &SA5_access}, | 
|  | 136 | {0x3356103C, "Smart Array P721m", &SA5_access}, | 
|  | 137 | {0x1920103C, "Smart Array", &SA5_access}, | 
|  | 138 | {0x1921103C, "Smart Array", &SA5_access}, | 
|  | 139 | {0x1922103C, "Smart Array", &SA5_access}, | 
|  | 140 | {0x1923103C, "Smart Array", &SA5_access}, | 
|  | 141 | {0x1924103C, "Smart Array", &SA5_access}, | 
|  | 142 | {0x1925103C, "Smart Array", &SA5_access}, | 
|  | 143 | {0x1926103C, "Smart Array", &SA5_access}, | 
|  | 144 | {0x1928103C, "Smart Array", &SA5_access}, | 
|  | 145 | {0x334d103C, "Smart Array P822se", &SA5_access}, | 
|  | 146 | {0xFFFF103C, "Unknown Smart Array", &SA5_access}, | 
|  | 147 | }; | 
|  | 148 |  | 
|  | 149 | static int number_of_controllers; | 
|  | 150 |  | 
|  | 151 | static struct list_head hpsa_ctlr_list = LIST_HEAD_INIT(hpsa_ctlr_list); | 
|  | 152 | static spinlock_t lockup_detector_lock; | 
|  | 153 | static struct task_struct *hpsa_lockup_detector; | 
|  | 154 |  | 
|  | 155 | static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id); | 
|  | 156 | static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id); | 
|  | 157 | static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg); | 
|  | 158 | static void start_io(struct ctlr_info *h); | 
|  | 159 |  | 
|  | 160 | #ifdef CONFIG_COMPAT | 
|  | 161 | static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg); | 
|  | 162 | #endif | 
|  | 163 |  | 
|  | 164 | static void cmd_free(struct ctlr_info *h, struct CommandList *c); | 
|  | 165 | static void cmd_special_free(struct ctlr_info *h, struct CommandList *c); | 
|  | 166 | static struct CommandList *cmd_alloc(struct ctlr_info *h); | 
|  | 167 | static struct CommandList *cmd_special_alloc(struct ctlr_info *h); | 
|  | 168 | static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, | 
|  | 169 | void *buff, size_t size, u8 page_code, unsigned char *scsi3addr, | 
|  | 170 | int cmd_type); | 
|  | 171 |  | 
|  | 172 | static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd); | 
|  | 173 | static void hpsa_scan_start(struct Scsi_Host *); | 
|  | 174 | static int hpsa_scan_finished(struct Scsi_Host *sh, | 
|  | 175 | unsigned long elapsed_time); | 
|  | 176 | static int hpsa_change_queue_depth(struct scsi_device *sdev, | 
|  | 177 | int qdepth, int reason); | 
|  | 178 |  | 
|  | 179 | static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd); | 
|  | 180 | static int hpsa_slave_alloc(struct scsi_device *sdev); | 
|  | 181 | static void hpsa_slave_destroy(struct scsi_device *sdev); | 
|  | 182 |  | 
|  | 183 | static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno); | 
|  | 184 | static int check_for_unit_attention(struct ctlr_info *h, | 
|  | 185 | struct CommandList *c); | 
|  | 186 | static void check_ioctl_unit_attention(struct ctlr_info *h, | 
|  | 187 | struct CommandList *c); | 
|  | 188 | /* performant mode helper functions */ | 
|  | 189 | static void calc_bucket_map(int *bucket, int num_buckets, | 
|  | 190 | int nsgs, int *bucket_map); | 
|  | 191 | static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h); | 
|  | 192 | static inline u32 next_command(struct ctlr_info *h); | 
|  | 193 | static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev, | 
|  | 194 | void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index, | 
|  | 195 | u64 *cfg_offset); | 
|  | 196 | static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev, | 
|  | 197 | unsigned long *memory_bar); | 
|  | 198 | static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id); | 
|  | 199 | static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev, | 
|  | 200 | void __iomem *vaddr, int wait_for_ready); | 
|  | 201 | #define BOARD_NOT_READY 0 | 
|  | 202 | #define BOARD_READY 1 | 
|  | 203 |  | 
|  | 204 | static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev) | 
|  | 205 | { | 
|  | 206 | unsigned long *priv = shost_priv(sdev->host); | 
|  | 207 | return (struct ctlr_info *) *priv; | 
|  | 208 | } | 
|  | 209 |  | 
|  | 210 | static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh) | 
|  | 211 | { | 
|  | 212 | unsigned long *priv = shost_priv(sh); | 
|  | 213 | return (struct ctlr_info *) *priv; | 
|  | 214 | } | 
|  | 215 |  | 
|  | 216 | static int check_for_unit_attention(struct ctlr_info *h, | 
|  | 217 | struct CommandList *c) | 
|  | 218 | { | 
|  | 219 | if (c->err_info->SenseInfo[2] != UNIT_ATTENTION) | 
|  | 220 | return 0; | 
|  | 221 |  | 
|  | 222 | switch (c->err_info->SenseInfo[12]) { | 
|  | 223 | case STATE_CHANGED: | 
|  | 224 | dev_warn(&h->pdev->dev, HPSA "%d: a state change " | 
|  | 225 | "detected, command retried\n", h->ctlr); | 
|  | 226 | break; | 
|  | 227 | case LUN_FAILED: | 
|  | 228 | dev_warn(&h->pdev->dev, HPSA "%d: LUN failure " | 
|  | 229 | "detected, action required\n", h->ctlr); | 
|  | 230 | break; | 
|  | 231 | case REPORT_LUNS_CHANGED: | 
|  | 232 | dev_warn(&h->pdev->dev, HPSA "%d: report LUN data " | 
|  | 233 | "changed, action required\n", h->ctlr); | 
|  | 234 | /* | 
|  | 235 | * Note: this REPORT_LUNS_CHANGED condition only occurs on the external | 
|  | 236 | * target (array) devices. | 
|  | 237 | */ | 
|  | 238 | break; | 
|  | 239 | case POWER_OR_RESET: | 
|  | 240 | dev_warn(&h->pdev->dev, HPSA "%d: a power on " | 
|  | 241 | "or device reset detected\n", h->ctlr); | 
|  | 242 | break; | 
|  | 243 | case UNIT_ATTENTION_CLEARED: | 
|  | 244 | dev_warn(&h->pdev->dev, HPSA "%d: unit attention " | 
|  | 245 | "cleared by another initiator\n", h->ctlr); | 
|  | 246 | break; | 
|  | 247 | default: | 
|  | 248 | dev_warn(&h->pdev->dev, HPSA "%d: unknown " | 
|  | 249 | "unit attention detected\n", h->ctlr); | 
|  | 250 | break; | 
|  | 251 | } | 
|  | 252 | return 1; | 
|  | 253 | } | 
|  | 254 |  | 
|  | 255 | static ssize_t host_store_rescan(struct device *dev, | 
|  | 256 | struct device_attribute *attr, | 
|  | 257 | const char *buf, size_t count) | 
|  | 258 | { | 
|  | 259 | struct ctlr_info *h; | 
|  | 260 | struct Scsi_Host *shost = class_to_shost(dev); | 
|  | 261 | h = shost_to_hba(shost); | 
|  | 262 | hpsa_scan_start(h->scsi_host); | 
|  | 263 | return count; | 
|  | 264 | } | 
|  | 265 |  | 
|  | 266 | static ssize_t host_show_firmware_revision(struct device *dev, | 
|  | 267 | struct device_attribute *attr, char *buf) | 
|  | 268 | { | 
|  | 269 | struct ctlr_info *h; | 
|  | 270 | struct Scsi_Host *shost = class_to_shost(dev); | 
|  | 271 | unsigned char *fwrev; | 
|  | 272 |  | 
|  | 273 | h = shost_to_hba(shost); | 
|  | 274 | if (!h->hba_inquiry_data) | 
|  | 275 | return 0; | 
|  | 276 | fwrev = &h->hba_inquiry_data[32]; | 
|  | 277 | return snprintf(buf, 20, "%c%c%c%c\n", | 
|  | 278 | fwrev[0], fwrev[1], fwrev[2], fwrev[3]); | 
|  | 279 | } | 
|  | 280 |  | 
|  | 281 | static ssize_t host_show_commands_outstanding(struct device *dev, | 
|  | 282 | struct device_attribute *attr, char *buf) | 
|  | 283 | { | 
|  | 284 | struct Scsi_Host *shost = class_to_shost(dev); | 
|  | 285 | struct ctlr_info *h = shost_to_hba(shost); | 
|  | 286 |  | 
|  | 287 | return snprintf(buf, 20, "%d\n", h->commands_outstanding); | 
|  | 288 | } | 
|  | 289 |  | 
|  | 290 | static ssize_t host_show_transport_mode(struct device *dev, | 
|  | 291 | struct device_attribute *attr, char *buf) | 
|  | 292 | { | 
|  | 293 | struct ctlr_info *h; | 
|  | 294 | struct Scsi_Host *shost = class_to_shost(dev); | 
|  | 295 |  | 
|  | 296 | h = shost_to_hba(shost); | 
|  | 297 | return snprintf(buf, 20, "%s\n", | 
|  | 298 | h->transMethod & CFGTBL_Trans_Performant ? | 
|  | 299 | "performant" : "simple"); | 
|  | 300 | } | 
|  | 301 |  | 
|  | 302 | /* List of controllers which cannot be hard reset on kexec with reset_devices */ | 
|  | 303 | static u32 unresettable_controller[] = { | 
|  | 304 | 0x324a103C, /* Smart Array P712m */ | 
|  | 305 | 0x324b103C, /* SmartArray P711m */ | 
|  | 306 | 0x3223103C, /* Smart Array P800 */ | 
|  | 307 | 0x3234103C, /* Smart Array P400 */ | 
|  | 308 | 0x3235103C, /* Smart Array P400i */ | 
|  | 309 | 0x3211103C, /* Smart Array E200i */ | 
|  | 310 | 0x3212103C, /* Smart Array E200 */ | 
|  | 311 | 0x3213103C, /* Smart Array E200i */ | 
|  | 312 | 0x3214103C, /* Smart Array E200i */ | 
|  | 313 | 0x3215103C, /* Smart Array E200i */ | 
|  | 314 | 0x3237103C, /* Smart Array E500 */ | 
|  | 315 | 0x323D103C, /* Smart Array P700m */ | 
|  | 316 | 0x40800E11, /* Smart Array 5i */ | 
|  | 317 | 0x409C0E11, /* Smart Array 6400 */ | 
|  | 318 | 0x409D0E11, /* Smart Array 6400 EM */ | 
|  | 319 | 0x40700E11, /* Smart Array 5300 */ | 
|  | 320 | 0x40820E11, /* Smart Array 532 */ | 
|  | 321 | 0x40830E11, /* Smart Array 5312 */ | 
|  | 322 | 0x409A0E11, /* Smart Array 641 */ | 
|  | 323 | 0x409B0E11, /* Smart Array 642 */ | 
|  | 324 | 0x40910E11, /* Smart Array 6i */ | 
|  | 325 | }; | 
|  | 326 |  | 
|  | 327 | /* List of controllers which cannot even be soft reset */ | 
|  | 328 | static u32 soft_unresettable_controller[] = { | 
|  | 329 | 0x40800E11, /* Smart Array 5i */ | 
|  | 330 | 0x40700E11, /* Smart Array 5300 */ | 
|  | 331 | 0x40820E11, /* Smart Array 532 */ | 
|  | 332 | 0x40830E11, /* Smart Array 5312 */ | 
|  | 333 | 0x409A0E11, /* Smart Array 641 */ | 
|  | 334 | 0x409B0E11, /* Smart Array 642 */ | 
|  | 335 | 0x40910E11, /* Smart Array 6i */ | 
|  | 336 | /* Exclude 640x boards.  These are two pci devices in one slot | 
|  | 337 | * which share a battery backed cache module.  One controls the | 
|  | 338 | * cache, the other accesses the cache through the one that controls | 
|  | 339 | * it.  If we reset the one controlling the cache, the other will | 
|  | 340 | * likely not be happy.  Just forbid resetting this conjoined mess. | 
|  | 341 | * The 640x isn't really supported by hpsa anyway. | 
|  | 342 | */ | 
|  | 343 | 0x409C0E11, /* Smart Array 6400 */ | 
|  | 344 | 0x409D0E11, /* Smart Array 6400 EM */ | 
|  | 345 | }; | 
|  | 346 |  | 
|  | 347 | static int ctlr_is_hard_resettable(u32 board_id) | 
|  | 348 | { | 
|  | 349 | int i; | 
|  | 350 |  | 
|  | 351 | for (i = 0; i < ARRAY_SIZE(unresettable_controller); i++) | 
|  | 352 | if (unresettable_controller[i] == board_id) | 
|  | 353 | return 0; | 
|  | 354 | return 1; | 
|  | 355 | } | 
|  | 356 |  | 
|  | 357 | static int ctlr_is_soft_resettable(u32 board_id) | 
|  | 358 | { | 
|  | 359 | int i; | 
|  | 360 |  | 
|  | 361 | for (i = 0; i < ARRAY_SIZE(soft_unresettable_controller); i++) | 
|  | 362 | if (soft_unresettable_controller[i] == board_id) | 
|  | 363 | return 0; | 
|  | 364 | return 1; | 
|  | 365 | } | 
|  | 366 |  | 
|  | 367 | static int ctlr_is_resettable(u32 board_id) | 
|  | 368 | { | 
|  | 369 | return ctlr_is_hard_resettable(board_id) || | 
|  | 370 | ctlr_is_soft_resettable(board_id); | 
|  | 371 | } | 
|  | 372 |  | 
|  | 373 | static ssize_t host_show_resettable(struct device *dev, | 
|  | 374 | struct device_attribute *attr, char *buf) | 
|  | 375 | { | 
|  | 376 | struct ctlr_info *h; | 
|  | 377 | struct Scsi_Host *shost = class_to_shost(dev); | 
|  | 378 |  | 
|  | 379 | h = shost_to_hba(shost); | 
|  | 380 | return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id)); | 
|  | 381 | } | 
|  | 382 |  | 
|  | 383 | static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[]) | 
|  | 384 | { | 
|  | 385 | return (scsi3addr[3] & 0xC0) == 0x40; | 
|  | 386 | } | 
|  | 387 |  | 
|  | 388 | static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG", | 
|  | 389 | "UNKNOWN" | 
|  | 390 | }; | 
|  | 391 | #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1) | 
|  | 392 |  | 
|  | 393 | static ssize_t raid_level_show(struct device *dev, | 
|  | 394 | struct device_attribute *attr, char *buf) | 
|  | 395 | { | 
|  | 396 | ssize_t l = 0; | 
|  | 397 | unsigned char rlevel; | 
|  | 398 | struct ctlr_info *h; | 
|  | 399 | struct scsi_device *sdev; | 
|  | 400 | struct hpsa_scsi_dev_t *hdev; | 
|  | 401 | unsigned long flags; | 
|  | 402 |  | 
|  | 403 | sdev = to_scsi_device(dev); | 
|  | 404 | h = sdev_to_hba(sdev); | 
|  | 405 | spin_lock_irqsave(&h->lock, flags); | 
|  | 406 | hdev = sdev->hostdata; | 
|  | 407 | if (!hdev) { | 
|  | 408 | spin_unlock_irqrestore(&h->lock, flags); | 
|  | 409 | return -ENODEV; | 
|  | 410 | } | 
|  | 411 |  | 
|  | 412 | /* Is this even a logical drive? */ | 
|  | 413 | if (!is_logical_dev_addr_mode(hdev->scsi3addr)) { | 
|  | 414 | spin_unlock_irqrestore(&h->lock, flags); | 
|  | 415 | l = snprintf(buf, PAGE_SIZE, "N/A\n"); | 
|  | 416 | return l; | 
|  | 417 | } | 
|  | 418 |  | 
|  | 419 | rlevel = hdev->raid_level; | 
|  | 420 | spin_unlock_irqrestore(&h->lock, flags); | 
|  | 421 | if (rlevel > RAID_UNKNOWN) | 
|  | 422 | rlevel = RAID_UNKNOWN; | 
|  | 423 | l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]); | 
|  | 424 | return l; | 
|  | 425 | } | 
|  | 426 |  | 
|  | 427 | static ssize_t lunid_show(struct device *dev, | 
|  | 428 | struct device_attribute *attr, char *buf) | 
|  | 429 | { | 
|  | 430 | struct ctlr_info *h; | 
|  | 431 | struct scsi_device *sdev; | 
|  | 432 | struct hpsa_scsi_dev_t *hdev; | 
|  | 433 | unsigned long flags; | 
|  | 434 | unsigned char lunid[8]; | 
|  | 435 |  | 
|  | 436 | sdev = to_scsi_device(dev); | 
|  | 437 | h = sdev_to_hba(sdev); | 
|  | 438 | spin_lock_irqsave(&h->lock, flags); | 
|  | 439 | hdev = sdev->hostdata; | 
|  | 440 | if (!hdev) { | 
|  | 441 | spin_unlock_irqrestore(&h->lock, flags); | 
|  | 442 | return -ENODEV; | 
|  | 443 | } | 
|  | 444 | memcpy(lunid, hdev->scsi3addr, sizeof(lunid)); | 
|  | 445 | spin_unlock_irqrestore(&h->lock, flags); | 
|  | 446 | return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n", | 
|  | 447 | lunid[0], lunid[1], lunid[2], lunid[3], | 
|  | 448 | lunid[4], lunid[5], lunid[6], lunid[7]); | 
|  | 449 | } | 
|  | 450 |  | 
|  | 451 | static ssize_t unique_id_show(struct device *dev, | 
|  | 452 | struct device_attribute *attr, char *buf) | 
|  | 453 | { | 
|  | 454 | struct ctlr_info *h; | 
|  | 455 | struct scsi_device *sdev; | 
|  | 456 | struct hpsa_scsi_dev_t *hdev; | 
|  | 457 | unsigned long flags; | 
|  | 458 | unsigned char sn[16]; | 
|  | 459 |  | 
|  | 460 | sdev = to_scsi_device(dev); | 
|  | 461 | h = sdev_to_hba(sdev); | 
|  | 462 | spin_lock_irqsave(&h->lock, flags); | 
|  | 463 | hdev = sdev->hostdata; | 
|  | 464 | if (!hdev) { | 
|  | 465 | spin_unlock_irqrestore(&h->lock, flags); | 
|  | 466 | return -ENODEV; | 
|  | 467 | } | 
|  | 468 | memcpy(sn, hdev->device_id, sizeof(sn)); | 
|  | 469 | spin_unlock_irqrestore(&h->lock, flags); | 
|  | 470 | return snprintf(buf, 16 * 2 + 2, | 
|  | 471 | "%02X%02X%02X%02X%02X%02X%02X%02X" | 
|  | 472 | "%02X%02X%02X%02X%02X%02X%02X%02X\n", | 
|  | 473 | sn[0], sn[1], sn[2], sn[3], | 
|  | 474 | sn[4], sn[5], sn[6], sn[7], | 
|  | 475 | sn[8], sn[9], sn[10], sn[11], | 
|  | 476 | sn[12], sn[13], sn[14], sn[15]); | 
|  | 477 | } | 
|  | 478 |  | 
|  | 479 | static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL); | 
|  | 480 | static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL); | 
|  | 481 | static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL); | 
|  | 482 | static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan); | 
|  | 483 | static DEVICE_ATTR(firmware_revision, S_IRUGO, | 
|  | 484 | host_show_firmware_revision, NULL); | 
|  | 485 | static DEVICE_ATTR(commands_outstanding, S_IRUGO, | 
|  | 486 | host_show_commands_outstanding, NULL); | 
|  | 487 | static DEVICE_ATTR(transport_mode, S_IRUGO, | 
|  | 488 | host_show_transport_mode, NULL); | 
|  | 489 | static DEVICE_ATTR(resettable, S_IRUGO, | 
|  | 490 | host_show_resettable, NULL); | 
|  | 491 |  | 
|  | 492 | static struct device_attribute *hpsa_sdev_attrs[] = { | 
|  | 493 | &dev_attr_raid_level, | 
|  | 494 | &dev_attr_lunid, | 
|  | 495 | &dev_attr_unique_id, | 
|  | 496 | NULL, | 
|  | 497 | }; | 
|  | 498 |  | 
|  | 499 | static struct device_attribute *hpsa_shost_attrs[] = { | 
|  | 500 | &dev_attr_rescan, | 
|  | 501 | &dev_attr_firmware_revision, | 
|  | 502 | &dev_attr_commands_outstanding, | 
|  | 503 | &dev_attr_transport_mode, | 
|  | 504 | &dev_attr_resettable, | 
|  | 505 | NULL, | 
|  | 506 | }; | 
|  | 507 |  | 
|  | 508 | static struct scsi_host_template hpsa_driver_template = { | 
|  | 509 | .module			= THIS_MODULE, | 
|  | 510 | .name			= HPSA, | 
|  | 511 | .proc_name		= HPSA, | 
|  | 512 | .queuecommand		= hpsa_scsi_queue_command, | 
|  | 513 | .scan_start		= hpsa_scan_start, | 
|  | 514 | .scan_finished		= hpsa_scan_finished, | 
|  | 515 | .change_queue_depth	= hpsa_change_queue_depth, | 
|  | 516 | .this_id		= -1, | 
|  | 517 | .use_clustering		= ENABLE_CLUSTERING, | 
|  | 518 | .eh_device_reset_handler = hpsa_eh_device_reset_handler, | 
|  | 519 | .ioctl			= hpsa_ioctl, | 
|  | 520 | .slave_alloc		= hpsa_slave_alloc, | 
|  | 521 | .slave_destroy		= hpsa_slave_destroy, | 
|  | 522 | #ifdef CONFIG_COMPAT | 
|  | 523 | .compat_ioctl		= hpsa_compat_ioctl, | 
|  | 524 | #endif | 
|  | 525 | .sdev_attrs = hpsa_sdev_attrs, | 
|  | 526 | .shost_attrs = hpsa_shost_attrs, | 
|  | 527 | .max_sectors = 8192, | 
|  | 528 | }; | 
|  | 529 |  | 
|  | 530 |  | 
|  | 531 | /* Enqueuing and dequeuing functions for cmdlists. */ | 
|  | 532 | static inline void addQ(struct list_head *list, struct CommandList *c) | 
|  | 533 | { | 
|  | 534 | list_add_tail(&c->list, list); | 
|  | 535 | } | 
|  | 536 |  | 
|  | 537 | static inline u32 next_command(struct ctlr_info *h) | 
|  | 538 | { | 
|  | 539 | u32 a; | 
|  | 540 |  | 
|  | 541 | if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant))) | 
|  | 542 | return h->access.command_completed(h); | 
|  | 543 |  | 
|  | 544 | if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) { | 
|  | 545 | a = *(h->reply_pool_head); /* Next cmd in ring buffer */ | 
|  | 546 | (h->reply_pool_head)++; | 
|  | 547 | h->commands_outstanding--; | 
|  | 548 | } else { | 
|  | 549 | a = FIFO_EMPTY; | 
|  | 550 | } | 
|  | 551 | /* Check for wraparound */ | 
|  | 552 | if (h->reply_pool_head == (h->reply_pool + h->max_commands)) { | 
|  | 553 | h->reply_pool_head = h->reply_pool; | 
|  | 554 | h->reply_pool_wraparound ^= 1; | 
|  | 555 | } | 
|  | 556 | return a; | 
|  | 557 | } | 
|  | 558 |  | 
|  | 559 | /* set_performant_mode: Modify the tag for cciss performant | 
|  | 560 | * set bit 0 for pull model, bits 3-1 for block fetch | 
|  | 561 | * register number | 
|  | 562 | */ | 
|  | 563 | static void set_performant_mode(struct ctlr_info *h, struct CommandList *c) | 
|  | 564 | { | 
|  | 565 | if (likely(h->transMethod & CFGTBL_Trans_Performant)) | 
|  | 566 | c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1); | 
|  | 567 | } | 
|  | 568 |  | 
|  | 569 | static int is_firmware_flash_cmd(u8 *cdb) | 
|  | 570 | { | 
|  | 571 | return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE; | 
|  | 572 | } | 
|  | 573 |  | 
|  | 574 | /* | 
|  | 575 | * During firmware flash, the heartbeat register may not update as frequently | 
|  | 576 | * as it should.  So we dial down lockup detection during firmware flash. and | 
|  | 577 | * dial it back up when firmware flash completes. | 
|  | 578 | */ | 
|  | 579 | #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ) | 
|  | 580 | #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ) | 
|  | 581 | static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h, | 
|  | 582 | struct CommandList *c) | 
|  | 583 | { | 
|  | 584 | if (!is_firmware_flash_cmd(c->Request.CDB)) | 
|  | 585 | return; | 
|  | 586 | atomic_inc(&h->firmware_flash_in_progress); | 
|  | 587 | h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH; | 
|  | 588 | } | 
|  | 589 |  | 
|  | 590 | static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h, | 
|  | 591 | struct CommandList *c) | 
|  | 592 | { | 
|  | 593 | if (is_firmware_flash_cmd(c->Request.CDB) && | 
|  | 594 | atomic_dec_and_test(&h->firmware_flash_in_progress)) | 
|  | 595 | h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL; | 
|  | 596 | } | 
|  | 597 |  | 
|  | 598 | static void enqueue_cmd_and_start_io(struct ctlr_info *h, | 
|  | 599 | struct CommandList *c) | 
|  | 600 | { | 
|  | 601 | unsigned long flags; | 
|  | 602 |  | 
|  | 603 | set_performant_mode(h, c); | 
|  | 604 | dial_down_lockup_detection_during_fw_flash(h, c); | 
|  | 605 | spin_lock_irqsave(&h->lock, flags); | 
|  | 606 | addQ(&h->reqQ, c); | 
|  | 607 | h->Qdepth++; | 
|  | 608 | start_io(h); | 
|  | 609 | spin_unlock_irqrestore(&h->lock, flags); | 
|  | 610 | } | 
|  | 611 |  | 
|  | 612 | static inline void removeQ(struct CommandList *c) | 
|  | 613 | { | 
|  | 614 | if (WARN_ON(list_empty(&c->list))) | 
|  | 615 | return; | 
|  | 616 | list_del_init(&c->list); | 
|  | 617 | } | 
|  | 618 |  | 
|  | 619 | static inline int is_hba_lunid(unsigned char scsi3addr[]) | 
|  | 620 | { | 
|  | 621 | return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0; | 
|  | 622 | } | 
|  | 623 |  | 
|  | 624 | static inline int is_scsi_rev_5(struct ctlr_info *h) | 
|  | 625 | { | 
|  | 626 | if (!h->hba_inquiry_data) | 
|  | 627 | return 0; | 
|  | 628 | if ((h->hba_inquiry_data[2] & 0x07) == 5) | 
|  | 629 | return 1; | 
|  | 630 | return 0; | 
|  | 631 | } | 
|  | 632 |  | 
|  | 633 | static int hpsa_find_target_lun(struct ctlr_info *h, | 
|  | 634 | unsigned char scsi3addr[], int bus, int *target, int *lun) | 
|  | 635 | { | 
|  | 636 | /* finds an unused bus, target, lun for a new physical device | 
|  | 637 | * assumes h->devlock is held | 
|  | 638 | */ | 
|  | 639 | int i, found = 0; | 
|  | 640 | DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES); | 
|  | 641 |  | 
|  | 642 | bitmap_zero(lun_taken, HPSA_MAX_DEVICES); | 
|  | 643 |  | 
|  | 644 | for (i = 0; i < h->ndevices; i++) { | 
|  | 645 | if (h->dev[i]->bus == bus && h->dev[i]->target != -1) | 
|  | 646 | __set_bit(h->dev[i]->target, lun_taken); | 
|  | 647 | } | 
|  | 648 |  | 
|  | 649 | i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES); | 
|  | 650 | if (i < HPSA_MAX_DEVICES) { | 
|  | 651 | /* *bus = 1; */ | 
|  | 652 | *target = i; | 
|  | 653 | *lun = 0; | 
|  | 654 | found = 1; | 
|  | 655 | } | 
|  | 656 | return !found; | 
|  | 657 | } | 
|  | 658 |  | 
|  | 659 | /* Add an entry into h->dev[] array. */ | 
|  | 660 | static int hpsa_scsi_add_entry(struct ctlr_info *h, int hostno, | 
|  | 661 | struct hpsa_scsi_dev_t *device, | 
|  | 662 | struct hpsa_scsi_dev_t *added[], int *nadded) | 
|  | 663 | { | 
|  | 664 | /* assumes h->devlock is held */ | 
|  | 665 | int n = h->ndevices; | 
|  | 666 | int i; | 
|  | 667 | unsigned char addr1[8], addr2[8]; | 
|  | 668 | struct hpsa_scsi_dev_t *sd; | 
|  | 669 |  | 
|  | 670 | if (n >= HPSA_MAX_DEVICES) { | 
|  | 671 | dev_err(&h->pdev->dev, "too many devices, some will be " | 
|  | 672 | "inaccessible.\n"); | 
|  | 673 | return -1; | 
|  | 674 | } | 
|  | 675 |  | 
|  | 676 | /* physical devices do not have lun or target assigned until now. */ | 
|  | 677 | if (device->lun != -1) | 
|  | 678 | /* Logical device, lun is already assigned. */ | 
|  | 679 | goto lun_assigned; | 
|  | 680 |  | 
|  | 681 | /* If this device a non-zero lun of a multi-lun device | 
|  | 682 | * byte 4 of the 8-byte LUN addr will contain the logical | 
|  | 683 | * unit no, zero otherise. | 
|  | 684 | */ | 
|  | 685 | if (device->scsi3addr[4] == 0) { | 
|  | 686 | /* This is not a non-zero lun of a multi-lun device */ | 
|  | 687 | if (hpsa_find_target_lun(h, device->scsi3addr, | 
|  | 688 | device->bus, &device->target, &device->lun) != 0) | 
|  | 689 | return -1; | 
|  | 690 | goto lun_assigned; | 
|  | 691 | } | 
|  | 692 |  | 
|  | 693 | /* This is a non-zero lun of a multi-lun device. | 
|  | 694 | * Search through our list and find the device which | 
|  | 695 | * has the same 8 byte LUN address, excepting byte 4. | 
|  | 696 | * Assign the same bus and target for this new LUN. | 
|  | 697 | * Use the logical unit number from the firmware. | 
|  | 698 | */ | 
|  | 699 | memcpy(addr1, device->scsi3addr, 8); | 
|  | 700 | addr1[4] = 0; | 
|  | 701 | for (i = 0; i < n; i++) { | 
|  | 702 | sd = h->dev[i]; | 
|  | 703 | memcpy(addr2, sd->scsi3addr, 8); | 
|  | 704 | addr2[4] = 0; | 
|  | 705 | /* differ only in byte 4? */ | 
|  | 706 | if (memcmp(addr1, addr2, 8) == 0) { | 
|  | 707 | device->bus = sd->bus; | 
|  | 708 | device->target = sd->target; | 
|  | 709 | device->lun = device->scsi3addr[4]; | 
|  | 710 | break; | 
|  | 711 | } | 
|  | 712 | } | 
|  | 713 | if (device->lun == -1) { | 
|  | 714 | dev_warn(&h->pdev->dev, "physical device with no LUN=0," | 
|  | 715 | " suspect firmware bug or unsupported hardware " | 
|  | 716 | "configuration.\n"); | 
|  | 717 | return -1; | 
|  | 718 | } | 
|  | 719 |  | 
|  | 720 | lun_assigned: | 
|  | 721 |  | 
|  | 722 | h->dev[n] = device; | 
|  | 723 | h->ndevices++; | 
|  | 724 | added[*nadded] = device; | 
|  | 725 | (*nadded)++; | 
|  | 726 |  | 
|  | 727 | /* initially, (before registering with scsi layer) we don't | 
|  | 728 | * know our hostno and we don't want to print anything first | 
|  | 729 | * time anyway (the scsi layer's inquiries will show that info) | 
|  | 730 | */ | 
|  | 731 | /* if (hostno != -1) */ | 
|  | 732 | dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d added.\n", | 
|  | 733 | scsi_device_type(device->devtype), hostno, | 
|  | 734 | device->bus, device->target, device->lun); | 
|  | 735 | return 0; | 
|  | 736 | } | 
|  | 737 |  | 
|  | 738 | /* Update an entry in h->dev[] array. */ | 
|  | 739 | static void hpsa_scsi_update_entry(struct ctlr_info *h, int hostno, | 
|  | 740 | int entry, struct hpsa_scsi_dev_t *new_entry) | 
|  | 741 | { | 
|  | 742 | /* assumes h->devlock is held */ | 
|  | 743 | BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); | 
|  | 744 |  | 
|  | 745 | /* Raid level changed. */ | 
|  | 746 | h->dev[entry]->raid_level = new_entry->raid_level; | 
|  | 747 | dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d updated.\n", | 
|  | 748 | scsi_device_type(new_entry->devtype), hostno, new_entry->bus, | 
|  | 749 | new_entry->target, new_entry->lun); | 
|  | 750 | } | 
|  | 751 |  | 
|  | 752 | /* Replace an entry from h->dev[] array. */ | 
|  | 753 | static void hpsa_scsi_replace_entry(struct ctlr_info *h, int hostno, | 
|  | 754 | int entry, struct hpsa_scsi_dev_t *new_entry, | 
|  | 755 | struct hpsa_scsi_dev_t *added[], int *nadded, | 
|  | 756 | struct hpsa_scsi_dev_t *removed[], int *nremoved) | 
|  | 757 | { | 
|  | 758 | /* assumes h->devlock is held */ | 
|  | 759 | BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); | 
|  | 760 | removed[*nremoved] = h->dev[entry]; | 
|  | 761 | (*nremoved)++; | 
|  | 762 |  | 
|  | 763 | /* | 
|  | 764 | * New physical devices won't have target/lun assigned yet | 
|  | 765 | * so we need to preserve the values in the slot we are replacing. | 
|  | 766 | */ | 
|  | 767 | if (new_entry->target == -1) { | 
|  | 768 | new_entry->target = h->dev[entry]->target; | 
|  | 769 | new_entry->lun = h->dev[entry]->lun; | 
|  | 770 | } | 
|  | 771 |  | 
|  | 772 | h->dev[entry] = new_entry; | 
|  | 773 | added[*nadded] = new_entry; | 
|  | 774 | (*nadded)++; | 
|  | 775 | dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d changed.\n", | 
|  | 776 | scsi_device_type(new_entry->devtype), hostno, new_entry->bus, | 
|  | 777 | new_entry->target, new_entry->lun); | 
|  | 778 | } | 
|  | 779 |  | 
|  | 780 | /* Remove an entry from h->dev[] array. */ | 
|  | 781 | static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry, | 
|  | 782 | struct hpsa_scsi_dev_t *removed[], int *nremoved) | 
|  | 783 | { | 
|  | 784 | /* assumes h->devlock is held */ | 
|  | 785 | int i; | 
|  | 786 | struct hpsa_scsi_dev_t *sd; | 
|  | 787 |  | 
|  | 788 | BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); | 
|  | 789 |  | 
|  | 790 | sd = h->dev[entry]; | 
|  | 791 | removed[*nremoved] = h->dev[entry]; | 
|  | 792 | (*nremoved)++; | 
|  | 793 |  | 
|  | 794 | for (i = entry; i < h->ndevices-1; i++) | 
|  | 795 | h->dev[i] = h->dev[i+1]; | 
|  | 796 | h->ndevices--; | 
|  | 797 | dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d removed.\n", | 
|  | 798 | scsi_device_type(sd->devtype), hostno, sd->bus, sd->target, | 
|  | 799 | sd->lun); | 
|  | 800 | } | 
|  | 801 |  | 
|  | 802 | #define SCSI3ADDR_EQ(a, b) ( \ | 
|  | 803 | (a)[7] == (b)[7] && \ | 
|  | 804 | (a)[6] == (b)[6] && \ | 
|  | 805 | (a)[5] == (b)[5] && \ | 
|  | 806 | (a)[4] == (b)[4] && \ | 
|  | 807 | (a)[3] == (b)[3] && \ | 
|  | 808 | (a)[2] == (b)[2] && \ | 
|  | 809 | (a)[1] == (b)[1] && \ | 
|  | 810 | (a)[0] == (b)[0]) | 
|  | 811 |  | 
|  | 812 | static void fixup_botched_add(struct ctlr_info *h, | 
|  | 813 | struct hpsa_scsi_dev_t *added) | 
|  | 814 | { | 
|  | 815 | /* called when scsi_add_device fails in order to re-adjust | 
|  | 816 | * h->dev[] to match the mid layer's view. | 
|  | 817 | */ | 
|  | 818 | unsigned long flags; | 
|  | 819 | int i, j; | 
|  | 820 |  | 
|  | 821 | spin_lock_irqsave(&h->lock, flags); | 
|  | 822 | for (i = 0; i < h->ndevices; i++) { | 
|  | 823 | if (h->dev[i] == added) { | 
|  | 824 | for (j = i; j < h->ndevices-1; j++) | 
|  | 825 | h->dev[j] = h->dev[j+1]; | 
|  | 826 | h->ndevices--; | 
|  | 827 | break; | 
|  | 828 | } | 
|  | 829 | } | 
|  | 830 | spin_unlock_irqrestore(&h->lock, flags); | 
|  | 831 | kfree(added); | 
|  | 832 | } | 
|  | 833 |  | 
|  | 834 | static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1, | 
|  | 835 | struct hpsa_scsi_dev_t *dev2) | 
|  | 836 | { | 
|  | 837 | /* we compare everything except lun and target as these | 
|  | 838 | * are not yet assigned.  Compare parts likely | 
|  | 839 | * to differ first | 
|  | 840 | */ | 
|  | 841 | if (memcmp(dev1->scsi3addr, dev2->scsi3addr, | 
|  | 842 | sizeof(dev1->scsi3addr)) != 0) | 
|  | 843 | return 0; | 
|  | 844 | if (memcmp(dev1->device_id, dev2->device_id, | 
|  | 845 | sizeof(dev1->device_id)) != 0) | 
|  | 846 | return 0; | 
|  | 847 | if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0) | 
|  | 848 | return 0; | 
|  | 849 | if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0) | 
|  | 850 | return 0; | 
|  | 851 | if (dev1->devtype != dev2->devtype) | 
|  | 852 | return 0; | 
|  | 853 | if (dev1->bus != dev2->bus) | 
|  | 854 | return 0; | 
|  | 855 | return 1; | 
|  | 856 | } | 
|  | 857 |  | 
|  | 858 | static inline int device_updated(struct hpsa_scsi_dev_t *dev1, | 
|  | 859 | struct hpsa_scsi_dev_t *dev2) | 
|  | 860 | { | 
|  | 861 | /* Device attributes that can change, but don't mean | 
|  | 862 | * that the device is a different device, nor that the OS | 
|  | 863 | * needs to be told anything about the change. | 
|  | 864 | */ | 
|  | 865 | if (dev1->raid_level != dev2->raid_level) | 
|  | 866 | return 1; | 
|  | 867 | return 0; | 
|  | 868 | } | 
|  | 869 |  | 
|  | 870 | /* Find needle in haystack.  If exact match found, return DEVICE_SAME, | 
|  | 871 | * and return needle location in *index.  If scsi3addr matches, but not | 
|  | 872 | * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle | 
|  | 873 | * location in *index. | 
|  | 874 | * In the case of a minor device attribute change, such as RAID level, just | 
|  | 875 | * return DEVICE_UPDATED, along with the updated device's location in index. | 
|  | 876 | * If needle not found, return DEVICE_NOT_FOUND. | 
|  | 877 | */ | 
|  | 878 | static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle, | 
|  | 879 | struct hpsa_scsi_dev_t *haystack[], int haystack_size, | 
|  | 880 | int *index) | 
|  | 881 | { | 
|  | 882 | int i; | 
|  | 883 | #define DEVICE_NOT_FOUND 0 | 
|  | 884 | #define DEVICE_CHANGED 1 | 
|  | 885 | #define DEVICE_SAME 2 | 
|  | 886 | #define DEVICE_UPDATED 3 | 
|  | 887 | for (i = 0; i < haystack_size; i++) { | 
|  | 888 | if (haystack[i] == NULL) /* previously removed. */ | 
|  | 889 | continue; | 
|  | 890 | if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) { | 
|  | 891 | *index = i; | 
|  | 892 | if (device_is_the_same(needle, haystack[i])) { | 
|  | 893 | if (device_updated(needle, haystack[i])) | 
|  | 894 | return DEVICE_UPDATED; | 
|  | 895 | return DEVICE_SAME; | 
|  | 896 | } else { | 
|  | 897 | return DEVICE_CHANGED; | 
|  | 898 | } | 
|  | 899 | } | 
|  | 900 | } | 
|  | 901 | *index = -1; | 
|  | 902 | return DEVICE_NOT_FOUND; | 
|  | 903 | } | 
|  | 904 |  | 
|  | 905 | static void adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno, | 
|  | 906 | struct hpsa_scsi_dev_t *sd[], int nsds) | 
|  | 907 | { | 
|  | 908 | /* sd contains scsi3 addresses and devtypes, and inquiry | 
|  | 909 | * data.  This function takes what's in sd to be the current | 
|  | 910 | * reality and updates h->dev[] to reflect that reality. | 
|  | 911 | */ | 
|  | 912 | int i, entry, device_change, changes = 0; | 
|  | 913 | struct hpsa_scsi_dev_t *csd; | 
|  | 914 | unsigned long flags; | 
|  | 915 | struct hpsa_scsi_dev_t **added, **removed; | 
|  | 916 | int nadded, nremoved; | 
|  | 917 | struct Scsi_Host *sh = NULL; | 
|  | 918 |  | 
|  | 919 | added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL); | 
|  | 920 | removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL); | 
|  | 921 |  | 
|  | 922 | if (!added || !removed) { | 
|  | 923 | dev_warn(&h->pdev->dev, "out of memory in " | 
|  | 924 | "adjust_hpsa_scsi_table\n"); | 
|  | 925 | goto free_and_out; | 
|  | 926 | } | 
|  | 927 |  | 
|  | 928 | spin_lock_irqsave(&h->devlock, flags); | 
|  | 929 |  | 
|  | 930 | /* find any devices in h->dev[] that are not in | 
|  | 931 | * sd[] and remove them from h->dev[], and for any | 
|  | 932 | * devices which have changed, remove the old device | 
|  | 933 | * info and add the new device info. | 
|  | 934 | * If minor device attributes change, just update | 
|  | 935 | * the existing device structure. | 
|  | 936 | */ | 
|  | 937 | i = 0; | 
|  | 938 | nremoved = 0; | 
|  | 939 | nadded = 0; | 
|  | 940 | while (i < h->ndevices) { | 
|  | 941 | csd = h->dev[i]; | 
|  | 942 | device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry); | 
|  | 943 | if (device_change == DEVICE_NOT_FOUND) { | 
|  | 944 | changes++; | 
|  | 945 | hpsa_scsi_remove_entry(h, hostno, i, | 
|  | 946 | removed, &nremoved); | 
|  | 947 | continue; /* remove ^^^, hence i not incremented */ | 
|  | 948 | } else if (device_change == DEVICE_CHANGED) { | 
|  | 949 | changes++; | 
|  | 950 | hpsa_scsi_replace_entry(h, hostno, i, sd[entry], | 
|  | 951 | added, &nadded, removed, &nremoved); | 
|  | 952 | /* Set it to NULL to prevent it from being freed | 
|  | 953 | * at the bottom of hpsa_update_scsi_devices() | 
|  | 954 | */ | 
|  | 955 | sd[entry] = NULL; | 
|  | 956 | } else if (device_change == DEVICE_UPDATED) { | 
|  | 957 | hpsa_scsi_update_entry(h, hostno, i, sd[entry]); | 
|  | 958 | } | 
|  | 959 | i++; | 
|  | 960 | } | 
|  | 961 |  | 
|  | 962 | /* Now, make sure every device listed in sd[] is also | 
|  | 963 | * listed in h->dev[], adding them if they aren't found | 
|  | 964 | */ | 
|  | 965 |  | 
|  | 966 | for (i = 0; i < nsds; i++) { | 
|  | 967 | if (!sd[i]) /* if already added above. */ | 
|  | 968 | continue; | 
|  | 969 | device_change = hpsa_scsi_find_entry(sd[i], h->dev, | 
|  | 970 | h->ndevices, &entry); | 
|  | 971 | if (device_change == DEVICE_NOT_FOUND) { | 
|  | 972 | changes++; | 
|  | 973 | if (hpsa_scsi_add_entry(h, hostno, sd[i], | 
|  | 974 | added, &nadded) != 0) | 
|  | 975 | break; | 
|  | 976 | sd[i] = NULL; /* prevent from being freed later. */ | 
|  | 977 | } else if (device_change == DEVICE_CHANGED) { | 
|  | 978 | /* should never happen... */ | 
|  | 979 | changes++; | 
|  | 980 | dev_warn(&h->pdev->dev, | 
|  | 981 | "device unexpectedly changed.\n"); | 
|  | 982 | /* but if it does happen, we just ignore that device */ | 
|  | 983 | } | 
|  | 984 | } | 
|  | 985 | spin_unlock_irqrestore(&h->devlock, flags); | 
|  | 986 |  | 
|  | 987 | /* Don't notify scsi mid layer of any changes the first time through | 
|  | 988 | * (or if there are no changes) scsi_scan_host will do it later the | 
|  | 989 | * first time through. | 
|  | 990 | */ | 
|  | 991 | if (hostno == -1 || !changes) | 
|  | 992 | goto free_and_out; | 
|  | 993 |  | 
|  | 994 | sh = h->scsi_host; | 
|  | 995 | /* Notify scsi mid layer of any removed devices */ | 
|  | 996 | for (i = 0; i < nremoved; i++) { | 
|  | 997 | struct scsi_device *sdev = | 
|  | 998 | scsi_device_lookup(sh, removed[i]->bus, | 
|  | 999 | removed[i]->target, removed[i]->lun); | 
|  | 1000 | if (sdev != NULL) { | 
|  | 1001 | scsi_remove_device(sdev); | 
|  | 1002 | scsi_device_put(sdev); | 
|  | 1003 | } else { | 
|  | 1004 | /* We don't expect to get here. | 
|  | 1005 | * future cmds to this device will get selection | 
|  | 1006 | * timeout as if the device was gone. | 
|  | 1007 | */ | 
|  | 1008 | dev_warn(&h->pdev->dev, "didn't find c%db%dt%dl%d " | 
|  | 1009 | " for removal.", hostno, removed[i]->bus, | 
|  | 1010 | removed[i]->target, removed[i]->lun); | 
|  | 1011 | } | 
|  | 1012 | kfree(removed[i]); | 
|  | 1013 | removed[i] = NULL; | 
|  | 1014 | } | 
|  | 1015 |  | 
|  | 1016 | /* Notify scsi mid layer of any added devices */ | 
|  | 1017 | for (i = 0; i < nadded; i++) { | 
|  | 1018 | if (scsi_add_device(sh, added[i]->bus, | 
|  | 1019 | added[i]->target, added[i]->lun) == 0) | 
|  | 1020 | continue; | 
|  | 1021 | dev_warn(&h->pdev->dev, "scsi_add_device c%db%dt%dl%d failed, " | 
|  | 1022 | "device not added.\n", hostno, added[i]->bus, | 
|  | 1023 | added[i]->target, added[i]->lun); | 
|  | 1024 | /* now we have to remove it from h->dev, | 
|  | 1025 | * since it didn't get added to scsi mid layer | 
|  | 1026 | */ | 
|  | 1027 | fixup_botched_add(h, added[i]); | 
|  | 1028 | } | 
|  | 1029 |  | 
|  | 1030 | free_and_out: | 
|  | 1031 | kfree(added); | 
|  | 1032 | kfree(removed); | 
|  | 1033 | } | 
|  | 1034 |  | 
|  | 1035 | /* | 
|  | 1036 | * Lookup bus/target/lun and retrun corresponding struct hpsa_scsi_dev_t * | 
|  | 1037 | * Assume's h->devlock is held. | 
|  | 1038 | */ | 
|  | 1039 | static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h, | 
|  | 1040 | int bus, int target, int lun) | 
|  | 1041 | { | 
|  | 1042 | int i; | 
|  | 1043 | struct hpsa_scsi_dev_t *sd; | 
|  | 1044 |  | 
|  | 1045 | for (i = 0; i < h->ndevices; i++) { | 
|  | 1046 | sd = h->dev[i]; | 
|  | 1047 | if (sd->bus == bus && sd->target == target && sd->lun == lun) | 
|  | 1048 | return sd; | 
|  | 1049 | } | 
|  | 1050 | return NULL; | 
|  | 1051 | } | 
|  | 1052 |  | 
|  | 1053 | /* link sdev->hostdata to our per-device structure. */ | 
|  | 1054 | static int hpsa_slave_alloc(struct scsi_device *sdev) | 
|  | 1055 | { | 
|  | 1056 | struct hpsa_scsi_dev_t *sd; | 
|  | 1057 | unsigned long flags; | 
|  | 1058 | struct ctlr_info *h; | 
|  | 1059 |  | 
|  | 1060 | h = sdev_to_hba(sdev); | 
|  | 1061 | spin_lock_irqsave(&h->devlock, flags); | 
|  | 1062 | sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev), | 
|  | 1063 | sdev_id(sdev), sdev->lun); | 
|  | 1064 | if (sd != NULL) | 
|  | 1065 | sdev->hostdata = sd; | 
|  | 1066 | spin_unlock_irqrestore(&h->devlock, flags); | 
|  | 1067 | return 0; | 
|  | 1068 | } | 
|  | 1069 |  | 
|  | 1070 | static void hpsa_slave_destroy(struct scsi_device *sdev) | 
|  | 1071 | { | 
|  | 1072 | /* nothing to do. */ | 
|  | 1073 | } | 
|  | 1074 |  | 
|  | 1075 | static void hpsa_free_sg_chain_blocks(struct ctlr_info *h) | 
|  | 1076 | { | 
|  | 1077 | int i; | 
|  | 1078 |  | 
|  | 1079 | if (!h->cmd_sg_list) | 
|  | 1080 | return; | 
|  | 1081 | for (i = 0; i < h->nr_cmds; i++) { | 
|  | 1082 | kfree(h->cmd_sg_list[i]); | 
|  | 1083 | h->cmd_sg_list[i] = NULL; | 
|  | 1084 | } | 
|  | 1085 | kfree(h->cmd_sg_list); | 
|  | 1086 | h->cmd_sg_list = NULL; | 
|  | 1087 | } | 
|  | 1088 |  | 
|  | 1089 | static int hpsa_allocate_sg_chain_blocks(struct ctlr_info *h) | 
|  | 1090 | { | 
|  | 1091 | int i; | 
|  | 1092 |  | 
|  | 1093 | if (h->chainsize <= 0) | 
|  | 1094 | return 0; | 
|  | 1095 |  | 
|  | 1096 | h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds, | 
|  | 1097 | GFP_KERNEL); | 
|  | 1098 | if (!h->cmd_sg_list) | 
|  | 1099 | return -ENOMEM; | 
|  | 1100 | for (i = 0; i < h->nr_cmds; i++) { | 
|  | 1101 | h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) * | 
|  | 1102 | h->chainsize, GFP_KERNEL); | 
|  | 1103 | if (!h->cmd_sg_list[i]) | 
|  | 1104 | goto clean; | 
|  | 1105 | } | 
|  | 1106 | return 0; | 
|  | 1107 |  | 
|  | 1108 | clean: | 
|  | 1109 | hpsa_free_sg_chain_blocks(h); | 
|  | 1110 | return -ENOMEM; | 
|  | 1111 | } | 
|  | 1112 |  | 
|  | 1113 | static void hpsa_map_sg_chain_block(struct ctlr_info *h, | 
|  | 1114 | struct CommandList *c) | 
|  | 1115 | { | 
|  | 1116 | struct SGDescriptor *chain_sg, *chain_block; | 
|  | 1117 | u64 temp64; | 
|  | 1118 |  | 
|  | 1119 | chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; | 
|  | 1120 | chain_block = h->cmd_sg_list[c->cmdindex]; | 
|  | 1121 | chain_sg->Ext = HPSA_SG_CHAIN; | 
|  | 1122 | chain_sg->Len = sizeof(*chain_sg) * | 
|  | 1123 | (c->Header.SGTotal - h->max_cmd_sg_entries); | 
|  | 1124 | temp64 = pci_map_single(h->pdev, chain_block, chain_sg->Len, | 
|  | 1125 | PCI_DMA_TODEVICE); | 
|  | 1126 | chain_sg->Addr.lower = (u32) (temp64 & 0x0FFFFFFFFULL); | 
|  | 1127 | chain_sg->Addr.upper = (u32) ((temp64 >> 32) & 0x0FFFFFFFFULL); | 
|  | 1128 | } | 
|  | 1129 |  | 
|  | 1130 | static void hpsa_unmap_sg_chain_block(struct ctlr_info *h, | 
|  | 1131 | struct CommandList *c) | 
|  | 1132 | { | 
|  | 1133 | struct SGDescriptor *chain_sg; | 
|  | 1134 | union u64bit temp64; | 
|  | 1135 |  | 
|  | 1136 | if (c->Header.SGTotal <= h->max_cmd_sg_entries) | 
|  | 1137 | return; | 
|  | 1138 |  | 
|  | 1139 | chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; | 
|  | 1140 | temp64.val32.lower = chain_sg->Addr.lower; | 
|  | 1141 | temp64.val32.upper = chain_sg->Addr.upper; | 
|  | 1142 | pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE); | 
|  | 1143 | } | 
|  | 1144 |  | 
|  | 1145 | static void complete_scsi_command(struct CommandList *cp) | 
|  | 1146 | { | 
|  | 1147 | struct scsi_cmnd *cmd; | 
|  | 1148 | struct ctlr_info *h; | 
|  | 1149 | struct ErrorInfo *ei; | 
|  | 1150 |  | 
|  | 1151 | unsigned char sense_key; | 
|  | 1152 | unsigned char asc;      /* additional sense code */ | 
|  | 1153 | unsigned char ascq;     /* additional sense code qualifier */ | 
|  | 1154 | unsigned long sense_data_size; | 
|  | 1155 |  | 
|  | 1156 | ei = cp->err_info; | 
|  | 1157 | cmd = (struct scsi_cmnd *) cp->scsi_cmd; | 
|  | 1158 | h = cp->h; | 
|  | 1159 |  | 
|  | 1160 | scsi_dma_unmap(cmd); /* undo the DMA mappings */ | 
|  | 1161 | if (cp->Header.SGTotal > h->max_cmd_sg_entries) | 
|  | 1162 | hpsa_unmap_sg_chain_block(h, cp); | 
|  | 1163 |  | 
|  | 1164 | cmd->result = (DID_OK << 16); 		/* host byte */ | 
|  | 1165 | cmd->result |= (COMMAND_COMPLETE << 8);	/* msg byte */ | 
|  | 1166 | cmd->result |= ei->ScsiStatus; | 
|  | 1167 |  | 
|  | 1168 | /* copy the sense data whether we need to or not. */ | 
|  | 1169 | if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo)) | 
|  | 1170 | sense_data_size = SCSI_SENSE_BUFFERSIZE; | 
|  | 1171 | else | 
|  | 1172 | sense_data_size = sizeof(ei->SenseInfo); | 
|  | 1173 | if (ei->SenseLen < sense_data_size) | 
|  | 1174 | sense_data_size = ei->SenseLen; | 
|  | 1175 |  | 
|  | 1176 | memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size); | 
|  | 1177 | scsi_set_resid(cmd, ei->ResidualCnt); | 
|  | 1178 |  | 
|  | 1179 | if (ei->CommandStatus == 0) { | 
|  | 1180 | cmd->scsi_done(cmd); | 
|  | 1181 | cmd_free(h, cp); | 
|  | 1182 | return; | 
|  | 1183 | } | 
|  | 1184 |  | 
|  | 1185 | /* an error has occurred */ | 
|  | 1186 | switch (ei->CommandStatus) { | 
|  | 1187 |  | 
|  | 1188 | case CMD_TARGET_STATUS: | 
|  | 1189 | if (ei->ScsiStatus) { | 
|  | 1190 | /* Get sense key */ | 
|  | 1191 | sense_key = 0xf & ei->SenseInfo[2]; | 
|  | 1192 | /* Get additional sense code */ | 
|  | 1193 | asc = ei->SenseInfo[12]; | 
|  | 1194 | /* Get addition sense code qualifier */ | 
|  | 1195 | ascq = ei->SenseInfo[13]; | 
|  | 1196 | } | 
|  | 1197 |  | 
|  | 1198 | if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) { | 
|  | 1199 | if (check_for_unit_attention(h, cp)) { | 
|  | 1200 | cmd->result = DID_SOFT_ERROR << 16; | 
|  | 1201 | break; | 
|  | 1202 | } | 
|  | 1203 | if (sense_key == ILLEGAL_REQUEST) { | 
|  | 1204 | /* | 
|  | 1205 | * SCSI REPORT_LUNS is commonly unsupported on | 
|  | 1206 | * Smart Array.  Suppress noisy complaint. | 
|  | 1207 | */ | 
|  | 1208 | if (cp->Request.CDB[0] == REPORT_LUNS) | 
|  | 1209 | break; | 
|  | 1210 |  | 
|  | 1211 | /* If ASC/ASCQ indicate Logical Unit | 
|  | 1212 | * Not Supported condition, | 
|  | 1213 | */ | 
|  | 1214 | if ((asc == 0x25) && (ascq == 0x0)) { | 
|  | 1215 | dev_warn(&h->pdev->dev, "cp %p " | 
|  | 1216 | "has check condition\n", cp); | 
|  | 1217 | break; | 
|  | 1218 | } | 
|  | 1219 | } | 
|  | 1220 |  | 
|  | 1221 | if (sense_key == NOT_READY) { | 
|  | 1222 | /* If Sense is Not Ready, Logical Unit | 
|  | 1223 | * Not ready, Manual Intervention | 
|  | 1224 | * required | 
|  | 1225 | */ | 
|  | 1226 | if ((asc == 0x04) && (ascq == 0x03)) { | 
|  | 1227 | dev_warn(&h->pdev->dev, "cp %p " | 
|  | 1228 | "has check condition: unit " | 
|  | 1229 | "not ready, manual " | 
|  | 1230 | "intervention required\n", cp); | 
|  | 1231 | break; | 
|  | 1232 | } | 
|  | 1233 | } | 
|  | 1234 | if (sense_key == ABORTED_COMMAND) { | 
|  | 1235 | /* Aborted command is retryable */ | 
|  | 1236 | dev_warn(&h->pdev->dev, "cp %p " | 
|  | 1237 | "has check condition: aborted command: " | 
|  | 1238 | "ASC: 0x%x, ASCQ: 0x%x\n", | 
|  | 1239 | cp, asc, ascq); | 
|  | 1240 | cmd->result |= DID_SOFT_ERROR << 16; | 
|  | 1241 | break; | 
|  | 1242 | } | 
|  | 1243 | /* Must be some other type of check condition */ | 
|  | 1244 | dev_warn(&h->pdev->dev, "cp %p has check condition: " | 
|  | 1245 | "unknown type: " | 
|  | 1246 | "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, " | 
|  | 1247 | "Returning result: 0x%x, " | 
|  | 1248 | "cmd=[%02x %02x %02x %02x %02x " | 
|  | 1249 | "%02x %02x %02x %02x %02x %02x " | 
|  | 1250 | "%02x %02x %02x %02x %02x]\n", | 
|  | 1251 | cp, sense_key, asc, ascq, | 
|  | 1252 | cmd->result, | 
|  | 1253 | cmd->cmnd[0], cmd->cmnd[1], | 
|  | 1254 | cmd->cmnd[2], cmd->cmnd[3], | 
|  | 1255 | cmd->cmnd[4], cmd->cmnd[5], | 
|  | 1256 | cmd->cmnd[6], cmd->cmnd[7], | 
|  | 1257 | cmd->cmnd[8], cmd->cmnd[9], | 
|  | 1258 | cmd->cmnd[10], cmd->cmnd[11], | 
|  | 1259 | cmd->cmnd[12], cmd->cmnd[13], | 
|  | 1260 | cmd->cmnd[14], cmd->cmnd[15]); | 
|  | 1261 | break; | 
|  | 1262 | } | 
|  | 1263 |  | 
|  | 1264 |  | 
|  | 1265 | /* Problem was not a check condition | 
|  | 1266 | * Pass it up to the upper layers... | 
|  | 1267 | */ | 
|  | 1268 | if (ei->ScsiStatus) { | 
|  | 1269 | dev_warn(&h->pdev->dev, "cp %p has status 0x%x " | 
|  | 1270 | "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, " | 
|  | 1271 | "Returning result: 0x%x\n", | 
|  | 1272 | cp, ei->ScsiStatus, | 
|  | 1273 | sense_key, asc, ascq, | 
|  | 1274 | cmd->result); | 
|  | 1275 | } else {  /* scsi status is zero??? How??? */ | 
|  | 1276 | dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. " | 
|  | 1277 | "Returning no connection.\n", cp), | 
|  | 1278 |  | 
|  | 1279 | /* Ordinarily, this case should never happen, | 
|  | 1280 | * but there is a bug in some released firmware | 
|  | 1281 | * revisions that allows it to happen if, for | 
|  | 1282 | * example, a 4100 backplane loses power and | 
|  | 1283 | * the tape drive is in it.  We assume that | 
|  | 1284 | * it's a fatal error of some kind because we | 
|  | 1285 | * can't show that it wasn't. We will make it | 
|  | 1286 | * look like selection timeout since that is | 
|  | 1287 | * the most common reason for this to occur, | 
|  | 1288 | * and it's severe enough. | 
|  | 1289 | */ | 
|  | 1290 |  | 
|  | 1291 | cmd->result = DID_NO_CONNECT << 16; | 
|  | 1292 | } | 
|  | 1293 | break; | 
|  | 1294 |  | 
|  | 1295 | case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ | 
|  | 1296 | break; | 
|  | 1297 | case CMD_DATA_OVERRUN: | 
|  | 1298 | dev_warn(&h->pdev->dev, "cp %p has" | 
|  | 1299 | " completed with data overrun " | 
|  | 1300 | "reported\n", cp); | 
|  | 1301 | break; | 
|  | 1302 | case CMD_INVALID: { | 
|  | 1303 | /* print_bytes(cp, sizeof(*cp), 1, 0); | 
|  | 1304 | print_cmd(cp); */ | 
|  | 1305 | /* We get CMD_INVALID if you address a non-existent device | 
|  | 1306 | * instead of a selection timeout (no response).  You will | 
|  | 1307 | * see this if you yank out a drive, then try to access it. | 
|  | 1308 | * This is kind of a shame because it means that any other | 
|  | 1309 | * CMD_INVALID (e.g. driver bug) will get interpreted as a | 
|  | 1310 | * missing target. */ | 
|  | 1311 | cmd->result = DID_NO_CONNECT << 16; | 
|  | 1312 | } | 
|  | 1313 | break; | 
|  | 1314 | case CMD_PROTOCOL_ERR: | 
|  | 1315 | cmd->result = DID_ERROR << 16; | 
|  | 1316 | dev_warn(&h->pdev->dev, "cp %p has " | 
|  | 1317 | "protocol error\n", cp); | 
|  | 1318 | break; | 
|  | 1319 | case CMD_HARDWARE_ERR: | 
|  | 1320 | cmd->result = DID_ERROR << 16; | 
|  | 1321 | dev_warn(&h->pdev->dev, "cp %p had  hardware error\n", cp); | 
|  | 1322 | break; | 
|  | 1323 | case CMD_CONNECTION_LOST: | 
|  | 1324 | cmd->result = DID_ERROR << 16; | 
|  | 1325 | dev_warn(&h->pdev->dev, "cp %p had connection lost\n", cp); | 
|  | 1326 | break; | 
|  | 1327 | case CMD_ABORTED: | 
|  | 1328 | cmd->result = DID_ABORT << 16; | 
|  | 1329 | dev_warn(&h->pdev->dev, "cp %p was aborted with status 0x%x\n", | 
|  | 1330 | cp, ei->ScsiStatus); | 
|  | 1331 | break; | 
|  | 1332 | case CMD_ABORT_FAILED: | 
|  | 1333 | cmd->result = DID_ERROR << 16; | 
|  | 1334 | dev_warn(&h->pdev->dev, "cp %p reports abort failed\n", cp); | 
|  | 1335 | break; | 
|  | 1336 | case CMD_UNSOLICITED_ABORT: | 
|  | 1337 | cmd->result = DID_SOFT_ERROR << 16; /* retry the command */ | 
|  | 1338 | dev_warn(&h->pdev->dev, "cp %p aborted due to an unsolicited " | 
|  | 1339 | "abort\n", cp); | 
|  | 1340 | break; | 
|  | 1341 | case CMD_TIMEOUT: | 
|  | 1342 | cmd->result = DID_TIME_OUT << 16; | 
|  | 1343 | dev_warn(&h->pdev->dev, "cp %p timedout\n", cp); | 
|  | 1344 | break; | 
|  | 1345 | case CMD_UNABORTABLE: | 
|  | 1346 | cmd->result = DID_ERROR << 16; | 
|  | 1347 | dev_warn(&h->pdev->dev, "Command unabortable\n"); | 
|  | 1348 | break; | 
|  | 1349 | default: | 
|  | 1350 | cmd->result = DID_ERROR << 16; | 
|  | 1351 | dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n", | 
|  | 1352 | cp, ei->CommandStatus); | 
|  | 1353 | } | 
|  | 1354 | cmd->scsi_done(cmd); | 
|  | 1355 | cmd_free(h, cp); | 
|  | 1356 | } | 
|  | 1357 |  | 
|  | 1358 | static void hpsa_pci_unmap(struct pci_dev *pdev, | 
|  | 1359 | struct CommandList *c, int sg_used, int data_direction) | 
|  | 1360 | { | 
|  | 1361 | int i; | 
|  | 1362 | union u64bit addr64; | 
|  | 1363 |  | 
|  | 1364 | for (i = 0; i < sg_used; i++) { | 
|  | 1365 | addr64.val32.lower = c->SG[i].Addr.lower; | 
|  | 1366 | addr64.val32.upper = c->SG[i].Addr.upper; | 
|  | 1367 | pci_unmap_single(pdev, (dma_addr_t) addr64.val, c->SG[i].Len, | 
|  | 1368 | data_direction); | 
|  | 1369 | } | 
|  | 1370 | } | 
|  | 1371 |  | 
|  | 1372 | static void hpsa_map_one(struct pci_dev *pdev, | 
|  | 1373 | struct CommandList *cp, | 
|  | 1374 | unsigned char *buf, | 
|  | 1375 | size_t buflen, | 
|  | 1376 | int data_direction) | 
|  | 1377 | { | 
|  | 1378 | u64 addr64; | 
|  | 1379 |  | 
|  | 1380 | if (buflen == 0 || data_direction == PCI_DMA_NONE) { | 
|  | 1381 | cp->Header.SGList = 0; | 
|  | 1382 | cp->Header.SGTotal = 0; | 
|  | 1383 | return; | 
|  | 1384 | } | 
|  | 1385 |  | 
|  | 1386 | addr64 = (u64) pci_map_single(pdev, buf, buflen, data_direction); | 
|  | 1387 | cp->SG[0].Addr.lower = | 
|  | 1388 | (u32) (addr64 & (u64) 0x00000000FFFFFFFF); | 
|  | 1389 | cp->SG[0].Addr.upper = | 
|  | 1390 | (u32) ((addr64 >> 32) & (u64) 0x00000000FFFFFFFF); | 
|  | 1391 | cp->SG[0].Len = buflen; | 
|  | 1392 | cp->Header.SGList = (u8) 1;   /* no. SGs contig in this cmd */ | 
|  | 1393 | cp->Header.SGTotal = (u16) 1; /* total sgs in this cmd list */ | 
|  | 1394 | } | 
|  | 1395 |  | 
|  | 1396 | static inline void hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h, | 
|  | 1397 | struct CommandList *c) | 
|  | 1398 | { | 
|  | 1399 | DECLARE_COMPLETION_ONSTACK(wait); | 
|  | 1400 |  | 
|  | 1401 | c->waiting = &wait; | 
|  | 1402 | enqueue_cmd_and_start_io(h, c); | 
|  | 1403 | wait_for_completion(&wait); | 
|  | 1404 | } | 
|  | 1405 |  | 
|  | 1406 | static void hpsa_scsi_do_simple_cmd_core_if_no_lockup(struct ctlr_info *h, | 
|  | 1407 | struct CommandList *c) | 
|  | 1408 | { | 
|  | 1409 | unsigned long flags; | 
|  | 1410 |  | 
|  | 1411 | /* If controller lockup detected, fake a hardware error. */ | 
|  | 1412 | spin_lock_irqsave(&h->lock, flags); | 
|  | 1413 | if (unlikely(h->lockup_detected)) { | 
|  | 1414 | spin_unlock_irqrestore(&h->lock, flags); | 
|  | 1415 | c->err_info->CommandStatus = CMD_HARDWARE_ERR; | 
|  | 1416 | } else { | 
|  | 1417 | spin_unlock_irqrestore(&h->lock, flags); | 
|  | 1418 | hpsa_scsi_do_simple_cmd_core(h, c); | 
|  | 1419 | } | 
|  | 1420 | } | 
|  | 1421 |  | 
|  | 1422 | static void hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h, | 
|  | 1423 | struct CommandList *c, int data_direction) | 
|  | 1424 | { | 
|  | 1425 | int retry_count = 0; | 
|  | 1426 |  | 
|  | 1427 | do { | 
|  | 1428 | memset(c->err_info, 0, sizeof(*c->err_info)); | 
|  | 1429 | hpsa_scsi_do_simple_cmd_core(h, c); | 
|  | 1430 | retry_count++; | 
|  | 1431 | } while (check_for_unit_attention(h, c) && retry_count <= 3); | 
|  | 1432 | hpsa_pci_unmap(h->pdev, c, 1, data_direction); | 
|  | 1433 | } | 
|  | 1434 |  | 
|  | 1435 | static void hpsa_scsi_interpret_error(struct CommandList *cp) | 
|  | 1436 | { | 
|  | 1437 | struct ErrorInfo *ei; | 
|  | 1438 | struct device *d = &cp->h->pdev->dev; | 
|  | 1439 |  | 
|  | 1440 | ei = cp->err_info; | 
|  | 1441 | switch (ei->CommandStatus) { | 
|  | 1442 | case CMD_TARGET_STATUS: | 
|  | 1443 | dev_warn(d, "cmd %p has completed with errors\n", cp); | 
|  | 1444 | dev_warn(d, "cmd %p has SCSI Status = %x\n", cp, | 
|  | 1445 | ei->ScsiStatus); | 
|  | 1446 | if (ei->ScsiStatus == 0) | 
|  | 1447 | dev_warn(d, "SCSI status is abnormally zero.  " | 
|  | 1448 | "(probably indicates selection timeout " | 
|  | 1449 | "reported incorrectly due to a known " | 
|  | 1450 | "firmware bug, circa July, 2001.)\n"); | 
|  | 1451 | break; | 
|  | 1452 | case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ | 
|  | 1453 | dev_info(d, "UNDERRUN\n"); | 
|  | 1454 | break; | 
|  | 1455 | case CMD_DATA_OVERRUN: | 
|  | 1456 | dev_warn(d, "cp %p has completed with data overrun\n", cp); | 
|  | 1457 | break; | 
|  | 1458 | case CMD_INVALID: { | 
|  | 1459 | /* controller unfortunately reports SCSI passthru's | 
|  | 1460 | * to non-existent targets as invalid commands. | 
|  | 1461 | */ | 
|  | 1462 | dev_warn(d, "cp %p is reported invalid (probably means " | 
|  | 1463 | "target device no longer present)\n", cp); | 
|  | 1464 | /* print_bytes((unsigned char *) cp, sizeof(*cp), 1, 0); | 
|  | 1465 | print_cmd(cp);  */ | 
|  | 1466 | } | 
|  | 1467 | break; | 
|  | 1468 | case CMD_PROTOCOL_ERR: | 
|  | 1469 | dev_warn(d, "cp %p has protocol error \n", cp); | 
|  | 1470 | break; | 
|  | 1471 | case CMD_HARDWARE_ERR: | 
|  | 1472 | /* cmd->result = DID_ERROR << 16; */ | 
|  | 1473 | dev_warn(d, "cp %p had hardware error\n", cp); | 
|  | 1474 | break; | 
|  | 1475 | case CMD_CONNECTION_LOST: | 
|  | 1476 | dev_warn(d, "cp %p had connection lost\n", cp); | 
|  | 1477 | break; | 
|  | 1478 | case CMD_ABORTED: | 
|  | 1479 | dev_warn(d, "cp %p was aborted\n", cp); | 
|  | 1480 | break; | 
|  | 1481 | case CMD_ABORT_FAILED: | 
|  | 1482 | dev_warn(d, "cp %p reports abort failed\n", cp); | 
|  | 1483 | break; | 
|  | 1484 | case CMD_UNSOLICITED_ABORT: | 
|  | 1485 | dev_warn(d, "cp %p aborted due to an unsolicited abort\n", cp); | 
|  | 1486 | break; | 
|  | 1487 | case CMD_TIMEOUT: | 
|  | 1488 | dev_warn(d, "cp %p timed out\n", cp); | 
|  | 1489 | break; | 
|  | 1490 | case CMD_UNABORTABLE: | 
|  | 1491 | dev_warn(d, "Command unabortable\n"); | 
|  | 1492 | break; | 
|  | 1493 | default: | 
|  | 1494 | dev_warn(d, "cp %p returned unknown status %x\n", cp, | 
|  | 1495 | ei->CommandStatus); | 
|  | 1496 | } | 
|  | 1497 | } | 
|  | 1498 |  | 
|  | 1499 | static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr, | 
|  | 1500 | unsigned char page, unsigned char *buf, | 
|  | 1501 | unsigned char bufsize) | 
|  | 1502 | { | 
|  | 1503 | int rc = IO_OK; | 
|  | 1504 | struct CommandList *c; | 
|  | 1505 | struct ErrorInfo *ei; | 
|  | 1506 |  | 
|  | 1507 | c = cmd_special_alloc(h); | 
|  | 1508 |  | 
|  | 1509 | if (c == NULL) {			/* trouble... */ | 
|  | 1510 | dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n"); | 
|  | 1511 | return -ENOMEM; | 
|  | 1512 | } | 
|  | 1513 |  | 
|  | 1514 | fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, page, scsi3addr, TYPE_CMD); | 
|  | 1515 | hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE); | 
|  | 1516 | ei = c->err_info; | 
|  | 1517 | if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { | 
|  | 1518 | hpsa_scsi_interpret_error(c); | 
|  | 1519 | rc = -1; | 
|  | 1520 | } | 
|  | 1521 | cmd_special_free(h, c); | 
|  | 1522 | return rc; | 
|  | 1523 | } | 
|  | 1524 |  | 
|  | 1525 | static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr) | 
|  | 1526 | { | 
|  | 1527 | int rc = IO_OK; | 
|  | 1528 | struct CommandList *c; | 
|  | 1529 | struct ErrorInfo *ei; | 
|  | 1530 |  | 
|  | 1531 | c = cmd_special_alloc(h); | 
|  | 1532 |  | 
|  | 1533 | if (c == NULL) {			/* trouble... */ | 
|  | 1534 | dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n"); | 
|  | 1535 | return -ENOMEM; | 
|  | 1536 | } | 
|  | 1537 |  | 
|  | 1538 | fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, scsi3addr, TYPE_MSG); | 
|  | 1539 | hpsa_scsi_do_simple_cmd_core(h, c); | 
|  | 1540 | /* no unmap needed here because no data xfer. */ | 
|  | 1541 |  | 
|  | 1542 | ei = c->err_info; | 
|  | 1543 | if (ei->CommandStatus != 0) { | 
|  | 1544 | hpsa_scsi_interpret_error(c); | 
|  | 1545 | rc = -1; | 
|  | 1546 | } | 
|  | 1547 | cmd_special_free(h, c); | 
|  | 1548 | return rc; | 
|  | 1549 | } | 
|  | 1550 |  | 
|  | 1551 | static void hpsa_get_raid_level(struct ctlr_info *h, | 
|  | 1552 | unsigned char *scsi3addr, unsigned char *raid_level) | 
|  | 1553 | { | 
|  | 1554 | int rc; | 
|  | 1555 | unsigned char *buf; | 
|  | 1556 |  | 
|  | 1557 | *raid_level = RAID_UNKNOWN; | 
|  | 1558 | buf = kzalloc(64, GFP_KERNEL); | 
|  | 1559 | if (!buf) | 
|  | 1560 | return; | 
|  | 1561 | rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0xC1, buf, 64); | 
|  | 1562 | if (rc == 0) | 
|  | 1563 | *raid_level = buf[8]; | 
|  | 1564 | if (*raid_level > RAID_UNKNOWN) | 
|  | 1565 | *raid_level = RAID_UNKNOWN; | 
|  | 1566 | kfree(buf); | 
|  | 1567 | return; | 
|  | 1568 | } | 
|  | 1569 |  | 
|  | 1570 | /* Get the device id from inquiry page 0x83 */ | 
|  | 1571 | static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr, | 
|  | 1572 | unsigned char *device_id, int buflen) | 
|  | 1573 | { | 
|  | 1574 | int rc; | 
|  | 1575 | unsigned char *buf; | 
|  | 1576 |  | 
|  | 1577 | if (buflen > 16) | 
|  | 1578 | buflen = 16; | 
|  | 1579 | buf = kzalloc(64, GFP_KERNEL); | 
|  | 1580 | if (!buf) | 
|  | 1581 | return -1; | 
|  | 1582 | rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0x83, buf, 64); | 
|  | 1583 | if (rc == 0) | 
|  | 1584 | memcpy(device_id, &buf[8], buflen); | 
|  | 1585 | kfree(buf); | 
|  | 1586 | return rc != 0; | 
|  | 1587 | } | 
|  | 1588 |  | 
|  | 1589 | static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical, | 
|  | 1590 | struct ReportLUNdata *buf, int bufsize, | 
|  | 1591 | int extended_response) | 
|  | 1592 | { | 
|  | 1593 | int rc = IO_OK; | 
|  | 1594 | struct CommandList *c; | 
|  | 1595 | unsigned char scsi3addr[8]; | 
|  | 1596 | struct ErrorInfo *ei; | 
|  | 1597 |  | 
|  | 1598 | c = cmd_special_alloc(h); | 
|  | 1599 | if (c == NULL) {			/* trouble... */ | 
|  | 1600 | dev_err(&h->pdev->dev, "cmd_special_alloc returned NULL!\n"); | 
|  | 1601 | return -1; | 
|  | 1602 | } | 
|  | 1603 | /* address the controller */ | 
|  | 1604 | memset(scsi3addr, 0, sizeof(scsi3addr)); | 
|  | 1605 | fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h, | 
|  | 1606 | buf, bufsize, 0, scsi3addr, TYPE_CMD); | 
|  | 1607 | if (extended_response) | 
|  | 1608 | c->Request.CDB[1] = extended_response; | 
|  | 1609 | hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE); | 
|  | 1610 | ei = c->err_info; | 
|  | 1611 | if (ei->CommandStatus != 0 && | 
|  | 1612 | ei->CommandStatus != CMD_DATA_UNDERRUN) { | 
|  | 1613 | hpsa_scsi_interpret_error(c); | 
|  | 1614 | rc = -1; | 
|  | 1615 | } | 
|  | 1616 | cmd_special_free(h, c); | 
|  | 1617 | return rc; | 
|  | 1618 | } | 
|  | 1619 |  | 
|  | 1620 | static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h, | 
|  | 1621 | struct ReportLUNdata *buf, | 
|  | 1622 | int bufsize, int extended_response) | 
|  | 1623 | { | 
|  | 1624 | return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, extended_response); | 
|  | 1625 | } | 
|  | 1626 |  | 
|  | 1627 | static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h, | 
|  | 1628 | struct ReportLUNdata *buf, int bufsize) | 
|  | 1629 | { | 
|  | 1630 | return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0); | 
|  | 1631 | } | 
|  | 1632 |  | 
|  | 1633 | static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device, | 
|  | 1634 | int bus, int target, int lun) | 
|  | 1635 | { | 
|  | 1636 | device->bus = bus; | 
|  | 1637 | device->target = target; | 
|  | 1638 | device->lun = lun; | 
|  | 1639 | } | 
|  | 1640 |  | 
|  | 1641 | static int hpsa_update_device_info(struct ctlr_info *h, | 
|  | 1642 | unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device, | 
|  | 1643 | unsigned char *is_OBDR_device) | 
|  | 1644 | { | 
|  | 1645 |  | 
|  | 1646 | #define OBDR_SIG_OFFSET 43 | 
|  | 1647 | #define OBDR_TAPE_SIG "$DR-10" | 
|  | 1648 | #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1) | 
|  | 1649 | #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN) | 
|  | 1650 |  | 
|  | 1651 | unsigned char *inq_buff; | 
|  | 1652 | unsigned char *obdr_sig; | 
|  | 1653 |  | 
|  | 1654 | inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL); | 
|  | 1655 | if (!inq_buff) | 
|  | 1656 | goto bail_out; | 
|  | 1657 |  | 
|  | 1658 | /* Do an inquiry to the device to see what it is. */ | 
|  | 1659 | if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff, | 
|  | 1660 | (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) { | 
|  | 1661 | /* Inquiry failed (msg printed already) */ | 
|  | 1662 | dev_err(&h->pdev->dev, | 
|  | 1663 | "hpsa_update_device_info: inquiry failed\n"); | 
|  | 1664 | goto bail_out; | 
|  | 1665 | } | 
|  | 1666 |  | 
|  | 1667 | this_device->devtype = (inq_buff[0] & 0x1f); | 
|  | 1668 | memcpy(this_device->scsi3addr, scsi3addr, 8); | 
|  | 1669 | memcpy(this_device->vendor, &inq_buff[8], | 
|  | 1670 | sizeof(this_device->vendor)); | 
|  | 1671 | memcpy(this_device->model, &inq_buff[16], | 
|  | 1672 | sizeof(this_device->model)); | 
|  | 1673 | memset(this_device->device_id, 0, | 
|  | 1674 | sizeof(this_device->device_id)); | 
|  | 1675 | hpsa_get_device_id(h, scsi3addr, this_device->device_id, | 
|  | 1676 | sizeof(this_device->device_id)); | 
|  | 1677 |  | 
|  | 1678 | if (this_device->devtype == TYPE_DISK && | 
|  | 1679 | is_logical_dev_addr_mode(scsi3addr)) | 
|  | 1680 | hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level); | 
|  | 1681 | else | 
|  | 1682 | this_device->raid_level = RAID_UNKNOWN; | 
|  | 1683 |  | 
|  | 1684 | if (is_OBDR_device) { | 
|  | 1685 | /* See if this is a One-Button-Disaster-Recovery device | 
|  | 1686 | * by looking for "$DR-10" at offset 43 in inquiry data. | 
|  | 1687 | */ | 
|  | 1688 | obdr_sig = &inq_buff[OBDR_SIG_OFFSET]; | 
|  | 1689 | *is_OBDR_device = (this_device->devtype == TYPE_ROM && | 
|  | 1690 | strncmp(obdr_sig, OBDR_TAPE_SIG, | 
|  | 1691 | OBDR_SIG_LEN) == 0); | 
|  | 1692 | } | 
|  | 1693 |  | 
|  | 1694 | kfree(inq_buff); | 
|  | 1695 | return 0; | 
|  | 1696 |  | 
|  | 1697 | bail_out: | 
|  | 1698 | kfree(inq_buff); | 
|  | 1699 | return 1; | 
|  | 1700 | } | 
|  | 1701 |  | 
|  | 1702 | static unsigned char *ext_target_model[] = { | 
|  | 1703 | "MSA2012", | 
|  | 1704 | "MSA2024", | 
|  | 1705 | "MSA2312", | 
|  | 1706 | "MSA2324", | 
|  | 1707 | "P2000 G3 SAS", | 
|  | 1708 | NULL, | 
|  | 1709 | }; | 
|  | 1710 |  | 
|  | 1711 | static int is_ext_target(struct ctlr_info *h, struct hpsa_scsi_dev_t *device) | 
|  | 1712 | { | 
|  | 1713 | int i; | 
|  | 1714 |  | 
|  | 1715 | for (i = 0; ext_target_model[i]; i++) | 
|  | 1716 | if (strncmp(device->model, ext_target_model[i], | 
|  | 1717 | strlen(ext_target_model[i])) == 0) | 
|  | 1718 | return 1; | 
|  | 1719 | return 0; | 
|  | 1720 | } | 
|  | 1721 |  | 
|  | 1722 | /* Helper function to assign bus, target, lun mapping of devices. | 
|  | 1723 | * Puts non-external target logical volumes on bus 0, external target logical | 
|  | 1724 | * volumes on bus 1, physical devices on bus 2. and the hba on bus 3. | 
|  | 1725 | * Logical drive target and lun are assigned at this time, but | 
|  | 1726 | * physical device lun and target assignment are deferred (assigned | 
|  | 1727 | * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.) | 
|  | 1728 | */ | 
|  | 1729 | static void figure_bus_target_lun(struct ctlr_info *h, | 
|  | 1730 | u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device) | 
|  | 1731 | { | 
|  | 1732 | u32 lunid = le32_to_cpu(*((__le32 *) lunaddrbytes)); | 
|  | 1733 |  | 
|  | 1734 | if (!is_logical_dev_addr_mode(lunaddrbytes)) { | 
|  | 1735 | /* physical device, target and lun filled in later */ | 
|  | 1736 | if (is_hba_lunid(lunaddrbytes)) | 
|  | 1737 | hpsa_set_bus_target_lun(device, 3, 0, lunid & 0x3fff); | 
|  | 1738 | else | 
|  | 1739 | /* defer target, lun assignment for physical devices */ | 
|  | 1740 | hpsa_set_bus_target_lun(device, 2, -1, -1); | 
|  | 1741 | return; | 
|  | 1742 | } | 
|  | 1743 | /* It's a logical device */ | 
|  | 1744 | if (is_ext_target(h, device)) { | 
|  | 1745 | /* external target way, put logicals on bus 1 | 
|  | 1746 | * and match target/lun numbers box | 
|  | 1747 | * reports, other smart array, bus 0, target 0, match lunid | 
|  | 1748 | */ | 
|  | 1749 | hpsa_set_bus_target_lun(device, | 
|  | 1750 | 1, (lunid >> 16) & 0x3fff, lunid & 0x00ff); | 
|  | 1751 | return; | 
|  | 1752 | } | 
|  | 1753 | hpsa_set_bus_target_lun(device, 0, 0, lunid & 0x3fff); | 
|  | 1754 | } | 
|  | 1755 |  | 
|  | 1756 | /* | 
|  | 1757 | * If there is no lun 0 on a target, linux won't find any devices. | 
|  | 1758 | * For the external targets (arrays), we have to manually detect the enclosure | 
|  | 1759 | * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report | 
|  | 1760 | * it for some reason.  *tmpdevice is the target we're adding, | 
|  | 1761 | * this_device is a pointer into the current element of currentsd[] | 
|  | 1762 | * that we're building up in update_scsi_devices(), below. | 
|  | 1763 | * lunzerobits is a bitmap that tracks which targets already have a | 
|  | 1764 | * lun 0 assigned. | 
|  | 1765 | * Returns 1 if an enclosure was added, 0 if not. | 
|  | 1766 | */ | 
|  | 1767 | static int add_ext_target_dev(struct ctlr_info *h, | 
|  | 1768 | struct hpsa_scsi_dev_t *tmpdevice, | 
|  | 1769 | struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes, | 
|  | 1770 | unsigned long lunzerobits[], int *n_ext_target_devs) | 
|  | 1771 | { | 
|  | 1772 | unsigned char scsi3addr[8]; | 
|  | 1773 |  | 
|  | 1774 | if (test_bit(tmpdevice->target, lunzerobits)) | 
|  | 1775 | return 0; /* There is already a lun 0 on this target. */ | 
|  | 1776 |  | 
|  | 1777 | if (!is_logical_dev_addr_mode(lunaddrbytes)) | 
|  | 1778 | return 0; /* It's the logical targets that may lack lun 0. */ | 
|  | 1779 |  | 
|  | 1780 | if (!is_ext_target(h, tmpdevice)) | 
|  | 1781 | return 0; /* Only external target devices have this problem. */ | 
|  | 1782 |  | 
|  | 1783 | if (tmpdevice->lun == 0) /* if lun is 0, then we have a lun 0. */ | 
|  | 1784 | return 0; | 
|  | 1785 |  | 
|  | 1786 | memset(scsi3addr, 0, 8); | 
|  | 1787 | scsi3addr[3] = tmpdevice->target; | 
|  | 1788 | if (is_hba_lunid(scsi3addr)) | 
|  | 1789 | return 0; /* Don't add the RAID controller here. */ | 
|  | 1790 |  | 
|  | 1791 | if (is_scsi_rev_5(h)) | 
|  | 1792 | return 0; /* p1210m doesn't need to do this. */ | 
|  | 1793 |  | 
|  | 1794 | if (*n_ext_target_devs >= MAX_EXT_TARGETS) { | 
|  | 1795 | dev_warn(&h->pdev->dev, "Maximum number of external " | 
|  | 1796 | "target devices exceeded.  Check your hardware " | 
|  | 1797 | "configuration."); | 
|  | 1798 | return 0; | 
|  | 1799 | } | 
|  | 1800 |  | 
|  | 1801 | if (hpsa_update_device_info(h, scsi3addr, this_device, NULL)) | 
|  | 1802 | return 0; | 
|  | 1803 | (*n_ext_target_devs)++; | 
|  | 1804 | hpsa_set_bus_target_lun(this_device, | 
|  | 1805 | tmpdevice->bus, tmpdevice->target, 0); | 
|  | 1806 | set_bit(tmpdevice->target, lunzerobits); | 
|  | 1807 | return 1; | 
|  | 1808 | } | 
|  | 1809 |  | 
|  | 1810 | /* | 
|  | 1811 | * Do CISS_REPORT_PHYS and CISS_REPORT_LOG.  Data is returned in physdev, | 
|  | 1812 | * logdev.  The number of luns in physdev and logdev are returned in | 
|  | 1813 | * *nphysicals and *nlogicals, respectively. | 
|  | 1814 | * Returns 0 on success, -1 otherwise. | 
|  | 1815 | */ | 
|  | 1816 | static int hpsa_gather_lun_info(struct ctlr_info *h, | 
|  | 1817 | int reportlunsize, | 
|  | 1818 | struct ReportLUNdata *physdev, u32 *nphysicals, | 
|  | 1819 | struct ReportLUNdata *logdev, u32 *nlogicals) | 
|  | 1820 | { | 
|  | 1821 | if (hpsa_scsi_do_report_phys_luns(h, physdev, reportlunsize, 0)) { | 
|  | 1822 | dev_err(&h->pdev->dev, "report physical LUNs failed.\n"); | 
|  | 1823 | return -1; | 
|  | 1824 | } | 
|  | 1825 | *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 8; | 
|  | 1826 | if (*nphysicals > HPSA_MAX_PHYS_LUN) { | 
|  | 1827 | dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded." | 
|  | 1828 | "  %d LUNs ignored.\n", HPSA_MAX_PHYS_LUN, | 
|  | 1829 | *nphysicals - HPSA_MAX_PHYS_LUN); | 
|  | 1830 | *nphysicals = HPSA_MAX_PHYS_LUN; | 
|  | 1831 | } | 
|  | 1832 | if (hpsa_scsi_do_report_log_luns(h, logdev, reportlunsize)) { | 
|  | 1833 | dev_err(&h->pdev->dev, "report logical LUNs failed.\n"); | 
|  | 1834 | return -1; | 
|  | 1835 | } | 
|  | 1836 | *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8; | 
|  | 1837 | /* Reject Logicals in excess of our max capability. */ | 
|  | 1838 | if (*nlogicals > HPSA_MAX_LUN) { | 
|  | 1839 | dev_warn(&h->pdev->dev, | 
|  | 1840 | "maximum logical LUNs (%d) exceeded.  " | 
|  | 1841 | "%d LUNs ignored.\n", HPSA_MAX_LUN, | 
|  | 1842 | *nlogicals - HPSA_MAX_LUN); | 
|  | 1843 | *nlogicals = HPSA_MAX_LUN; | 
|  | 1844 | } | 
|  | 1845 | if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) { | 
|  | 1846 | dev_warn(&h->pdev->dev, | 
|  | 1847 | "maximum logical + physical LUNs (%d) exceeded. " | 
|  | 1848 | "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN, | 
|  | 1849 | *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN); | 
|  | 1850 | *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals; | 
|  | 1851 | } | 
|  | 1852 | return 0; | 
|  | 1853 | } | 
|  | 1854 |  | 
|  | 1855 | u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, int i, | 
|  | 1856 | int nphysicals, int nlogicals, struct ReportLUNdata *physdev_list, | 
|  | 1857 | struct ReportLUNdata *logdev_list) | 
|  | 1858 | { | 
|  | 1859 | /* Helper function, figure out where the LUN ID info is coming from | 
|  | 1860 | * given index i, lists of physical and logical devices, where in | 
|  | 1861 | * the list the raid controller is supposed to appear (first or last) | 
|  | 1862 | */ | 
|  | 1863 |  | 
|  | 1864 | int logicals_start = nphysicals + (raid_ctlr_position == 0); | 
|  | 1865 | int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0); | 
|  | 1866 |  | 
|  | 1867 | if (i == raid_ctlr_position) | 
|  | 1868 | return RAID_CTLR_LUNID; | 
|  | 1869 |  | 
|  | 1870 | if (i < logicals_start) | 
|  | 1871 | return &physdev_list->LUN[i - (raid_ctlr_position == 0)][0]; | 
|  | 1872 |  | 
|  | 1873 | if (i < last_device) | 
|  | 1874 | return &logdev_list->LUN[i - nphysicals - | 
|  | 1875 | (raid_ctlr_position == 0)][0]; | 
|  | 1876 | BUG(); | 
|  | 1877 | return NULL; | 
|  | 1878 | } | 
|  | 1879 |  | 
|  | 1880 | static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno) | 
|  | 1881 | { | 
|  | 1882 | /* the idea here is we could get notified | 
|  | 1883 | * that some devices have changed, so we do a report | 
|  | 1884 | * physical luns and report logical luns cmd, and adjust | 
|  | 1885 | * our list of devices accordingly. | 
|  | 1886 | * | 
|  | 1887 | * The scsi3addr's of devices won't change so long as the | 
|  | 1888 | * adapter is not reset.  That means we can rescan and | 
|  | 1889 | * tell which devices we already know about, vs. new | 
|  | 1890 | * devices, vs.  disappearing devices. | 
|  | 1891 | */ | 
|  | 1892 | struct ReportLUNdata *physdev_list = NULL; | 
|  | 1893 | struct ReportLUNdata *logdev_list = NULL; | 
|  | 1894 | u32 nphysicals = 0; | 
|  | 1895 | u32 nlogicals = 0; | 
|  | 1896 | u32 ndev_allocated = 0; | 
|  | 1897 | struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice; | 
|  | 1898 | int ncurrent = 0; | 
|  | 1899 | int reportlunsize = sizeof(*physdev_list) + HPSA_MAX_PHYS_LUN * 8; | 
|  | 1900 | int i, n_ext_target_devs, ndevs_to_allocate; | 
|  | 1901 | int raid_ctlr_position; | 
|  | 1902 | DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS); | 
|  | 1903 |  | 
|  | 1904 | currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL); | 
|  | 1905 | physdev_list = kzalloc(reportlunsize, GFP_KERNEL); | 
|  | 1906 | logdev_list = kzalloc(reportlunsize, GFP_KERNEL); | 
|  | 1907 | tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL); | 
|  | 1908 |  | 
|  | 1909 | if (!currentsd || !physdev_list || !logdev_list || !tmpdevice) { | 
|  | 1910 | dev_err(&h->pdev->dev, "out of memory\n"); | 
|  | 1911 | goto out; | 
|  | 1912 | } | 
|  | 1913 | memset(lunzerobits, 0, sizeof(lunzerobits)); | 
|  | 1914 |  | 
|  | 1915 | if (hpsa_gather_lun_info(h, reportlunsize, physdev_list, &nphysicals, | 
|  | 1916 | logdev_list, &nlogicals)) | 
|  | 1917 | goto out; | 
|  | 1918 |  | 
|  | 1919 | /* We might see up to the maximum number of logical and physical disks | 
|  | 1920 | * plus external target devices, and a device for the local RAID | 
|  | 1921 | * controller. | 
|  | 1922 | */ | 
|  | 1923 | ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1; | 
|  | 1924 |  | 
|  | 1925 | /* Allocate the per device structures */ | 
|  | 1926 | for (i = 0; i < ndevs_to_allocate; i++) { | 
|  | 1927 | if (i >= HPSA_MAX_DEVICES) { | 
|  | 1928 | dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded." | 
|  | 1929 | "  %d devices ignored.\n", HPSA_MAX_DEVICES, | 
|  | 1930 | ndevs_to_allocate - HPSA_MAX_DEVICES); | 
|  | 1931 | break; | 
|  | 1932 | } | 
|  | 1933 |  | 
|  | 1934 | currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL); | 
|  | 1935 | if (!currentsd[i]) { | 
|  | 1936 | dev_warn(&h->pdev->dev, "out of memory at %s:%d\n", | 
|  | 1937 | __FILE__, __LINE__); | 
|  | 1938 | goto out; | 
|  | 1939 | } | 
|  | 1940 | ndev_allocated++; | 
|  | 1941 | } | 
|  | 1942 |  | 
|  | 1943 | if (unlikely(is_scsi_rev_5(h))) | 
|  | 1944 | raid_ctlr_position = 0; | 
|  | 1945 | else | 
|  | 1946 | raid_ctlr_position = nphysicals + nlogicals; | 
|  | 1947 |  | 
|  | 1948 | /* adjust our table of devices */ | 
|  | 1949 | n_ext_target_devs = 0; | 
|  | 1950 | for (i = 0; i < nphysicals + nlogicals + 1; i++) { | 
|  | 1951 | u8 *lunaddrbytes, is_OBDR = 0; | 
|  | 1952 |  | 
|  | 1953 | /* Figure out where the LUN ID info is coming from */ | 
|  | 1954 | lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position, | 
|  | 1955 | i, nphysicals, nlogicals, physdev_list, logdev_list); | 
|  | 1956 | /* skip masked physical devices. */ | 
|  | 1957 | if (lunaddrbytes[3] & 0xC0 && | 
|  | 1958 | i < nphysicals + (raid_ctlr_position == 0)) | 
|  | 1959 | continue; | 
|  | 1960 |  | 
|  | 1961 | /* Get device type, vendor, model, device id */ | 
|  | 1962 | if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice, | 
|  | 1963 | &is_OBDR)) | 
|  | 1964 | continue; /* skip it if we can't talk to it. */ | 
|  | 1965 | figure_bus_target_lun(h, lunaddrbytes, tmpdevice); | 
|  | 1966 | this_device = currentsd[ncurrent]; | 
|  | 1967 |  | 
|  | 1968 | /* | 
|  | 1969 | * For external target devices, we have to insert a LUN 0 which | 
|  | 1970 | * doesn't show up in CCISS_REPORT_PHYSICAL data, but there | 
|  | 1971 | * is nonetheless an enclosure device there.  We have to | 
|  | 1972 | * present that otherwise linux won't find anything if | 
|  | 1973 | * there is no lun 0. | 
|  | 1974 | */ | 
|  | 1975 | if (add_ext_target_dev(h, tmpdevice, this_device, | 
|  | 1976 | lunaddrbytes, lunzerobits, | 
|  | 1977 | &n_ext_target_devs)) { | 
|  | 1978 | ncurrent++; | 
|  | 1979 | this_device = currentsd[ncurrent]; | 
|  | 1980 | } | 
|  | 1981 |  | 
|  | 1982 | *this_device = *tmpdevice; | 
|  | 1983 |  | 
|  | 1984 | switch (this_device->devtype) { | 
|  | 1985 | case TYPE_ROM: | 
|  | 1986 | /* We don't *really* support actual CD-ROM devices, | 
|  | 1987 | * just "One Button Disaster Recovery" tape drive | 
|  | 1988 | * which temporarily pretends to be a CD-ROM drive. | 
|  | 1989 | * So we check that the device is really an OBDR tape | 
|  | 1990 | * device by checking for "$DR-10" in bytes 43-48 of | 
|  | 1991 | * the inquiry data. | 
|  | 1992 | */ | 
|  | 1993 | if (is_OBDR) | 
|  | 1994 | ncurrent++; | 
|  | 1995 | break; | 
|  | 1996 | case TYPE_DISK: | 
|  | 1997 | if (i < nphysicals) | 
|  | 1998 | break; | 
|  | 1999 | ncurrent++; | 
|  | 2000 | break; | 
|  | 2001 | case TYPE_TAPE: | 
|  | 2002 | case TYPE_MEDIUM_CHANGER: | 
|  | 2003 | ncurrent++; | 
|  | 2004 | break; | 
|  | 2005 | case TYPE_RAID: | 
|  | 2006 | /* Only present the Smartarray HBA as a RAID controller. | 
|  | 2007 | * If it's a RAID controller other than the HBA itself | 
|  | 2008 | * (an external RAID controller, MSA500 or similar) | 
|  | 2009 | * don't present it. | 
|  | 2010 | */ | 
|  | 2011 | if (!is_hba_lunid(lunaddrbytes)) | 
|  | 2012 | break; | 
|  | 2013 | ncurrent++; | 
|  | 2014 | break; | 
|  | 2015 | default: | 
|  | 2016 | break; | 
|  | 2017 | } | 
|  | 2018 | if (ncurrent >= HPSA_MAX_DEVICES) | 
|  | 2019 | break; | 
|  | 2020 | } | 
|  | 2021 | adjust_hpsa_scsi_table(h, hostno, currentsd, ncurrent); | 
|  | 2022 | out: | 
|  | 2023 | kfree(tmpdevice); | 
|  | 2024 | for (i = 0; i < ndev_allocated; i++) | 
|  | 2025 | kfree(currentsd[i]); | 
|  | 2026 | kfree(currentsd); | 
|  | 2027 | kfree(physdev_list); | 
|  | 2028 | kfree(logdev_list); | 
|  | 2029 | } | 
|  | 2030 |  | 
|  | 2031 | /* hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci | 
|  | 2032 | * dma mapping  and fills in the scatter gather entries of the | 
|  | 2033 | * hpsa command, cp. | 
|  | 2034 | */ | 
|  | 2035 | static int hpsa_scatter_gather(struct ctlr_info *h, | 
|  | 2036 | struct CommandList *cp, | 
|  | 2037 | struct scsi_cmnd *cmd) | 
|  | 2038 | { | 
|  | 2039 | unsigned int len; | 
|  | 2040 | struct scatterlist *sg; | 
|  | 2041 | u64 addr64; | 
|  | 2042 | int use_sg, i, sg_index, chained; | 
|  | 2043 | struct SGDescriptor *curr_sg; | 
|  | 2044 |  | 
|  | 2045 | BUG_ON(scsi_sg_count(cmd) > h->maxsgentries); | 
|  | 2046 |  | 
|  | 2047 | use_sg = scsi_dma_map(cmd); | 
|  | 2048 | if (use_sg < 0) | 
|  | 2049 | return use_sg; | 
|  | 2050 |  | 
|  | 2051 | if (!use_sg) | 
|  | 2052 | goto sglist_finished; | 
|  | 2053 |  | 
|  | 2054 | curr_sg = cp->SG; | 
|  | 2055 | chained = 0; | 
|  | 2056 | sg_index = 0; | 
|  | 2057 | scsi_for_each_sg(cmd, sg, use_sg, i) { | 
|  | 2058 | if (i == h->max_cmd_sg_entries - 1 && | 
|  | 2059 | use_sg > h->max_cmd_sg_entries) { | 
|  | 2060 | chained = 1; | 
|  | 2061 | curr_sg = h->cmd_sg_list[cp->cmdindex]; | 
|  | 2062 | sg_index = 0; | 
|  | 2063 | } | 
|  | 2064 | addr64 = (u64) sg_dma_address(sg); | 
|  | 2065 | len  = sg_dma_len(sg); | 
|  | 2066 | curr_sg->Addr.lower = (u32) (addr64 & 0x0FFFFFFFFULL); | 
|  | 2067 | curr_sg->Addr.upper = (u32) ((addr64 >> 32) & 0x0FFFFFFFFULL); | 
|  | 2068 | curr_sg->Len = len; | 
|  | 2069 | curr_sg->Ext = 0;  /* we are not chaining */ | 
|  | 2070 | curr_sg++; | 
|  | 2071 | } | 
|  | 2072 |  | 
|  | 2073 | if (use_sg + chained > h->maxSG) | 
|  | 2074 | h->maxSG = use_sg + chained; | 
|  | 2075 |  | 
|  | 2076 | if (chained) { | 
|  | 2077 | cp->Header.SGList = h->max_cmd_sg_entries; | 
|  | 2078 | cp->Header.SGTotal = (u16) (use_sg + 1); | 
|  | 2079 | hpsa_map_sg_chain_block(h, cp); | 
|  | 2080 | return 0; | 
|  | 2081 | } | 
|  | 2082 |  | 
|  | 2083 | sglist_finished: | 
|  | 2084 |  | 
|  | 2085 | cp->Header.SGList = (u8) use_sg;   /* no. SGs contig in this cmd */ | 
|  | 2086 | cp->Header.SGTotal = (u16) use_sg; /* total sgs in this cmd list */ | 
|  | 2087 | return 0; | 
|  | 2088 | } | 
|  | 2089 |  | 
|  | 2090 |  | 
|  | 2091 | static int hpsa_scsi_queue_command_lck(struct scsi_cmnd *cmd, | 
|  | 2092 | void (*done)(struct scsi_cmnd *)) | 
|  | 2093 | { | 
|  | 2094 | struct ctlr_info *h; | 
|  | 2095 | struct hpsa_scsi_dev_t *dev; | 
|  | 2096 | unsigned char scsi3addr[8]; | 
|  | 2097 | struct CommandList *c; | 
|  | 2098 | unsigned long flags; | 
|  | 2099 |  | 
|  | 2100 | /* Get the ptr to our adapter structure out of cmd->host. */ | 
|  | 2101 | h = sdev_to_hba(cmd->device); | 
|  | 2102 | dev = cmd->device->hostdata; | 
|  | 2103 | if (!dev) { | 
|  | 2104 | cmd->result = DID_NO_CONNECT << 16; | 
|  | 2105 | done(cmd); | 
|  | 2106 | return 0; | 
|  | 2107 | } | 
|  | 2108 | memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr)); | 
|  | 2109 |  | 
|  | 2110 | spin_lock_irqsave(&h->lock, flags); | 
|  | 2111 | if (unlikely(h->lockup_detected)) { | 
|  | 2112 | spin_unlock_irqrestore(&h->lock, flags); | 
|  | 2113 | cmd->result = DID_ERROR << 16; | 
|  | 2114 | done(cmd); | 
|  | 2115 | return 0; | 
|  | 2116 | } | 
|  | 2117 | /* Need a lock as this is being allocated from the pool */ | 
|  | 2118 | c = cmd_alloc(h); | 
|  | 2119 | spin_unlock_irqrestore(&h->lock, flags); | 
|  | 2120 | if (c == NULL) {			/* trouble... */ | 
|  | 2121 | dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n"); | 
|  | 2122 | return SCSI_MLQUEUE_HOST_BUSY; | 
|  | 2123 | } | 
|  | 2124 |  | 
|  | 2125 | /* Fill in the command list header */ | 
|  | 2126 |  | 
|  | 2127 | cmd->scsi_done = done;    /* save this for use by completion code */ | 
|  | 2128 |  | 
|  | 2129 | /* save c in case we have to abort it  */ | 
|  | 2130 | cmd->host_scribble = (unsigned char *) c; | 
|  | 2131 |  | 
|  | 2132 | c->cmd_type = CMD_SCSI; | 
|  | 2133 | c->scsi_cmd = cmd; | 
|  | 2134 | c->Header.ReplyQueue = 0;  /* unused in simple mode */ | 
|  | 2135 | memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8); | 
|  | 2136 | c->Header.Tag.lower = (c->cmdindex << DIRECT_LOOKUP_SHIFT); | 
|  | 2137 | c->Header.Tag.lower |= DIRECT_LOOKUP_BIT; | 
|  | 2138 |  | 
|  | 2139 | /* Fill in the request block... */ | 
|  | 2140 |  | 
|  | 2141 | c->Request.Timeout = 0; | 
|  | 2142 | memset(c->Request.CDB, 0, sizeof(c->Request.CDB)); | 
|  | 2143 | BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB)); | 
|  | 2144 | c->Request.CDBLen = cmd->cmd_len; | 
|  | 2145 | memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len); | 
|  | 2146 | c->Request.Type.Type = TYPE_CMD; | 
|  | 2147 | c->Request.Type.Attribute = ATTR_SIMPLE; | 
|  | 2148 | switch (cmd->sc_data_direction) { | 
|  | 2149 | case DMA_TO_DEVICE: | 
|  | 2150 | c->Request.Type.Direction = XFER_WRITE; | 
|  | 2151 | break; | 
|  | 2152 | case DMA_FROM_DEVICE: | 
|  | 2153 | c->Request.Type.Direction = XFER_READ; | 
|  | 2154 | break; | 
|  | 2155 | case DMA_NONE: | 
|  | 2156 | c->Request.Type.Direction = XFER_NONE; | 
|  | 2157 | break; | 
|  | 2158 | case DMA_BIDIRECTIONAL: | 
|  | 2159 | /* This can happen if a buggy application does a scsi passthru | 
|  | 2160 | * and sets both inlen and outlen to non-zero. ( see | 
|  | 2161 | * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() ) | 
|  | 2162 | */ | 
|  | 2163 |  | 
|  | 2164 | c->Request.Type.Direction = XFER_RSVD; | 
|  | 2165 | /* This is technically wrong, and hpsa controllers should | 
|  | 2166 | * reject it with CMD_INVALID, which is the most correct | 
|  | 2167 | * response, but non-fibre backends appear to let it | 
|  | 2168 | * slide by, and give the same results as if this field | 
|  | 2169 | * were set correctly.  Either way is acceptable for | 
|  | 2170 | * our purposes here. | 
|  | 2171 | */ | 
|  | 2172 |  | 
|  | 2173 | break; | 
|  | 2174 |  | 
|  | 2175 | default: | 
|  | 2176 | dev_err(&h->pdev->dev, "unknown data direction: %d\n", | 
|  | 2177 | cmd->sc_data_direction); | 
|  | 2178 | BUG(); | 
|  | 2179 | break; | 
|  | 2180 | } | 
|  | 2181 |  | 
|  | 2182 | if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */ | 
|  | 2183 | cmd_free(h, c); | 
|  | 2184 | return SCSI_MLQUEUE_HOST_BUSY; | 
|  | 2185 | } | 
|  | 2186 | enqueue_cmd_and_start_io(h, c); | 
|  | 2187 | /* the cmd'll come back via intr handler in complete_scsi_command()  */ | 
|  | 2188 | return 0; | 
|  | 2189 | } | 
|  | 2190 |  | 
|  | 2191 | static DEF_SCSI_QCMD(hpsa_scsi_queue_command) | 
|  | 2192 |  | 
|  | 2193 | static void hpsa_scan_start(struct Scsi_Host *sh) | 
|  | 2194 | { | 
|  | 2195 | struct ctlr_info *h = shost_to_hba(sh); | 
|  | 2196 | unsigned long flags; | 
|  | 2197 |  | 
|  | 2198 | /* wait until any scan already in progress is finished. */ | 
|  | 2199 | while (1) { | 
|  | 2200 | spin_lock_irqsave(&h->scan_lock, flags); | 
|  | 2201 | if (h->scan_finished) | 
|  | 2202 | break; | 
|  | 2203 | spin_unlock_irqrestore(&h->scan_lock, flags); | 
|  | 2204 | wait_event(h->scan_wait_queue, h->scan_finished); | 
|  | 2205 | /* Note: We don't need to worry about a race between this | 
|  | 2206 | * thread and driver unload because the midlayer will | 
|  | 2207 | * have incremented the reference count, so unload won't | 
|  | 2208 | * happen if we're in here. | 
|  | 2209 | */ | 
|  | 2210 | } | 
|  | 2211 | h->scan_finished = 0; /* mark scan as in progress */ | 
|  | 2212 | spin_unlock_irqrestore(&h->scan_lock, flags); | 
|  | 2213 |  | 
|  | 2214 | hpsa_update_scsi_devices(h, h->scsi_host->host_no); | 
|  | 2215 |  | 
|  | 2216 | spin_lock_irqsave(&h->scan_lock, flags); | 
|  | 2217 | h->scan_finished = 1; /* mark scan as finished. */ | 
|  | 2218 | wake_up_all(&h->scan_wait_queue); | 
|  | 2219 | spin_unlock_irqrestore(&h->scan_lock, flags); | 
|  | 2220 | } | 
|  | 2221 |  | 
|  | 2222 | static int hpsa_scan_finished(struct Scsi_Host *sh, | 
|  | 2223 | unsigned long elapsed_time) | 
|  | 2224 | { | 
|  | 2225 | struct ctlr_info *h = shost_to_hba(sh); | 
|  | 2226 | unsigned long flags; | 
|  | 2227 | int finished; | 
|  | 2228 |  | 
|  | 2229 | spin_lock_irqsave(&h->scan_lock, flags); | 
|  | 2230 | finished = h->scan_finished; | 
|  | 2231 | spin_unlock_irqrestore(&h->scan_lock, flags); | 
|  | 2232 | return finished; | 
|  | 2233 | } | 
|  | 2234 |  | 
|  | 2235 | static int hpsa_change_queue_depth(struct scsi_device *sdev, | 
|  | 2236 | int qdepth, int reason) | 
|  | 2237 | { | 
|  | 2238 | struct ctlr_info *h = sdev_to_hba(sdev); | 
|  | 2239 |  | 
|  | 2240 | if (reason != SCSI_QDEPTH_DEFAULT) | 
|  | 2241 | return -ENOTSUPP; | 
|  | 2242 |  | 
|  | 2243 | if (qdepth < 1) | 
|  | 2244 | qdepth = 1; | 
|  | 2245 | else | 
|  | 2246 | if (qdepth > h->nr_cmds) | 
|  | 2247 | qdepth = h->nr_cmds; | 
|  | 2248 | scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth); | 
|  | 2249 | return sdev->queue_depth; | 
|  | 2250 | } | 
|  | 2251 |  | 
|  | 2252 | static void hpsa_unregister_scsi(struct ctlr_info *h) | 
|  | 2253 | { | 
|  | 2254 | /* we are being forcibly unloaded, and may not refuse. */ | 
|  | 2255 | scsi_remove_host(h->scsi_host); | 
|  | 2256 | scsi_host_put(h->scsi_host); | 
|  | 2257 | h->scsi_host = NULL; | 
|  | 2258 | } | 
|  | 2259 |  | 
|  | 2260 | static int hpsa_register_scsi(struct ctlr_info *h) | 
|  | 2261 | { | 
|  | 2262 | struct Scsi_Host *sh; | 
|  | 2263 | int error; | 
|  | 2264 |  | 
|  | 2265 | sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h)); | 
|  | 2266 | if (sh == NULL) | 
|  | 2267 | goto fail; | 
|  | 2268 |  | 
|  | 2269 | sh->io_port = 0; | 
|  | 2270 | sh->n_io_port = 0; | 
|  | 2271 | sh->this_id = -1; | 
|  | 2272 | sh->max_channel = 3; | 
|  | 2273 | sh->max_cmd_len = MAX_COMMAND_SIZE; | 
|  | 2274 | sh->max_lun = HPSA_MAX_LUN; | 
|  | 2275 | sh->max_id = HPSA_MAX_LUN; | 
|  | 2276 | sh->can_queue = h->nr_cmds; | 
|  | 2277 | sh->cmd_per_lun = h->nr_cmds; | 
|  | 2278 | sh->sg_tablesize = h->maxsgentries; | 
|  | 2279 | h->scsi_host = sh; | 
|  | 2280 | sh->hostdata[0] = (unsigned long) h; | 
|  | 2281 | sh->irq = h->intr[h->intr_mode]; | 
|  | 2282 | sh->unique_id = sh->irq; | 
|  | 2283 | error = scsi_add_host(sh, &h->pdev->dev); | 
|  | 2284 | if (error) | 
|  | 2285 | goto fail_host_put; | 
|  | 2286 | scsi_scan_host(sh); | 
|  | 2287 | return 0; | 
|  | 2288 |  | 
|  | 2289 | fail_host_put: | 
|  | 2290 | dev_err(&h->pdev->dev, "%s: scsi_add_host" | 
|  | 2291 | " failed for controller %d\n", __func__, h->ctlr); | 
|  | 2292 | scsi_host_put(sh); | 
|  | 2293 | return error; | 
|  | 2294 | fail: | 
|  | 2295 | dev_err(&h->pdev->dev, "%s: scsi_host_alloc" | 
|  | 2296 | " failed for controller %d\n", __func__, h->ctlr); | 
|  | 2297 | return -ENOMEM; | 
|  | 2298 | } | 
|  | 2299 |  | 
|  | 2300 | static int wait_for_device_to_become_ready(struct ctlr_info *h, | 
|  | 2301 | unsigned char lunaddr[]) | 
|  | 2302 | { | 
|  | 2303 | int rc = 0; | 
|  | 2304 | int count = 0; | 
|  | 2305 | int waittime = 1; /* seconds */ | 
|  | 2306 | struct CommandList *c; | 
|  | 2307 |  | 
|  | 2308 | c = cmd_special_alloc(h); | 
|  | 2309 | if (!c) { | 
|  | 2310 | dev_warn(&h->pdev->dev, "out of memory in " | 
|  | 2311 | "wait_for_device_to_become_ready.\n"); | 
|  | 2312 | return IO_ERROR; | 
|  | 2313 | } | 
|  | 2314 |  | 
|  | 2315 | /* Send test unit ready until device ready, or give up. */ | 
|  | 2316 | while (count < HPSA_TUR_RETRY_LIMIT) { | 
|  | 2317 |  | 
|  | 2318 | /* Wait for a bit.  do this first, because if we send | 
|  | 2319 | * the TUR right away, the reset will just abort it. | 
|  | 2320 | */ | 
|  | 2321 | msleep(1000 * waittime); | 
|  | 2322 | count++; | 
|  | 2323 |  | 
|  | 2324 | /* Increase wait time with each try, up to a point. */ | 
|  | 2325 | if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS) | 
|  | 2326 | waittime = waittime * 2; | 
|  | 2327 |  | 
|  | 2328 | /* Send the Test Unit Ready */ | 
|  | 2329 | fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, lunaddr, TYPE_CMD); | 
|  | 2330 | hpsa_scsi_do_simple_cmd_core(h, c); | 
|  | 2331 | /* no unmap needed here because no data xfer. */ | 
|  | 2332 |  | 
|  | 2333 | if (c->err_info->CommandStatus == CMD_SUCCESS) | 
|  | 2334 | break; | 
|  | 2335 |  | 
|  | 2336 | if (c->err_info->CommandStatus == CMD_TARGET_STATUS && | 
|  | 2337 | c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION && | 
|  | 2338 | (c->err_info->SenseInfo[2] == NO_SENSE || | 
|  | 2339 | c->err_info->SenseInfo[2] == UNIT_ATTENTION)) | 
|  | 2340 | break; | 
|  | 2341 |  | 
|  | 2342 | dev_warn(&h->pdev->dev, "waiting %d secs " | 
|  | 2343 | "for device to become ready.\n", waittime); | 
|  | 2344 | rc = 1; /* device not ready. */ | 
|  | 2345 | } | 
|  | 2346 |  | 
|  | 2347 | if (rc) | 
|  | 2348 | dev_warn(&h->pdev->dev, "giving up on device.\n"); | 
|  | 2349 | else | 
|  | 2350 | dev_warn(&h->pdev->dev, "device is ready.\n"); | 
|  | 2351 |  | 
|  | 2352 | cmd_special_free(h, c); | 
|  | 2353 | return rc; | 
|  | 2354 | } | 
|  | 2355 |  | 
|  | 2356 | /* Need at least one of these error handlers to keep ../scsi/hosts.c from | 
|  | 2357 | * complaining.  Doing a host- or bus-reset can't do anything good here. | 
|  | 2358 | */ | 
|  | 2359 | static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd) | 
|  | 2360 | { | 
|  | 2361 | int rc; | 
|  | 2362 | struct ctlr_info *h; | 
|  | 2363 | struct hpsa_scsi_dev_t *dev; | 
|  | 2364 |  | 
|  | 2365 | /* find the controller to which the command to be aborted was sent */ | 
|  | 2366 | h = sdev_to_hba(scsicmd->device); | 
|  | 2367 | if (h == NULL) /* paranoia */ | 
|  | 2368 | return FAILED; | 
|  | 2369 | dev = scsicmd->device->hostdata; | 
|  | 2370 | if (!dev) { | 
|  | 2371 | dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: " | 
|  | 2372 | "device lookup failed.\n"); | 
|  | 2373 | return FAILED; | 
|  | 2374 | } | 
|  | 2375 | dev_warn(&h->pdev->dev, "resetting device %d:%d:%d:%d\n", | 
|  | 2376 | h->scsi_host->host_no, dev->bus, dev->target, dev->lun); | 
|  | 2377 | /* send a reset to the SCSI LUN which the command was sent to */ | 
|  | 2378 | rc = hpsa_send_reset(h, dev->scsi3addr); | 
|  | 2379 | if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0) | 
|  | 2380 | return SUCCESS; | 
|  | 2381 |  | 
|  | 2382 | dev_warn(&h->pdev->dev, "resetting device failed.\n"); | 
|  | 2383 | return FAILED; | 
|  | 2384 | } | 
|  | 2385 |  | 
|  | 2386 | /* | 
|  | 2387 | * For operations that cannot sleep, a command block is allocated at init, | 
|  | 2388 | * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track | 
|  | 2389 | * which ones are free or in use.  Lock must be held when calling this. | 
|  | 2390 | * cmd_free() is the complement. | 
|  | 2391 | */ | 
|  | 2392 | static struct CommandList *cmd_alloc(struct ctlr_info *h) | 
|  | 2393 | { | 
|  | 2394 | struct CommandList *c; | 
|  | 2395 | int i; | 
|  | 2396 | union u64bit temp64; | 
|  | 2397 | dma_addr_t cmd_dma_handle, err_dma_handle; | 
|  | 2398 |  | 
|  | 2399 | do { | 
|  | 2400 | i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds); | 
|  | 2401 | if (i == h->nr_cmds) | 
|  | 2402 | return NULL; | 
|  | 2403 | } while (test_and_set_bit | 
|  | 2404 | (i & (BITS_PER_LONG - 1), | 
|  | 2405 | h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0); | 
|  | 2406 | c = h->cmd_pool + i; | 
|  | 2407 | memset(c, 0, sizeof(*c)); | 
|  | 2408 | cmd_dma_handle = h->cmd_pool_dhandle | 
|  | 2409 | + i * sizeof(*c); | 
|  | 2410 | c->err_info = h->errinfo_pool + i; | 
|  | 2411 | memset(c->err_info, 0, sizeof(*c->err_info)); | 
|  | 2412 | err_dma_handle = h->errinfo_pool_dhandle | 
|  | 2413 | + i * sizeof(*c->err_info); | 
|  | 2414 | h->nr_allocs++; | 
|  | 2415 |  | 
|  | 2416 | c->cmdindex = i; | 
|  | 2417 |  | 
|  | 2418 | INIT_LIST_HEAD(&c->list); | 
|  | 2419 | c->busaddr = (u32) cmd_dma_handle; | 
|  | 2420 | temp64.val = (u64) err_dma_handle; | 
|  | 2421 | c->ErrDesc.Addr.lower = temp64.val32.lower; | 
|  | 2422 | c->ErrDesc.Addr.upper = temp64.val32.upper; | 
|  | 2423 | c->ErrDesc.Len = sizeof(*c->err_info); | 
|  | 2424 |  | 
|  | 2425 | c->h = h; | 
|  | 2426 | return c; | 
|  | 2427 | } | 
|  | 2428 |  | 
|  | 2429 | /* For operations that can wait for kmalloc to possibly sleep, | 
|  | 2430 | * this routine can be called. Lock need not be held to call | 
|  | 2431 | * cmd_special_alloc. cmd_special_free() is the complement. | 
|  | 2432 | */ | 
|  | 2433 | static struct CommandList *cmd_special_alloc(struct ctlr_info *h) | 
|  | 2434 | { | 
|  | 2435 | struct CommandList *c; | 
|  | 2436 | union u64bit temp64; | 
|  | 2437 | dma_addr_t cmd_dma_handle, err_dma_handle; | 
|  | 2438 |  | 
|  | 2439 | c = pci_alloc_consistent(h->pdev, sizeof(*c), &cmd_dma_handle); | 
|  | 2440 | if (c == NULL) | 
|  | 2441 | return NULL; | 
|  | 2442 | memset(c, 0, sizeof(*c)); | 
|  | 2443 |  | 
|  | 2444 | c->cmdindex = -1; | 
|  | 2445 |  | 
|  | 2446 | c->err_info = pci_alloc_consistent(h->pdev, sizeof(*c->err_info), | 
|  | 2447 | &err_dma_handle); | 
|  | 2448 |  | 
|  | 2449 | if (c->err_info == NULL) { | 
|  | 2450 | pci_free_consistent(h->pdev, | 
|  | 2451 | sizeof(*c), c, cmd_dma_handle); | 
|  | 2452 | return NULL; | 
|  | 2453 | } | 
|  | 2454 | memset(c->err_info, 0, sizeof(*c->err_info)); | 
|  | 2455 |  | 
|  | 2456 | INIT_LIST_HEAD(&c->list); | 
|  | 2457 | c->busaddr = (u32) cmd_dma_handle; | 
|  | 2458 | temp64.val = (u64) err_dma_handle; | 
|  | 2459 | c->ErrDesc.Addr.lower = temp64.val32.lower; | 
|  | 2460 | c->ErrDesc.Addr.upper = temp64.val32.upper; | 
|  | 2461 | c->ErrDesc.Len = sizeof(*c->err_info); | 
|  | 2462 |  | 
|  | 2463 | c->h = h; | 
|  | 2464 | return c; | 
|  | 2465 | } | 
|  | 2466 |  | 
|  | 2467 | static void cmd_free(struct ctlr_info *h, struct CommandList *c) | 
|  | 2468 | { | 
|  | 2469 | int i; | 
|  | 2470 |  | 
|  | 2471 | i = c - h->cmd_pool; | 
|  | 2472 | clear_bit(i & (BITS_PER_LONG - 1), | 
|  | 2473 | h->cmd_pool_bits + (i / BITS_PER_LONG)); | 
|  | 2474 | h->nr_frees++; | 
|  | 2475 | } | 
|  | 2476 |  | 
|  | 2477 | static void cmd_special_free(struct ctlr_info *h, struct CommandList *c) | 
|  | 2478 | { | 
|  | 2479 | union u64bit temp64; | 
|  | 2480 |  | 
|  | 2481 | temp64.val32.lower = c->ErrDesc.Addr.lower; | 
|  | 2482 | temp64.val32.upper = c->ErrDesc.Addr.upper; | 
|  | 2483 | pci_free_consistent(h->pdev, sizeof(*c->err_info), | 
|  | 2484 | c->err_info, (dma_addr_t) temp64.val); | 
|  | 2485 | pci_free_consistent(h->pdev, sizeof(*c), | 
|  | 2486 | c, (dma_addr_t) (c->busaddr & DIRECT_LOOKUP_MASK)); | 
|  | 2487 | } | 
|  | 2488 |  | 
|  | 2489 | #ifdef CONFIG_COMPAT | 
|  | 2490 |  | 
|  | 2491 | static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, void *arg) | 
|  | 2492 | { | 
|  | 2493 | IOCTL32_Command_struct __user *arg32 = | 
|  | 2494 | (IOCTL32_Command_struct __user *) arg; | 
|  | 2495 | IOCTL_Command_struct arg64; | 
|  | 2496 | IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64)); | 
|  | 2497 | int err; | 
|  | 2498 | u32 cp; | 
|  | 2499 |  | 
|  | 2500 | memset(&arg64, 0, sizeof(arg64)); | 
|  | 2501 | err = 0; | 
|  | 2502 | err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info, | 
|  | 2503 | sizeof(arg64.LUN_info)); | 
|  | 2504 | err |= copy_from_user(&arg64.Request, &arg32->Request, | 
|  | 2505 | sizeof(arg64.Request)); | 
|  | 2506 | err |= copy_from_user(&arg64.error_info, &arg32->error_info, | 
|  | 2507 | sizeof(arg64.error_info)); | 
|  | 2508 | err |= get_user(arg64.buf_size, &arg32->buf_size); | 
|  | 2509 | err |= get_user(cp, &arg32->buf); | 
|  | 2510 | arg64.buf = compat_ptr(cp); | 
|  | 2511 | err |= copy_to_user(p, &arg64, sizeof(arg64)); | 
|  | 2512 |  | 
|  | 2513 | if (err) | 
|  | 2514 | return -EFAULT; | 
|  | 2515 |  | 
|  | 2516 | err = hpsa_ioctl(dev, CCISS_PASSTHRU, (void *)p); | 
|  | 2517 | if (err) | 
|  | 2518 | return err; | 
|  | 2519 | err |= copy_in_user(&arg32->error_info, &p->error_info, | 
|  | 2520 | sizeof(arg32->error_info)); | 
|  | 2521 | if (err) | 
|  | 2522 | return -EFAULT; | 
|  | 2523 | return err; | 
|  | 2524 | } | 
|  | 2525 |  | 
|  | 2526 | static int hpsa_ioctl32_big_passthru(struct scsi_device *dev, | 
|  | 2527 | int cmd, void *arg) | 
|  | 2528 | { | 
|  | 2529 | BIG_IOCTL32_Command_struct __user *arg32 = | 
|  | 2530 | (BIG_IOCTL32_Command_struct __user *) arg; | 
|  | 2531 | BIG_IOCTL_Command_struct arg64; | 
|  | 2532 | BIG_IOCTL_Command_struct __user *p = | 
|  | 2533 | compat_alloc_user_space(sizeof(arg64)); | 
|  | 2534 | int err; | 
|  | 2535 | u32 cp; | 
|  | 2536 |  | 
|  | 2537 | memset(&arg64, 0, sizeof(arg64)); | 
|  | 2538 | err = 0; | 
|  | 2539 | err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info, | 
|  | 2540 | sizeof(arg64.LUN_info)); | 
|  | 2541 | err |= copy_from_user(&arg64.Request, &arg32->Request, | 
|  | 2542 | sizeof(arg64.Request)); | 
|  | 2543 | err |= copy_from_user(&arg64.error_info, &arg32->error_info, | 
|  | 2544 | sizeof(arg64.error_info)); | 
|  | 2545 | err |= get_user(arg64.buf_size, &arg32->buf_size); | 
|  | 2546 | err |= get_user(arg64.malloc_size, &arg32->malloc_size); | 
|  | 2547 | err |= get_user(cp, &arg32->buf); | 
|  | 2548 | arg64.buf = compat_ptr(cp); | 
|  | 2549 | err |= copy_to_user(p, &arg64, sizeof(arg64)); | 
|  | 2550 |  | 
|  | 2551 | if (err) | 
|  | 2552 | return -EFAULT; | 
|  | 2553 |  | 
|  | 2554 | err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, (void *)p); | 
|  | 2555 | if (err) | 
|  | 2556 | return err; | 
|  | 2557 | err |= copy_in_user(&arg32->error_info, &p->error_info, | 
|  | 2558 | sizeof(arg32->error_info)); | 
|  | 2559 | if (err) | 
|  | 2560 | return -EFAULT; | 
|  | 2561 | return err; | 
|  | 2562 | } | 
|  | 2563 |  | 
|  | 2564 | static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg) | 
|  | 2565 | { | 
|  | 2566 | switch (cmd) { | 
|  | 2567 | case CCISS_GETPCIINFO: | 
|  | 2568 | case CCISS_GETINTINFO: | 
|  | 2569 | case CCISS_SETINTINFO: | 
|  | 2570 | case CCISS_GETNODENAME: | 
|  | 2571 | case CCISS_SETNODENAME: | 
|  | 2572 | case CCISS_GETHEARTBEAT: | 
|  | 2573 | case CCISS_GETBUSTYPES: | 
|  | 2574 | case CCISS_GETFIRMVER: | 
|  | 2575 | case CCISS_GETDRIVVER: | 
|  | 2576 | case CCISS_REVALIDVOLS: | 
|  | 2577 | case CCISS_DEREGDISK: | 
|  | 2578 | case CCISS_REGNEWDISK: | 
|  | 2579 | case CCISS_REGNEWD: | 
|  | 2580 | case CCISS_RESCANDISK: | 
|  | 2581 | case CCISS_GETLUNINFO: | 
|  | 2582 | return hpsa_ioctl(dev, cmd, arg); | 
|  | 2583 |  | 
|  | 2584 | case CCISS_PASSTHRU32: | 
|  | 2585 | return hpsa_ioctl32_passthru(dev, cmd, arg); | 
|  | 2586 | case CCISS_BIG_PASSTHRU32: | 
|  | 2587 | return hpsa_ioctl32_big_passthru(dev, cmd, arg); | 
|  | 2588 |  | 
|  | 2589 | default: | 
|  | 2590 | return -ENOIOCTLCMD; | 
|  | 2591 | } | 
|  | 2592 | } | 
|  | 2593 | #endif | 
|  | 2594 |  | 
|  | 2595 | static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp) | 
|  | 2596 | { | 
|  | 2597 | struct hpsa_pci_info pciinfo; | 
|  | 2598 |  | 
|  | 2599 | if (!argp) | 
|  | 2600 | return -EINVAL; | 
|  | 2601 | pciinfo.domain = pci_domain_nr(h->pdev->bus); | 
|  | 2602 | pciinfo.bus = h->pdev->bus->number; | 
|  | 2603 | pciinfo.dev_fn = h->pdev->devfn; | 
|  | 2604 | pciinfo.board_id = h->board_id; | 
|  | 2605 | if (copy_to_user(argp, &pciinfo, sizeof(pciinfo))) | 
|  | 2606 | return -EFAULT; | 
|  | 2607 | return 0; | 
|  | 2608 | } | 
|  | 2609 |  | 
|  | 2610 | static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp) | 
|  | 2611 | { | 
|  | 2612 | DriverVer_type DriverVer; | 
|  | 2613 | unsigned char vmaj, vmin, vsubmin; | 
|  | 2614 | int rc; | 
|  | 2615 |  | 
|  | 2616 | rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu", | 
|  | 2617 | &vmaj, &vmin, &vsubmin); | 
|  | 2618 | if (rc != 3) { | 
|  | 2619 | dev_info(&h->pdev->dev, "driver version string '%s' " | 
|  | 2620 | "unrecognized.", HPSA_DRIVER_VERSION); | 
|  | 2621 | vmaj = 0; | 
|  | 2622 | vmin = 0; | 
|  | 2623 | vsubmin = 0; | 
|  | 2624 | } | 
|  | 2625 | DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin; | 
|  | 2626 | if (!argp) | 
|  | 2627 | return -EINVAL; | 
|  | 2628 | if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type))) | 
|  | 2629 | return -EFAULT; | 
|  | 2630 | return 0; | 
|  | 2631 | } | 
|  | 2632 |  | 
|  | 2633 | static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp) | 
|  | 2634 | { | 
|  | 2635 | IOCTL_Command_struct iocommand; | 
|  | 2636 | struct CommandList *c; | 
|  | 2637 | char *buff = NULL; | 
|  | 2638 | union u64bit temp64; | 
|  | 2639 |  | 
|  | 2640 | if (!argp) | 
|  | 2641 | return -EINVAL; | 
|  | 2642 | if (!capable(CAP_SYS_RAWIO)) | 
|  | 2643 | return -EPERM; | 
|  | 2644 | if (copy_from_user(&iocommand, argp, sizeof(iocommand))) | 
|  | 2645 | return -EFAULT; | 
|  | 2646 | if ((iocommand.buf_size < 1) && | 
|  | 2647 | (iocommand.Request.Type.Direction != XFER_NONE)) { | 
|  | 2648 | return -EINVAL; | 
|  | 2649 | } | 
|  | 2650 | if (iocommand.buf_size > 0) { | 
|  | 2651 | buff = kmalloc(iocommand.buf_size, GFP_KERNEL); | 
|  | 2652 | if (buff == NULL) | 
|  | 2653 | return -EFAULT; | 
|  | 2654 | if (iocommand.Request.Type.Direction == XFER_WRITE) { | 
|  | 2655 | /* Copy the data into the buffer we created */ | 
|  | 2656 | if (copy_from_user(buff, iocommand.buf, | 
|  | 2657 | iocommand.buf_size)) { | 
|  | 2658 | kfree(buff); | 
|  | 2659 | return -EFAULT; | 
|  | 2660 | } | 
|  | 2661 | } else { | 
|  | 2662 | memset(buff, 0, iocommand.buf_size); | 
|  | 2663 | } | 
|  | 2664 | } | 
|  | 2665 | c = cmd_special_alloc(h); | 
|  | 2666 | if (c == NULL) { | 
|  | 2667 | kfree(buff); | 
|  | 2668 | return -ENOMEM; | 
|  | 2669 | } | 
|  | 2670 | /* Fill in the command type */ | 
|  | 2671 | c->cmd_type = CMD_IOCTL_PEND; | 
|  | 2672 | /* Fill in Command Header */ | 
|  | 2673 | c->Header.ReplyQueue = 0; /* unused in simple mode */ | 
|  | 2674 | if (iocommand.buf_size > 0) {	/* buffer to fill */ | 
|  | 2675 | c->Header.SGList = 1; | 
|  | 2676 | c->Header.SGTotal = 1; | 
|  | 2677 | } else	{ /* no buffers to fill */ | 
|  | 2678 | c->Header.SGList = 0; | 
|  | 2679 | c->Header.SGTotal = 0; | 
|  | 2680 | } | 
|  | 2681 | memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN)); | 
|  | 2682 | /* use the kernel address the cmd block for tag */ | 
|  | 2683 | c->Header.Tag.lower = c->busaddr; | 
|  | 2684 |  | 
|  | 2685 | /* Fill in Request block */ | 
|  | 2686 | memcpy(&c->Request, &iocommand.Request, | 
|  | 2687 | sizeof(c->Request)); | 
|  | 2688 |  | 
|  | 2689 | /* Fill in the scatter gather information */ | 
|  | 2690 | if (iocommand.buf_size > 0) { | 
|  | 2691 | temp64.val = pci_map_single(h->pdev, buff, | 
|  | 2692 | iocommand.buf_size, PCI_DMA_BIDIRECTIONAL); | 
|  | 2693 | c->SG[0].Addr.lower = temp64.val32.lower; | 
|  | 2694 | c->SG[0].Addr.upper = temp64.val32.upper; | 
|  | 2695 | c->SG[0].Len = iocommand.buf_size; | 
|  | 2696 | c->SG[0].Ext = 0; /* we are not chaining*/ | 
|  | 2697 | } | 
|  | 2698 | hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c); | 
|  | 2699 | if (iocommand.buf_size > 0) | 
|  | 2700 | hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL); | 
|  | 2701 | check_ioctl_unit_attention(h, c); | 
|  | 2702 |  | 
|  | 2703 | /* Copy the error information out */ | 
|  | 2704 | memcpy(&iocommand.error_info, c->err_info, | 
|  | 2705 | sizeof(iocommand.error_info)); | 
|  | 2706 | if (copy_to_user(argp, &iocommand, sizeof(iocommand))) { | 
|  | 2707 | kfree(buff); | 
|  | 2708 | cmd_special_free(h, c); | 
|  | 2709 | return -EFAULT; | 
|  | 2710 | } | 
|  | 2711 | if (iocommand.Request.Type.Direction == XFER_READ && | 
|  | 2712 | iocommand.buf_size > 0) { | 
|  | 2713 | /* Copy the data out of the buffer we created */ | 
|  | 2714 | if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) { | 
|  | 2715 | kfree(buff); | 
|  | 2716 | cmd_special_free(h, c); | 
|  | 2717 | return -EFAULT; | 
|  | 2718 | } | 
|  | 2719 | } | 
|  | 2720 | kfree(buff); | 
|  | 2721 | cmd_special_free(h, c); | 
|  | 2722 | return 0; | 
|  | 2723 | } | 
|  | 2724 |  | 
|  | 2725 | static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp) | 
|  | 2726 | { | 
|  | 2727 | BIG_IOCTL_Command_struct *ioc; | 
|  | 2728 | struct CommandList *c; | 
|  | 2729 | unsigned char **buff = NULL; | 
|  | 2730 | int *buff_size = NULL; | 
|  | 2731 | union u64bit temp64; | 
|  | 2732 | BYTE sg_used = 0; | 
|  | 2733 | int status = 0; | 
|  | 2734 | int i; | 
|  | 2735 | u32 left; | 
|  | 2736 | u32 sz; | 
|  | 2737 | BYTE __user *data_ptr; | 
|  | 2738 |  | 
|  | 2739 | if (!argp) | 
|  | 2740 | return -EINVAL; | 
|  | 2741 | if (!capable(CAP_SYS_RAWIO)) | 
|  | 2742 | return -EPERM; | 
|  | 2743 | ioc = (BIG_IOCTL_Command_struct *) | 
|  | 2744 | kmalloc(sizeof(*ioc), GFP_KERNEL); | 
|  | 2745 | if (!ioc) { | 
|  | 2746 | status = -ENOMEM; | 
|  | 2747 | goto cleanup1; | 
|  | 2748 | } | 
|  | 2749 | if (copy_from_user(ioc, argp, sizeof(*ioc))) { | 
|  | 2750 | status = -EFAULT; | 
|  | 2751 | goto cleanup1; | 
|  | 2752 | } | 
|  | 2753 | if ((ioc->buf_size < 1) && | 
|  | 2754 | (ioc->Request.Type.Direction != XFER_NONE)) { | 
|  | 2755 | status = -EINVAL; | 
|  | 2756 | goto cleanup1; | 
|  | 2757 | } | 
|  | 2758 | /* Check kmalloc limits  using all SGs */ | 
|  | 2759 | if (ioc->malloc_size > MAX_KMALLOC_SIZE) { | 
|  | 2760 | status = -EINVAL; | 
|  | 2761 | goto cleanup1; | 
|  | 2762 | } | 
|  | 2763 | if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) { | 
|  | 2764 | status = -EINVAL; | 
|  | 2765 | goto cleanup1; | 
|  | 2766 | } | 
|  | 2767 | buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL); | 
|  | 2768 | if (!buff) { | 
|  | 2769 | status = -ENOMEM; | 
|  | 2770 | goto cleanup1; | 
|  | 2771 | } | 
|  | 2772 | buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL); | 
|  | 2773 | if (!buff_size) { | 
|  | 2774 | status = -ENOMEM; | 
|  | 2775 | goto cleanup1; | 
|  | 2776 | } | 
|  | 2777 | left = ioc->buf_size; | 
|  | 2778 | data_ptr = ioc->buf; | 
|  | 2779 | while (left) { | 
|  | 2780 | sz = (left > ioc->malloc_size) ? ioc->malloc_size : left; | 
|  | 2781 | buff_size[sg_used] = sz; | 
|  | 2782 | buff[sg_used] = kmalloc(sz, GFP_KERNEL); | 
|  | 2783 | if (buff[sg_used] == NULL) { | 
|  | 2784 | status = -ENOMEM; | 
|  | 2785 | goto cleanup1; | 
|  | 2786 | } | 
|  | 2787 | if (ioc->Request.Type.Direction == XFER_WRITE) { | 
|  | 2788 | if (copy_from_user(buff[sg_used], data_ptr, sz)) { | 
|  | 2789 | status = -ENOMEM; | 
|  | 2790 | goto cleanup1; | 
|  | 2791 | } | 
|  | 2792 | } else | 
|  | 2793 | memset(buff[sg_used], 0, sz); | 
|  | 2794 | left -= sz; | 
|  | 2795 | data_ptr += sz; | 
|  | 2796 | sg_used++; | 
|  | 2797 | } | 
|  | 2798 | c = cmd_special_alloc(h); | 
|  | 2799 | if (c == NULL) { | 
|  | 2800 | status = -ENOMEM; | 
|  | 2801 | goto cleanup1; | 
|  | 2802 | } | 
|  | 2803 | c->cmd_type = CMD_IOCTL_PEND; | 
|  | 2804 | c->Header.ReplyQueue = 0; | 
|  | 2805 | c->Header.SGList = c->Header.SGTotal = sg_used; | 
|  | 2806 | memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN)); | 
|  | 2807 | c->Header.Tag.lower = c->busaddr; | 
|  | 2808 | memcpy(&c->Request, &ioc->Request, sizeof(c->Request)); | 
|  | 2809 | if (ioc->buf_size > 0) { | 
|  | 2810 | int i; | 
|  | 2811 | for (i = 0; i < sg_used; i++) { | 
|  | 2812 | temp64.val = pci_map_single(h->pdev, buff[i], | 
|  | 2813 | buff_size[i], PCI_DMA_BIDIRECTIONAL); | 
|  | 2814 | c->SG[i].Addr.lower = temp64.val32.lower; | 
|  | 2815 | c->SG[i].Addr.upper = temp64.val32.upper; | 
|  | 2816 | c->SG[i].Len = buff_size[i]; | 
|  | 2817 | /* we are not chaining */ | 
|  | 2818 | c->SG[i].Ext = 0; | 
|  | 2819 | } | 
|  | 2820 | } | 
|  | 2821 | hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c); | 
|  | 2822 | if (sg_used) | 
|  | 2823 | hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL); | 
|  | 2824 | check_ioctl_unit_attention(h, c); | 
|  | 2825 | /* Copy the error information out */ | 
|  | 2826 | memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info)); | 
|  | 2827 | if (copy_to_user(argp, ioc, sizeof(*ioc))) { | 
|  | 2828 | cmd_special_free(h, c); | 
|  | 2829 | status = -EFAULT; | 
|  | 2830 | goto cleanup1; | 
|  | 2831 | } | 
|  | 2832 | if (ioc->Request.Type.Direction == XFER_READ && ioc->buf_size > 0) { | 
|  | 2833 | /* Copy the data out of the buffer we created */ | 
|  | 2834 | BYTE __user *ptr = ioc->buf; | 
|  | 2835 | for (i = 0; i < sg_used; i++) { | 
|  | 2836 | if (copy_to_user(ptr, buff[i], buff_size[i])) { | 
|  | 2837 | cmd_special_free(h, c); | 
|  | 2838 | status = -EFAULT; | 
|  | 2839 | goto cleanup1; | 
|  | 2840 | } | 
|  | 2841 | ptr += buff_size[i]; | 
|  | 2842 | } | 
|  | 2843 | } | 
|  | 2844 | cmd_special_free(h, c); | 
|  | 2845 | status = 0; | 
|  | 2846 | cleanup1: | 
|  | 2847 | if (buff) { | 
|  | 2848 | for (i = 0; i < sg_used; i++) | 
|  | 2849 | kfree(buff[i]); | 
|  | 2850 | kfree(buff); | 
|  | 2851 | } | 
|  | 2852 | kfree(buff_size); | 
|  | 2853 | kfree(ioc); | 
|  | 2854 | return status; | 
|  | 2855 | } | 
|  | 2856 |  | 
|  | 2857 | static void check_ioctl_unit_attention(struct ctlr_info *h, | 
|  | 2858 | struct CommandList *c) | 
|  | 2859 | { | 
|  | 2860 | if (c->err_info->CommandStatus == CMD_TARGET_STATUS && | 
|  | 2861 | c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) | 
|  | 2862 | (void) check_for_unit_attention(h, c); | 
|  | 2863 | } | 
|  | 2864 | /* | 
|  | 2865 | * ioctl | 
|  | 2866 | */ | 
|  | 2867 | static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg) | 
|  | 2868 | { | 
|  | 2869 | struct ctlr_info *h; | 
|  | 2870 | void __user *argp = (void __user *)arg; | 
|  | 2871 |  | 
|  | 2872 | h = sdev_to_hba(dev); | 
|  | 2873 |  | 
|  | 2874 | switch (cmd) { | 
|  | 2875 | case CCISS_DEREGDISK: | 
|  | 2876 | case CCISS_REGNEWDISK: | 
|  | 2877 | case CCISS_REGNEWD: | 
|  | 2878 | hpsa_scan_start(h->scsi_host); | 
|  | 2879 | return 0; | 
|  | 2880 | case CCISS_GETPCIINFO: | 
|  | 2881 | return hpsa_getpciinfo_ioctl(h, argp); | 
|  | 2882 | case CCISS_GETDRIVVER: | 
|  | 2883 | return hpsa_getdrivver_ioctl(h, argp); | 
|  | 2884 | case CCISS_PASSTHRU: | 
|  | 2885 | return hpsa_passthru_ioctl(h, argp); | 
|  | 2886 | case CCISS_BIG_PASSTHRU: | 
|  | 2887 | return hpsa_big_passthru_ioctl(h, argp); | 
|  | 2888 | default: | 
|  | 2889 | return -ENOTTY; | 
|  | 2890 | } | 
|  | 2891 | } | 
|  | 2892 |  | 
|  | 2893 | static int __devinit hpsa_send_host_reset(struct ctlr_info *h, | 
|  | 2894 | unsigned char *scsi3addr, u8 reset_type) | 
|  | 2895 | { | 
|  | 2896 | struct CommandList *c; | 
|  | 2897 |  | 
|  | 2898 | c = cmd_alloc(h); | 
|  | 2899 | if (!c) | 
|  | 2900 | return -ENOMEM; | 
|  | 2901 | fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, | 
|  | 2902 | RAID_CTLR_LUNID, TYPE_MSG); | 
|  | 2903 | c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */ | 
|  | 2904 | c->waiting = NULL; | 
|  | 2905 | enqueue_cmd_and_start_io(h, c); | 
|  | 2906 | /* Don't wait for completion, the reset won't complete.  Don't free | 
|  | 2907 | * the command either.  This is the last command we will send before | 
|  | 2908 | * re-initializing everything, so it doesn't matter and won't leak. | 
|  | 2909 | */ | 
|  | 2910 | return 0; | 
|  | 2911 | } | 
|  | 2912 |  | 
|  | 2913 | static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, | 
|  | 2914 | void *buff, size_t size, u8 page_code, unsigned char *scsi3addr, | 
|  | 2915 | int cmd_type) | 
|  | 2916 | { | 
|  | 2917 | int pci_dir = XFER_NONE; | 
|  | 2918 |  | 
|  | 2919 | c->cmd_type = CMD_IOCTL_PEND; | 
|  | 2920 | c->Header.ReplyQueue = 0; | 
|  | 2921 | if (buff != NULL && size > 0) { | 
|  | 2922 | c->Header.SGList = 1; | 
|  | 2923 | c->Header.SGTotal = 1; | 
|  | 2924 | } else { | 
|  | 2925 | c->Header.SGList = 0; | 
|  | 2926 | c->Header.SGTotal = 0; | 
|  | 2927 | } | 
|  | 2928 | c->Header.Tag.lower = c->busaddr; | 
|  | 2929 | memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8); | 
|  | 2930 |  | 
|  | 2931 | c->Request.Type.Type = cmd_type; | 
|  | 2932 | if (cmd_type == TYPE_CMD) { | 
|  | 2933 | switch (cmd) { | 
|  | 2934 | case HPSA_INQUIRY: | 
|  | 2935 | /* are we trying to read a vital product page */ | 
|  | 2936 | if (page_code != 0) { | 
|  | 2937 | c->Request.CDB[1] = 0x01; | 
|  | 2938 | c->Request.CDB[2] = page_code; | 
|  | 2939 | } | 
|  | 2940 | c->Request.CDBLen = 6; | 
|  | 2941 | c->Request.Type.Attribute = ATTR_SIMPLE; | 
|  | 2942 | c->Request.Type.Direction = XFER_READ; | 
|  | 2943 | c->Request.Timeout = 0; | 
|  | 2944 | c->Request.CDB[0] = HPSA_INQUIRY; | 
|  | 2945 | c->Request.CDB[4] = size & 0xFF; | 
|  | 2946 | break; | 
|  | 2947 | case HPSA_REPORT_LOG: | 
|  | 2948 | case HPSA_REPORT_PHYS: | 
|  | 2949 | /* Talking to controller so It's a physical command | 
|  | 2950 | mode = 00 target = 0.  Nothing to write. | 
|  | 2951 | */ | 
|  | 2952 | c->Request.CDBLen = 12; | 
|  | 2953 | c->Request.Type.Attribute = ATTR_SIMPLE; | 
|  | 2954 | c->Request.Type.Direction = XFER_READ; | 
|  | 2955 | c->Request.Timeout = 0; | 
|  | 2956 | c->Request.CDB[0] = cmd; | 
|  | 2957 | c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ | 
|  | 2958 | c->Request.CDB[7] = (size >> 16) & 0xFF; | 
|  | 2959 | c->Request.CDB[8] = (size >> 8) & 0xFF; | 
|  | 2960 | c->Request.CDB[9] = size & 0xFF; | 
|  | 2961 | break; | 
|  | 2962 | case HPSA_CACHE_FLUSH: | 
|  | 2963 | c->Request.CDBLen = 12; | 
|  | 2964 | c->Request.Type.Attribute = ATTR_SIMPLE; | 
|  | 2965 | c->Request.Type.Direction = XFER_WRITE; | 
|  | 2966 | c->Request.Timeout = 0; | 
|  | 2967 | c->Request.CDB[0] = BMIC_WRITE; | 
|  | 2968 | c->Request.CDB[6] = BMIC_CACHE_FLUSH; | 
|  | 2969 | c->Request.CDB[7] = (size >> 8) & 0xFF; | 
|  | 2970 | c->Request.CDB[8] = size & 0xFF; | 
|  | 2971 | break; | 
|  | 2972 | case TEST_UNIT_READY: | 
|  | 2973 | c->Request.CDBLen = 6; | 
|  | 2974 | c->Request.Type.Attribute = ATTR_SIMPLE; | 
|  | 2975 | c->Request.Type.Direction = XFER_NONE; | 
|  | 2976 | c->Request.Timeout = 0; | 
|  | 2977 | break; | 
|  | 2978 | default: | 
|  | 2979 | dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd); | 
|  | 2980 | BUG(); | 
|  | 2981 | return; | 
|  | 2982 | } | 
|  | 2983 | } else if (cmd_type == TYPE_MSG) { | 
|  | 2984 | switch (cmd) { | 
|  | 2985 |  | 
|  | 2986 | case  HPSA_DEVICE_RESET_MSG: | 
|  | 2987 | c->Request.CDBLen = 16; | 
|  | 2988 | c->Request.Type.Type =  1; /* It is a MSG not a CMD */ | 
|  | 2989 | c->Request.Type.Attribute = ATTR_SIMPLE; | 
|  | 2990 | c->Request.Type.Direction = XFER_NONE; | 
|  | 2991 | c->Request.Timeout = 0; /* Don't time out */ | 
|  | 2992 | memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB)); | 
|  | 2993 | c->Request.CDB[0] =  cmd; | 
|  | 2994 | c->Request.CDB[1] = HPSA_RESET_TYPE_LUN; | 
|  | 2995 | /* If bytes 4-7 are zero, it means reset the */ | 
|  | 2996 | /* LunID device */ | 
|  | 2997 | c->Request.CDB[4] = 0x00; | 
|  | 2998 | c->Request.CDB[5] = 0x00; | 
|  | 2999 | c->Request.CDB[6] = 0x00; | 
|  | 3000 | c->Request.CDB[7] = 0x00; | 
|  | 3001 | break; | 
|  | 3002 |  | 
|  | 3003 | default: | 
|  | 3004 | dev_warn(&h->pdev->dev, "unknown message type %d\n", | 
|  | 3005 | cmd); | 
|  | 3006 | BUG(); | 
|  | 3007 | } | 
|  | 3008 | } else { | 
|  | 3009 | dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type); | 
|  | 3010 | BUG(); | 
|  | 3011 | } | 
|  | 3012 |  | 
|  | 3013 | switch (c->Request.Type.Direction) { | 
|  | 3014 | case XFER_READ: | 
|  | 3015 | pci_dir = PCI_DMA_FROMDEVICE; | 
|  | 3016 | break; | 
|  | 3017 | case XFER_WRITE: | 
|  | 3018 | pci_dir = PCI_DMA_TODEVICE; | 
|  | 3019 | break; | 
|  | 3020 | case XFER_NONE: | 
|  | 3021 | pci_dir = PCI_DMA_NONE; | 
|  | 3022 | break; | 
|  | 3023 | default: | 
|  | 3024 | pci_dir = PCI_DMA_BIDIRECTIONAL; | 
|  | 3025 | } | 
|  | 3026 |  | 
|  | 3027 | hpsa_map_one(h->pdev, c, buff, size, pci_dir); | 
|  | 3028 |  | 
|  | 3029 | return; | 
|  | 3030 | } | 
|  | 3031 |  | 
|  | 3032 | /* | 
|  | 3033 | * Map (physical) PCI mem into (virtual) kernel space | 
|  | 3034 | */ | 
|  | 3035 | static void __iomem *remap_pci_mem(ulong base, ulong size) | 
|  | 3036 | { | 
|  | 3037 | ulong page_base = ((ulong) base) & PAGE_MASK; | 
|  | 3038 | ulong page_offs = ((ulong) base) - page_base; | 
|  | 3039 | void __iomem *page_remapped = ioremap(page_base, page_offs + size); | 
|  | 3040 |  | 
|  | 3041 | return page_remapped ? (page_remapped + page_offs) : NULL; | 
|  | 3042 | } | 
|  | 3043 |  | 
|  | 3044 | /* Takes cmds off the submission queue and sends them to the hardware, | 
|  | 3045 | * then puts them on the queue of cmds waiting for completion. | 
|  | 3046 | */ | 
|  | 3047 | static void start_io(struct ctlr_info *h) | 
|  | 3048 | { | 
|  | 3049 | struct CommandList *c; | 
|  | 3050 |  | 
|  | 3051 | while (!list_empty(&h->reqQ)) { | 
|  | 3052 | c = list_entry(h->reqQ.next, struct CommandList, list); | 
|  | 3053 | /* can't do anything if fifo is full */ | 
|  | 3054 | if ((h->access.fifo_full(h))) { | 
|  | 3055 | dev_warn(&h->pdev->dev, "fifo full\n"); | 
|  | 3056 | break; | 
|  | 3057 | } | 
|  | 3058 |  | 
|  | 3059 | /* Get the first entry from the Request Q */ | 
|  | 3060 | removeQ(c); | 
|  | 3061 | h->Qdepth--; | 
|  | 3062 |  | 
|  | 3063 | /* Tell the controller execute command */ | 
|  | 3064 | h->access.submit_command(h, c); | 
|  | 3065 |  | 
|  | 3066 | /* Put job onto the completed Q */ | 
|  | 3067 | addQ(&h->cmpQ, c); | 
|  | 3068 | } | 
|  | 3069 | } | 
|  | 3070 |  | 
|  | 3071 | static inline unsigned long get_next_completion(struct ctlr_info *h) | 
|  | 3072 | { | 
|  | 3073 | return h->access.command_completed(h); | 
|  | 3074 | } | 
|  | 3075 |  | 
|  | 3076 | static inline bool interrupt_pending(struct ctlr_info *h) | 
|  | 3077 | { | 
|  | 3078 | return h->access.intr_pending(h); | 
|  | 3079 | } | 
|  | 3080 |  | 
|  | 3081 | static inline long interrupt_not_for_us(struct ctlr_info *h) | 
|  | 3082 | { | 
|  | 3083 | return (h->access.intr_pending(h) == 0) || | 
|  | 3084 | (h->interrupts_enabled == 0); | 
|  | 3085 | } | 
|  | 3086 |  | 
|  | 3087 | static inline int bad_tag(struct ctlr_info *h, u32 tag_index, | 
|  | 3088 | u32 raw_tag) | 
|  | 3089 | { | 
|  | 3090 | if (unlikely(tag_index >= h->nr_cmds)) { | 
|  | 3091 | dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag); | 
|  | 3092 | return 1; | 
|  | 3093 | } | 
|  | 3094 | return 0; | 
|  | 3095 | } | 
|  | 3096 |  | 
|  | 3097 | static inline void finish_cmd(struct CommandList *c, u32 raw_tag) | 
|  | 3098 | { | 
|  | 3099 | removeQ(c); | 
|  | 3100 | dial_up_lockup_detection_on_fw_flash_complete(c->h, c); | 
|  | 3101 | if (likely(c->cmd_type == CMD_SCSI)) | 
|  | 3102 | complete_scsi_command(c); | 
|  | 3103 | else if (c->cmd_type == CMD_IOCTL_PEND) | 
|  | 3104 | complete(c->waiting); | 
|  | 3105 | } | 
|  | 3106 |  | 
|  | 3107 | static inline u32 hpsa_tag_contains_index(u32 tag) | 
|  | 3108 | { | 
|  | 3109 | return tag & DIRECT_LOOKUP_BIT; | 
|  | 3110 | } | 
|  | 3111 |  | 
|  | 3112 | static inline u32 hpsa_tag_to_index(u32 tag) | 
|  | 3113 | { | 
|  | 3114 | return tag >> DIRECT_LOOKUP_SHIFT; | 
|  | 3115 | } | 
|  | 3116 |  | 
|  | 3117 |  | 
|  | 3118 | static inline u32 hpsa_tag_discard_error_bits(struct ctlr_info *h, u32 tag) | 
|  | 3119 | { | 
|  | 3120 | #define HPSA_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1) | 
|  | 3121 | #define HPSA_SIMPLE_ERROR_BITS 0x03 | 
|  | 3122 | if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant))) | 
|  | 3123 | return tag & ~HPSA_SIMPLE_ERROR_BITS; | 
|  | 3124 | return tag & ~HPSA_PERF_ERROR_BITS; | 
|  | 3125 | } | 
|  | 3126 |  | 
|  | 3127 | /* process completion of an indexed ("direct lookup") command */ | 
|  | 3128 | static inline u32 process_indexed_cmd(struct ctlr_info *h, | 
|  | 3129 | u32 raw_tag) | 
|  | 3130 | { | 
|  | 3131 | u32 tag_index; | 
|  | 3132 | struct CommandList *c; | 
|  | 3133 |  | 
|  | 3134 | tag_index = hpsa_tag_to_index(raw_tag); | 
|  | 3135 | if (bad_tag(h, tag_index, raw_tag)) | 
|  | 3136 | return next_command(h); | 
|  | 3137 | c = h->cmd_pool + tag_index; | 
|  | 3138 | finish_cmd(c, raw_tag); | 
|  | 3139 | return next_command(h); | 
|  | 3140 | } | 
|  | 3141 |  | 
|  | 3142 | /* process completion of a non-indexed command */ | 
|  | 3143 | static inline u32 process_nonindexed_cmd(struct ctlr_info *h, | 
|  | 3144 | u32 raw_tag) | 
|  | 3145 | { | 
|  | 3146 | u32 tag; | 
|  | 3147 | struct CommandList *c = NULL; | 
|  | 3148 |  | 
|  | 3149 | tag = hpsa_tag_discard_error_bits(h, raw_tag); | 
|  | 3150 | list_for_each_entry(c, &h->cmpQ, list) { | 
|  | 3151 | if ((c->busaddr & 0xFFFFFFE0) == (tag & 0xFFFFFFE0)) { | 
|  | 3152 | finish_cmd(c, raw_tag); | 
|  | 3153 | return next_command(h); | 
|  | 3154 | } | 
|  | 3155 | } | 
|  | 3156 | bad_tag(h, h->nr_cmds + 1, raw_tag); | 
|  | 3157 | return next_command(h); | 
|  | 3158 | } | 
|  | 3159 |  | 
|  | 3160 | /* Some controllers, like p400, will give us one interrupt | 
|  | 3161 | * after a soft reset, even if we turned interrupts off. | 
|  | 3162 | * Only need to check for this in the hpsa_xxx_discard_completions | 
|  | 3163 | * functions. | 
|  | 3164 | */ | 
|  | 3165 | static int ignore_bogus_interrupt(struct ctlr_info *h) | 
|  | 3166 | { | 
|  | 3167 | if (likely(!reset_devices)) | 
|  | 3168 | return 0; | 
|  | 3169 |  | 
|  | 3170 | if (likely(h->interrupts_enabled)) | 
|  | 3171 | return 0; | 
|  | 3172 |  | 
|  | 3173 | dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled " | 
|  | 3174 | "(known firmware bug.)  Ignoring.\n"); | 
|  | 3175 |  | 
|  | 3176 | return 1; | 
|  | 3177 | } | 
|  | 3178 |  | 
|  | 3179 | static irqreturn_t hpsa_intx_discard_completions(int irq, void *dev_id) | 
|  | 3180 | { | 
|  | 3181 | struct ctlr_info *h = dev_id; | 
|  | 3182 | unsigned long flags; | 
|  | 3183 | u32 raw_tag; | 
|  | 3184 |  | 
|  | 3185 | if (ignore_bogus_interrupt(h)) | 
|  | 3186 | return IRQ_NONE; | 
|  | 3187 |  | 
|  | 3188 | if (interrupt_not_for_us(h)) | 
|  | 3189 | return IRQ_NONE; | 
|  | 3190 | spin_lock_irqsave(&h->lock, flags); | 
|  | 3191 | h->last_intr_timestamp = get_jiffies_64(); | 
|  | 3192 | while (interrupt_pending(h)) { | 
|  | 3193 | raw_tag = get_next_completion(h); | 
|  | 3194 | while (raw_tag != FIFO_EMPTY) | 
|  | 3195 | raw_tag = next_command(h); | 
|  | 3196 | } | 
|  | 3197 | spin_unlock_irqrestore(&h->lock, flags); | 
|  | 3198 | return IRQ_HANDLED; | 
|  | 3199 | } | 
|  | 3200 |  | 
|  | 3201 | static irqreturn_t hpsa_msix_discard_completions(int irq, void *dev_id) | 
|  | 3202 | { | 
|  | 3203 | struct ctlr_info *h = dev_id; | 
|  | 3204 | unsigned long flags; | 
|  | 3205 | u32 raw_tag; | 
|  | 3206 |  | 
|  | 3207 | if (ignore_bogus_interrupt(h)) | 
|  | 3208 | return IRQ_NONE; | 
|  | 3209 |  | 
|  | 3210 | spin_lock_irqsave(&h->lock, flags); | 
|  | 3211 | h->last_intr_timestamp = get_jiffies_64(); | 
|  | 3212 | raw_tag = get_next_completion(h); | 
|  | 3213 | while (raw_tag != FIFO_EMPTY) | 
|  | 3214 | raw_tag = next_command(h); | 
|  | 3215 | spin_unlock_irqrestore(&h->lock, flags); | 
|  | 3216 | return IRQ_HANDLED; | 
|  | 3217 | } | 
|  | 3218 |  | 
|  | 3219 | static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id) | 
|  | 3220 | { | 
|  | 3221 | struct ctlr_info *h = dev_id; | 
|  | 3222 | unsigned long flags; | 
|  | 3223 | u32 raw_tag; | 
|  | 3224 |  | 
|  | 3225 | if (interrupt_not_for_us(h)) | 
|  | 3226 | return IRQ_NONE; | 
|  | 3227 | spin_lock_irqsave(&h->lock, flags); | 
|  | 3228 | h->last_intr_timestamp = get_jiffies_64(); | 
|  | 3229 | while (interrupt_pending(h)) { | 
|  | 3230 | raw_tag = get_next_completion(h); | 
|  | 3231 | while (raw_tag != FIFO_EMPTY) { | 
|  | 3232 | if (hpsa_tag_contains_index(raw_tag)) | 
|  | 3233 | raw_tag = process_indexed_cmd(h, raw_tag); | 
|  | 3234 | else | 
|  | 3235 | raw_tag = process_nonindexed_cmd(h, raw_tag); | 
|  | 3236 | } | 
|  | 3237 | } | 
|  | 3238 | spin_unlock_irqrestore(&h->lock, flags); | 
|  | 3239 | return IRQ_HANDLED; | 
|  | 3240 | } | 
|  | 3241 |  | 
|  | 3242 | static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id) | 
|  | 3243 | { | 
|  | 3244 | struct ctlr_info *h = dev_id; | 
|  | 3245 | unsigned long flags; | 
|  | 3246 | u32 raw_tag; | 
|  | 3247 |  | 
|  | 3248 | spin_lock_irqsave(&h->lock, flags); | 
|  | 3249 | h->last_intr_timestamp = get_jiffies_64(); | 
|  | 3250 | raw_tag = get_next_completion(h); | 
|  | 3251 | while (raw_tag != FIFO_EMPTY) { | 
|  | 3252 | if (hpsa_tag_contains_index(raw_tag)) | 
|  | 3253 | raw_tag = process_indexed_cmd(h, raw_tag); | 
|  | 3254 | else | 
|  | 3255 | raw_tag = process_nonindexed_cmd(h, raw_tag); | 
|  | 3256 | } | 
|  | 3257 | spin_unlock_irqrestore(&h->lock, flags); | 
|  | 3258 | return IRQ_HANDLED; | 
|  | 3259 | } | 
|  | 3260 |  | 
|  | 3261 | /* Send a message CDB to the firmware. Careful, this only works | 
|  | 3262 | * in simple mode, not performant mode due to the tag lookup. | 
|  | 3263 | * We only ever use this immediately after a controller reset. | 
|  | 3264 | */ | 
|  | 3265 | static __devinit int hpsa_message(struct pci_dev *pdev, unsigned char opcode, | 
|  | 3266 | unsigned char type) | 
|  | 3267 | { | 
|  | 3268 | struct Command { | 
|  | 3269 | struct CommandListHeader CommandHeader; | 
|  | 3270 | struct RequestBlock Request; | 
|  | 3271 | struct ErrDescriptor ErrorDescriptor; | 
|  | 3272 | }; | 
|  | 3273 | struct Command *cmd; | 
|  | 3274 | static const size_t cmd_sz = sizeof(*cmd) + | 
|  | 3275 | sizeof(cmd->ErrorDescriptor); | 
|  | 3276 | dma_addr_t paddr64; | 
|  | 3277 | uint32_t paddr32, tag; | 
|  | 3278 | void __iomem *vaddr; | 
|  | 3279 | int i, err; | 
|  | 3280 |  | 
|  | 3281 | vaddr = pci_ioremap_bar(pdev, 0); | 
|  | 3282 | if (vaddr == NULL) | 
|  | 3283 | return -ENOMEM; | 
|  | 3284 |  | 
|  | 3285 | /* The Inbound Post Queue only accepts 32-bit physical addresses for the | 
|  | 3286 | * CCISS commands, so they must be allocated from the lower 4GiB of | 
|  | 3287 | * memory. | 
|  | 3288 | */ | 
|  | 3289 | err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); | 
|  | 3290 | if (err) { | 
|  | 3291 | iounmap(vaddr); | 
|  | 3292 | return -ENOMEM; | 
|  | 3293 | } | 
|  | 3294 |  | 
|  | 3295 | cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64); | 
|  | 3296 | if (cmd == NULL) { | 
|  | 3297 | iounmap(vaddr); | 
|  | 3298 | return -ENOMEM; | 
|  | 3299 | } | 
|  | 3300 |  | 
|  | 3301 | /* This must fit, because of the 32-bit consistent DMA mask.  Also, | 
|  | 3302 | * although there's no guarantee, we assume that the address is at | 
|  | 3303 | * least 4-byte aligned (most likely, it's page-aligned). | 
|  | 3304 | */ | 
|  | 3305 | paddr32 = paddr64; | 
|  | 3306 |  | 
|  | 3307 | cmd->CommandHeader.ReplyQueue = 0; | 
|  | 3308 | cmd->CommandHeader.SGList = 0; | 
|  | 3309 | cmd->CommandHeader.SGTotal = 0; | 
|  | 3310 | cmd->CommandHeader.Tag.lower = paddr32; | 
|  | 3311 | cmd->CommandHeader.Tag.upper = 0; | 
|  | 3312 | memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8); | 
|  | 3313 |  | 
|  | 3314 | cmd->Request.CDBLen = 16; | 
|  | 3315 | cmd->Request.Type.Type = TYPE_MSG; | 
|  | 3316 | cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE; | 
|  | 3317 | cmd->Request.Type.Direction = XFER_NONE; | 
|  | 3318 | cmd->Request.Timeout = 0; /* Don't time out */ | 
|  | 3319 | cmd->Request.CDB[0] = opcode; | 
|  | 3320 | cmd->Request.CDB[1] = type; | 
|  | 3321 | memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */ | 
|  | 3322 | cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(*cmd); | 
|  | 3323 | cmd->ErrorDescriptor.Addr.upper = 0; | 
|  | 3324 | cmd->ErrorDescriptor.Len = sizeof(struct ErrorInfo); | 
|  | 3325 |  | 
|  | 3326 | writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET); | 
|  | 3327 |  | 
|  | 3328 | for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) { | 
|  | 3329 | tag = readl(vaddr + SA5_REPLY_PORT_OFFSET); | 
|  | 3330 | if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr32) | 
|  | 3331 | break; | 
|  | 3332 | msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS); | 
|  | 3333 | } | 
|  | 3334 |  | 
|  | 3335 | iounmap(vaddr); | 
|  | 3336 |  | 
|  | 3337 | /* we leak the DMA buffer here ... no choice since the controller could | 
|  | 3338 | *  still complete the command. | 
|  | 3339 | */ | 
|  | 3340 | if (i == HPSA_MSG_SEND_RETRY_LIMIT) { | 
|  | 3341 | dev_err(&pdev->dev, "controller message %02x:%02x timed out\n", | 
|  | 3342 | opcode, type); | 
|  | 3343 | return -ETIMEDOUT; | 
|  | 3344 | } | 
|  | 3345 |  | 
|  | 3346 | pci_free_consistent(pdev, cmd_sz, cmd, paddr64); | 
|  | 3347 |  | 
|  | 3348 | if (tag & HPSA_ERROR_BIT) { | 
|  | 3349 | dev_err(&pdev->dev, "controller message %02x:%02x failed\n", | 
|  | 3350 | opcode, type); | 
|  | 3351 | return -EIO; | 
|  | 3352 | } | 
|  | 3353 |  | 
|  | 3354 | dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n", | 
|  | 3355 | opcode, type); | 
|  | 3356 | return 0; | 
|  | 3357 | } | 
|  | 3358 |  | 
|  | 3359 | #define hpsa_noop(p) hpsa_message(p, 3, 0) | 
|  | 3360 |  | 
|  | 3361 | static int hpsa_controller_hard_reset(struct pci_dev *pdev, | 
|  | 3362 | void * __iomem vaddr, u32 use_doorbell) | 
|  | 3363 | { | 
|  | 3364 | u16 pmcsr; | 
|  | 3365 | int pos; | 
|  | 3366 |  | 
|  | 3367 | if (use_doorbell) { | 
|  | 3368 | /* For everything after the P600, the PCI power state method | 
|  | 3369 | * of resetting the controller doesn't work, so we have this | 
|  | 3370 | * other way using the doorbell register. | 
|  | 3371 | */ | 
|  | 3372 | dev_info(&pdev->dev, "using doorbell to reset controller\n"); | 
|  | 3373 | writel(use_doorbell, vaddr + SA5_DOORBELL); | 
|  | 3374 | } else { /* Try to do it the PCI power state way */ | 
|  | 3375 |  | 
|  | 3376 | /* Quoting from the Open CISS Specification: "The Power | 
|  | 3377 | * Management Control/Status Register (CSR) controls the power | 
|  | 3378 | * state of the device.  The normal operating state is D0, | 
|  | 3379 | * CSR=00h.  The software off state is D3, CSR=03h.  To reset | 
|  | 3380 | * the controller, place the interface device in D3 then to D0, | 
|  | 3381 | * this causes a secondary PCI reset which will reset the | 
|  | 3382 | * controller." */ | 
|  | 3383 |  | 
|  | 3384 | pos = pci_find_capability(pdev, PCI_CAP_ID_PM); | 
|  | 3385 | if (pos == 0) { | 
|  | 3386 | dev_err(&pdev->dev, | 
|  | 3387 | "hpsa_reset_controller: " | 
|  | 3388 | "PCI PM not supported\n"); | 
|  | 3389 | return -ENODEV; | 
|  | 3390 | } | 
|  | 3391 | dev_info(&pdev->dev, "using PCI PM to reset controller\n"); | 
|  | 3392 | /* enter the D3hot power management state */ | 
|  | 3393 | pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr); | 
|  | 3394 | pmcsr &= ~PCI_PM_CTRL_STATE_MASK; | 
|  | 3395 | pmcsr |= PCI_D3hot; | 
|  | 3396 | pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr); | 
|  | 3397 |  | 
|  | 3398 | msleep(500); | 
|  | 3399 |  | 
|  | 3400 | /* enter the D0 power management state */ | 
|  | 3401 | pmcsr &= ~PCI_PM_CTRL_STATE_MASK; | 
|  | 3402 | pmcsr |= PCI_D0; | 
|  | 3403 | pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr); | 
|  | 3404 |  | 
|  | 3405 | /* | 
|  | 3406 | * The P600 requires a small delay when changing states. | 
|  | 3407 | * Otherwise we may think the board did not reset and we bail. | 
|  | 3408 | * This for kdump only and is particular to the P600. | 
|  | 3409 | */ | 
|  | 3410 | msleep(500); | 
|  | 3411 | } | 
|  | 3412 | return 0; | 
|  | 3413 | } | 
|  | 3414 |  | 
|  | 3415 | static __devinit void init_driver_version(char *driver_version, int len) | 
|  | 3416 | { | 
|  | 3417 | memset(driver_version, 0, len); | 
|  | 3418 | strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1); | 
|  | 3419 | } | 
|  | 3420 |  | 
|  | 3421 | static __devinit int write_driver_ver_to_cfgtable( | 
|  | 3422 | struct CfgTable __iomem *cfgtable) | 
|  | 3423 | { | 
|  | 3424 | char *driver_version; | 
|  | 3425 | int i, size = sizeof(cfgtable->driver_version); | 
|  | 3426 |  | 
|  | 3427 | driver_version = kmalloc(size, GFP_KERNEL); | 
|  | 3428 | if (!driver_version) | 
|  | 3429 | return -ENOMEM; | 
|  | 3430 |  | 
|  | 3431 | init_driver_version(driver_version, size); | 
|  | 3432 | for (i = 0; i < size; i++) | 
|  | 3433 | writeb(driver_version[i], &cfgtable->driver_version[i]); | 
|  | 3434 | kfree(driver_version); | 
|  | 3435 | return 0; | 
|  | 3436 | } | 
|  | 3437 |  | 
|  | 3438 | static __devinit void read_driver_ver_from_cfgtable( | 
|  | 3439 | struct CfgTable __iomem *cfgtable, unsigned char *driver_ver) | 
|  | 3440 | { | 
|  | 3441 | int i; | 
|  | 3442 |  | 
|  | 3443 | for (i = 0; i < sizeof(cfgtable->driver_version); i++) | 
|  | 3444 | driver_ver[i] = readb(&cfgtable->driver_version[i]); | 
|  | 3445 | } | 
|  | 3446 |  | 
|  | 3447 | static __devinit int controller_reset_failed( | 
|  | 3448 | struct CfgTable __iomem *cfgtable) | 
|  | 3449 | { | 
|  | 3450 |  | 
|  | 3451 | char *driver_ver, *old_driver_ver; | 
|  | 3452 | int rc, size = sizeof(cfgtable->driver_version); | 
|  | 3453 |  | 
|  | 3454 | old_driver_ver = kmalloc(2 * size, GFP_KERNEL); | 
|  | 3455 | if (!old_driver_ver) | 
|  | 3456 | return -ENOMEM; | 
|  | 3457 | driver_ver = old_driver_ver + size; | 
|  | 3458 |  | 
|  | 3459 | /* After a reset, the 32 bytes of "driver version" in the cfgtable | 
|  | 3460 | * should have been changed, otherwise we know the reset failed. | 
|  | 3461 | */ | 
|  | 3462 | init_driver_version(old_driver_ver, size); | 
|  | 3463 | read_driver_ver_from_cfgtable(cfgtable, driver_ver); | 
|  | 3464 | rc = !memcmp(driver_ver, old_driver_ver, size); | 
|  | 3465 | kfree(old_driver_ver); | 
|  | 3466 | return rc; | 
|  | 3467 | } | 
|  | 3468 | /* This does a hard reset of the controller using PCI power management | 
|  | 3469 | * states or the using the doorbell register. | 
|  | 3470 | */ | 
|  | 3471 | static __devinit int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev) | 
|  | 3472 | { | 
|  | 3473 | u64 cfg_offset; | 
|  | 3474 | u32 cfg_base_addr; | 
|  | 3475 | u64 cfg_base_addr_index; | 
|  | 3476 | void __iomem *vaddr; | 
|  | 3477 | unsigned long paddr; | 
|  | 3478 | u32 misc_fw_support; | 
|  | 3479 | int rc; | 
|  | 3480 | struct CfgTable __iomem *cfgtable; | 
|  | 3481 | u32 use_doorbell; | 
|  | 3482 | u32 board_id; | 
|  | 3483 | u16 command_register; | 
|  | 3484 |  | 
|  | 3485 | /* For controllers as old as the P600, this is very nearly | 
|  | 3486 | * the same thing as | 
|  | 3487 | * | 
|  | 3488 | * pci_save_state(pci_dev); | 
|  | 3489 | * pci_set_power_state(pci_dev, PCI_D3hot); | 
|  | 3490 | * pci_set_power_state(pci_dev, PCI_D0); | 
|  | 3491 | * pci_restore_state(pci_dev); | 
|  | 3492 | * | 
|  | 3493 | * For controllers newer than the P600, the pci power state | 
|  | 3494 | * method of resetting doesn't work so we have another way | 
|  | 3495 | * using the doorbell register. | 
|  | 3496 | */ | 
|  | 3497 |  | 
|  | 3498 | rc = hpsa_lookup_board_id(pdev, &board_id); | 
|  | 3499 | if (rc < 0 || !ctlr_is_resettable(board_id)) { | 
|  | 3500 | dev_warn(&pdev->dev, "Not resetting device.\n"); | 
|  | 3501 | return -ENODEV; | 
|  | 3502 | } | 
|  | 3503 |  | 
|  | 3504 | /* if controller is soft- but not hard resettable... */ | 
|  | 3505 | if (!ctlr_is_hard_resettable(board_id)) | 
|  | 3506 | return -ENOTSUPP; /* try soft reset later. */ | 
|  | 3507 |  | 
|  | 3508 | /* Save the PCI command register */ | 
|  | 3509 | pci_read_config_word(pdev, 4, &command_register); | 
|  | 3510 | pci_save_state(pdev); | 
|  | 3511 |  | 
|  | 3512 | /* find the first memory BAR, so we can find the cfg table */ | 
|  | 3513 | rc = hpsa_pci_find_memory_BAR(pdev, &paddr); | 
|  | 3514 | if (rc) | 
|  | 3515 | return rc; | 
|  | 3516 | vaddr = remap_pci_mem(paddr, 0x250); | 
|  | 3517 | if (!vaddr) | 
|  | 3518 | return -ENOMEM; | 
|  | 3519 |  | 
|  | 3520 | /* find cfgtable in order to check if reset via doorbell is supported */ | 
|  | 3521 | rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr, | 
|  | 3522 | &cfg_base_addr_index, &cfg_offset); | 
|  | 3523 | if (rc) | 
|  | 3524 | goto unmap_vaddr; | 
|  | 3525 | cfgtable = remap_pci_mem(pci_resource_start(pdev, | 
|  | 3526 | cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable)); | 
|  | 3527 | if (!cfgtable) { | 
|  | 3528 | rc = -ENOMEM; | 
|  | 3529 | goto unmap_vaddr; | 
|  | 3530 | } | 
|  | 3531 | rc = write_driver_ver_to_cfgtable(cfgtable); | 
|  | 3532 | if (rc) | 
|  | 3533 | goto unmap_cfgtable; | 
|  | 3534 |  | 
|  | 3535 | /* If reset via doorbell register is supported, use that. | 
|  | 3536 | * There are two such methods.  Favor the newest method. | 
|  | 3537 | */ | 
|  | 3538 | misc_fw_support = readl(&cfgtable->misc_fw_support); | 
|  | 3539 | use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2; | 
|  | 3540 | if (use_doorbell) { | 
|  | 3541 | use_doorbell = DOORBELL_CTLR_RESET2; | 
|  | 3542 | } else { | 
|  | 3543 | use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET; | 
|  | 3544 | if (use_doorbell) { | 
|  | 3545 | dev_warn(&pdev->dev, "Soft reset not supported. " | 
|  | 3546 | "Firmware update is required.\n"); | 
|  | 3547 | rc = -ENOTSUPP; /* try soft reset */ | 
|  | 3548 | goto unmap_cfgtable; | 
|  | 3549 | } | 
|  | 3550 | } | 
|  | 3551 |  | 
|  | 3552 | rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell); | 
|  | 3553 | if (rc) | 
|  | 3554 | goto unmap_cfgtable; | 
|  | 3555 |  | 
|  | 3556 | pci_restore_state(pdev); | 
|  | 3557 | pci_write_config_word(pdev, 4, command_register); | 
|  | 3558 |  | 
|  | 3559 | /* Some devices (notably the HP Smart Array 5i Controller) | 
|  | 3560 | need a little pause here */ | 
|  | 3561 | msleep(HPSA_POST_RESET_PAUSE_MSECS); | 
|  | 3562 |  | 
|  | 3563 | /* Wait for board to become not ready, then ready. */ | 
|  | 3564 | dev_info(&pdev->dev, "Waiting for board to reset.\n"); | 
|  | 3565 | rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY); | 
|  | 3566 | if (rc) { | 
|  | 3567 | dev_warn(&pdev->dev, | 
|  | 3568 | "failed waiting for board to reset." | 
|  | 3569 | " Will try soft reset.\n"); | 
|  | 3570 | rc = -ENOTSUPP; /* Not expected, but try soft reset later */ | 
|  | 3571 | goto unmap_cfgtable; | 
|  | 3572 | } | 
|  | 3573 | rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY); | 
|  | 3574 | if (rc) { | 
|  | 3575 | dev_warn(&pdev->dev, | 
|  | 3576 | "failed waiting for board to become ready " | 
|  | 3577 | "after hard reset\n"); | 
|  | 3578 | goto unmap_cfgtable; | 
|  | 3579 | } | 
|  | 3580 |  | 
|  | 3581 | rc = controller_reset_failed(vaddr); | 
|  | 3582 | if (rc < 0) | 
|  | 3583 | goto unmap_cfgtable; | 
|  | 3584 | if (rc) { | 
|  | 3585 | dev_warn(&pdev->dev, "Unable to successfully reset " | 
|  | 3586 | "controller. Will try soft reset.\n"); | 
|  | 3587 | rc = -ENOTSUPP; | 
|  | 3588 | } else { | 
|  | 3589 | dev_info(&pdev->dev, "board ready after hard reset.\n"); | 
|  | 3590 | } | 
|  | 3591 |  | 
|  | 3592 | unmap_cfgtable: | 
|  | 3593 | iounmap(cfgtable); | 
|  | 3594 |  | 
|  | 3595 | unmap_vaddr: | 
|  | 3596 | iounmap(vaddr); | 
|  | 3597 | return rc; | 
|  | 3598 | } | 
|  | 3599 |  | 
|  | 3600 | /* | 
|  | 3601 | *  We cannot read the structure directly, for portability we must use | 
|  | 3602 | *   the io functions. | 
|  | 3603 | *   This is for debug only. | 
|  | 3604 | */ | 
|  | 3605 | static void print_cfg_table(struct device *dev, struct CfgTable *tb) | 
|  | 3606 | { | 
|  | 3607 | #ifdef HPSA_DEBUG | 
|  | 3608 | int i; | 
|  | 3609 | char temp_name[17]; | 
|  | 3610 |  | 
|  | 3611 | dev_info(dev, "Controller Configuration information\n"); | 
|  | 3612 | dev_info(dev, "------------------------------------\n"); | 
|  | 3613 | for (i = 0; i < 4; i++) | 
|  | 3614 | temp_name[i] = readb(&(tb->Signature[i])); | 
|  | 3615 | temp_name[4] = '\0'; | 
|  | 3616 | dev_info(dev, "   Signature = %s\n", temp_name); | 
|  | 3617 | dev_info(dev, "   Spec Number = %d\n", readl(&(tb->SpecValence))); | 
|  | 3618 | dev_info(dev, "   Transport methods supported = 0x%x\n", | 
|  | 3619 | readl(&(tb->TransportSupport))); | 
|  | 3620 | dev_info(dev, "   Transport methods active = 0x%x\n", | 
|  | 3621 | readl(&(tb->TransportActive))); | 
|  | 3622 | dev_info(dev, "   Requested transport Method = 0x%x\n", | 
|  | 3623 | readl(&(tb->HostWrite.TransportRequest))); | 
|  | 3624 | dev_info(dev, "   Coalesce Interrupt Delay = 0x%x\n", | 
|  | 3625 | readl(&(tb->HostWrite.CoalIntDelay))); | 
|  | 3626 | dev_info(dev, "   Coalesce Interrupt Count = 0x%x\n", | 
|  | 3627 | readl(&(tb->HostWrite.CoalIntCount))); | 
|  | 3628 | dev_info(dev, "   Max outstanding commands = 0x%d\n", | 
|  | 3629 | readl(&(tb->CmdsOutMax))); | 
|  | 3630 | dev_info(dev, "   Bus Types = 0x%x\n", readl(&(tb->BusTypes))); | 
|  | 3631 | for (i = 0; i < 16; i++) | 
|  | 3632 | temp_name[i] = readb(&(tb->ServerName[i])); | 
|  | 3633 | temp_name[16] = '\0'; | 
|  | 3634 | dev_info(dev, "   Server Name = %s\n", temp_name); | 
|  | 3635 | dev_info(dev, "   Heartbeat Counter = 0x%x\n\n\n", | 
|  | 3636 | readl(&(tb->HeartBeat))); | 
|  | 3637 | #endif				/* HPSA_DEBUG */ | 
|  | 3638 | } | 
|  | 3639 |  | 
|  | 3640 | static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr) | 
|  | 3641 | { | 
|  | 3642 | int i, offset, mem_type, bar_type; | 
|  | 3643 |  | 
|  | 3644 | if (pci_bar_addr == PCI_BASE_ADDRESS_0)	/* looking for BAR zero? */ | 
|  | 3645 | return 0; | 
|  | 3646 | offset = 0; | 
|  | 3647 | for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { | 
|  | 3648 | bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE; | 
|  | 3649 | if (bar_type == PCI_BASE_ADDRESS_SPACE_IO) | 
|  | 3650 | offset += 4; | 
|  | 3651 | else { | 
|  | 3652 | mem_type = pci_resource_flags(pdev, i) & | 
|  | 3653 | PCI_BASE_ADDRESS_MEM_TYPE_MASK; | 
|  | 3654 | switch (mem_type) { | 
|  | 3655 | case PCI_BASE_ADDRESS_MEM_TYPE_32: | 
|  | 3656 | case PCI_BASE_ADDRESS_MEM_TYPE_1M: | 
|  | 3657 | offset += 4;	/* 32 bit */ | 
|  | 3658 | break; | 
|  | 3659 | case PCI_BASE_ADDRESS_MEM_TYPE_64: | 
|  | 3660 | offset += 8; | 
|  | 3661 | break; | 
|  | 3662 | default:	/* reserved in PCI 2.2 */ | 
|  | 3663 | dev_warn(&pdev->dev, | 
|  | 3664 | "base address is invalid\n"); | 
|  | 3665 | return -1; | 
|  | 3666 | break; | 
|  | 3667 | } | 
|  | 3668 | } | 
|  | 3669 | if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0) | 
|  | 3670 | return i + 1; | 
|  | 3671 | } | 
|  | 3672 | return -1; | 
|  | 3673 | } | 
|  | 3674 |  | 
|  | 3675 | /* If MSI/MSI-X is supported by the kernel we will try to enable it on | 
|  | 3676 | * controllers that are capable. If not, we use IO-APIC mode. | 
|  | 3677 | */ | 
|  | 3678 |  | 
|  | 3679 | static void __devinit hpsa_interrupt_mode(struct ctlr_info *h) | 
|  | 3680 | { | 
|  | 3681 | #ifdef CONFIG_PCI_MSI | 
|  | 3682 | int err; | 
|  | 3683 | struct msix_entry hpsa_msix_entries[4] = { {0, 0}, {0, 1}, | 
|  | 3684 | {0, 2}, {0, 3} | 
|  | 3685 | }; | 
|  | 3686 |  | 
|  | 3687 | /* Some boards advertise MSI but don't really support it */ | 
|  | 3688 | if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) || | 
|  | 3689 | (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11)) | 
|  | 3690 | goto default_int_mode; | 
|  | 3691 | if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) { | 
|  | 3692 | dev_info(&h->pdev->dev, "MSIX\n"); | 
|  | 3693 | err = pci_enable_msix(h->pdev, hpsa_msix_entries, 4); | 
|  | 3694 | if (!err) { | 
|  | 3695 | h->intr[0] = hpsa_msix_entries[0].vector; | 
|  | 3696 | h->intr[1] = hpsa_msix_entries[1].vector; | 
|  | 3697 | h->intr[2] = hpsa_msix_entries[2].vector; | 
|  | 3698 | h->intr[3] = hpsa_msix_entries[3].vector; | 
|  | 3699 | h->msix_vector = 1; | 
|  | 3700 | return; | 
|  | 3701 | } | 
|  | 3702 | if (err > 0) { | 
|  | 3703 | dev_warn(&h->pdev->dev, "only %d MSI-X vectors " | 
|  | 3704 | "available\n", err); | 
|  | 3705 | goto default_int_mode; | 
|  | 3706 | } else { | 
|  | 3707 | dev_warn(&h->pdev->dev, "MSI-X init failed %d\n", | 
|  | 3708 | err); | 
|  | 3709 | goto default_int_mode; | 
|  | 3710 | } | 
|  | 3711 | } | 
|  | 3712 | if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) { | 
|  | 3713 | dev_info(&h->pdev->dev, "MSI\n"); | 
|  | 3714 | if (!pci_enable_msi(h->pdev)) | 
|  | 3715 | h->msi_vector = 1; | 
|  | 3716 | else | 
|  | 3717 | dev_warn(&h->pdev->dev, "MSI init failed\n"); | 
|  | 3718 | } | 
|  | 3719 | default_int_mode: | 
|  | 3720 | #endif				/* CONFIG_PCI_MSI */ | 
|  | 3721 | /* if we get here we're going to use the default interrupt mode */ | 
|  | 3722 | h->intr[h->intr_mode] = h->pdev->irq; | 
|  | 3723 | } | 
|  | 3724 |  | 
|  | 3725 | static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id) | 
|  | 3726 | { | 
|  | 3727 | int i; | 
|  | 3728 | u32 subsystem_vendor_id, subsystem_device_id; | 
|  | 3729 |  | 
|  | 3730 | subsystem_vendor_id = pdev->subsystem_vendor; | 
|  | 3731 | subsystem_device_id = pdev->subsystem_device; | 
|  | 3732 | *board_id = ((subsystem_device_id << 16) & 0xffff0000) | | 
|  | 3733 | subsystem_vendor_id; | 
|  | 3734 |  | 
|  | 3735 | for (i = 0; i < ARRAY_SIZE(products); i++) | 
|  | 3736 | if (*board_id == products[i].board_id) | 
|  | 3737 | return i; | 
|  | 3738 |  | 
|  | 3739 | if ((subsystem_vendor_id != PCI_VENDOR_ID_HP && | 
|  | 3740 | subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) || | 
|  | 3741 | !hpsa_allow_any) { | 
|  | 3742 | dev_warn(&pdev->dev, "unrecognized board ID: " | 
|  | 3743 | "0x%08x, ignoring.\n", *board_id); | 
|  | 3744 | return -ENODEV; | 
|  | 3745 | } | 
|  | 3746 | return ARRAY_SIZE(products) - 1; /* generic unknown smart array */ | 
|  | 3747 | } | 
|  | 3748 |  | 
|  | 3749 | static inline bool hpsa_board_disabled(struct pci_dev *pdev) | 
|  | 3750 | { | 
|  | 3751 | u16 command; | 
|  | 3752 |  | 
|  | 3753 | (void) pci_read_config_word(pdev, PCI_COMMAND, &command); | 
|  | 3754 | return ((command & PCI_COMMAND_MEMORY) == 0); | 
|  | 3755 | } | 
|  | 3756 |  | 
|  | 3757 | static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev, | 
|  | 3758 | unsigned long *memory_bar) | 
|  | 3759 | { | 
|  | 3760 | int i; | 
|  | 3761 |  | 
|  | 3762 | for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) | 
|  | 3763 | if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) { | 
|  | 3764 | /* addressing mode bits already removed */ | 
|  | 3765 | *memory_bar = pci_resource_start(pdev, i); | 
|  | 3766 | dev_dbg(&pdev->dev, "memory BAR = %lx\n", | 
|  | 3767 | *memory_bar); | 
|  | 3768 | return 0; | 
|  | 3769 | } | 
|  | 3770 | dev_warn(&pdev->dev, "no memory BAR found\n"); | 
|  | 3771 | return -ENODEV; | 
|  | 3772 | } | 
|  | 3773 |  | 
|  | 3774 | static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev, | 
|  | 3775 | void __iomem *vaddr, int wait_for_ready) | 
|  | 3776 | { | 
|  | 3777 | int i, iterations; | 
|  | 3778 | u32 scratchpad; | 
|  | 3779 | if (wait_for_ready) | 
|  | 3780 | iterations = HPSA_BOARD_READY_ITERATIONS; | 
|  | 3781 | else | 
|  | 3782 | iterations = HPSA_BOARD_NOT_READY_ITERATIONS; | 
|  | 3783 |  | 
|  | 3784 | for (i = 0; i < iterations; i++) { | 
|  | 3785 | scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET); | 
|  | 3786 | if (wait_for_ready) { | 
|  | 3787 | if (scratchpad == HPSA_FIRMWARE_READY) | 
|  | 3788 | return 0; | 
|  | 3789 | } else { | 
|  | 3790 | if (scratchpad != HPSA_FIRMWARE_READY) | 
|  | 3791 | return 0; | 
|  | 3792 | } | 
|  | 3793 | msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS); | 
|  | 3794 | } | 
|  | 3795 | dev_warn(&pdev->dev, "board not ready, timed out.\n"); | 
|  | 3796 | return -ENODEV; | 
|  | 3797 | } | 
|  | 3798 |  | 
|  | 3799 | static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev, | 
|  | 3800 | void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index, | 
|  | 3801 | u64 *cfg_offset) | 
|  | 3802 | { | 
|  | 3803 | *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET); | 
|  | 3804 | *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET); | 
|  | 3805 | *cfg_base_addr &= (u32) 0x0000ffff; | 
|  | 3806 | *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr); | 
|  | 3807 | if (*cfg_base_addr_index == -1) { | 
|  | 3808 | dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n"); | 
|  | 3809 | return -ENODEV; | 
|  | 3810 | } | 
|  | 3811 | return 0; | 
|  | 3812 | } | 
|  | 3813 |  | 
|  | 3814 | static int __devinit hpsa_find_cfgtables(struct ctlr_info *h) | 
|  | 3815 | { | 
|  | 3816 | u64 cfg_offset; | 
|  | 3817 | u32 cfg_base_addr; | 
|  | 3818 | u64 cfg_base_addr_index; | 
|  | 3819 | u32 trans_offset; | 
|  | 3820 | int rc; | 
|  | 3821 |  | 
|  | 3822 | rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, | 
|  | 3823 | &cfg_base_addr_index, &cfg_offset); | 
|  | 3824 | if (rc) | 
|  | 3825 | return rc; | 
|  | 3826 | h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev, | 
|  | 3827 | cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable)); | 
|  | 3828 | if (!h->cfgtable) | 
|  | 3829 | return -ENOMEM; | 
|  | 3830 | rc = write_driver_ver_to_cfgtable(h->cfgtable); | 
|  | 3831 | if (rc) | 
|  | 3832 | return rc; | 
|  | 3833 | /* Find performant mode table. */ | 
|  | 3834 | trans_offset = readl(&h->cfgtable->TransMethodOffset); | 
|  | 3835 | h->transtable = remap_pci_mem(pci_resource_start(h->pdev, | 
|  | 3836 | cfg_base_addr_index)+cfg_offset+trans_offset, | 
|  | 3837 | sizeof(*h->transtable)); | 
|  | 3838 | if (!h->transtable) | 
|  | 3839 | return -ENOMEM; | 
|  | 3840 | return 0; | 
|  | 3841 | } | 
|  | 3842 |  | 
|  | 3843 | static void __devinit hpsa_get_max_perf_mode_cmds(struct ctlr_info *h) | 
|  | 3844 | { | 
|  | 3845 | h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands)); | 
|  | 3846 |  | 
|  | 3847 | /* Limit commands in memory limited kdump scenario. */ | 
|  | 3848 | if (reset_devices && h->max_commands > 32) | 
|  | 3849 | h->max_commands = 32; | 
|  | 3850 |  | 
|  | 3851 | if (h->max_commands < 16) { | 
|  | 3852 | dev_warn(&h->pdev->dev, "Controller reports " | 
|  | 3853 | "max supported commands of %d, an obvious lie. " | 
|  | 3854 | "Using 16.  Ensure that firmware is up to date.\n", | 
|  | 3855 | h->max_commands); | 
|  | 3856 | h->max_commands = 16; | 
|  | 3857 | } | 
|  | 3858 | } | 
|  | 3859 |  | 
|  | 3860 | /* Interrogate the hardware for some limits: | 
|  | 3861 | * max commands, max SG elements without chaining, and with chaining, | 
|  | 3862 | * SG chain block size, etc. | 
|  | 3863 | */ | 
|  | 3864 | static void __devinit hpsa_find_board_params(struct ctlr_info *h) | 
|  | 3865 | { | 
|  | 3866 | hpsa_get_max_perf_mode_cmds(h); | 
|  | 3867 | h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */ | 
|  | 3868 | h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements)); | 
|  | 3869 | /* | 
|  | 3870 | * Limit in-command s/g elements to 32 save dma'able memory. | 
|  | 3871 | * Howvever spec says if 0, use 31 | 
|  | 3872 | */ | 
|  | 3873 | h->max_cmd_sg_entries = 31; | 
|  | 3874 | if (h->maxsgentries > 512) { | 
|  | 3875 | h->max_cmd_sg_entries = 32; | 
|  | 3876 | h->chainsize = h->maxsgentries - h->max_cmd_sg_entries + 1; | 
|  | 3877 | h->maxsgentries--; /* save one for chain pointer */ | 
|  | 3878 | } else { | 
|  | 3879 | h->maxsgentries = 31; /* default to traditional values */ | 
|  | 3880 | h->chainsize = 0; | 
|  | 3881 | } | 
|  | 3882 | } | 
|  | 3883 |  | 
|  | 3884 | static inline bool hpsa_CISS_signature_present(struct ctlr_info *h) | 
|  | 3885 | { | 
|  | 3886 | if ((readb(&h->cfgtable->Signature[0]) != 'C') || | 
|  | 3887 | (readb(&h->cfgtable->Signature[1]) != 'I') || | 
|  | 3888 | (readb(&h->cfgtable->Signature[2]) != 'S') || | 
|  | 3889 | (readb(&h->cfgtable->Signature[3]) != 'S')) { | 
|  | 3890 | dev_warn(&h->pdev->dev, "not a valid CISS config table\n"); | 
|  | 3891 | return false; | 
|  | 3892 | } | 
|  | 3893 | return true; | 
|  | 3894 | } | 
|  | 3895 |  | 
|  | 3896 | /* Need to enable prefetch in the SCSI core for 6400 in x86 */ | 
|  | 3897 | static inline void hpsa_enable_scsi_prefetch(struct ctlr_info *h) | 
|  | 3898 | { | 
|  | 3899 | #ifdef CONFIG_X86 | 
|  | 3900 | u32 prefetch; | 
|  | 3901 |  | 
|  | 3902 | prefetch = readl(&(h->cfgtable->SCSI_Prefetch)); | 
|  | 3903 | prefetch |= 0x100; | 
|  | 3904 | writel(prefetch, &(h->cfgtable->SCSI_Prefetch)); | 
|  | 3905 | #endif | 
|  | 3906 | } | 
|  | 3907 |  | 
|  | 3908 | /* Disable DMA prefetch for the P600.  Otherwise an ASIC bug may result | 
|  | 3909 | * in a prefetch beyond physical memory. | 
|  | 3910 | */ | 
|  | 3911 | static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h) | 
|  | 3912 | { | 
|  | 3913 | u32 dma_prefetch; | 
|  | 3914 |  | 
|  | 3915 | if (h->board_id != 0x3225103C) | 
|  | 3916 | return; | 
|  | 3917 | dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG); | 
|  | 3918 | dma_prefetch |= 0x8000; | 
|  | 3919 | writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG); | 
|  | 3920 | } | 
|  | 3921 |  | 
|  | 3922 | static void __devinit hpsa_wait_for_mode_change_ack(struct ctlr_info *h) | 
|  | 3923 | { | 
|  | 3924 | int i; | 
|  | 3925 | u32 doorbell_value; | 
|  | 3926 | unsigned long flags; | 
|  | 3927 |  | 
|  | 3928 | /* under certain very rare conditions, this can take awhile. | 
|  | 3929 | * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right | 
|  | 3930 | * as we enter this code.) | 
|  | 3931 | */ | 
|  | 3932 | for (i = 0; i < MAX_CONFIG_WAIT; i++) { | 
|  | 3933 | spin_lock_irqsave(&h->lock, flags); | 
|  | 3934 | doorbell_value = readl(h->vaddr + SA5_DOORBELL); | 
|  | 3935 | spin_unlock_irqrestore(&h->lock, flags); | 
|  | 3936 | if (!(doorbell_value & CFGTBL_ChangeReq)) | 
|  | 3937 | break; | 
|  | 3938 | /* delay and try again */ | 
|  | 3939 | usleep_range(10000, 20000); | 
|  | 3940 | } | 
|  | 3941 | } | 
|  | 3942 |  | 
|  | 3943 | static int __devinit hpsa_enter_simple_mode(struct ctlr_info *h) | 
|  | 3944 | { | 
|  | 3945 | u32 trans_support; | 
|  | 3946 |  | 
|  | 3947 | trans_support = readl(&(h->cfgtable->TransportSupport)); | 
|  | 3948 | if (!(trans_support & SIMPLE_MODE)) | 
|  | 3949 | return -ENOTSUPP; | 
|  | 3950 |  | 
|  | 3951 | h->max_commands = readl(&(h->cfgtable->CmdsOutMax)); | 
|  | 3952 | /* Update the field, and then ring the doorbell */ | 
|  | 3953 | writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest)); | 
|  | 3954 | writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); | 
|  | 3955 | hpsa_wait_for_mode_change_ack(h); | 
|  | 3956 | print_cfg_table(&h->pdev->dev, h->cfgtable); | 
|  | 3957 | if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) { | 
|  | 3958 | dev_warn(&h->pdev->dev, | 
|  | 3959 | "unable to get board into simple mode\n"); | 
|  | 3960 | return -ENODEV; | 
|  | 3961 | } | 
|  | 3962 | h->transMethod = CFGTBL_Trans_Simple; | 
|  | 3963 | return 0; | 
|  | 3964 | } | 
|  | 3965 |  | 
|  | 3966 | static int __devinit hpsa_pci_init(struct ctlr_info *h) | 
|  | 3967 | { | 
|  | 3968 | int prod_index, err; | 
|  | 3969 |  | 
|  | 3970 | prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id); | 
|  | 3971 | if (prod_index < 0) | 
|  | 3972 | return -ENODEV; | 
|  | 3973 | h->product_name = products[prod_index].product_name; | 
|  | 3974 | h->access = *(products[prod_index].access); | 
|  | 3975 |  | 
|  | 3976 | if (hpsa_board_disabled(h->pdev)) { | 
|  | 3977 | dev_warn(&h->pdev->dev, "controller appears to be disabled\n"); | 
|  | 3978 | return -ENODEV; | 
|  | 3979 | } | 
|  | 3980 |  | 
|  | 3981 | pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S | | 
|  | 3982 | PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM); | 
|  | 3983 |  | 
|  | 3984 | err = pci_enable_device(h->pdev); | 
|  | 3985 | if (err) { | 
|  | 3986 | dev_warn(&h->pdev->dev, "unable to enable PCI device\n"); | 
|  | 3987 | return err; | 
|  | 3988 | } | 
|  | 3989 |  | 
|  | 3990 | err = pci_request_regions(h->pdev, HPSA); | 
|  | 3991 | if (err) { | 
|  | 3992 | dev_err(&h->pdev->dev, | 
|  | 3993 | "cannot obtain PCI resources, aborting\n"); | 
|  | 3994 | return err; | 
|  | 3995 | } | 
|  | 3996 | hpsa_interrupt_mode(h); | 
|  | 3997 | err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr); | 
|  | 3998 | if (err) | 
|  | 3999 | goto err_out_free_res; | 
|  | 4000 | h->vaddr = remap_pci_mem(h->paddr, 0x250); | 
|  | 4001 | if (!h->vaddr) { | 
|  | 4002 | err = -ENOMEM; | 
|  | 4003 | goto err_out_free_res; | 
|  | 4004 | } | 
|  | 4005 | err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY); | 
|  | 4006 | if (err) | 
|  | 4007 | goto err_out_free_res; | 
|  | 4008 | err = hpsa_find_cfgtables(h); | 
|  | 4009 | if (err) | 
|  | 4010 | goto err_out_free_res; | 
|  | 4011 | hpsa_find_board_params(h); | 
|  | 4012 |  | 
|  | 4013 | if (!hpsa_CISS_signature_present(h)) { | 
|  | 4014 | err = -ENODEV; | 
|  | 4015 | goto err_out_free_res; | 
|  | 4016 | } | 
|  | 4017 | hpsa_enable_scsi_prefetch(h); | 
|  | 4018 | hpsa_p600_dma_prefetch_quirk(h); | 
|  | 4019 | err = hpsa_enter_simple_mode(h); | 
|  | 4020 | if (err) | 
|  | 4021 | goto err_out_free_res; | 
|  | 4022 | return 0; | 
|  | 4023 |  | 
|  | 4024 | err_out_free_res: | 
|  | 4025 | if (h->transtable) | 
|  | 4026 | iounmap(h->transtable); | 
|  | 4027 | if (h->cfgtable) | 
|  | 4028 | iounmap(h->cfgtable); | 
|  | 4029 | if (h->vaddr) | 
|  | 4030 | iounmap(h->vaddr); | 
|  | 4031 | /* | 
|  | 4032 | * Deliberately omit pci_disable_device(): it does something nasty to | 
|  | 4033 | * Smart Array controllers that pci_enable_device does not undo | 
|  | 4034 | */ | 
|  | 4035 | pci_release_regions(h->pdev); | 
|  | 4036 | return err; | 
|  | 4037 | } | 
|  | 4038 |  | 
|  | 4039 | static void __devinit hpsa_hba_inquiry(struct ctlr_info *h) | 
|  | 4040 | { | 
|  | 4041 | int rc; | 
|  | 4042 |  | 
|  | 4043 | #define HBA_INQUIRY_BYTE_COUNT 64 | 
|  | 4044 | h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL); | 
|  | 4045 | if (!h->hba_inquiry_data) | 
|  | 4046 | return; | 
|  | 4047 | rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0, | 
|  | 4048 | h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT); | 
|  | 4049 | if (rc != 0) { | 
|  | 4050 | kfree(h->hba_inquiry_data); | 
|  | 4051 | h->hba_inquiry_data = NULL; | 
|  | 4052 | } | 
|  | 4053 | } | 
|  | 4054 |  | 
|  | 4055 | static __devinit int hpsa_init_reset_devices(struct pci_dev *pdev) | 
|  | 4056 | { | 
|  | 4057 | int rc, i; | 
|  | 4058 | void __iomem *vaddr; | 
|  | 4059 |  | 
|  | 4060 | if (!reset_devices) | 
|  | 4061 | return 0; | 
|  | 4062 |  | 
|  | 4063 | /* kdump kernel is loading, we don't know in which state is | 
|  | 4064 | * the pci interface. The dev->enable_cnt is equal zero | 
|  | 4065 | * so we call enable+disable, wait a while and switch it on. | 
|  | 4066 | */ | 
|  | 4067 | rc = pci_enable_device(pdev); | 
|  | 4068 | if (rc) { | 
|  | 4069 | dev_warn(&pdev->dev, "Failed to enable PCI device\n"); | 
|  | 4070 | return -ENODEV; | 
|  | 4071 | } | 
|  | 4072 | pci_disable_device(pdev); | 
|  | 4073 | msleep(260);			/* a randomly chosen number */ | 
|  | 4074 | rc = pci_enable_device(pdev); | 
|  | 4075 | if (rc) { | 
|  | 4076 | dev_warn(&pdev->dev, "failed to enable device.\n"); | 
|  | 4077 | return -ENODEV; | 
|  | 4078 | } | 
|  | 4079 | pci_set_master(pdev); | 
|  | 4080 |  | 
|  | 4081 | vaddr = pci_ioremap_bar(pdev, 0); | 
|  | 4082 | if (vaddr == NULL) { | 
|  | 4083 | rc = -ENOMEM; | 
|  | 4084 | goto out_disable; | 
|  | 4085 | } | 
|  | 4086 | writel(SA5_INTR_OFF, vaddr + SA5_REPLY_INTR_MASK_OFFSET); | 
|  | 4087 | iounmap(vaddr); | 
|  | 4088 |  | 
|  | 4089 | /* Reset the controller with a PCI power-cycle or via doorbell */ | 
|  | 4090 | rc = hpsa_kdump_hard_reset_controller(pdev); | 
|  | 4091 |  | 
|  | 4092 | /* -ENOTSUPP here means we cannot reset the controller | 
|  | 4093 | * but it's already (and still) up and running in | 
|  | 4094 | * "performant mode".  Or, it might be 640x, which can't reset | 
|  | 4095 | * due to concerns about shared bbwc between 6402/6404 pair. | 
|  | 4096 | */ | 
|  | 4097 | if (rc) { | 
|  | 4098 | if (rc != -ENOTSUPP) /* just try to do the kdump anyhow. */ | 
|  | 4099 | rc = -ENODEV; | 
|  | 4100 | goto out_disable; | 
|  | 4101 | } | 
|  | 4102 |  | 
|  | 4103 | /* Now try to get the controller to respond to a no-op */ | 
|  | 4104 | dev_warn(&pdev->dev, "Waiting for controller to respond to no-op\n"); | 
|  | 4105 | for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) { | 
|  | 4106 | if (hpsa_noop(pdev) == 0) | 
|  | 4107 | break; | 
|  | 4108 | else | 
|  | 4109 | dev_warn(&pdev->dev, "no-op failed%s\n", | 
|  | 4110 | (i < 11 ? "; re-trying" : "")); | 
|  | 4111 | } | 
|  | 4112 |  | 
|  | 4113 | out_disable: | 
|  | 4114 |  | 
|  | 4115 | pci_disable_device(pdev); | 
|  | 4116 | return rc; | 
|  | 4117 | } | 
|  | 4118 |  | 
|  | 4119 | static __devinit int hpsa_allocate_cmd_pool(struct ctlr_info *h) | 
|  | 4120 | { | 
|  | 4121 | h->cmd_pool_bits = kzalloc( | 
|  | 4122 | DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) * | 
|  | 4123 | sizeof(unsigned long), GFP_KERNEL); | 
|  | 4124 | h->cmd_pool = pci_alloc_consistent(h->pdev, | 
|  | 4125 | h->nr_cmds * sizeof(*h->cmd_pool), | 
|  | 4126 | &(h->cmd_pool_dhandle)); | 
|  | 4127 | h->errinfo_pool = pci_alloc_consistent(h->pdev, | 
|  | 4128 | h->nr_cmds * sizeof(*h->errinfo_pool), | 
|  | 4129 | &(h->errinfo_pool_dhandle)); | 
|  | 4130 | if ((h->cmd_pool_bits == NULL) | 
|  | 4131 | || (h->cmd_pool == NULL) | 
|  | 4132 | || (h->errinfo_pool == NULL)) { | 
|  | 4133 | dev_err(&h->pdev->dev, "out of memory in %s", __func__); | 
|  | 4134 | return -ENOMEM; | 
|  | 4135 | } | 
|  | 4136 | return 0; | 
|  | 4137 | } | 
|  | 4138 |  | 
|  | 4139 | static void hpsa_free_cmd_pool(struct ctlr_info *h) | 
|  | 4140 | { | 
|  | 4141 | kfree(h->cmd_pool_bits); | 
|  | 4142 | if (h->cmd_pool) | 
|  | 4143 | pci_free_consistent(h->pdev, | 
|  | 4144 | h->nr_cmds * sizeof(struct CommandList), | 
|  | 4145 | h->cmd_pool, h->cmd_pool_dhandle); | 
|  | 4146 | if (h->errinfo_pool) | 
|  | 4147 | pci_free_consistent(h->pdev, | 
|  | 4148 | h->nr_cmds * sizeof(struct ErrorInfo), | 
|  | 4149 | h->errinfo_pool, | 
|  | 4150 | h->errinfo_pool_dhandle); | 
|  | 4151 | } | 
|  | 4152 |  | 
|  | 4153 | static int hpsa_request_irq(struct ctlr_info *h, | 
|  | 4154 | irqreturn_t (*msixhandler)(int, void *), | 
|  | 4155 | irqreturn_t (*intxhandler)(int, void *)) | 
|  | 4156 | { | 
|  | 4157 | int rc; | 
|  | 4158 |  | 
|  | 4159 | if (h->msix_vector || h->msi_vector) | 
|  | 4160 | rc = request_irq(h->intr[h->intr_mode], msixhandler, | 
|  | 4161 | 0, h->devname, h); | 
|  | 4162 | else | 
|  | 4163 | rc = request_irq(h->intr[h->intr_mode], intxhandler, | 
|  | 4164 | IRQF_SHARED, h->devname, h); | 
|  | 4165 | if (rc) { | 
|  | 4166 | dev_err(&h->pdev->dev, "unable to get irq %d for %s\n", | 
|  | 4167 | h->intr[h->intr_mode], h->devname); | 
|  | 4168 | return -ENODEV; | 
|  | 4169 | } | 
|  | 4170 | return 0; | 
|  | 4171 | } | 
|  | 4172 |  | 
|  | 4173 | static int __devinit hpsa_kdump_soft_reset(struct ctlr_info *h) | 
|  | 4174 | { | 
|  | 4175 | if (hpsa_send_host_reset(h, RAID_CTLR_LUNID, | 
|  | 4176 | HPSA_RESET_TYPE_CONTROLLER)) { | 
|  | 4177 | dev_warn(&h->pdev->dev, "Resetting array controller failed.\n"); | 
|  | 4178 | return -EIO; | 
|  | 4179 | } | 
|  | 4180 |  | 
|  | 4181 | dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n"); | 
|  | 4182 | if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY)) { | 
|  | 4183 | dev_warn(&h->pdev->dev, "Soft reset had no effect.\n"); | 
|  | 4184 | return -1; | 
|  | 4185 | } | 
|  | 4186 |  | 
|  | 4187 | dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n"); | 
|  | 4188 | if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY)) { | 
|  | 4189 | dev_warn(&h->pdev->dev, "Board failed to become ready " | 
|  | 4190 | "after soft reset.\n"); | 
|  | 4191 | return -1; | 
|  | 4192 | } | 
|  | 4193 |  | 
|  | 4194 | return 0; | 
|  | 4195 | } | 
|  | 4196 |  | 
|  | 4197 | static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h) | 
|  | 4198 | { | 
|  | 4199 | free_irq(h->intr[h->intr_mode], h); | 
|  | 4200 | #ifdef CONFIG_PCI_MSI | 
|  | 4201 | if (h->msix_vector) | 
|  | 4202 | pci_disable_msix(h->pdev); | 
|  | 4203 | else if (h->msi_vector) | 
|  | 4204 | pci_disable_msi(h->pdev); | 
|  | 4205 | #endif /* CONFIG_PCI_MSI */ | 
|  | 4206 | hpsa_free_sg_chain_blocks(h); | 
|  | 4207 | hpsa_free_cmd_pool(h); | 
|  | 4208 | kfree(h->blockFetchTable); | 
|  | 4209 | pci_free_consistent(h->pdev, h->reply_pool_size, | 
|  | 4210 | h->reply_pool, h->reply_pool_dhandle); | 
|  | 4211 | if (h->vaddr) | 
|  | 4212 | iounmap(h->vaddr); | 
|  | 4213 | if (h->transtable) | 
|  | 4214 | iounmap(h->transtable); | 
|  | 4215 | if (h->cfgtable) | 
|  | 4216 | iounmap(h->cfgtable); | 
|  | 4217 | pci_disable_device(h->pdev); | 
|  | 4218 | pci_release_regions(h->pdev); | 
|  | 4219 | kfree(h); | 
|  | 4220 | } | 
|  | 4221 |  | 
|  | 4222 | static void remove_ctlr_from_lockup_detector_list(struct ctlr_info *h) | 
|  | 4223 | { | 
|  | 4224 | assert_spin_locked(&lockup_detector_lock); | 
|  | 4225 | if (!hpsa_lockup_detector) | 
|  | 4226 | return; | 
|  | 4227 | if (h->lockup_detected) | 
|  | 4228 | return; /* already stopped the lockup detector */ | 
|  | 4229 | list_del(&h->lockup_list); | 
|  | 4230 | } | 
|  | 4231 |  | 
|  | 4232 | /* Called when controller lockup detected. */ | 
|  | 4233 | static void fail_all_cmds_on_list(struct ctlr_info *h, struct list_head *list) | 
|  | 4234 | { | 
|  | 4235 | struct CommandList *c = NULL; | 
|  | 4236 |  | 
|  | 4237 | assert_spin_locked(&h->lock); | 
|  | 4238 | /* Mark all outstanding commands as failed and complete them. */ | 
|  | 4239 | while (!list_empty(list)) { | 
|  | 4240 | c = list_entry(list->next, struct CommandList, list); | 
|  | 4241 | c->err_info->CommandStatus = CMD_HARDWARE_ERR; | 
|  | 4242 | finish_cmd(c, c->Header.Tag.lower); | 
|  | 4243 | } | 
|  | 4244 | } | 
|  | 4245 |  | 
|  | 4246 | static void controller_lockup_detected(struct ctlr_info *h) | 
|  | 4247 | { | 
|  | 4248 | unsigned long flags; | 
|  | 4249 |  | 
|  | 4250 | assert_spin_locked(&lockup_detector_lock); | 
|  | 4251 | remove_ctlr_from_lockup_detector_list(h); | 
|  | 4252 | h->access.set_intr_mask(h, HPSA_INTR_OFF); | 
|  | 4253 | spin_lock_irqsave(&h->lock, flags); | 
|  | 4254 | h->lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET); | 
|  | 4255 | spin_unlock_irqrestore(&h->lock, flags); | 
|  | 4256 | dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x\n", | 
|  | 4257 | h->lockup_detected); | 
|  | 4258 | pci_disable_device(h->pdev); | 
|  | 4259 | spin_lock_irqsave(&h->lock, flags); | 
|  | 4260 | fail_all_cmds_on_list(h, &h->cmpQ); | 
|  | 4261 | fail_all_cmds_on_list(h, &h->reqQ); | 
|  | 4262 | spin_unlock_irqrestore(&h->lock, flags); | 
|  | 4263 | } | 
|  | 4264 |  | 
|  | 4265 | static void detect_controller_lockup(struct ctlr_info *h) | 
|  | 4266 | { | 
|  | 4267 | u64 now; | 
|  | 4268 | u32 heartbeat; | 
|  | 4269 | unsigned long flags; | 
|  | 4270 |  | 
|  | 4271 | assert_spin_locked(&lockup_detector_lock); | 
|  | 4272 | now = get_jiffies_64(); | 
|  | 4273 | /* If we've received an interrupt recently, we're ok. */ | 
|  | 4274 | if (time_after64(h->last_intr_timestamp + | 
|  | 4275 | (h->heartbeat_sample_interval), now)) | 
|  | 4276 | return; | 
|  | 4277 |  | 
|  | 4278 | /* | 
|  | 4279 | * If we've already checked the heartbeat recently, we're ok. | 
|  | 4280 | * This could happen if someone sends us a signal. We | 
|  | 4281 | * otherwise don't care about signals in this thread. | 
|  | 4282 | */ | 
|  | 4283 | if (time_after64(h->last_heartbeat_timestamp + | 
|  | 4284 | (h->heartbeat_sample_interval), now)) | 
|  | 4285 | return; | 
|  | 4286 |  | 
|  | 4287 | /* If heartbeat has not changed since we last looked, we're not ok. */ | 
|  | 4288 | spin_lock_irqsave(&h->lock, flags); | 
|  | 4289 | heartbeat = readl(&h->cfgtable->HeartBeat); | 
|  | 4290 | spin_unlock_irqrestore(&h->lock, flags); | 
|  | 4291 | if (h->last_heartbeat == heartbeat) { | 
|  | 4292 | controller_lockup_detected(h); | 
|  | 4293 | return; | 
|  | 4294 | } | 
|  | 4295 |  | 
|  | 4296 | /* We're ok. */ | 
|  | 4297 | h->last_heartbeat = heartbeat; | 
|  | 4298 | h->last_heartbeat_timestamp = now; | 
|  | 4299 | } | 
|  | 4300 |  | 
|  | 4301 | static int detect_controller_lockup_thread(void *notused) | 
|  | 4302 | { | 
|  | 4303 | struct ctlr_info *h; | 
|  | 4304 | unsigned long flags; | 
|  | 4305 |  | 
|  | 4306 | while (1) { | 
|  | 4307 | struct list_head *this, *tmp; | 
|  | 4308 |  | 
|  | 4309 | schedule_timeout_interruptible(HEARTBEAT_SAMPLE_INTERVAL); | 
|  | 4310 | if (kthread_should_stop()) | 
|  | 4311 | break; | 
|  | 4312 | spin_lock_irqsave(&lockup_detector_lock, flags); | 
|  | 4313 | list_for_each_safe(this, tmp, &hpsa_ctlr_list) { | 
|  | 4314 | h = list_entry(this, struct ctlr_info, lockup_list); | 
|  | 4315 | detect_controller_lockup(h); | 
|  | 4316 | } | 
|  | 4317 | spin_unlock_irqrestore(&lockup_detector_lock, flags); | 
|  | 4318 | } | 
|  | 4319 | return 0; | 
|  | 4320 | } | 
|  | 4321 |  | 
|  | 4322 | static void add_ctlr_to_lockup_detector_list(struct ctlr_info *h) | 
|  | 4323 | { | 
|  | 4324 | unsigned long flags; | 
|  | 4325 |  | 
|  | 4326 | h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL; | 
|  | 4327 | spin_lock_irqsave(&lockup_detector_lock, flags); | 
|  | 4328 | list_add_tail(&h->lockup_list, &hpsa_ctlr_list); | 
|  | 4329 | spin_unlock_irqrestore(&lockup_detector_lock, flags); | 
|  | 4330 | } | 
|  | 4331 |  | 
|  | 4332 | static void start_controller_lockup_detector(struct ctlr_info *h) | 
|  | 4333 | { | 
|  | 4334 | /* Start the lockup detector thread if not already started */ | 
|  | 4335 | if (!hpsa_lockup_detector) { | 
|  | 4336 | spin_lock_init(&lockup_detector_lock); | 
|  | 4337 | hpsa_lockup_detector = | 
|  | 4338 | kthread_run(detect_controller_lockup_thread, | 
|  | 4339 | NULL, HPSA); | 
|  | 4340 | } | 
|  | 4341 | if (!hpsa_lockup_detector) { | 
|  | 4342 | dev_warn(&h->pdev->dev, | 
|  | 4343 | "Could not start lockup detector thread\n"); | 
|  | 4344 | return; | 
|  | 4345 | } | 
|  | 4346 | add_ctlr_to_lockup_detector_list(h); | 
|  | 4347 | } | 
|  | 4348 |  | 
|  | 4349 | static void stop_controller_lockup_detector(struct ctlr_info *h) | 
|  | 4350 | { | 
|  | 4351 | unsigned long flags; | 
|  | 4352 |  | 
|  | 4353 | spin_lock_irqsave(&lockup_detector_lock, flags); | 
|  | 4354 | remove_ctlr_from_lockup_detector_list(h); | 
|  | 4355 | /* If the list of ctlr's to monitor is empty, stop the thread */ | 
|  | 4356 | if (list_empty(&hpsa_ctlr_list)) { | 
|  | 4357 | spin_unlock_irqrestore(&lockup_detector_lock, flags); | 
|  | 4358 | kthread_stop(hpsa_lockup_detector); | 
|  | 4359 | spin_lock_irqsave(&lockup_detector_lock, flags); | 
|  | 4360 | hpsa_lockup_detector = NULL; | 
|  | 4361 | } | 
|  | 4362 | spin_unlock_irqrestore(&lockup_detector_lock, flags); | 
|  | 4363 | } | 
|  | 4364 |  | 
|  | 4365 | static int __devinit hpsa_init_one(struct pci_dev *pdev, | 
|  | 4366 | const struct pci_device_id *ent) | 
|  | 4367 | { | 
|  | 4368 | int dac, rc; | 
|  | 4369 | struct ctlr_info *h; | 
|  | 4370 | int try_soft_reset = 0; | 
|  | 4371 | unsigned long flags; | 
|  | 4372 |  | 
|  | 4373 | if (number_of_controllers == 0) | 
|  | 4374 | printk(KERN_INFO DRIVER_NAME "\n"); | 
|  | 4375 |  | 
|  | 4376 | rc = hpsa_init_reset_devices(pdev); | 
|  | 4377 | if (rc) { | 
|  | 4378 | if (rc != -ENOTSUPP) | 
|  | 4379 | return rc; | 
|  | 4380 | /* If the reset fails in a particular way (it has no way to do | 
|  | 4381 | * a proper hard reset, so returns -ENOTSUPP) we can try to do | 
|  | 4382 | * a soft reset once we get the controller configured up to the | 
|  | 4383 | * point that it can accept a command. | 
|  | 4384 | */ | 
|  | 4385 | try_soft_reset = 1; | 
|  | 4386 | rc = 0; | 
|  | 4387 | } | 
|  | 4388 |  | 
|  | 4389 | reinit_after_soft_reset: | 
|  | 4390 |  | 
|  | 4391 | /* Command structures must be aligned on a 32-byte boundary because | 
|  | 4392 | * the 5 lower bits of the address are used by the hardware. and by | 
|  | 4393 | * the driver.  See comments in hpsa.h for more info. | 
|  | 4394 | */ | 
|  | 4395 | #define COMMANDLIST_ALIGNMENT 32 | 
|  | 4396 | BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT); | 
|  | 4397 | h = kzalloc(sizeof(*h), GFP_KERNEL); | 
|  | 4398 | if (!h) | 
|  | 4399 | return -ENOMEM; | 
|  | 4400 |  | 
|  | 4401 | h->pdev = pdev; | 
|  | 4402 | h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT; | 
|  | 4403 | INIT_LIST_HEAD(&h->cmpQ); | 
|  | 4404 | INIT_LIST_HEAD(&h->reqQ); | 
|  | 4405 | spin_lock_init(&h->lock); | 
|  | 4406 | spin_lock_init(&h->scan_lock); | 
|  | 4407 | rc = hpsa_pci_init(h); | 
|  | 4408 | if (rc != 0) | 
|  | 4409 | goto clean1; | 
|  | 4410 |  | 
|  | 4411 | sprintf(h->devname, HPSA "%d", number_of_controllers); | 
|  | 4412 | h->ctlr = number_of_controllers; | 
|  | 4413 | number_of_controllers++; | 
|  | 4414 |  | 
|  | 4415 | /* configure PCI DMA stuff */ | 
|  | 4416 | rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); | 
|  | 4417 | if (rc == 0) { | 
|  | 4418 | dac = 1; | 
|  | 4419 | } else { | 
|  | 4420 | rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); | 
|  | 4421 | if (rc == 0) { | 
|  | 4422 | dac = 0; | 
|  | 4423 | } else { | 
|  | 4424 | dev_err(&pdev->dev, "no suitable DMA available\n"); | 
|  | 4425 | goto clean1; | 
|  | 4426 | } | 
|  | 4427 | } | 
|  | 4428 |  | 
|  | 4429 | /* make sure the board interrupts are off */ | 
|  | 4430 | h->access.set_intr_mask(h, HPSA_INTR_OFF); | 
|  | 4431 |  | 
|  | 4432 | if (hpsa_request_irq(h, do_hpsa_intr_msi, do_hpsa_intr_intx)) | 
|  | 4433 | goto clean2; | 
|  | 4434 | dev_info(&pdev->dev, "%s: <0x%x> at IRQ %d%s using DAC\n", | 
|  | 4435 | h->devname, pdev->device, | 
|  | 4436 | h->intr[h->intr_mode], dac ? "" : " not"); | 
|  | 4437 | if (hpsa_allocate_cmd_pool(h)) | 
|  | 4438 | goto clean4; | 
|  | 4439 | if (hpsa_allocate_sg_chain_blocks(h)) | 
|  | 4440 | goto clean4; | 
|  | 4441 | init_waitqueue_head(&h->scan_wait_queue); | 
|  | 4442 | h->scan_finished = 1; /* no scan currently in progress */ | 
|  | 4443 |  | 
|  | 4444 | pci_set_drvdata(pdev, h); | 
|  | 4445 | h->ndevices = 0; | 
|  | 4446 | h->scsi_host = NULL; | 
|  | 4447 | spin_lock_init(&h->devlock); | 
|  | 4448 | hpsa_put_ctlr_into_performant_mode(h); | 
|  | 4449 |  | 
|  | 4450 | /* At this point, the controller is ready to take commands. | 
|  | 4451 | * Now, if reset_devices and the hard reset didn't work, try | 
|  | 4452 | * the soft reset and see if that works. | 
|  | 4453 | */ | 
|  | 4454 | if (try_soft_reset) { | 
|  | 4455 |  | 
|  | 4456 | /* This is kind of gross.  We may or may not get a completion | 
|  | 4457 | * from the soft reset command, and if we do, then the value | 
|  | 4458 | * from the fifo may or may not be valid.  So, we wait 10 secs | 
|  | 4459 | * after the reset throwing away any completions we get during | 
|  | 4460 | * that time.  Unregister the interrupt handler and register | 
|  | 4461 | * fake ones to scoop up any residual completions. | 
|  | 4462 | */ | 
|  | 4463 | spin_lock_irqsave(&h->lock, flags); | 
|  | 4464 | h->access.set_intr_mask(h, HPSA_INTR_OFF); | 
|  | 4465 | spin_unlock_irqrestore(&h->lock, flags); | 
|  | 4466 | free_irq(h->intr[h->intr_mode], h); | 
|  | 4467 | rc = hpsa_request_irq(h, hpsa_msix_discard_completions, | 
|  | 4468 | hpsa_intx_discard_completions); | 
|  | 4469 | if (rc) { | 
|  | 4470 | dev_warn(&h->pdev->dev, "Failed to request_irq after " | 
|  | 4471 | "soft reset.\n"); | 
|  | 4472 | goto clean4; | 
|  | 4473 | } | 
|  | 4474 |  | 
|  | 4475 | rc = hpsa_kdump_soft_reset(h); | 
|  | 4476 | if (rc) | 
|  | 4477 | /* Neither hard nor soft reset worked, we're hosed. */ | 
|  | 4478 | goto clean4; | 
|  | 4479 |  | 
|  | 4480 | dev_info(&h->pdev->dev, "Board READY.\n"); | 
|  | 4481 | dev_info(&h->pdev->dev, | 
|  | 4482 | "Waiting for stale completions to drain.\n"); | 
|  | 4483 | h->access.set_intr_mask(h, HPSA_INTR_ON); | 
|  | 4484 | msleep(10000); | 
|  | 4485 | h->access.set_intr_mask(h, HPSA_INTR_OFF); | 
|  | 4486 |  | 
|  | 4487 | rc = controller_reset_failed(h->cfgtable); | 
|  | 4488 | if (rc) | 
|  | 4489 | dev_info(&h->pdev->dev, | 
|  | 4490 | "Soft reset appears to have failed.\n"); | 
|  | 4491 |  | 
|  | 4492 | /* since the controller's reset, we have to go back and re-init | 
|  | 4493 | * everything.  Easiest to just forget what we've done and do it | 
|  | 4494 | * all over again. | 
|  | 4495 | */ | 
|  | 4496 | hpsa_undo_allocations_after_kdump_soft_reset(h); | 
|  | 4497 | try_soft_reset = 0; | 
|  | 4498 | if (rc) | 
|  | 4499 | /* don't go to clean4, we already unallocated */ | 
|  | 4500 | return -ENODEV; | 
|  | 4501 |  | 
|  | 4502 | goto reinit_after_soft_reset; | 
|  | 4503 | } | 
|  | 4504 |  | 
|  | 4505 | /* Turn the interrupts on so we can service requests */ | 
|  | 4506 | h->access.set_intr_mask(h, HPSA_INTR_ON); | 
|  | 4507 |  | 
|  | 4508 | hpsa_hba_inquiry(h); | 
|  | 4509 | hpsa_register_scsi(h);	/* hook ourselves into SCSI subsystem */ | 
|  | 4510 | start_controller_lockup_detector(h); | 
|  | 4511 | return 0; | 
|  | 4512 |  | 
|  | 4513 | clean4: | 
|  | 4514 | hpsa_free_sg_chain_blocks(h); | 
|  | 4515 | hpsa_free_cmd_pool(h); | 
|  | 4516 | free_irq(h->intr[h->intr_mode], h); | 
|  | 4517 | clean2: | 
|  | 4518 | clean1: | 
|  | 4519 | kfree(h); | 
|  | 4520 | return rc; | 
|  | 4521 | } | 
|  | 4522 |  | 
|  | 4523 | static void hpsa_flush_cache(struct ctlr_info *h) | 
|  | 4524 | { | 
|  | 4525 | char *flush_buf; | 
|  | 4526 | struct CommandList *c; | 
|  | 4527 |  | 
|  | 4528 | flush_buf = kzalloc(4, GFP_KERNEL); | 
|  | 4529 | if (!flush_buf) | 
|  | 4530 | return; | 
|  | 4531 |  | 
|  | 4532 | c = cmd_special_alloc(h); | 
|  | 4533 | if (!c) { | 
|  | 4534 | dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n"); | 
|  | 4535 | goto out_of_memory; | 
|  | 4536 | } | 
|  | 4537 | fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0, | 
|  | 4538 | RAID_CTLR_LUNID, TYPE_CMD); | 
|  | 4539 | hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_TODEVICE); | 
|  | 4540 | if (c->err_info->CommandStatus != 0) | 
|  | 4541 | dev_warn(&h->pdev->dev, | 
|  | 4542 | "error flushing cache on controller\n"); | 
|  | 4543 | cmd_special_free(h, c); | 
|  | 4544 | out_of_memory: | 
|  | 4545 | kfree(flush_buf); | 
|  | 4546 | } | 
|  | 4547 |  | 
|  | 4548 | static void hpsa_shutdown(struct pci_dev *pdev) | 
|  | 4549 | { | 
|  | 4550 | struct ctlr_info *h; | 
|  | 4551 |  | 
|  | 4552 | h = pci_get_drvdata(pdev); | 
|  | 4553 | /* Turn board interrupts off  and send the flush cache command | 
|  | 4554 | * sendcmd will turn off interrupt, and send the flush... | 
|  | 4555 | * To write all data in the battery backed cache to disks | 
|  | 4556 | */ | 
|  | 4557 | hpsa_flush_cache(h); | 
|  | 4558 | h->access.set_intr_mask(h, HPSA_INTR_OFF); | 
|  | 4559 | free_irq(h->intr[h->intr_mode], h); | 
|  | 4560 | #ifdef CONFIG_PCI_MSI | 
|  | 4561 | if (h->msix_vector) | 
|  | 4562 | pci_disable_msix(h->pdev); | 
|  | 4563 | else if (h->msi_vector) | 
|  | 4564 | pci_disable_msi(h->pdev); | 
|  | 4565 | #endif				/* CONFIG_PCI_MSI */ | 
|  | 4566 | } | 
|  | 4567 |  | 
|  | 4568 | static void __devexit hpsa_free_device_info(struct ctlr_info *h) | 
|  | 4569 | { | 
|  | 4570 | int i; | 
|  | 4571 |  | 
|  | 4572 | for (i = 0; i < h->ndevices; i++) | 
|  | 4573 | kfree(h->dev[i]); | 
|  | 4574 | } | 
|  | 4575 |  | 
|  | 4576 | static void __devexit hpsa_remove_one(struct pci_dev *pdev) | 
|  | 4577 | { | 
|  | 4578 | struct ctlr_info *h; | 
|  | 4579 |  | 
|  | 4580 | if (pci_get_drvdata(pdev) == NULL) { | 
|  | 4581 | dev_err(&pdev->dev, "unable to remove device\n"); | 
|  | 4582 | return; | 
|  | 4583 | } | 
|  | 4584 | h = pci_get_drvdata(pdev); | 
|  | 4585 | stop_controller_lockup_detector(h); | 
|  | 4586 | hpsa_unregister_scsi(h);	/* unhook from SCSI subsystem */ | 
|  | 4587 | hpsa_shutdown(pdev); | 
|  | 4588 | iounmap(h->vaddr); | 
|  | 4589 | iounmap(h->transtable); | 
|  | 4590 | iounmap(h->cfgtable); | 
|  | 4591 | hpsa_free_device_info(h); | 
|  | 4592 | hpsa_free_sg_chain_blocks(h); | 
|  | 4593 | pci_free_consistent(h->pdev, | 
|  | 4594 | h->nr_cmds * sizeof(struct CommandList), | 
|  | 4595 | h->cmd_pool, h->cmd_pool_dhandle); | 
|  | 4596 | pci_free_consistent(h->pdev, | 
|  | 4597 | h->nr_cmds * sizeof(struct ErrorInfo), | 
|  | 4598 | h->errinfo_pool, h->errinfo_pool_dhandle); | 
|  | 4599 | pci_free_consistent(h->pdev, h->reply_pool_size, | 
|  | 4600 | h->reply_pool, h->reply_pool_dhandle); | 
|  | 4601 | kfree(h->cmd_pool_bits); | 
|  | 4602 | kfree(h->blockFetchTable); | 
|  | 4603 | kfree(h->hba_inquiry_data); | 
|  | 4604 | /* | 
|  | 4605 | * Deliberately omit pci_disable_device(): it does something nasty to | 
|  | 4606 | * Smart Array controllers that pci_enable_device does not undo | 
|  | 4607 | */ | 
|  | 4608 | pci_release_regions(pdev); | 
|  | 4609 | pci_set_drvdata(pdev, NULL); | 
|  | 4610 | kfree(h); | 
|  | 4611 | } | 
|  | 4612 |  | 
|  | 4613 | static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev, | 
|  | 4614 | __attribute__((unused)) pm_message_t state) | 
|  | 4615 | { | 
|  | 4616 | return -ENOSYS; | 
|  | 4617 | } | 
|  | 4618 |  | 
|  | 4619 | static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev) | 
|  | 4620 | { | 
|  | 4621 | return -ENOSYS; | 
|  | 4622 | } | 
|  | 4623 |  | 
|  | 4624 | static struct pci_driver hpsa_pci_driver = { | 
|  | 4625 | .name = HPSA, | 
|  | 4626 | .probe = hpsa_init_one, | 
|  | 4627 | .remove = __devexit_p(hpsa_remove_one), | 
|  | 4628 | .id_table = hpsa_pci_device_id,	/* id_table */ | 
|  | 4629 | .shutdown = hpsa_shutdown, | 
|  | 4630 | .suspend = hpsa_suspend, | 
|  | 4631 | .resume = hpsa_resume, | 
|  | 4632 | }; | 
|  | 4633 |  | 
|  | 4634 | /* Fill in bucket_map[], given nsgs (the max number of | 
|  | 4635 | * scatter gather elements supported) and bucket[], | 
|  | 4636 | * which is an array of 8 integers.  The bucket[] array | 
|  | 4637 | * contains 8 different DMA transfer sizes (in 16 | 
|  | 4638 | * byte increments) which the controller uses to fetch | 
|  | 4639 | * commands.  This function fills in bucket_map[], which | 
|  | 4640 | * maps a given number of scatter gather elements to one of | 
|  | 4641 | * the 8 DMA transfer sizes.  The point of it is to allow the | 
|  | 4642 | * controller to only do as much DMA as needed to fetch the | 
|  | 4643 | * command, with the DMA transfer size encoded in the lower | 
|  | 4644 | * bits of the command address. | 
|  | 4645 | */ | 
|  | 4646 | static void  calc_bucket_map(int bucket[], int num_buckets, | 
|  | 4647 | int nsgs, int *bucket_map) | 
|  | 4648 | { | 
|  | 4649 | int i, j, b, size; | 
|  | 4650 |  | 
|  | 4651 | /* even a command with 0 SGs requires 4 blocks */ | 
|  | 4652 | #define MINIMUM_TRANSFER_BLOCKS 4 | 
|  | 4653 | #define NUM_BUCKETS 8 | 
|  | 4654 | /* Note, bucket_map must have nsgs+1 entries. */ | 
|  | 4655 | for (i = 0; i <= nsgs; i++) { | 
|  | 4656 | /* Compute size of a command with i SG entries */ | 
|  | 4657 | size = i + MINIMUM_TRANSFER_BLOCKS; | 
|  | 4658 | b = num_buckets; /* Assume the biggest bucket */ | 
|  | 4659 | /* Find the bucket that is just big enough */ | 
|  | 4660 | for (j = 0; j < 8; j++) { | 
|  | 4661 | if (bucket[j] >= size) { | 
|  | 4662 | b = j; | 
|  | 4663 | break; | 
|  | 4664 | } | 
|  | 4665 | } | 
|  | 4666 | /* for a command with i SG entries, use bucket b. */ | 
|  | 4667 | bucket_map[i] = b; | 
|  | 4668 | } | 
|  | 4669 | } | 
|  | 4670 |  | 
|  | 4671 | static __devinit void hpsa_enter_performant_mode(struct ctlr_info *h, | 
|  | 4672 | u32 use_short_tags) | 
|  | 4673 | { | 
|  | 4674 | int i; | 
|  | 4675 | unsigned long register_value; | 
|  | 4676 |  | 
|  | 4677 | /* This is a bit complicated.  There are 8 registers on | 
|  | 4678 | * the controller which we write to to tell it 8 different | 
|  | 4679 | * sizes of commands which there may be.  It's a way of | 
|  | 4680 | * reducing the DMA done to fetch each command.  Encoded into | 
|  | 4681 | * each command's tag are 3 bits which communicate to the controller | 
|  | 4682 | * which of the eight sizes that command fits within.  The size of | 
|  | 4683 | * each command depends on how many scatter gather entries there are. | 
|  | 4684 | * Each SG entry requires 16 bytes.  The eight registers are programmed | 
|  | 4685 | * with the number of 16-byte blocks a command of that size requires. | 
|  | 4686 | * The smallest command possible requires 5 such 16 byte blocks. | 
|  | 4687 | * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte | 
|  | 4688 | * blocks.  Note, this only extends to the SG entries contained | 
|  | 4689 | * within the command block, and does not extend to chained blocks | 
|  | 4690 | * of SG elements.   bft[] contains the eight values we write to | 
|  | 4691 | * the registers.  They are not evenly distributed, but have more | 
|  | 4692 | * sizes for small commands, and fewer sizes for larger commands. | 
|  | 4693 | */ | 
|  | 4694 | int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4}; | 
|  | 4695 | BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4); | 
|  | 4696 | /*  5 = 1 s/g entry or 4k | 
|  | 4697 | *  6 = 2 s/g entry or 8k | 
|  | 4698 | *  8 = 4 s/g entry or 16k | 
|  | 4699 | * 10 = 6 s/g entry or 24k | 
|  | 4700 | */ | 
|  | 4701 |  | 
|  | 4702 | h->reply_pool_wraparound = 1; /* spec: init to 1 */ | 
|  | 4703 |  | 
|  | 4704 | /* Controller spec: zero out this buffer. */ | 
|  | 4705 | memset(h->reply_pool, 0, h->reply_pool_size); | 
|  | 4706 | h->reply_pool_head = h->reply_pool; | 
|  | 4707 |  | 
|  | 4708 | bft[7] = SG_ENTRIES_IN_CMD + 4; | 
|  | 4709 | calc_bucket_map(bft, ARRAY_SIZE(bft), | 
|  | 4710 | SG_ENTRIES_IN_CMD, h->blockFetchTable); | 
|  | 4711 | for (i = 0; i < 8; i++) | 
|  | 4712 | writel(bft[i], &h->transtable->BlockFetch[i]); | 
|  | 4713 |  | 
|  | 4714 | /* size of controller ring buffer */ | 
|  | 4715 | writel(h->max_commands, &h->transtable->RepQSize); | 
|  | 4716 | writel(1, &h->transtable->RepQCount); | 
|  | 4717 | writel(0, &h->transtable->RepQCtrAddrLow32); | 
|  | 4718 | writel(0, &h->transtable->RepQCtrAddrHigh32); | 
|  | 4719 | writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32); | 
|  | 4720 | writel(0, &h->transtable->RepQAddr0High32); | 
|  | 4721 | writel(CFGTBL_Trans_Performant | use_short_tags, | 
|  | 4722 | &(h->cfgtable->HostWrite.TransportRequest)); | 
|  | 4723 | writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); | 
|  | 4724 | hpsa_wait_for_mode_change_ack(h); | 
|  | 4725 | register_value = readl(&(h->cfgtable->TransportActive)); | 
|  | 4726 | if (!(register_value & CFGTBL_Trans_Performant)) { | 
|  | 4727 | dev_warn(&h->pdev->dev, "unable to get board into" | 
|  | 4728 | " performant mode\n"); | 
|  | 4729 | return; | 
|  | 4730 | } | 
|  | 4731 | /* Change the access methods to the performant access methods */ | 
|  | 4732 | h->access = SA5_performant_access; | 
|  | 4733 | h->transMethod = CFGTBL_Trans_Performant; | 
|  | 4734 | } | 
|  | 4735 |  | 
|  | 4736 | static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h) | 
|  | 4737 | { | 
|  | 4738 | u32 trans_support; | 
|  | 4739 |  | 
|  | 4740 | if (hpsa_simple_mode) | 
|  | 4741 | return; | 
|  | 4742 |  | 
|  | 4743 | trans_support = readl(&(h->cfgtable->TransportSupport)); | 
|  | 4744 | if (!(trans_support & PERFORMANT_MODE)) | 
|  | 4745 | return; | 
|  | 4746 |  | 
|  | 4747 | hpsa_get_max_perf_mode_cmds(h); | 
|  | 4748 | /* Performant mode ring buffer and supporting data structures */ | 
|  | 4749 | h->reply_pool_size = h->max_commands * sizeof(u64); | 
|  | 4750 | h->reply_pool = pci_alloc_consistent(h->pdev, h->reply_pool_size, | 
|  | 4751 | &(h->reply_pool_dhandle)); | 
|  | 4752 |  | 
|  | 4753 | /* Need a block fetch table for performant mode */ | 
|  | 4754 | h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) * | 
|  | 4755 | sizeof(u32)), GFP_KERNEL); | 
|  | 4756 |  | 
|  | 4757 | if ((h->reply_pool == NULL) | 
|  | 4758 | || (h->blockFetchTable == NULL)) | 
|  | 4759 | goto clean_up; | 
|  | 4760 |  | 
|  | 4761 | hpsa_enter_performant_mode(h, | 
|  | 4762 | trans_support & CFGTBL_Trans_use_short_tags); | 
|  | 4763 |  | 
|  | 4764 | return; | 
|  | 4765 |  | 
|  | 4766 | clean_up: | 
|  | 4767 | if (h->reply_pool) | 
|  | 4768 | pci_free_consistent(h->pdev, h->reply_pool_size, | 
|  | 4769 | h->reply_pool, h->reply_pool_dhandle); | 
|  | 4770 | kfree(h->blockFetchTable); | 
|  | 4771 | } | 
|  | 4772 |  | 
|  | 4773 | /* | 
|  | 4774 | *  This is it.  Register the PCI driver information for the cards we control | 
|  | 4775 | *  the OS will call our registered routines when it finds one of our cards. | 
|  | 4776 | */ | 
|  | 4777 | static int __init hpsa_init(void) | 
|  | 4778 | { | 
|  | 4779 | return pci_register_driver(&hpsa_pci_driver); | 
|  | 4780 | } | 
|  | 4781 |  | 
|  | 4782 | static void __exit hpsa_cleanup(void) | 
|  | 4783 | { | 
|  | 4784 | pci_unregister_driver(&hpsa_pci_driver); | 
|  | 4785 | } | 
|  | 4786 |  | 
|  | 4787 | module_init(hpsa_init); | 
|  | 4788 | module_exit(hpsa_cleanup); |