blob: 61ea186fae098510a1be6a75e24cbbc0c25b85dd [file] [log] [blame]
lh9ed821d2023-04-07 01:36:19 -07001/*********************************************************************
2 Copyright 2016 by ZXIC Corporation.
3*
4* FileName:: spifc.c
5* File Mark:
6* Description:
7* Others:
8* Version:
9* Author:
10* Date:
11
12* History 1:
13* Date:
14* Version:
15* Author:
16* Modification:
17* History 2:
18**********************************************************************/
19#include <common.h>
20#include <asm/arch/spifc.h>
21#include <asm/io.h>
22#include <bbt.h>
23
24#include "flash.h"
25
26
27static const struct spi_flash_device_para *spi_flash_info = NULL;
28/* spi flash parameter config */
29static const struct spi_flash_device_para spi_flash_para[] = {
30 /* GIGADEVICE GD5F1GQ4R 128MB 1.8V SPI-NAND */
31 {0xC8, 0xC1, 0x77, 2048, 11, 128, 17, 1024, 0x20000, 1},
32 /* GIGADEVICE GD5F1GQ5RExxG 128MB 1.8V SPI-NAND */
33 {0xC8, 0x41, 0x77, 2048, 11, 64, 17, 1024, 0x20000, 1},
34 /* GIGADEVICE GD5F2GQ4R 256MB SPI-NAND */
35 {0xC8, 0xC2, 0x77, 2048, 11, 128, 17, 2048, 0x20000, 1},
36 /* GIGADEVICE GD5F4GQ4U 512MB SPI-NAND */
37 {0xC8, 0xC4, 0x77, 4096, 12, 256, 18, 2048, 0x40000, 1},
38 /* GIGADEVICE GD5F4GQ6REY2G 512MB SPI-NAND*/
39 {0xC8, 0x45, 0x77, 2048, 11, 128, 17, 4096, 0x20000, 1},
40
41 /* PARAGON PN26Q01AWSIUG 128MB SPI-NAND */
42 {0xA1, 0xC1, 0x77, 2048, 11, 128, 17, 1024, 0x20000, 1},
43 /* PN26Q02AWSIUG 1.8V 2G-BIT SPI NAND */
44 {0xA1, 0xC2, 0x77, 2048, 11, 128, 17, 2048, 0x20000, 1},
45
46 /* HYF1GQ4IAACAE SPI-NAND */
47 {0xC9, 0x51, 0x77, 2048, 11, 128, 17, 1024, 0x20000, 1},
48 /* HYF2GQ4IAACAE SPI-NAND */
49 {0xC9, 0x52, 0x77, 2048, 11, 128, 17, 2048, 0x20000, 1},
50 /*winbond W25N01G*/
51 {0xEF, 0xBA, 0x77, 2048, 11, 64, 17, 1024, 0x20000, 1},
52 /*winbond W25N02G*/
53 {0xEF, 0xBB, 0x77, 2048, 11, 64, 17, 2048, 0x20000, 1},
54 /* TOSHIBA TC58CYG0S3HRAIG 128MB SPI-NAND*/
55 {0x98, 0xB2, 0x77, 2048, 11, 64, 17, 1024, 0x20000, 1},
56 /* TOSHIBA TC58CYG1S3HRAIG 256MB SPI-NAND*/
57 {0x98, 0xBB, 0x77, 2048, 11, 64, 17, 2048, 0x20000, 1},
58 /* ZETTA ZD35X1GAXXX 128MB SPI-NAND*/
59 {0xBA, 0x21, 0x77, 2048, 11, 64, 17, 1024, 0x20000, 1},
60 /* DOSILICON DS35X1GAXXX 128MB SPI-NAND*/
61 {0xE5, 0x21, 0x77, 2048, 11, 64, 17, 1024, 0x20000, 1},
62 /* DOSILICON DS35X12BXXX 64MB SPI-NAND*/
63 {0xE5, 0xA5, 0x77, 2048, 11, 128, 17, 512, 0x20000, 1},
64 /* FUDANWEI FM25LS01 128MB SPI-NAND*/
65 {0xA1, 0xA5, 0x77, 2048, 11, 128, 17, 1024, 0x20000, 1},
66 /* hosin HG-SPIXGb-1XAIA 128MB SPI-NAND*/
67 {0xD6, 0x21, 0x77, 2048, 11, 64, 17, 1024, 0x20000, 1},
68 /* EMST F50D1G41LB (2M) 128MB SPI-NAND */
69 {0xC8, 0x11, 0x77, 2048, 11, 64, 17, 1024, 0x20000, 1},
70 /* FORESEE F35UQA001G 128MB SPI-NAND */
71 {0xCD, 0x61, 0x77, 2048, 11, 64, 17, 1024, 0x20000, 1},
72 /* FORESEE F35UQA512M 64MB SPI-NAND */
73 {0xCD, 0x60, 0x77, 2048, 11, 64, 17, 512, 0x20000, 1},
74 /* micron-MT29F2G01ABAGDWB-ITG 256MB SPI-NAND */
75 {0x2C, 0x25, 0x77, 2048, 11, 128, 17, 2048, 0x20000, 2},
76 /* ESMT F50D44G41XB (2X) 512MB SPI-NAND*/
77 {0x2C, 0x35, 0x77, 4096, 12, 256, 18, 2048, 0x40000, 1},
lh758261d2023-07-13 05:52:04 -070078 /*XTX XT26Q04D 512M SPI-NAND*/
79 {0x0B, 0x53, 0x77, 4096, 12, 256, 18, 2048, 0x40000, 1},
lh9ed821d2023-04-07 01:36:19 -070080 {0}
81};
82
83
84/*
85 ******************************************************************************
86 * Function: spifc_enable
87 * Description:
88 * Parameters:
89 * Input:
90 * Output:
91 * Returns:
92 * Others:
93 *******************************************************************************
94 */
95static void spifc_enable(void)
96{
97 volatile struct spi_t* spi = (struct spi_t*)SYS_SPI_NAND_BASE;
98
99 if( spi->SFC_EN & FC_EN_BACK )
100 return;
101
102 spi->SFC_EN |= FC_EN;
103 spi->SFC_CTRL0 |= FC_SCLK_PAUSE_EN;
104}
105
106/*
107 ******************************************************************************
108 * Function: spifc_clear_fifo
109 * Description:
110 * Parameters:
111 * Input:
112 * Output:
113 * Returns:
114 * Others:
115 *******************************************************************************
116 */
117void spifc_clear_fifo( void )
118{
119 volatile struct spi_t* spi = (struct spi_t*)SYS_SPI_NAND_BASE;
120
121 spi->SFC_CTRL0 |= (FC_RXFIFO_THRES | FC_TXFIFO_THRES |
122 FC_RXFIFO_CLR | FC_TXFIFO_CLR);
123}
124
125
126/*
127 ******************************************************************************
128 * Function: spifc_setup_cmd
129 * Description:
130 * Parameters:
131 * Input:
132 * Output:
133 * Returns:
134 * Others:
135 *******************************************************************************
136 */
137static void spifc_setup_cmd( struct spiflash_cmd_t *cmd,
138 uint32_t addr, uint32_t len )
139{
140 volatile struct spi_t* spi = (struct spi_t*)SYS_SPI_NAND_BASE;
141 uint32_t wrap = 0;
142 uint32_t tmp = 0;
143
144 /* ÃüÁîÂë */
145 spi->SFC_INS = cmd->cmd;
146
147 /* Êý¾Ý³¤¶È */
148 if( len )
149 spi->SFC_BYTE_NUM = len - 1;
150 else
151 spi->SFC_BYTE_NUM = 0;
152
153 switch( len )
154 {
155 case 2048:
156 wrap = WRAP_SIZE_MAIN;
157 break;
158 case 2112:
159 wrap = WRAP_SIZE_MAIN_OOB;;
160 break;
161 case 64:
162 wrap = WRAP_SIZE_OOB;;
163 break;
164 default:
165 wrap = 0;
166 break;
167 }
168
169 /* µØÖ·Âë */
170 switch( spi->SFC_INS )
171 {
172 case CMD_READ_FROM_CACHE:
173 // case CMD_READ_FROM_CACHE_X2:
174 case CMD_READ_FROM_CACHE_X4:
175 case CMD_READ_FROM_CACHE_QIO:
176 case CMD_PROGRAM_LOAD:
177 case CMD_PROGRAM_LOAD_X4:
178 // case CMD_PROGRAM_LOAD_RANDOM:
179 // case CMD_PROGRAM_LOAD_RANDOM_X4:
180 //case CMD_PROGRAM_LOAD_RANDOM_QIO:
181 addr |= wrap;
182 break;
183
184 default:
185 addr = addr;
186 break;
187 }
188 spi->SFC_ADDR = addr;
189
190 /* µØÖ·Âë¡¢¿ÕÖÜÆÚ¡¢¶Á/д ʹÄÜÉèÖà */
191 spi->SFC_CTRL1 = 0;
192 spi->SFC_CTRL1 = ((cmd->addr_tx_en << FC_ADDR_TX_EN) |
193 (cmd->dumy_tx_en << FC_DUMMY_TX_EN) |
194 (cmd->data_rx_en << FC_READ_DAT_EN) |
195 (cmd->data_tx_en << FC_WRITE_DAT_EN));
196
197
198 /* ¿ÕÖÜÆÚÊý¡¢µØÖ·¿í¶È(1£¬2£¬3£¬4×Ö½Ú)¡¢
199 * µØÖ·/Êý¾ÝÏß¶È¡¢´«Êäģʽ
200 */
201#if 0
202 tmp = spi->SFC_CTRL2;
203 tmp &= 0x1f;
204 tmp |= ((cmd->dumy_bytes << FC_DUMMY_BYTE_NUM) |
205 (cmd->dumy_bits << FC_DUMMY_BIT_NUM) |
206 (cmd->addr_width << FC_ADDR_BYTE_NUM));
207 spi->SFC_CTRL2 = tmp;
208#else
209 spi->SFC_CTRL2 = 0;
210 tmp |= ((cmd->dumy_bytes << FC_DUMMY_BYTE_NUM) |
211 (cmd->dumy_bits << FC_DUMMY_BIT_NUM) |
212 (cmd->addr_width << FC_ADDR_BYTE_NUM));
213 tmp &= ~0x700;
214 spi->SFC_CTRL2 = tmp;
215#endif
216
217}
218
219
220/*
221 ******************************************************************************
222 * Function: spifc_clear_int
223 * Description:
224 * Parameters:
225 * Input:
226 * Output:
227 * Returns:
228 * Others:
229 *******************************************************************************
230 */
231 void spifc_clear_int( void )
232{
233 volatile struct spi_t* spi = (struct spi_t*)SYS_SPI_NAND_BASE;
234
235 if(spi->SFC_INT_RAW & 0x2)
236 printf("\n");
237
238 spi->SFC_INT_SW_CLR = 0xFF; //clear int ?
239}
240
241
242/*
243 ******************************************************************************
244 * Function: spifc_wait_cmd_end
245 * Description:
246 * Parameters:
247 * Input:
248 * Output:
249 * Returns:
250 * Others:
251 *******************************************************************************
252 */
253static int spifc_wait_cmd_end( void )
254{
255 volatile struct spi_t* spi = (struct spi_t*)SYS_SPI_NAND_BASE;
256 uint32_t int_status = 0;
257
258 while(!(spi->SFC_INT_RAW & FC_INT_RAW_MASK));
259
260 int_status = spi->SFC_INT_RAW;
261 spi->SFC_INT_SW_CLR = int_status; /* clear intrrupt */
262
263 if(int_status & FC_INT_RAW_CMD_END)
264 {
265 return 0;
266 }
267 else
268 {
269 printf("intr err.\n");
270 return -1;
271 }
272
273}
274
275
276/*
277 ******************************************************************************
278 * Function: spifc_read_fifo_one_byte
279 * Description:
280 * Parameters:
281 * Input:
282 * Output:
283 * Returns:
284 *
285 * Others: only for:
286 [Instruction] |--addr width is 8 bit
287 [addr] |--get feature
288 [data_rx]
289 *******************************************************************************
290 */
291static int spifc_read_fifo_one_byte( uint8_t *value )
292{
293 uint32_t sw = 0;
294 volatile struct spi_t* spi = (struct spi_t*)SYS_SPI_NAND_BASE;
295
296 sw = spi->SFC_SW;
297
298 if( ((sw >> FC_RX_FIFO_CNT) & FC_RX_FIFO_CNT_MASK) != 1 )
299 {
300 return -1;
301 }
302
303 *value = (uint8_t)spi->SFC_DATA;
304
305 return 0;
306}
307
308
309/*
310 ******************************************************************************
311 * Function: spifc_read_fifo
312 * Description:
313 * Parameters:
314 * Input:
315 * Output:
316 * Returns:
317 * Others:
318 *******************************************************************************
319 */
320static uint32_t spifc_read_fifo( uint32_t len, uint8_t *buf )
321{
322 volatile struct spi_t* spi = (struct spi_t*)SYS_SPI_NAND_BASE;
323 uint32_t *p = (uint32_t *)buf;
324 uint32_t cnt = 0;
325
326 while(cnt < ((len+3)>>2))
327 {
328 if(spi->SFC_SW & (FC_RX_FIFO_CNT_MASK<<FC_RX_FIFO_CNT))//rx fifo not empty
329 {
330 p[cnt++]= spi->SFC_DATA;
331 }
332 }
333
334 return (cnt<<2);
335}
336
337
338/*
339 ******************************************************************************
340 * Function: spifc_start
341 * Description:
342 * Parameters:
343 * Input:
344 * Output:
345 * Returns:
346 * Others:
347 *******************************************************************************
348 */
349static void spifc_start( void )
350{
351 volatile struct spi_t* spi = (struct spi_t*)SYS_SPI_NAND_BASE;
352
353 spi->SFC_START |= FC_START;
354}
355
356/*
357 ******************************************************************************
358 * Function: spifc_get_feature
359 * Description:
360 * Parameters:
361 * Input:
362 * Output:
363 * Returns:
364 *
365 * Others: [Instruction] |--addr width is 8 bit
366 [addr] |--get feature
367 [data_rx] |--read id
368
369 *******************************************************************************
370 */
371 static int spifc_get_feature( uint32_t reg_addr, uint8_t *value)
372 {
373 int ret = 0;
374
375 struct spiflash_cmd_t cmd = {CMD_GET_FEATURE,
376 1,
377 FC_ADDR_BYTE_NUM_8,
378 0,
379 1,
380 0,
381 0,
382 0
383 };
384
385 spifc_clear_fifo();
386 spifc_clear_int();
387
388 spifc_setup_cmd(&cmd, reg_addr, 1);
389 spifc_start();
390 ret = spifc_wait_cmd_end();
391 if(ret != 0)
392 {
393 return ret;
394 }
395
396 ret = spifc_read_fifo_one_byte(value);
397 if(ret != 0)
398 {
399 return ret;
400 }
401
402 return 0;
403}
404
405/*
406 ******************************************************************************
407 * Function: spifc_read_id
408 * Description:
409 * Parameters:
410 * Input:
411 * Output:
412 * Returns:
413 *
414 * Others: [Instruction] |--addr width is 8 bit
415 [addr] |--get feature
416 [data_rx] |--read id
417 *******************************************************************************
418 */
419static int spifc_read_id(uint32_t reg_addr, uint8_t *value, uint8_t len)
420{
421 int ret = 0;
422
423 struct spiflash_cmd_t cmd = { CMD_READ_ID,
424 1,
425 FC_ADDR_BYTE_NUM_8,
426 0,
427 1,
428 0,
429 0,
430 0
431 };
432
433 spifc_clear_fifo();
434 spifc_clear_int();
435 spifc_setup_cmd(&cmd, reg_addr, len);
436 spifc_start();
437 ret = spifc_wait_cmd_end();
438 if(ret != 0)
439 {
440 return ret;
441 }
442
443 ret = spifc_read_fifo(len, value);
444 if(ret != 0)
445 {
446 return ret;
447 }
448
449 return 0;
450}
451
452
453/*
454 ******************************************************************************
455 * Function: spifc_read_page_to_cache
456 * Description:
457 * Parameters:
458 * Input:
459 * Output:
460 * Returns:
461 * Others: [Instruction] |--addr width is 24 bit(page/block addr!!!!)
462 [addr] |--page read
463 |--block erase
464 |--program execute
465 *******************************************************************************
466 */
467static int spifc_read_page_to_cache(uint32_t page_addr)
468{
469 int ret = 0;
470 uint8_t status = 0;
471
472 struct spiflash_cmd_t cmd = { CMD_READ_PAGE_TO_CACHE,
473 1,
474 FC_ADDR_BYTE_NUM_24,
475 0,
476 0,
477 0,
478 0,
479 0
480 };
481
482 spifc_clear_fifo();
483 spifc_clear_int();
484 spifc_setup_cmd(&cmd, page_addr, 0);
485 spifc_start();
486 ret = spifc_wait_cmd_end();
487 if(ret != 0)
488 {
489 return ret;
490 }
491
492 do
493 {
494 spifc_get_feature(REG_STATUS, &status);
495 }while( status & OIP);
496
497 return 0;
498}
499
500/*
501 ******************************************************************************
502 * Function: spifc_read_from_cache
503 * Description:
504 * Parameters:
505 * Input:
506 * Output:
507 * Returns:
508 * Others: [Instruction] |--addr width is 16 bit
509 [addr] |--dummy cycel 8/4/2
510 [dummy] |--read form cache(X1,X2,X4)
511 [data_rx] |--read form cache(dual,quad)IO
512 *******************************************************************************
513 */
514static int spifc_read_from_cache(uint32_t column_addr, uint32_t len, uint8_t *buf)
515{
516 int ret = 0;
517
518 uint32_t len_tmp = 0;
519 struct spiflash_cmd_t cmd;
520
521 cmd.cmd = CMD_READ_FROM_CACHE;
522 cmd.dumy_bytes = 1;
523 cmd.dumy_bits = 0;
524 cmd.addr_tx_en = 1;
525 cmd.addr_width = FC_ADDR_BYTE_NUM_16;
526 cmd.data_tx_en = 0;
527 cmd.data_rx_en = 1;
528 cmd.dumy_tx_en = 1;
529
530 spifc_clear_fifo();
531 spifc_clear_int();
532 spifc_setup_cmd(&cmd, column_addr, len);
533 spifc_start();
534
535 len_tmp = spifc_read_fifo(len, buf);
536 if( len_tmp != len )
537 {
538 ret = -2;
539 return ret;
540 }
541
542 ret = spifc_wait_cmd_end();
543 if( ret != 0 )
544 {
545 return ret;
546 }
547
548 return 0;
549}
550
551
552/*
553 ******************************************************************************
554 * Function: nand_read_oob
555 * Description:
556 * Parameters:
557 * Input:
558 * Output:
559 * Returns:
560 * Others:
561 *******************************************************************************
562 */
563void spifc_read_oob(uint8_t *buf, uint32_t offset, uint32_t len)
564{
565 uint32_t column_offset = spi_flash_info->page_size;
566 uint32_t page = offset >> (spi_flash_info->page_size_shift);
567 uint32_t blocks = offset >> (spi_flash_info->block_size_shift);
568
569 spifc_read_page_to_cache(page);
570
571 if((spi_flash_info->planes == 2) && ((blocks%2) != 0))
572 {
573 column_offset |= (0x1 << 12);
574 }
575 spifc_read_from_cache(column_offset, spi_flash_info->oob_size, buf);
576}
577
578
579/*
580 ******************************************************************************
581 * Function: read_page
582 * Description:
583 * Parameters:
584 * Input:
585 * Output:
586 * Returns:
587 * Others:
588 *******************************************************************************
589 */
590int32_t spifc_read_page(uint32_t buf, uint32_t offset)
591{
592 int ret = 0;
593 uint8_t feature = 0x0;
594
595 uint32_t page = offset >> (spi_flash_info->page_size_shift);
596 uint32_t blocks = offset >> (spi_flash_info->block_size_shift);
597 uint32_t column_offset = 0;
598
599 if( (buf & 0x3) != 0 ) /* DMAµØÖ·ÒªÇó4×Ö½Ú¶ÔÆë */
600 {
601 printf("addr err.\n");
602 return -1;
603 }
604
605 ret = spifc_read_page_to_cache(page);
606 if( ret != 0 )
607 return ret;
608
609 ret = spifc_get_feature(REG_STATUS, &feature);
610 if(ret != 0)
611 return ret;
612
613 if((feature>>ECC_ERR_BIT & 0x3) == 0x2)
614 {
615 printf("ecc err.\n");
616 return -1;
617 }
618 if((spi_flash_info->planes == 2) && ((blocks%2) != 0))
619 {
620 column_offset |= (0x1 << 12);
621 }
622 ret = spifc_read_from_cache(column_offset, spi_flash_info->page_size, (uint8_t *)buf);
623 if(ret != 0)
624 return ret;
625
626 return 0;
627}
628
629/*
630 ******************************************************************************
631 * Function: read_page
632 * Description:
633 * Parameters:
634 * Input:
635 * Output:
636 * Returns:
637 * Others:
638 *******************************************************************************
639 */
640int32_t spifc_read_page_raw(uint32_t buf, uint32_t offset)
641{
642 int ret = 0;
643 uint8_t feature = 0x0;
644
645 uint32_t page = offset >> (spi_flash_info->page_size_shift);
646
647 if( (buf & 0x3) != 0 ) /* DMAµØÖ·ÒªÇó4×Ö½Ú¶ÔÆë */
648 {
649 printf("addr err.\n");
650 return -1;
651 }
652
653 ret = spifc_read_page_to_cache(page);
654 if( ret != 0 )
655 return ret;
656
657 ret = spifc_read_from_cache(0, spi_flash_info->page_size, (uint8_t *)buf);
658 if(ret != 0)
659 return ret;
660
661 return 0;
662}
663
664
665/*
666 ******************************************************************************
667 * Function: nand_read
668 * Description:
669 * Parameters:
670 * Input:
671 * Output:
672 * Returns:
673 * Others: from: must page align len: must page align
674 *******************************************************************************
675 */
676int32_t spifc_read(uint32_t from, uint32_t len, uint32_t to)
677{
678 uint32_t offset = from;
679 uint32_t left_to_read = len;
680 uint32_t p_to = to;
681 int32_t ret = 0;
682 int32_t page_size = (spi_flash_info->page_size);
683
684 if((offset & (page_size - 1)) || (len & (page_size - 1)) )
685 {
686 return -1;
687 }
688
689 while( left_to_read > 0 )
690 {
691 ret = spifc_read_page(p_to, offset);
692 if(ret != 0)
693 {
694 return -1;
695 }
696
697 left_to_read -= page_size;
698 offset += page_size;
699 p_to += page_size;
700 }
701 return 0;
702}
703
704
705/*******************************************************************************
706 * Function: nand_read_id
707 * Description:
708 * Parameters:
709 * Input:
710 *
711 * Output:
712 *
713 * Returns:
714 *
715 *
716 * Others:
717 ********************************************************************************/
718 int32_t read_id (void)
719{
720 uint8_t id[4];
721 const struct spi_flash_device_para *spi_flash = &spi_flash_para[0];
722
723 spifc_read_id(0x0, id, 2);
724
725 while( spi_flash->manuf_id != 0 )
726 {
727 if( ((uint8_t)id[0] == spi_flash->manuf_id) &&
728 ((uint8_t)id[1] == spi_flash->device_id) )
729 {
730 spi_flash_info = spi_flash;
731 return 0;
732 };
733 spi_flash++;
734 }
735
736 return -1;
737}
738
739/*******************************************************************************
740 * Function:
741 * Description:
742 * Parameters:
743 * Input:
744 *
745 * Output:
746 *
747 * Returns:
748 *
749 *
750 * Others:
751 ********************************************************************************/
752int32_t read_data(uint32_t from, uint32_t len, uint32_t to)
753{
754 uint32_t offset = from;
755 uint32_t left_to_read = len;
756 uint32_t p_to = to;
757 int32_t ret = 0;
758 int32_t block_size = (spi_flash_info->block_size);
759
760 while(left_to_read > 0)
761 {
762 uint32_t block_offset = offset & (block_size - 1);
763 uint32_t read_length;
764
765 if( nand_block_isbad(offset) )
766 {
767 offset += block_size;
768 continue;
769 }
770
771 if (left_to_read < (block_size - block_offset))
772 read_length = left_to_read;
773 else
774 read_length = block_size - block_offset;
775
776 ret = spifc_read(offset, read_length, p_to);
777 if(ret != 0)
778 {
779 return -1;
780 }
781
782 left_to_read -= read_length;
783 offset += read_length;
784 p_to += read_length;
785 }
786
787 return 0;
788}
789
790/*******************************************************************************
791 * Function: nand_init
792 * Description:
793 * Parameters:
794 * Input:
795 *
796 * Output:
797 *
798 * Returns:
799 *
800 *
801 * Others:
802 ********************************************************************************/
803int32_t spifc_init (void)
804{
805 int32_t ret = 0;
806 spifc_enable();
807 ret = read_id();
808 if(ret != 0)
809 {
810 printf("id err!\n");
811 return -1;
812 }
813
814 flash.flash_type = SPI_NAND_BOOT;
815 flash.manuf_id = spi_flash_info->manuf_id;
816 flash.device_id = spi_flash_info->device_id;
817 flash.page_size = spi_flash_info->page_size;
818 flash.page_size_shift = spi_flash_info->page_size_shift;
819 flash.oob_size = spi_flash_info->oob_size;
820 flash.block_size = spi_flash_info->block_size;
821 flash.block_size_shift = spi_flash_info->block_size_shift;
822 flash.block_num = spi_flash_info->block_num;
823 flash.read_page_raw = spifc_read_page_raw;
824 flash.read_oob = spifc_read_oob;
825 flash.read = read_data;
826
827 return 0;
828
829}
830
831/*
832 ******************************************************************************
833 * Function:
834 * Description:
835 * Parameters:
836 * Input:
837 * Output:
838 * Returns:
839 * Others:
840 *******************************************************************************
841 */
842int board_flash_init(void)
843{
844 int ret = 0;
845 char boot_mode = 0;
846
847 printf("spi-nand:");
848
849 boot_mode = get_boot_mode();
850 if(boot_mode != SPI_NAND_BOOT)
851 {
852 printf("mode err.\n");
853 return -1;
854 }
855
856 writel(CFG_START_MODE_SPI_NAND, CFG_BOOT_MODE_START_MODE_FOR_UBOOT);
857 ret = spifc_init();
858 if(ret != 0)
859 {
860 printf("init err.\n");
861 return -1;
862 }
863 printf("init ok.\n");
864
865// nand_creat_bbt();
866nand_creat_ram_bbt();
867
868 return 0;
869}
870
871