| lh | 9ed821d | 2023-04-07 01:36:19 -0700 | [diff] [blame] | 1 | ;--------------------------------------------------------------------------
|
| 2 | ; Initialize SERIAL 0 as console for zx297520v3_fpga linux: 115200 8/N/1
|
| 3 | ; created by xuzhiguo / ZTE-TSP at 03.18.2013
|
| 4 | ;--------------------------------------------------------------------------
|
| 5 | &UART_BASE_SYS=0x1408000 // UART1 Base Address
|
| 6 | &DBGU_DR=&UART_BASE_SYS+0x4 // data Register
|
| 7 | &DBGU_SC=&UART_BASE_SYS+0x8 // special character Register
|
| 8 | &DBGU_FR=&UART_BASE_SYS+0x14 // flag Register
|
| 9 | &DBGU_IBRD=&UART_BASE_SYS+0x24 // integer Baud Rate Generator Register
|
| 10 | &DBGU_FBRD=&UART_BASE_SYS+0x28 // fractional Baud Rate Generator Register
|
| 11 | &DBGU_LCR_H=&UART_BASE_SYS+0x30 // Line Control Register
|
| 12 | &DBGU_CR=&UART_BASE_SYS+0x34 // Control Register
|
| 13 | &DBGU_IMSC=&UART_BASE_SYS+0x40 // Interrupt Mask Register
|
| 14 |
|
| 15 | &TOP_FUNC_SEL_BASE=0x0013C000 // 0-AON FUNC
|
| 16 | &AON_FUNC_SEL_BASE=0x0013C000 // 0-rxd or txd func
|
| 17 | &UART0_TOP_FUNC=&TOP_FUNC_SEL_BASE+0x10
|
| 18 | &UART0_AON_FUNC=&AON_FUNC_SEL_BASE+0
|
| 19 |
|
| 20 | // set gpio function to UART0 TX and RX
|
| 21 | ;&tmp=data.long(D:&UART0_TOP_FUNC)
|
| 22 | ;&tmp=&tmp&0xFFE7FFFF // AON func
|
| 23 | ;&tmp=data.long(D:&UART0_AON_FUNC)
|
| 24 | ;&tmp=&tmp&0xFFFF0FFF // UART FUNC
|
| 25 |
|
| 26 | //set uart1 works clock divison to 1
|
| 27 | ; it is done in evb297510.cmm
|
| 28 | data.set 0x1400028 %long 0xfffff
|
| 29 |
|
| 30 | //disable uart
|
| 31 | data.set &DBGU_CR %LONG 0x0
|
| 32 | // mask all interrupt
|
| 33 | data.set &DBGU_IMSC %LONG 0x0
|
| 34 |
|
| 35 | // Set baud rate 115200
|
| 36 | data.set &DBGU_IBRD %LONG 0x38 //on EVB platform, uart work clock is 104MHz
|
| 37 | data.set &DBGU_FBRD %LONG 0x1B
|
| 38 |
|
| 39 | // set the port to no parity, no loopback, 8/N/1, enable FIFO
|
| 40 | data.set &DBGU_LCR_H %LONG 0x70
|
| 41 |
|
| 42 |
|
| 43 |
|
| 44 | // Enable
|
| 45 | data.set &DBGU_CR %LONG 0x301
|
| 46 |
|
| 47 | print "printing 'UART OK' on console"
|
| 48 | data.set &DBGU_DR %BYTE 0x0a //next line
|
| 49 | wait 10.ms
|
| 50 | data.set &DBGU_DR %BYTE 0x0d //enter
|
| 51 | wait 10.ms
|
| 52 | data.set &DBGU_DR %BYTE 0x55 //U
|
| 53 | wait 10.ms
|
| 54 | data.set &DBGU_DR %BYTE 0x41 //A
|
| 55 | wait 10.ms
|
| 56 | data.set &DBGU_DR %BYTE 0x52 //R
|
| 57 | wait 10.ms
|
| 58 | data.set &DBGU_DR %BYTE 0x54 //T
|
| 59 | wait 10.ms
|
| 60 | data.set &DBGU_DR %BYTE 0x20 //space
|
| 61 | wait 10.ms
|
| 62 | data.set &DBGU_DR %BYTE 0x4f //O
|
| 63 | wait 10.ms
|
| 64 | data.set &DBGU_DR %BYTE 0x4b //K
|
| 65 | wait 10.ms
|
| 66 | data.set &DBGU_DR %BYTE 0x0a //next line
|
| 67 | wait 10.ms
|
| 68 | data.set &DBGU_DR %BYTE 0x0d //enter
|
| 69 | wait 10.ms
|
| 70 |
|
| 71 | enddo
|
| 72 |
|