| lh | 9ed821d | 2023-04-07 01:36:19 -0700 | [diff] [blame] | 1 | /* cpwd.c - driver implementation for hardware watchdog | 
|  | 2 | * timers found on Sun Microsystems CP1400 and CP1500 boards. | 
|  | 3 | * | 
|  | 4 | * This device supports both the generic Linux watchdog | 
|  | 5 | * interface and Solaris-compatible ioctls as best it is | 
|  | 6 | * able. | 
|  | 7 | * | 
|  | 8 | * NOTE:	CP1400 systems appear to have a defective intr_mask | 
|  | 9 | *			register on the PLD, preventing the disabling of | 
|  | 10 | *			timer interrupts.  We use a timer to periodically | 
|  | 11 | *			reset 'stopped' watchdogs on affected platforms. | 
|  | 12 | * | 
|  | 13 | * Copyright (c) 2000 Eric Brower (ebrower@usa.net) | 
|  | 14 | * Copyright (C) 2008 David S. Miller <davem@davemloft.net> | 
|  | 15 | */ | 
|  | 16 |  | 
|  | 17 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt | 
|  | 18 |  | 
|  | 19 | #include <linux/kernel.h> | 
|  | 20 | #include <linux/module.h> | 
|  | 21 | #include <linux/fs.h> | 
|  | 22 | #include <linux/errno.h> | 
|  | 23 | #include <linux/major.h> | 
|  | 24 | #include <linux/init.h> | 
|  | 25 | #include <linux/miscdevice.h> | 
|  | 26 | #include <linux/interrupt.h> | 
|  | 27 | #include <linux/ioport.h> | 
|  | 28 | #include <linux/timer.h> | 
|  | 29 | #include <linux/slab.h> | 
|  | 30 | #include <linux/mutex.h> | 
|  | 31 | #include <linux/io.h> | 
|  | 32 | #include <linux/of.h> | 
|  | 33 | #include <linux/of_device.h> | 
|  | 34 | #include <linux/uaccess.h> | 
|  | 35 |  | 
|  | 36 | #include <asm/irq.h> | 
|  | 37 | #include <asm/watchdog.h> | 
|  | 38 |  | 
|  | 39 | #define DRIVER_NAME	"cpwd" | 
|  | 40 |  | 
|  | 41 | #define WD_OBPNAME	"watchdog" | 
|  | 42 | #define WD_BADMODEL	"SUNW,501-5336" | 
|  | 43 | #define WD_BTIMEOUT	(jiffies + (HZ * 1000)) | 
|  | 44 | #define WD_BLIMIT	0xFFFF | 
|  | 45 |  | 
|  | 46 | #define WD0_MINOR	212 | 
|  | 47 | #define WD1_MINOR	213 | 
|  | 48 | #define WD2_MINOR	214 | 
|  | 49 |  | 
|  | 50 | /* Internal driver definitions.  */ | 
|  | 51 | #define WD0_ID			0 | 
|  | 52 | #define WD1_ID			1 | 
|  | 53 | #define WD2_ID			2 | 
|  | 54 | #define WD_NUMDEVS		3 | 
|  | 55 |  | 
|  | 56 | #define WD_INTR_OFF		0 | 
|  | 57 | #define WD_INTR_ON		1 | 
|  | 58 |  | 
|  | 59 | #define WD_STAT_INIT	0x01	/* Watchdog timer is initialized	*/ | 
|  | 60 | #define WD_STAT_BSTOP	0x02	/* Watchdog timer is brokenstopped	*/ | 
|  | 61 | #define WD_STAT_SVCD	0x04	/* Watchdog interrupt occurred		*/ | 
|  | 62 |  | 
|  | 63 | /* Register value definitions | 
|  | 64 | */ | 
|  | 65 | #define WD0_INTR_MASK	0x01	/* Watchdog device interrupt masks	*/ | 
|  | 66 | #define WD1_INTR_MASK	0x02 | 
|  | 67 | #define WD2_INTR_MASK	0x04 | 
|  | 68 |  | 
|  | 69 | #define WD_S_RUNNING	0x01	/* Watchdog device status running	*/ | 
|  | 70 | #define WD_S_EXPIRED	0x02	/* Watchdog device status expired	*/ | 
|  | 71 |  | 
|  | 72 | struct cpwd { | 
|  | 73 | void __iomem	*regs; | 
|  | 74 | spinlock_t	lock; | 
|  | 75 |  | 
|  | 76 | unsigned int	irq; | 
|  | 77 |  | 
|  | 78 | unsigned long	timeout; | 
|  | 79 | bool		enabled; | 
|  | 80 | bool		reboot; | 
|  | 81 | bool		broken; | 
|  | 82 | bool		initialized; | 
|  | 83 |  | 
|  | 84 | struct { | 
|  | 85 | struct miscdevice	misc; | 
|  | 86 | void __iomem		*regs; | 
|  | 87 | u8			intr_mask; | 
|  | 88 | u8			runstatus; | 
|  | 89 | u16			timeout; | 
|  | 90 | } devs[WD_NUMDEVS]; | 
|  | 91 | }; | 
|  | 92 |  | 
|  | 93 | static DEFINE_MUTEX(cpwd_mutex); | 
|  | 94 | static struct cpwd *cpwd_device; | 
|  | 95 |  | 
|  | 96 | /* Sun uses Altera PLD EPF8820ATC144-4 | 
|  | 97 | * providing three hardware watchdogs: | 
|  | 98 | * | 
|  | 99 | * 1) RIC - sends an interrupt when triggered | 
|  | 100 | * 2) XIR - asserts XIR_B_RESET when triggered, resets CPU | 
|  | 101 | * 3) POR - asserts POR_B_RESET when triggered, resets CPU, backplane, board | 
|  | 102 | * | 
|  | 103 | *** Timer register block definition (struct wd_timer_regblk) | 
|  | 104 | * | 
|  | 105 | * dcntr and limit registers (halfword access): | 
|  | 106 | * ------------------- | 
|  | 107 | * | 15 | ...| 1 | 0 | | 
|  | 108 | * ------------------- | 
|  | 109 | * |-  counter val  -| | 
|  | 110 | * ------------------- | 
|  | 111 | * dcntr -	Current 16-bit downcounter value. | 
|  | 112 | *			When downcounter reaches '0' watchdog expires. | 
|  | 113 | *			Reading this register resets downcounter with | 
|  | 114 | *			'limit' value. | 
|  | 115 | * limit -	16-bit countdown value in 1/10th second increments. | 
|  | 116 | *			Writing this register begins countdown with input value. | 
|  | 117 | *			Reading from this register does not affect counter. | 
|  | 118 | * NOTES:	After watchdog reset, dcntr and limit contain '1' | 
|  | 119 | * | 
|  | 120 | * status register (byte access): | 
|  | 121 | * --------------------------- | 
|  | 122 | * | 7 | ... | 2 |  1  |  0  | | 
|  | 123 | * --------------+------------ | 
|  | 124 | * |-   UNUSED  -| EXP | RUN | | 
|  | 125 | * --------------------------- | 
|  | 126 | * status-	Bit 0 - Watchdog is running | 
|  | 127 | *			Bit 1 - Watchdog has expired | 
|  | 128 | * | 
|  | 129 | *** PLD register block definition (struct wd_pld_regblk) | 
|  | 130 | * | 
|  | 131 | * intr_mask register (byte access): | 
|  | 132 | * --------------------------------- | 
|  | 133 | * | 7 | ... | 3 |  2  |  1  |  0  | | 
|  | 134 | * +-------------+------------------ | 
|  | 135 | * |-   UNUSED  -| WD3 | WD2 | WD1 | | 
|  | 136 | * --------------------------------- | 
|  | 137 | * WD3 -  1 == Interrupt disabled for watchdog 3 | 
|  | 138 | * WD2 -  1 == Interrupt disabled for watchdog 2 | 
|  | 139 | * WD1 -  1 == Interrupt disabled for watchdog 1 | 
|  | 140 | * | 
|  | 141 | * pld_status register (byte access): | 
|  | 142 | * UNKNOWN, MAGICAL MYSTERY REGISTER | 
|  | 143 | * | 
|  | 144 | */ | 
|  | 145 | #define WD_TIMER_REGSZ	16 | 
|  | 146 | #define WD0_OFF		0 | 
|  | 147 | #define WD1_OFF		(WD_TIMER_REGSZ * 1) | 
|  | 148 | #define WD2_OFF		(WD_TIMER_REGSZ * 2) | 
|  | 149 | #define PLD_OFF		(WD_TIMER_REGSZ * 3) | 
|  | 150 |  | 
|  | 151 | #define WD_DCNTR	0x00 | 
|  | 152 | #define WD_LIMIT	0x04 | 
|  | 153 | #define WD_STATUS	0x08 | 
|  | 154 |  | 
|  | 155 | #define PLD_IMASK	(PLD_OFF + 0x00) | 
|  | 156 | #define PLD_STATUS	(PLD_OFF + 0x04) | 
|  | 157 |  | 
|  | 158 | static struct timer_list cpwd_timer; | 
|  | 159 |  | 
|  | 160 | static int wd0_timeout; | 
|  | 161 | static int wd1_timeout; | 
|  | 162 | static int wd2_timeout; | 
|  | 163 |  | 
|  | 164 | module_param(wd0_timeout, int, 0); | 
|  | 165 | MODULE_PARM_DESC(wd0_timeout, "Default watchdog0 timeout in 1/10secs"); | 
|  | 166 | module_param(wd1_timeout, int, 0); | 
|  | 167 | MODULE_PARM_DESC(wd1_timeout, "Default watchdog1 timeout in 1/10secs"); | 
|  | 168 | module_param(wd2_timeout, int, 0); | 
|  | 169 | MODULE_PARM_DESC(wd2_timeout, "Default watchdog2 timeout in 1/10secs"); | 
|  | 170 |  | 
|  | 171 | MODULE_AUTHOR("Eric Brower <ebrower@usa.net>"); | 
|  | 172 | MODULE_DESCRIPTION("Hardware watchdog driver for Sun Microsystems CP1400/1500"); | 
|  | 173 | MODULE_LICENSE("GPL"); | 
|  | 174 | MODULE_SUPPORTED_DEVICE("watchdog"); | 
|  | 175 |  | 
|  | 176 | static void cpwd_writew(u16 val, void __iomem *addr) | 
|  | 177 | { | 
|  | 178 | writew(cpu_to_le16(val), addr); | 
|  | 179 | } | 
|  | 180 | static u16 cpwd_readw(void __iomem *addr) | 
|  | 181 | { | 
|  | 182 | u16 val = readw(addr); | 
|  | 183 |  | 
|  | 184 | return le16_to_cpu(val); | 
|  | 185 | } | 
|  | 186 |  | 
|  | 187 | static void cpwd_writeb(u8 val, void __iomem *addr) | 
|  | 188 | { | 
|  | 189 | writeb(val, addr); | 
|  | 190 | } | 
|  | 191 |  | 
|  | 192 | static u8 cpwd_readb(void __iomem *addr) | 
|  | 193 | { | 
|  | 194 | return readb(addr); | 
|  | 195 | } | 
|  | 196 |  | 
|  | 197 | /* Enable or disable watchdog interrupts | 
|  | 198 | * Because of the CP1400 defect this should only be | 
|  | 199 | * called during initialzation or by wd_[start|stop]timer() | 
|  | 200 | * | 
|  | 201 | * index	- sub-device index, or -1 for 'all' | 
|  | 202 | * enable	- non-zero to enable interrupts, zero to disable | 
|  | 203 | */ | 
|  | 204 | static void cpwd_toggleintr(struct cpwd *p, int index, int enable) | 
|  | 205 | { | 
|  | 206 | unsigned char curregs = cpwd_readb(p->regs + PLD_IMASK); | 
|  | 207 | unsigned char setregs = | 
|  | 208 | (index == -1) ? | 
|  | 209 | (WD0_INTR_MASK | WD1_INTR_MASK | WD2_INTR_MASK) : | 
|  | 210 | (p->devs[index].intr_mask); | 
|  | 211 |  | 
|  | 212 | if (enable == WD_INTR_ON) | 
|  | 213 | curregs &= ~setregs; | 
|  | 214 | else | 
|  | 215 | curregs |= setregs; | 
|  | 216 |  | 
|  | 217 | cpwd_writeb(curregs, p->regs + PLD_IMASK); | 
|  | 218 | } | 
|  | 219 |  | 
|  | 220 | /* Restarts timer with maximum limit value and | 
|  | 221 | * does not unset 'brokenstop' value. | 
|  | 222 | */ | 
|  | 223 | static void cpwd_resetbrokentimer(struct cpwd *p, int index) | 
|  | 224 | { | 
|  | 225 | cpwd_toggleintr(p, index, WD_INTR_ON); | 
|  | 226 | cpwd_writew(WD_BLIMIT, p->devs[index].regs + WD_LIMIT); | 
|  | 227 | } | 
|  | 228 |  | 
|  | 229 | /* Timer method called to reset stopped watchdogs-- | 
|  | 230 | * because of the PLD bug on CP1400, we cannot mask | 
|  | 231 | * interrupts within the PLD so me must continually | 
|  | 232 | * reset the timers ad infinitum. | 
|  | 233 | */ | 
|  | 234 | static void cpwd_brokentimer(unsigned long data) | 
|  | 235 | { | 
|  | 236 | struct cpwd *p = (struct cpwd *) data; | 
|  | 237 | int id, tripped = 0; | 
|  | 238 |  | 
|  | 239 | /* kill a running timer instance, in case we | 
|  | 240 | * were called directly instead of by kernel timer | 
|  | 241 | */ | 
|  | 242 | if (timer_pending(&cpwd_timer)) | 
|  | 243 | del_timer(&cpwd_timer); | 
|  | 244 |  | 
|  | 245 | for (id = 0; id < WD_NUMDEVS; id++) { | 
|  | 246 | if (p->devs[id].runstatus & WD_STAT_BSTOP) { | 
|  | 247 | ++tripped; | 
|  | 248 | cpwd_resetbrokentimer(p, id); | 
|  | 249 | } | 
|  | 250 | } | 
|  | 251 |  | 
|  | 252 | if (tripped) { | 
|  | 253 | /* there is at least one timer brokenstopped-- reschedule */ | 
|  | 254 | cpwd_timer.expires = WD_BTIMEOUT; | 
|  | 255 | add_timer(&cpwd_timer); | 
|  | 256 | } | 
|  | 257 | } | 
|  | 258 |  | 
|  | 259 | /* Reset countdown timer with 'limit' value and continue countdown. | 
|  | 260 | * This will not start a stopped timer. | 
|  | 261 | */ | 
|  | 262 | static void cpwd_pingtimer(struct cpwd *p, int index) | 
|  | 263 | { | 
|  | 264 | if (cpwd_readb(p->devs[index].regs + WD_STATUS) & WD_S_RUNNING) | 
|  | 265 | cpwd_readw(p->devs[index].regs + WD_DCNTR); | 
|  | 266 | } | 
|  | 267 |  | 
|  | 268 | /* Stop a running watchdog timer-- the timer actually keeps | 
|  | 269 | * running, but the interrupt is masked so that no action is | 
|  | 270 | * taken upon expiration. | 
|  | 271 | */ | 
|  | 272 | static void cpwd_stoptimer(struct cpwd *p, int index) | 
|  | 273 | { | 
|  | 274 | if (cpwd_readb(p->devs[index].regs + WD_STATUS) & WD_S_RUNNING) { | 
|  | 275 | cpwd_toggleintr(p, index, WD_INTR_OFF); | 
|  | 276 |  | 
|  | 277 | if (p->broken) { | 
|  | 278 | p->devs[index].runstatus |= WD_STAT_BSTOP; | 
|  | 279 | cpwd_brokentimer((unsigned long) p); | 
|  | 280 | } | 
|  | 281 | } | 
|  | 282 | } | 
|  | 283 |  | 
|  | 284 | /* Start a watchdog timer with the specified limit value | 
|  | 285 | * If the watchdog is running, it will be restarted with | 
|  | 286 | * the provided limit value. | 
|  | 287 | * | 
|  | 288 | * This function will enable interrupts on the specified | 
|  | 289 | * watchdog. | 
|  | 290 | */ | 
|  | 291 | static void cpwd_starttimer(struct cpwd *p, int index) | 
|  | 292 | { | 
|  | 293 | if (p->broken) | 
|  | 294 | p->devs[index].runstatus &= ~WD_STAT_BSTOP; | 
|  | 295 |  | 
|  | 296 | p->devs[index].runstatus &= ~WD_STAT_SVCD; | 
|  | 297 |  | 
|  | 298 | cpwd_writew(p->devs[index].timeout, p->devs[index].regs + WD_LIMIT); | 
|  | 299 | cpwd_toggleintr(p, index, WD_INTR_ON); | 
|  | 300 | } | 
|  | 301 |  | 
|  | 302 | static int cpwd_getstatus(struct cpwd *p, int index) | 
|  | 303 | { | 
|  | 304 | unsigned char stat = cpwd_readb(p->devs[index].regs + WD_STATUS); | 
|  | 305 | unsigned char intr = cpwd_readb(p->devs[index].regs + PLD_IMASK); | 
|  | 306 | unsigned char ret  = WD_STOPPED; | 
|  | 307 |  | 
|  | 308 | /* determine STOPPED */ | 
|  | 309 | if (!stat) | 
|  | 310 | return ret; | 
|  | 311 |  | 
|  | 312 | /* determine EXPIRED vs FREERUN vs RUNNING */ | 
|  | 313 | else if (WD_S_EXPIRED & stat) { | 
|  | 314 | ret = WD_EXPIRED; | 
|  | 315 | } else if (WD_S_RUNNING & stat) { | 
|  | 316 | if (intr & p->devs[index].intr_mask) { | 
|  | 317 | ret = WD_FREERUN; | 
|  | 318 | } else { | 
|  | 319 | /* Fudge WD_EXPIRED status for defective CP1400-- | 
|  | 320 | * IF timer is running | 
|  | 321 | *	AND brokenstop is set | 
|  | 322 | *	AND an interrupt has been serviced | 
|  | 323 | * we are WD_EXPIRED. | 
|  | 324 | * | 
|  | 325 | * IF timer is running | 
|  | 326 | *	AND brokenstop is set | 
|  | 327 | *	AND no interrupt has been serviced | 
|  | 328 | * we are WD_FREERUN. | 
|  | 329 | */ | 
|  | 330 | if (p->broken && | 
|  | 331 | (p->devs[index].runstatus & WD_STAT_BSTOP)) { | 
|  | 332 | if (p->devs[index].runstatus & WD_STAT_SVCD) { | 
|  | 333 | ret = WD_EXPIRED; | 
|  | 334 | } else { | 
|  | 335 | /* we could as well pretend | 
|  | 336 | * we are expired */ | 
|  | 337 | ret = WD_FREERUN; | 
|  | 338 | } | 
|  | 339 | } else { | 
|  | 340 | ret = WD_RUNNING; | 
|  | 341 | } | 
|  | 342 | } | 
|  | 343 | } | 
|  | 344 |  | 
|  | 345 | /* determine SERVICED */ | 
|  | 346 | if (p->devs[index].runstatus & WD_STAT_SVCD) | 
|  | 347 | ret |= WD_SERVICED; | 
|  | 348 |  | 
|  | 349 | return ret; | 
|  | 350 | } | 
|  | 351 |  | 
|  | 352 | static irqreturn_t cpwd_interrupt(int irq, void *dev_id) | 
|  | 353 | { | 
|  | 354 | struct cpwd *p = dev_id; | 
|  | 355 |  | 
|  | 356 | /* Only WD0 will interrupt-- others are NMI and we won't | 
|  | 357 | * see them here.... | 
|  | 358 | */ | 
|  | 359 | spin_lock_irq(&p->lock); | 
|  | 360 |  | 
|  | 361 | cpwd_stoptimer(p, WD0_ID); | 
|  | 362 | p->devs[WD0_ID].runstatus |=  WD_STAT_SVCD; | 
|  | 363 |  | 
|  | 364 | spin_unlock_irq(&p->lock); | 
|  | 365 |  | 
|  | 366 | return IRQ_HANDLED; | 
|  | 367 | } | 
|  | 368 |  | 
|  | 369 | static int cpwd_open(struct inode *inode, struct file *f) | 
|  | 370 | { | 
|  | 371 | struct cpwd *p = cpwd_device; | 
|  | 372 |  | 
|  | 373 | mutex_lock(&cpwd_mutex); | 
|  | 374 | switch (iminor(inode)) { | 
|  | 375 | case WD0_MINOR: | 
|  | 376 | case WD1_MINOR: | 
|  | 377 | case WD2_MINOR: | 
|  | 378 | break; | 
|  | 379 |  | 
|  | 380 | default: | 
|  | 381 | mutex_unlock(&cpwd_mutex); | 
|  | 382 | return -ENODEV; | 
|  | 383 | } | 
|  | 384 |  | 
|  | 385 | /* Register IRQ on first open of device */ | 
|  | 386 | if (!p->initialized) { | 
|  | 387 | if (request_irq(p->irq, &cpwd_interrupt, | 
|  | 388 | IRQF_SHARED, DRIVER_NAME, p)) { | 
|  | 389 | pr_err("Cannot register IRQ %d\n", p->irq); | 
|  | 390 | mutex_unlock(&cpwd_mutex); | 
|  | 391 | return -EBUSY; | 
|  | 392 | } | 
|  | 393 | p->initialized = true; | 
|  | 394 | } | 
|  | 395 |  | 
|  | 396 | mutex_unlock(&cpwd_mutex); | 
|  | 397 |  | 
|  | 398 | return nonseekable_open(inode, f); | 
|  | 399 | } | 
|  | 400 |  | 
|  | 401 | static int cpwd_release(struct inode *inode, struct file *file) | 
|  | 402 | { | 
|  | 403 | return 0; | 
|  | 404 | } | 
|  | 405 |  | 
|  | 406 | static long cpwd_ioctl(struct file *file, unsigned int cmd, unsigned long arg) | 
|  | 407 | { | 
|  | 408 | static const struct watchdog_info info = { | 
|  | 409 | .options		= WDIOF_SETTIMEOUT, | 
|  | 410 | .firmware_version	= 1, | 
|  | 411 | .identity		= DRIVER_NAME, | 
|  | 412 | }; | 
|  | 413 | void __user *argp = (void __user *)arg; | 
|  | 414 | struct inode *inode = file->f_path.dentry->d_inode; | 
|  | 415 | int index = iminor(inode) - WD0_MINOR; | 
|  | 416 | struct cpwd *p = cpwd_device; | 
|  | 417 | int setopt = 0; | 
|  | 418 |  | 
|  | 419 | switch (cmd) { | 
|  | 420 | /* Generic Linux IOCTLs */ | 
|  | 421 | case WDIOC_GETSUPPORT: | 
|  | 422 | if (copy_to_user(argp, &info, sizeof(struct watchdog_info))) | 
|  | 423 | return -EFAULT; | 
|  | 424 | break; | 
|  | 425 |  | 
|  | 426 | case WDIOC_GETSTATUS: | 
|  | 427 | case WDIOC_GETBOOTSTATUS: | 
|  | 428 | if (put_user(0, (int __user *)argp)) | 
|  | 429 | return -EFAULT; | 
|  | 430 | break; | 
|  | 431 |  | 
|  | 432 | case WDIOC_KEEPALIVE: | 
|  | 433 | cpwd_pingtimer(p, index); | 
|  | 434 | break; | 
|  | 435 |  | 
|  | 436 | case WDIOC_SETOPTIONS: | 
|  | 437 | if (copy_from_user(&setopt, argp, sizeof(unsigned int))) | 
|  | 438 | return -EFAULT; | 
|  | 439 |  | 
|  | 440 | if (setopt & WDIOS_DISABLECARD) { | 
|  | 441 | if (p->enabled) | 
|  | 442 | return -EINVAL; | 
|  | 443 | cpwd_stoptimer(p, index); | 
|  | 444 | } else if (setopt & WDIOS_ENABLECARD) { | 
|  | 445 | cpwd_starttimer(p, index); | 
|  | 446 | } else { | 
|  | 447 | return -EINVAL; | 
|  | 448 | } | 
|  | 449 | break; | 
|  | 450 |  | 
|  | 451 | /* Solaris-compatible IOCTLs */ | 
|  | 452 | case WIOCGSTAT: | 
|  | 453 | setopt = cpwd_getstatus(p, index); | 
|  | 454 | if (copy_to_user(argp, &setopt, sizeof(unsigned int))) | 
|  | 455 | return -EFAULT; | 
|  | 456 | break; | 
|  | 457 |  | 
|  | 458 | case WIOCSTART: | 
|  | 459 | cpwd_starttimer(p, index); | 
|  | 460 | break; | 
|  | 461 |  | 
|  | 462 | case WIOCSTOP: | 
|  | 463 | if (p->enabled) | 
|  | 464 | return -EINVAL; | 
|  | 465 |  | 
|  | 466 | cpwd_stoptimer(p, index); | 
|  | 467 | break; | 
|  | 468 |  | 
|  | 469 | default: | 
|  | 470 | return -EINVAL; | 
|  | 471 | } | 
|  | 472 |  | 
|  | 473 | return 0; | 
|  | 474 | } | 
|  | 475 |  | 
|  | 476 | static long cpwd_compat_ioctl(struct file *file, unsigned int cmd, | 
|  | 477 | unsigned long arg) | 
|  | 478 | { | 
|  | 479 | int rval = -ENOIOCTLCMD; | 
|  | 480 |  | 
|  | 481 | switch (cmd) { | 
|  | 482 | /* solaris ioctls are specific to this driver */ | 
|  | 483 | case WIOCSTART: | 
|  | 484 | case WIOCSTOP: | 
|  | 485 | case WIOCGSTAT: | 
|  | 486 | mutex_lock(&cpwd_mutex); | 
|  | 487 | rval = cpwd_ioctl(file, cmd, arg); | 
|  | 488 | mutex_unlock(&cpwd_mutex); | 
|  | 489 | break; | 
|  | 490 |  | 
|  | 491 | /* everything else is handled by the generic compat layer */ | 
|  | 492 | default: | 
|  | 493 | break; | 
|  | 494 | } | 
|  | 495 |  | 
|  | 496 | return rval; | 
|  | 497 | } | 
|  | 498 |  | 
|  | 499 | static ssize_t cpwd_write(struct file *file, const char __user *buf, | 
|  | 500 | size_t count, loff_t *ppos) | 
|  | 501 | { | 
|  | 502 | struct inode *inode = file->f_path.dentry->d_inode; | 
|  | 503 | struct cpwd *p = cpwd_device; | 
|  | 504 | int index = iminor(inode); | 
|  | 505 |  | 
|  | 506 | if (count) { | 
|  | 507 | cpwd_pingtimer(p, index); | 
|  | 508 | return 1; | 
|  | 509 | } | 
|  | 510 |  | 
|  | 511 | return 0; | 
|  | 512 | } | 
|  | 513 |  | 
|  | 514 | static ssize_t cpwd_read(struct file *file, char __user *buffer, | 
|  | 515 | size_t count, loff_t *ppos) | 
|  | 516 | { | 
|  | 517 | return -EINVAL; | 
|  | 518 | } | 
|  | 519 |  | 
|  | 520 | static const struct file_operations cpwd_fops = { | 
|  | 521 | .owner =		THIS_MODULE, | 
|  | 522 | .unlocked_ioctl =	cpwd_ioctl, | 
|  | 523 | .compat_ioctl =		cpwd_compat_ioctl, | 
|  | 524 | .open =			cpwd_open, | 
|  | 525 | .write =		cpwd_write, | 
|  | 526 | .read =			cpwd_read, | 
|  | 527 | .release =		cpwd_release, | 
|  | 528 | .llseek =		no_llseek, | 
|  | 529 | }; | 
|  | 530 |  | 
|  | 531 | static int __devinit cpwd_probe(struct platform_device *op) | 
|  | 532 | { | 
|  | 533 | struct device_node *options; | 
|  | 534 | const char *str_prop; | 
|  | 535 | const void *prop_val; | 
|  | 536 | int i, err = -EINVAL; | 
|  | 537 | struct cpwd *p; | 
|  | 538 |  | 
|  | 539 | if (cpwd_device) | 
|  | 540 | return -EINVAL; | 
|  | 541 |  | 
|  | 542 | p = kzalloc(sizeof(*p), GFP_KERNEL); | 
|  | 543 | err = -ENOMEM; | 
|  | 544 | if (!p) { | 
|  | 545 | pr_err("Unable to allocate struct cpwd\n"); | 
|  | 546 | goto out; | 
|  | 547 | } | 
|  | 548 |  | 
|  | 549 | p->irq = op->archdata.irqs[0]; | 
|  | 550 |  | 
|  | 551 | spin_lock_init(&p->lock); | 
|  | 552 |  | 
|  | 553 | p->regs = of_ioremap(&op->resource[0], 0, | 
|  | 554 | 4 * WD_TIMER_REGSZ, DRIVER_NAME); | 
|  | 555 | if (!p->regs) { | 
|  | 556 | pr_err("Unable to map registers\n"); | 
|  | 557 | goto out_free; | 
|  | 558 | } | 
|  | 559 |  | 
|  | 560 | options = of_find_node_by_path("/options"); | 
|  | 561 | err = -ENODEV; | 
|  | 562 | if (!options) { | 
|  | 563 | pr_err("Unable to find /options node\n"); | 
|  | 564 | goto out_iounmap; | 
|  | 565 | } | 
|  | 566 |  | 
|  | 567 | prop_val = of_get_property(options, "watchdog-enable?", NULL); | 
|  | 568 | p->enabled = (prop_val ? true : false); | 
|  | 569 |  | 
|  | 570 | prop_val = of_get_property(options, "watchdog-reboot?", NULL); | 
|  | 571 | p->reboot = (prop_val ? true : false); | 
|  | 572 |  | 
|  | 573 | str_prop = of_get_property(options, "watchdog-timeout", NULL); | 
|  | 574 | if (str_prop) | 
|  | 575 | p->timeout = simple_strtoul(str_prop, NULL, 10); | 
|  | 576 |  | 
|  | 577 | /* CP1400s seem to have broken PLD implementations-- the | 
|  | 578 | * interrupt_mask register cannot be written, so no timer | 
|  | 579 | * interrupts can be masked within the PLD. | 
|  | 580 | */ | 
|  | 581 | str_prop = of_get_property(op->dev.of_node, "model", NULL); | 
|  | 582 | p->broken = (str_prop && !strcmp(str_prop, WD_BADMODEL)); | 
|  | 583 |  | 
|  | 584 | if (!p->enabled) | 
|  | 585 | cpwd_toggleintr(p, -1, WD_INTR_OFF); | 
|  | 586 |  | 
|  | 587 | for (i = 0; i < WD_NUMDEVS; i++) { | 
|  | 588 | static const char *cpwd_names[] = { "RIC", "XIR", "POR" }; | 
|  | 589 | static int *parms[] = { &wd0_timeout, | 
|  | 590 | &wd1_timeout, | 
|  | 591 | &wd2_timeout }; | 
|  | 592 | struct miscdevice *mp = &p->devs[i].misc; | 
|  | 593 |  | 
|  | 594 | mp->minor = WD0_MINOR + i; | 
|  | 595 | mp->name = cpwd_names[i]; | 
|  | 596 | mp->fops = &cpwd_fops; | 
|  | 597 |  | 
|  | 598 | p->devs[i].regs = p->regs + (i * WD_TIMER_REGSZ); | 
|  | 599 | p->devs[i].intr_mask = (WD0_INTR_MASK << i); | 
|  | 600 | p->devs[i].runstatus &= ~WD_STAT_BSTOP; | 
|  | 601 | p->devs[i].runstatus |= WD_STAT_INIT; | 
|  | 602 | p->devs[i].timeout = p->timeout; | 
|  | 603 | if (*parms[i]) | 
|  | 604 | p->devs[i].timeout = *parms[i]; | 
|  | 605 |  | 
|  | 606 | err = misc_register(&p->devs[i].misc); | 
|  | 607 | if (err) { | 
|  | 608 | pr_err("Could not register misc device for dev %d\n", | 
|  | 609 | i); | 
|  | 610 | goto out_unregister; | 
|  | 611 | } | 
|  | 612 | } | 
|  | 613 |  | 
|  | 614 | if (p->broken) { | 
|  | 615 | init_timer(&cpwd_timer); | 
|  | 616 | cpwd_timer.function	= cpwd_brokentimer; | 
|  | 617 | cpwd_timer.data		= (unsigned long) p; | 
|  | 618 | cpwd_timer.expires	= WD_BTIMEOUT; | 
|  | 619 |  | 
|  | 620 | pr_info("PLD defect workaround enabled for model %s\n", | 
|  | 621 | WD_BADMODEL); | 
|  | 622 | } | 
|  | 623 |  | 
|  | 624 | dev_set_drvdata(&op->dev, p); | 
|  | 625 | cpwd_device = p; | 
|  | 626 | err = 0; | 
|  | 627 |  | 
|  | 628 | out: | 
|  | 629 | return err; | 
|  | 630 |  | 
|  | 631 | out_unregister: | 
|  | 632 | for (i--; i >= 0; i--) | 
|  | 633 | misc_deregister(&p->devs[i].misc); | 
|  | 634 |  | 
|  | 635 | out_iounmap: | 
|  | 636 | of_iounmap(&op->resource[0], p->regs, 4 * WD_TIMER_REGSZ); | 
|  | 637 |  | 
|  | 638 | out_free: | 
|  | 639 | kfree(p); | 
|  | 640 | goto out; | 
|  | 641 | } | 
|  | 642 |  | 
|  | 643 | static int __devexit cpwd_remove(struct platform_device *op) | 
|  | 644 | { | 
|  | 645 | struct cpwd *p = dev_get_drvdata(&op->dev); | 
|  | 646 | int i; | 
|  | 647 |  | 
|  | 648 | for (i = 0; i < WD_NUMDEVS; i++) { | 
|  | 649 | misc_deregister(&p->devs[i].misc); | 
|  | 650 |  | 
|  | 651 | if (!p->enabled) { | 
|  | 652 | cpwd_stoptimer(p, i); | 
|  | 653 | if (p->devs[i].runstatus & WD_STAT_BSTOP) | 
|  | 654 | cpwd_resetbrokentimer(p, i); | 
|  | 655 | } | 
|  | 656 | } | 
|  | 657 |  | 
|  | 658 | if (p->broken) | 
|  | 659 | del_timer_sync(&cpwd_timer); | 
|  | 660 |  | 
|  | 661 | if (p->initialized) | 
|  | 662 | free_irq(p->irq, p); | 
|  | 663 |  | 
|  | 664 | of_iounmap(&op->resource[0], p->regs, 4 * WD_TIMER_REGSZ); | 
|  | 665 | kfree(p); | 
|  | 666 |  | 
|  | 667 | cpwd_device = NULL; | 
|  | 668 |  | 
|  | 669 | return 0; | 
|  | 670 | } | 
|  | 671 |  | 
|  | 672 | static const struct of_device_id cpwd_match[] = { | 
|  | 673 | { | 
|  | 674 | .name = "watchdog", | 
|  | 675 | }, | 
|  | 676 | {}, | 
|  | 677 | }; | 
|  | 678 | MODULE_DEVICE_TABLE(of, cpwd_match); | 
|  | 679 |  | 
|  | 680 | static struct platform_driver cpwd_driver = { | 
|  | 681 | .driver = { | 
|  | 682 | .name = DRIVER_NAME, | 
|  | 683 | .owner = THIS_MODULE, | 
|  | 684 | .of_match_table = cpwd_match, | 
|  | 685 | }, | 
|  | 686 | .probe		= cpwd_probe, | 
|  | 687 | .remove		= __devexit_p(cpwd_remove), | 
|  | 688 | }; | 
|  | 689 |  | 
|  | 690 | module_platform_driver(cpwd_driver); |