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192.168.1.100 / T106_DC / 7ccf8376fe57d58025e2b80b82b0cde26a8cff83 / . / boot / common / src / loader / cpu / m0 / start.S
blob: 848b5a0415c6853a2879706ead39068948ecb1f8 [file] [log] [blame]
lh9ed821d2023-04-07 01:36:19 -0700[diff] [blame]1/*
2 * (C) Copyright 2016 ZXIC Inc.
3 *
4 */
5
6#include <config.h>
7#include <board.h>
8#include <load_mode.h>
9
10.globl stack_setup
11
12stack:
13#if (CONFIG_DL_DISABLE)
14 .word 0x045A0000 /* DL port: 0x5A->Disable. */
15#else
16 .word 0x04000000 /* DL port: 0x00->Enable. */
17#endif
18 .word 0x3537585A /* = string "57XZ" */
19 .word 0x31563132 /* = string "1V12" */
20 .word 0x00001E70 /* zdata size = 8K - HdrSize = 8192 - 400 = 7792 Bytes = 0x1E70*/
21
22 /* NOT used now, Just reverse memory for RSA/HASH in near future. */
23 .word 0x00000000 /*puk_rsa_d*/
24 .word 0x00000000
25 .word 0x00000000
26 .word 0x00000000
27 .word 0x00000000
28 .word 0x00000000
29 .word 0x00000000
30 .word 0x00000000
31 .word 0x00000000
32 .word 0x00000000
33 .word 0x00000000
34 .word 0x00000000
35 .word 0x00000000
36 .word 0x00000000
37 .word 0x00000000
38 .word 0x00000000
39 .word 0x00000000
40 .word 0x00000000
41 .word 0x00000000
42 .word 0x00000000
43 .word 0x00000000
44 .word 0x00000000
45 .word 0x00000000
46 .word 0x00000000
47 .word 0x00000000
48 .word 0x00000000
49 .word 0x00000000
50 .word 0x00000000
51 .word 0x00000000
52 .word 0x00000000
53 .word 0x00000000
54 .word 0x00000000
55
56 .word 0x00000000 /*puk_rsa_n*/
57 .word 0x00000000
58 .word 0x00000000
59 .word 0x00000000
60 .word 0x00000000
61 .word 0x00000000
62 .word 0x00000000
63 .word 0x00000000
64 .word 0x00000000
65 .word 0x00000000
66 .word 0x00000000
67 .word 0x00000000
68 .word 0x00000000
69 .word 0x00000000
70 .word 0x00000000
71 .word 0x00000000
72 .word 0x00000000
73 .word 0x00000000
74 .word 0x00000000
75 .word 0x00000000
76 .word 0x00000000
77 .word 0x00000000
78 .word 0x00000000
79 .word 0x00000000
80 .word 0x00000000
81 .word 0x00000000
82 .word 0x00000000
83 .word 0x00000000
84 .word 0x00000000
85 .word 0x00000000
86 .word 0x00000000
87 .word 0x00000000
88
89 .word 0x00000000 /*hash_y*/
90 .word 0x00000000
91 .word 0x00000000
92 .word 0x00000000
93 .word 0x00000000
94 .word 0x00000000
95 .word 0x00000000
96 .word 0x00000000
97 .word 0x00000000
98 .word 0x00000000
99 .word 0x00000000
100 .word 0x00000000
101 .word 0x00000000
102 .word 0x00000000
103 .word 0x00000000
104 .word 0x00000000
105 .word 0x00000000
106 .word 0x00000000
107 .word 0x00000000
108 .word 0x00000000
109 .word 0x00000000
110 .word 0x00000000
111 .word 0x00000000
112 .word 0x00000000
113 .word 0x00000000
114 .word 0x00000000
115 .word 0x00000000
116 .word 0x00000000
117 .word 0x00000000
118 .word 0x00000000
119 .word 0x00000000
120 .word 0x00000000
121 .word 0x00000000 /* VID+PID */
122#if defined(CFG_ZLOAD)
123 .word 0x00102800
124 .word _start - 0x100000 + 0x8A001 /* TBD: MACRO instead of number. */
125#else
126 .word 0x0008A000
127 .word _start + 0x1
128#endif
129 .word loop + 1
130 .word loop + 1
131
132.globl _bss_start
133_bss_start:
134 .word __bss_start
135 nop
136 nop
137
138.globl _bss_end
139_bss_end:
140 .word __bss_end
141
142.globl _para_start
143_para_start:
144 .word __para_start
145
146.globl _para_end
147_para_end:
148 .word __para_end
149
150.globl _start
151_start:
152
153#if defined(CFG_ZLOAD)
154 /* check stage1 state */
155 ldr r3,=CFG_START_STAGE1_ADDR
156 ldr r4,=CFG_START_STAGE1_STATE
157 ldr r5, [r3]
158 cmp r4, r5
159 beq set_stack
160
161 ldr r0, =0x8a000
162 msr MSP, r0
163
164 bl copy_to_iram1
165 ldr r3,=0x1001B1 /* 0x1b1 = 0x194(header len) + 0x1c(first Ins. offset) + 0x1(16bit thumb instruction) */
166 mov pc,r3
167set_stack:
168 /* Set up the stack */
169 ldr r2, =0x100000
170 ldr r3,=0x194 /*header len=0x194*/
171 add r2,r3
172 ldr r0, [r2]
173 msr MSP, r0
174
175#else
176
177 /* Set up the stack */
178 ldr r2, =stack
179 ldr r3,=0x194 /*header len=0x194*/
180 add r2,r3
181 ldr r0, [r2]
182 msr MSP, r0
183
184#endif /* CFG_ZLOAD */
185
186/* clear the bss */
187clear_bss:
188 ldr r3, =_bss_start
189 ldr r0, [r3] /* find start of bss segment */
190 ldr r3, =_bss_end
191 ldr r1, [r3] /* stop here */
192 cmp r0, r1
193 beq clbss_over
194 mov r2, #0x0 /* clear value */
195clbss_l:
196 str r2, [r0] /* clear BSS location */
197 add r0, r0, #4 /* increment clear index pointer */
198 cmp r0, r1 /* are we at the end yet */
199 bne clbss_l /* keep clearing till at end */
200clbss_over:
201
202/* remove the para section */
203 ldr r3, =_para_start
204 ldr r4, [r3]
205 ldr r3, =_para_end
206 ldr r1, [r3]
207 sub r1, r1, r4
208 ldr r3, =_bss_end
209 ldr r0, [r3]
210 add r1, r1, r0
211 cmp r0, r1
212 beq remove_over
213re_move:
214 ldr r2, [r0]
215 str r2, [r4]
216 add r4, r4, #4
217 add r0, r0, #4 /* increment clear index pointer */
218 cmp r0, r1 /* are we at the end yet */
219 bne re_move
220remove_over:
221
222 b start_armboot
223
224loop:
225 b loop
226