blob: c30f5d74d1ce11b3c3433844038a0f622bb5325b [file] [log] [blame]
lh9ed821d2023-04-07 01:36:19 -07001/*
2 * linux/include/asm-arm/io.h
3 *
4 * Copyright (C) 1996-2000 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * Modifications:
11 * 16-Sep-1996 RMK Inlined the inx/outx functions & optimised for both
12 * constant addresses and variable addresses.
13 * 04-Dec-1997 RMK Moved a lot of this stuff to the new architecture
14 * specific IO header files.
15 * 27-Mar-1999 PJB Second parameter of memcpy_toio is const..
16 * 04-Apr-1999 PJB Added check_signature.
17 * 12-Dec-1999 RMK More cleanups
18 * 18-Jun-2000 RMK Removed virt_to_* and friends definitions
19 */
20#ifndef __ASM_ARM_IO_H
21#define __ASM_ARM_IO_H
22
23#define __REG(x) (*(volatile unsigned long *)(x)) //add by zhouqi
24
25#ifdef __KERNEL__
26
27#include <linux/types.h>
28#include <asm/byteorder.h>
29#include <asm/memory.h>
30#if 0 /* XXX###XXX */
31#include <asm/arch/hardware.h>
32#endif /* XXX###XXX */
33
34/*
35 * Generic virtual read/write. Note that we don't support half-word
36 * read/writes. We define __arch_*[bl] here, and leave __arch_*w
37 * to the architecture specific code.
38 */
39#define __arch_getb(a) (*(volatile unsigned char *)(a))
40#define __arch_getw(a) (*(volatile unsigned short *)(a))
41#define __arch_getl(a) (*(volatile unsigned int *)(a))
42
43#define __arch_putb(v,a) (*(volatile unsigned char *)(a) = (v))
44#define __arch_putw(v,a) (*(volatile unsigned short *)(a) = (v))
45#define __arch_putl(v,a) (*(volatile unsigned int *)(a) = (v))
46
47extern void __raw_writesb(unsigned int addr, const void *data, int bytelen);
48extern void __raw_writesw(unsigned int addr, const void *data, int wordlen);
49extern void __raw_writesl(unsigned int addr, const void *data, int longlen);
50
51extern void __raw_readsb(unsigned int addr, void *data, int bytelen);
52extern void __raw_readsw(unsigned int addr, void *data, int wordlen);
53extern void __raw_readsl(unsigned int addr, void *data, int longlen);
54
55#define __raw_writeb(v,a) __arch_putb(v,a)
56#define __raw_writew(v,a) __arch_putw(v,a)
57#define __raw_writel(v,a) __arch_putl(v,a)
58
59#define __raw_readb(a) __arch_getb(a)
60#define __raw_readw(a) __arch_getw(a)
61#define __raw_readl(a) __arch_getl(a)
62
63#define writeb(v,a) __arch_putb(v,a)
64#define writew(v,a) __arch_putw(v,a)
65#define writel(v,a) __arch_putl(v,a)
66
67#define readb(a) __arch_getb(a)
68#define readw(a) __arch_getw(a)
69#define readl(a) __arch_getl(a)
70
71/*
72 * The compiler seems to be incapable of optimising constants
73 * properly. Spell it out to the compiler in some cases.
74 * These are only valid for small values of "off" (< 1<<12)
75 */
76#define __raw_base_writeb(val,base,off) __arch_base_putb(val,base,off)
77#define __raw_base_writew(val,base,off) __arch_base_putw(val,base,off)
78#define __raw_base_writel(val,base,off) __arch_base_putl(val,base,off)
79
80#define __raw_base_readb(base,off) __arch_base_getb(base,off)
81#define __raw_base_readw(base,off) __arch_base_getw(base,off)
82#define __raw_base_readl(base,off) __arch_base_getl(base,off)
83
84/*
85 * Now, pick up the machine-defined IO definitions
86 */
87#if 0 /* XXX###XXX */
88#include <asm/arch/io.h>
89#endif /* XXX###XXX */
90
91/*
92 * IO port access primitives
93 * -------------------------
94 *
95 * The ARM doesn't have special IO access instructions; all IO is memory
96 * mapped. Note that these are defined to perform little endian accesses
97 * only. Their primary purpose is to access PCI and ISA peripherals.
98 *
99 * Note that for a big endian machine, this implies that the following
100 * big endian mode connectivity is in place, as described by numerious
101 * ARM documents:
102 *
103 * PCI: D0-D7 D8-D15 D16-D23 D24-D31
104 * ARM: D24-D31 D16-D23 D8-D15 D0-D7
105 *
106 * The machine specific io.h include defines __io to translate an "IO"
107 * address to a memory address.
108 *
109 * Note that we prevent GCC re-ordering or caching values in expressions
110 * by introducing sequence points into the in*() definitions. Note that
111 * __raw_* do not guarantee this behaviour.
112 *
113 * The {in,out}[bwl] macros are for emulating x86-style PCI/ISA IO space.
114 */
115#ifdef __io
116#define outb(v,p) __raw_writeb(v,__io(p))
117#define outw(v,p) __raw_writew(cpu_to_le16(v),__io(p))
118#define outl(v,p) __raw_writel(cpu_to_le32(v),__io(p))
119
120#define inb(p) ({ unsigned int __v = __raw_readb(__io(p)); __v; })
121#define inw(p) ({ unsigned int __v = le16_to_cpu(__raw_readw(__io(p))); __v; })
122#define inl(p) ({ unsigned int __v = le32_to_cpu(__raw_readl(__io(p))); __v; })
123
124#define outsb(p,d,l) __raw_writesb(__io(p),d,l)
125#define outsw(p,d,l) __raw_writesw(__io(p),d,l)
126#define outsl(p,d,l) __raw_writesl(__io(p),d,l)
127
128#define insb(p,d,l) __raw_readsb(__io(p),d,l)
129#define insw(p,d,l) __raw_readsw(__io(p),d,l)
130#define insl(p,d,l) __raw_readsl(__io(p),d,l)
131#endif
132
133#define outb_p(val,port) outb((val),(port))
134#define outw_p(val,port) outw((val),(port))
135#define outl_p(val,port) outl((val),(port))
136#define inb_p(port) inb((port))
137#define inw_p(port) inw((port))
138#define inl_p(port) inl((port))
139
140#define outsb_p(port,from,len) outsb(port,from,len)
141#define outsw_p(port,from,len) outsw(port,from,len)
142#define outsl_p(port,from,len) outsl(port,from,len)
143#define insb_p(port,to,len) insb(port,to,len)
144#define insw_p(port,to,len) insw(port,to,len)
145#define insl_p(port,to,len) insl(port,to,len)
146
147/*
148 * ioremap and friends.
149 *
150 * ioremap takes a PCI memory address, as specified in
151 * linux/Documentation/IO-mapping.txt. If you want a
152 * physical address, use __ioremap instead.
153 */
154extern void * __ioremap(unsigned long offset, size_t size, unsigned long flags);
155extern void __iounmap(void *addr);
156
157/*
158 * Generic ioremap support.
159 *
160 * Define:
161 * iomem_valid_addr(off,size)
162 * iomem_to_phys(off)
163 */
164#ifdef iomem_valid_addr
165#define __arch_ioremap(off,sz,nocache) \
166 ({ \
167 unsigned long _off = (off), _size = (sz); \
168 void *_ret = (void *)0; \
169 if (iomem_valid_addr(_off, _size)) \
170 _ret = __ioremap(iomem_to_phys(_off),_size,0); \
171 _ret; \
172 })
173
174#define __arch_iounmap __iounmap
175#endif
176
177#define ioremap(off,sz) __arch_ioremap((off),(sz),0)
178#define ioremap_nocache(off,sz) __arch_ioremap((off),(sz),1)
179#define iounmap(_addr) __arch_iounmap(_addr)
180
181/*
182 * DMA-consistent mapping functions. These allocate/free a region of
183 * uncached, unwrite-buffered mapped memory space for use with DMA
184 * devices. This is the "generic" version. The PCI specific version
185 * is in pci.h
186 */
187extern void *consistent_alloc(int gfp, size_t size, dma_addr_t *handle);
188extern void consistent_free(void *vaddr, size_t size, dma_addr_t handle);
189extern void consistent_sync(void *vaddr, size_t size, int rw);
190
191/*
192 * String version of IO memory access ops:
193 */
194extern void _memcpy_fromio(void *, unsigned long, size_t);
195extern void _memcpy_toio(unsigned long, const void *, size_t);
196extern void _memset_io(unsigned long, int, size_t);
197
198extern void __readwrite_bug(const char *fn);
199
200/*
201 * If this architecture has PCI memory IO, then define the read/write
202 * macros. These should only be used with the cookie passed from
203 * ioremap.
204 */
205#ifdef __mem_pci
206
207#define readb(c) ({ unsigned int __v = __raw_readb(__mem_pci(c)); __v; })
208#define readw(c) ({ unsigned int __v = le16_to_cpu(__raw_readw(__mem_pci(c))); __v; })
209#define readl(c) ({ unsigned int __v = le32_to_cpu(__raw_readl(__mem_pci(c))); __v; })
210
211#define writeb(v,c) __raw_writeb(v,__mem_pci(c))
212#define writew(v,c) __raw_writew(cpu_to_le16(v),__mem_pci(c))
213#define writel(v,c) __raw_writel(cpu_to_le32(v),__mem_pci(c))
214
215#define memset_io(c,v,l) _memset_io(__mem_pci(c),(v),(l))
216#define memcpy_fromio(a,c,l) _memcpy_fromio((a),__mem_pci(c),(l))
217#define memcpy_toio(c,a,l) _memcpy_toio(__mem_pci(c),(a),(l))
218
219#define eth_io_copy_and_sum(s,c,l,b) \
220 eth_copy_and_sum((s),__mem_pci(c),(l),(b))
221
222static inline int
223check_signature(unsigned long io_addr, const unsigned char *signature,
224 int length)
225{
226 int retval = 0;
227 do {
228 if (readb(io_addr) != *signature)
229 goto out;
230 io_addr++;
231 signature++;
232 length--;
233 } while (length);
234 retval = 1;
235out:
236 return retval;
237}
238
239#elif !defined(readb)
240
241#define readb(addr) (__readwrite_bug("readb"),0)
242#define readw(addr) (__readwrite_bug("readw"),0)
243#define readl(addr) (__readwrite_bug("readl"),0)
244#define writeb(v,addr) __readwrite_bug("writeb")
245#define writew(v,addr) __readwrite_bug("writew")
246#define writel(v,addr) __readwrite_bug("writel")
247
248#define eth_io_copy_and_sum(a,b,c,d) __readwrite_bug("eth_io_copy_and_sum")
249
250#define check_signature(io,sig,len) (0)
251
252#endif /* __mem_pci */
253
254/*
255 * If this architecture has ISA IO, then define the isa_read/isa_write
256 * macros.
257 */
258#ifdef __mem_isa
259
260#define isa_readb(addr) __raw_readb(__mem_isa(addr))
261#define isa_readw(addr) __raw_readw(__mem_isa(addr))
262#define isa_readl(addr) __raw_readl(__mem_isa(addr))
263#define isa_writeb(val,addr) __raw_writeb(val,__mem_isa(addr))
264#define isa_writew(val,addr) __raw_writew(val,__mem_isa(addr))
265#define isa_writel(val,addr) __raw_writel(val,__mem_isa(addr))
266#define isa_memset_io(a,b,c) _memset_io(__mem_isa(a),(b),(c))
267#define isa_memcpy_fromio(a,b,c) _memcpy_fromio((a),__mem_isa(b),(c))
268#define isa_memcpy_toio(a,b,c) _memcpy_toio(__mem_isa((a)),(b),(c))
269
270#define isa_eth_io_copy_and_sum(a,b,c,d) \
271 eth_copy_and_sum((a),__mem_isa(b),(c),(d))
272
273static inline int
274isa_check_signature(unsigned long io_addr, const unsigned char *signature,
275 int length)
276{
277 int retval = 0;
278 do {
279 if (isa_readb(io_addr) != *signature)
280 goto out;
281 io_addr++;
282 signature++;
283 length--;
284 } while (length);
285 retval = 1;
286out:
287 return retval;
288}
289
290#else /* __mem_isa */
291
292#define isa_readb(addr) (__readwrite_bug("isa_readb"),0)
293#define isa_readw(addr) (__readwrite_bug("isa_readw"),0)
294#define isa_readl(addr) (__readwrite_bug("isa_readl"),0)
295#define isa_writeb(val,addr) __readwrite_bug("isa_writeb")
296#define isa_writew(val,addr) __readwrite_bug("isa_writew")
297#define isa_writel(val,addr) __readwrite_bug("isa_writel")
298#define isa_memset_io(a,b,c) __readwrite_bug("isa_memset_io")
299#define isa_memcpy_fromio(a,b,c) __readwrite_bug("isa_memcpy_fromio")
300#define isa_memcpy_toio(a,b,c) __readwrite_bug("isa_memcpy_toio")
301
302#define isa_eth_io_copy_and_sum(a,b,c,d) \
303 __readwrite_bug("isa_eth_io_copy_and_sum")
304
305#define isa_check_signature(io,sig,len) (0)
306
307#endif /* __mem_isa */
308#endif /* __KERNEL__ */
309#endif /* __ASM_ARM_IO_H */