blob: e8f083ff9b04ab19f08acffcd560489d600ece1e [file] [log] [blame]
lh9ed821d2023-04-07 01:36:19 -07001/*********************************************************************
2 Copyright 2016 by ZIXC Corporation.
3*
4* FileName:: zx234290.c
5* File Mark:
6* Description:
7* Others:
8* Version:
9* Author:
10* Date:
11
12* History 1:
13* Date:
14* Version:
15* Author:
16* Modification:
17* History 2:
18**********************************************************************/
19
20#include <common.h>
21#include <errno.h>
22#include <command.h>
23#include <malloc.h>
24#include <asm/io.h>
25#include <boot_mode.h>
26#include <i2c.h>
27#include <drvs_gpio.h>
28#include <power.h>
29#include <zx234290.h>
30#include <zx234502.h>
xf.libdd93d52023-05-12 07:10:14 -070031#include <watchdog.h>
lh9ed821d2023-04-07 01:36:19 -070032
33int zx234290_write_flag(UINT8 val);
34
35#define PIN_PSHOLD_NUM GPIO24
36#define GPIO_PSHOLD_FUNC_SEL GPIO24_GPIO24
37
38static boot_reason_t s_boot_reason = UNKNOWN_BOOT_REASON;
39
40/*******************************************************************************
41 * Function: zx234290_i2c_read_reg
42 * Description:
43 * Parameters:
44 * Input:
45 *
46 * Output:
47 *
48 * Returns:
49 *
50 *
51 * Others:
52 ********************************************************************************/
53int zx234290_i2c_read_reg(ushort reg, uchar *val)
54{
55 return i2c_read(0, ZX234290_I2C_SLAVE_ADDR, reg, 8, val, 1);
56}
57
58/*******************************************************************************
59 * Function: zx234290_i2c_write_reg
60 * Description:
61 * Parameters:
62 * Input:
63 *
64 * Output:
65 *
66 * Returns:
67 *
68 *
69 * Others:
70 ********************************************************************************/
71int zx234290_i2c_write_reg(ushort reg, uchar *val)
72{
73 return i2c_write(0, ZX234290_I2C_SLAVE_ADDR, reg, 8, val, 1);
74}
75
76int zx234290_reset_flag(void)
77{
78#if 0
79 int ret = 0;
80 int val = 0;
81
82 /*
83 int val = 0xff;
84 ret = zx234290_i2c_write_reg(0x0f,&val);
85 */
86 ret = zx234290_i2c_read_reg(BUCK_MODE_CONTROL0, &val);
87 val &= (~0x30);
88 ret += zx234290_i2c_write_reg(BUCK_MODE_CONTROL0, &val);
89
90 return ret;
91#else
92 return zx234290_write_flag(ZX234290_USER_RST_UNDEFINE);
93#endif
94}
95
96int zx234290_write_flag(UINT8 val)
97{
98#if 0
99 int ret = 0;
100 int tmp = 0;
101
102 if(val > 3)
103 {
104 return -1;
105 }
106 ret = zx234290_i2c_read_reg(BUCK_MODE_CONTROL0, &tmp);
107 tmp &= (~0x30);
108 tmp |= (val<<4);
109 ret += zx234290_i2c_write_reg(BUCK_MODE_CONTROL0, &tmp);
110
111 return ret;
112#else
113 int ret = 0;
114 uchar tmp = 0;
115
116 /*
117 ret = zx234290_i2c_read_reg(ZX234290_REG_ADDR_USER_RESERVED, &tmp);
118 tmp &= ~(0x03<<2);
119 tmp |= (val<<2);
120 */
121 tmp = val;
122 ret |= zx234290_i2c_write_reg(ZX234290_REG_USER, &tmp);
123
124 return ret;
125#endif
126}
127
xf.li7ccf8372024-03-07 00:08:02 -0800128
129void zx234290_set_rtc_alarm_off(void)
130{
131 int ret = 0;
132 uchar tmp = 0;
133
134 //set alarm active bit 1 disable
135 ret = zx234290_i2c_read_reg(ZX234290_REG_ADDR_ALARM_MINUTE, &tmp);
136 tmp |= (1<<ZX234290_RTC_AlARM_ACTIVATED_LSH);
137 ret |= zx234290_i2c_write_reg(ZX234290_REG_ADDR_ALARM_MINUTE, &tmp);
138
139 ret |= zx234290_i2c_read_reg(ZX234290_REG_ADDR_ALARM_HOUR, &tmp);
140 tmp |= (1<<ZX234290_RTC_AlARM_ACTIVATED_LSH);
141 ret |= zx234290_i2c_write_reg(ZX234290_REG_ADDR_ALARM_HOUR, &tmp);
142
143 ret |= zx234290_i2c_read_reg(ZX234290_REG_ADDR_ALARM_DAY, &tmp);
144 tmp |= (1<<ZX234290_RTC_AlARM_ACTIVATED_LSH);
145 ret |= zx234290_i2c_write_reg(ZX234290_REG_ADDR_ALARM_DAY, &tmp);
146
147 ret = zx234290_i2c_read_reg(ZX234290_REG_ADDR_ALARM_WEEK, &tmp);
148 tmp |= (1<<ZX234290_RTC_AlARM_ACTIVATED_LSH);
149 ret |= zx234290_i2c_write_reg(ZX234290_REG_ADDR_ALARM_WEEK, &tmp);
150
151
152 ret |= zx234290_i2c_read_reg(ZX234290_REG_ADDR_ALARM_SECOND, &tmp);
153 tmp |= (1<<ZX234290_RTC_AlARM_ACTIVATED_LSH);
154 ret |= zx234290_i2c_write_reg(ZX234290_REG_ADDR_ALARM_SECOND, &tmp);
155
156 /*disable AIE bit && AF*/
157 ret |= zx234290_i2c_read_reg(ZX234290_REG_RTC_CONTROL2, &tmp);
158 tmp &= ~(RTC_CONTROL2_AIE|RTC_CONTROL2_AF);
159 ret |= zx234290_i2c_write_reg(ZX234290_REG_RTC_CONTROL2, &tmp);
160
161 if(ret)
162 printf( "[%s] fail ret=%d...\n", __FUNCTION__, ret);
163
164}
lh9ed821d2023-04-07 01:36:19 -0700165/*******************************************************************************
166 * Function: zx234290_get_boot_reason
167 * Description:
168 * Parameters:
169 * Input:
170 *
171 * Output:
172 *
173 * Returns:
174 *
175 *
176 * Others:
177 ********************************************************************************/
178int zx234290_get_boot_reason(boot_reason_t *boot_reason)
179{
180 if (boot_reason == NULL)
181 {
182 return -1;
183 }
184
185 if(s_boot_reason == UNKNOWN_BOOT_REASON)
186 {
187 return -EIO;
188 }
189 *boot_reason = s_boot_reason;
190
191 return 0;
192}
193
194/*******************************************************************************
195 * Function: zx234290_get_boot_reason
196 * Description:
197 * Parameters:
198 * Input:
199 *
200 * Output:
201 *
202 * Returns:
203 *
204 *
205 * Others:
206 ********************************************************************************/
207static int zx234290_get_boot_reason_prev(void)
208{
209 int ret = 0;
210 uchar reg_user = ZX234290_USER_RST_UNDEFINE;
211 uchar reg_start = 0;
212 uchar reg_write = 0;
213
214 /* ¶Á²¢ÇåSTART_UP_STATUS */
215 ret = zx234290_i2c_read_reg(START_UP_STATUS, &reg_start);
216 if( ret != 0 )
217 {
218 return -EIO;
219 }
220 printf( " [%s][START_UP_STATUS = 0x%X] ...\n", __FUNCTION__, reg_start);
xf.libdd93d52023-05-12 07:10:14 -0700221 (*(volatile unsigned long *)(START_UP_STATUS_BASE))=reg_start;
lh9ed821d2023-04-07 01:36:19 -0700222
223 /* ¶Á²¢ÇåZX234290_REG_USER */
224 ret = zx234290_i2c_read_reg(ZX234290_REG_USER, &reg_user);
225 if(reg_user != ZX234290_USER_RST_UNDEFINE)
226 {
227 reg_write = ZX234290_USER_RST_UNDEFINE; /* write back the reset value */
228
229 ret |= zx234290_i2c_write_reg(ZX234290_REG_USER, &reg_write);
230 }
231 if ( ret != 0 )
232 {
233 return -EIO;
234 }
235 printf( " [%s][USER_RESERVED = 0x%X] ...\n", __FUNCTION__, reg_user);
xf.libdd93d52023-05-12 07:10:14 -0700236 (*(volatile unsigned long *)(USER_RESERVED_BASE)) =reg_user;
lh9ed821d2023-04-07 01:36:19 -0700237
238 /* 1. Õý³£¿ª»ú¼ì²â */
239 if( reg_start & PWR_ON_START_UP )
240 /* ÏµÍ³ÖØÆô,Èç¹ûZX234290_REG_USER²»Îª³õÖµ£¬ÔòÎªÖØÆô */
241 {
242 s_boot_reason = RB_POWER_KEY;
243 return 0;
244 }
245 else if( reg_start & PS_HOLD_START_UP )
246 {
247 s_boot_reason = RB_USB_INSERT;
248
249 /* ZX234290_REG_USERΪÉϵ縴λֵ»ò·Ç·¨Öµ */
250 return 0;
251 }
252 else if( reg_start & RTC_ALARM_START_UP )
253 /* 2. Õý³£¿ª»ú¼ì²â */
254 {
255 uchar rtc_ctrl2 = 0xF0;
256
257 ret = zx234290_i2c_read_reg(ZX234290_REG_RTC_CONTROL2, &rtc_ctrl2);
258 printf( " [%s][RTC_CONTROL2 = 0x%X]\n", __FUNCTION__, rtc_ctrl2);
259
260 if (rtc_ctrl2 & RTC_CONTROL2_AF) {
261 s_boot_reason = RB_RTC;
xf.li7ccf8372024-03-07 00:08:02 -0800262 zx234290_set_rtc_alarm_off();
lh9ed821d2023-04-07 01:36:19 -0700263 } else if (rtc_ctrl2 & RTC_CONTROL2_TF) {
264 s_boot_reason = RB_RESET_NOMAL;
265 }
266
267 return ret;
268 }
269 else if( reg_start & LLP_RESTART_UP )
270 {
271 s_boot_reason = RB_POWER_KEY_LONG;
272 return 0;
273 }
274 /* reg_startΪ0£¬¼´reg_start¶ÁÇåÖ®ºóδµôµç£¬¼´ÏµÍ³ÖØÆô */
275
276 /* 2. ÖØÆô¼ì²â */
277
278 /* ÏµÍ³ÖØÆô,Èç¹ûZX234290_REG_USER²»Îª³õÖµ£¬ÔòÎªÖØÆô */
279 switch (reg_user)
280 {
281 case ZX234290_USER_RST_TO_NORMAL:
282 {
283 s_boot_reason = RB_RESET_NOMAL;
284 return 0;
285 }
286
287 case ZX234290_USER_RST_TO_CHARGER:
288 {
289 s_boot_reason = RB_RESET_USB_OFF;
290 return 0;
291 }
292
293 case ZX234290_USER_RST_TO_ALARM:
294 {
295 s_boot_reason = RB_RESET_ALARM;
296 return 0;
297 }
298
299 /* ZX234290_REG_USERΪÉϵ縴λֵ»ò·Ç·¨Öµ */
300 default:
301 {
302 if ((reg_user & 0xF0) == ZX234290_WDT_RST_FLAG) {
303 s_boot_reason = reg_user;
304 return 0;
305 }
306 break;
307 }
308 }
309
310 s_boot_reason = RB_USB_INSERT;
311
312 return 0;
313}
314
315/*******************************************************************************
316 * Function: zx234290_ps_hold_pull_on
317 * Description:
318 * Parameters:
319 * Input:
320 *
321 * Output:
322 *
323 * Returns:
324 *
325 *
326 * Others:
327 ********************************************************************************/
328int zx234290_ps_hold_pull_on(void)
329{
330 zDrvGpio_PullUpDown(PIN_PSHOLD_NUM, 0);
331 //gpio_set_reuse(PS_HOLD_PIN, 0);
332 zDrvGpio_SetFunc(PIN_PSHOLD_NUM,GPIO_PSHOLD_FUNC_SEL);
333 zDrvGpio_SetDirection(PIN_PSHOLD_NUM,GPIO_IN); //set output;v3 gpio24(pshold) direction is reverse
334 zDrvGpio_SetOutputValue(PIN_PSHOLD_NUM,GPIO_HIGH);
335 return 0;
336}
337
338/*******************************************************************************
339 * Function: zx234290_ps_hold_pull_off
340 * Description:
341 * Parameters:
342 * Input:
343 *
344 * Output:
345 *
346 * Returns:
347 *
348 *
349 * Others:
350 ********************************************************************************/
351int zx234290_ps_hold_pull_off(void)
352{
353 zDrvGpio_PullUpDown(PIN_PSHOLD_NUM, 0);
354 //gpio_set_reuse(PS_HOLD_PIN, 0);
355 //gpio_direction_output(PS_HOLD_PIN, GPIO_LOW);
356 zDrvGpio_SetFunc(PIN_PSHOLD_NUM,GPIO_PSHOLD_FUNC_SEL);
357 zDrvGpio_SetDirection(PIN_PSHOLD_NUM,GPIO_IN); //set output;v3 gpio24(pshold) direction is reverse
358 zDrvGpio_SetOutputValue(PIN_PSHOLD_NUM,GPIO_LOW);
359 return 0;
360}
361
362/*******************************************************************************
363 * Function: zx234290_power_off
364 * Description:
365 * Parameters:
366 * Input:
367 *
368 * Output:
369 *
370 * Returns:
371 *
372 *
373 * Others:
374 ********************************************************************************/
375int zx234290_power_off(void)
376{
377 return zx234290_ps_hold_pull_off();
378}
379
380/*******************************************************************************
381 * Function:
382 * Description:
383 * Parameters:
384 * Input:
385 *
386 * Output:
387 *
388 * Returns:
389 *
390 *
391 * Others:
392 ********************************************************************************/
393int pmu_init(void)
394{
395 int ret = 0;
xf.lie31de8b2023-12-26 23:38:58 -0800396 uchar reg_val = 0;
lh9ed821d2023-04-07 01:36:19 -0700397 struct pmu_opt pmu = {NULL};
398
399 /* GPIO init */
400 //gpio_set_reuse(PS_HOLD_PIN, 0x0);
401 //gpio_direction_output(PS_HOLD_PIN,GPIO_LOW);
402
403 // gpio_set_reuse(POWER_KEY_PIN,0x0);
404 // gpio_direction_input(POWER_KEY_PIN);
405
406 // gpio_noaction(POWER_KEY_PIN);
407
408 /* register pmu opt */
409 pmu.read_reg = zx234290_i2c_read_reg;
410 pmu.write_reg = zx234290_i2c_write_reg;
411 pmu.get_boot_reason = zx234290_get_boot_reason;
412 pmu.ps_hold_pull_on = pmu_pull_on_ps_hold;
413 pmu.ps_hold_pull_off = pmu_pull_off_ps_hold;
414 pmu.power_off = zx234290_power_off;
415 ret = register_pmu_opt(&pmu);
lh9ed821d2023-04-07 01:36:19 -0700416 if( ret != 0 )
417 {
418 return -EIO;
419 }
xf.li7ccf8372024-03-07 00:08:02 -0800420
lh9ed821d2023-04-07 01:36:19 -0700421 ret = zx234290_get_boot_reason_prev();
xf.lie31de8b2023-12-26 23:38:58 -0800422 ret +=zx234290_i2c_read_reg(ZX234297_REG_ADDR_SINK_CONTROL,&reg_val);
423 if(reg_val==0x7f){//means 296G C
424 reg_val = 0xff;//define to 296
425 ret+=zx234290_i2c_write_reg(ZX234297_REG_ADDR_SINK_CONTROL,&reg_val);
426 }
427
428 if (ret != SUCCESS)
429 {
430 printf( "[%s]set 0x29 error ret=0x%x!\n", __FUNCTION__,ret);
431 }
432
lh9ed821d2023-04-07 01:36:19 -0700433 return ret;
434}
435
436/* ================================================================================
437 * pmu_init:
438 */
439int pmu_pull_off_ps_hold(void)
440{
441 return zx234290_ps_hold_pull_off();
442}
443
444/* ================================================================================
445 * pmu_init:
446 */
447int pmu_pull_on_ps_hold(void)
448{
449 return zx234290_ps_hold_pull_on();
450}
451
452/* ================================================================================
453 * system_power_off:
454 */
455void system_power_off(void)
456{
457 zx234290_power_off();
458}
459
460int zx234290_get_adc2_voltage(void)
461{
462 int nTempAdc = 0, ret = -1;
463 int adcReadInt = -1;
464 int msb=0, lsb=0;
465 int num;
466 uchar status_a=0;
467 uchar adcEnable = 0x28;
468 uchar sys_ctrl;
469
470 ret = zx234290_i2c_read_reg(ZX234290_REG_SYS_CTRL, &sys_ctrl);
471 if (ret != SUCCESS)
472 {
473 return -EIO;
474 }
475 sys_ctrl = (sys_ctrl & (1 << 7)) | adcEnable;
476
477 /*enable adc*/
478#if 0
479 ret = zx234290_i2c_write_reg(ZX234290_REG_SYS_CTRL,&sys_ctrl);
480 if (ret != SUCCESS)
481 {
482 return -EIO;
483 }
484#else
485 for(num=1; num <= 50; num++)
486 {
487 ret = zx234290_i2c_write_reg(ZX234290_REG_SYS_CTRL, &sys_ctrl);
488 if (ret != SUCCESS)
489 {
490 return -EIO;
491 }
492 udelay((100000/3000)*5); /* delay 5ms */
493 ret = zx234290_i2c_read_reg(ZX234290_REG_ADDR_STSA, &status_a);
494 if (ret != SUCCESS)
495 {
496 return -EIO;
497 }
498
499 if(status_a & 0x04)
500 {
501 printf( "adc2 get adc,break num =%d ...\n", num);
502 break;
503 }
504 }
505#endif
506 udelay((100000/3000)*20); /* delay 20ms */
507
508 /*read adc*/
509 ret = zx234290_i2c_read_reg(ZX234290_REG_ADC_ADC2MSB, &msb);
510 if (ret != SUCCESS)
511 {
512 return -EIO;
513 }
514 ret = zx234290_i2c_read_reg(ZX234290_REG_ADC_ADC2LSB, &lsb);
515 if (ret != SUCCESS)
516 {
517 return -EIO;
518 }
519
520 /*clear int*/
521 ret = zx234290_i2c_read_reg(ZX234290_REG_INTA, &adcReadInt);
522 if (ret != SUCCESS)
523 {
524 return -EIO;
525 }
526 ret =zx234290_i2c_read_reg(ZX234290_REG_INTB, &adcReadInt);
527 if (ret != SUCCESS)
528 {
529 return -EIO;
530 }
531
532 nTempAdc = ((msb<<4)|(lsb>>4));
533
534 nTempAdc = (int)((double)(5000-0)*(nTempAdc)/4096);
535
536 return nTempAdc;
537}
538
539int zx234290_get_adc1_voltage(void) /*read adc1*/
540{
541 int nTempAdc = 0,adcEnable = 0,ret = -1;
542 int adcReadInt = -1;
543 int msb=0, lsb=0;
544 int num;
545 uchar status_a=0;
546 adcEnable = 0x30; /*read adc1*/
547 uchar sys_ctrl;
548
549 ret = zx234290_i2c_read_reg(ZX234290_REG_SYS_CTRL, &sys_ctrl);
550 if (ret != SUCCESS)
551 {
552 return -EIO;
553 }
554 sys_ctrl = (sys_ctrl & (1 << 7)) | adcEnable;
555
556 /*enable adc*/
557#if 0
558 ret = zx234290_i2c_write_reg(ZX234290_REG_SYS_CTRL,&sys_ctrl);
559 if (ret != SUCCESS)
560 {
561 return -EIO;
562 }
563#else
564 for(num=1; num <= 50; num++)
565 {
566 ret = zx234290_i2c_write_reg(ZX234290_REG_SYS_CTRL, &sys_ctrl);
567 if (ret != SUCCESS)
568 {
569 return -EIO;
570 }
571 udelay((100000/3000)*5); /* delay 5ms */
572 ret = zx234290_i2c_read_reg(ZX234290_REG_ADDR_STSA, &status_a);
573 if (ret != SUCCESS)
574 {
575 return -EIO;
576 }
577 if(status_a & 0x04)
578 {
579 printf( "adc1 get adc,break num =%d ...\n", num);
580 break;
581 }
582 }
583#endif
584
585 udelay((100000/3000)*20); /* delay 20ms */
586
587 /*read adc*/
588 ret = zx234290_i2c_read_reg(ZX234290_REG_ADC_ADC1MSB, &msb);
589 if (ret != SUCCESS)
590 {
591 return -EIO;
592 }
593 ret = zx234290_i2c_read_reg(ZX234290_REG_ADC_ADC1LSB, &lsb);
594 if (ret != SUCCESS)
595 {
596 return -EIO;
597 }
598
599 /*clear int*/
600 ret = zx234290_i2c_read_reg(ZX234290_REG_INTA, &adcReadInt);
601 if (ret != SUCCESS)
602 {
603 return -EIO;
604 }
605 ret =zx234290_i2c_read_reg(ZX234290_REG_INTB, &adcReadInt);
606 if (ret != SUCCESS)
607 {
608 return -EIO;
609 }
610
611 nTempAdc = ((msb<<4)|(lsb>>4));
612
613 nTempAdc = (int)((double)(5000-0)*(nTempAdc)/4096);
614
615 return nTempAdc;
616}
617
618int zx234290_get_vbat_voltage(void)
619{
620 int nTempAdc = 0,adcEnable = 0,ret = -1;
621 int adcReadInt = -1;
622 int msb=0, lsb=0;
623 int num;
624 uchar status_a=0;
625 //adcEnable = 0x30;
626 adcEnable = 0x20;
627 uchar sys_ctrl;
628
629 ret = zx234290_i2c_read_reg(ZX234290_REG_SYS_CTRL, &sys_ctrl);
630 if (ret != SUCCESS)
631 {
632 return -EIO;
633 }
634 sys_ctrl = (sys_ctrl & (1 << 7)) | adcEnable;
635
636#if 0
637 ret = zx234290_i2c_write_reg(ZX234290_REG_SYS_CTRL,&sys_ctrl);
638 if (ret != SUCCESS)
639 {
640 return -EIO;
641 }
642#else
643 for(num=1; num <= 50; num++)
644 {
645 ret = zx234290_i2c_write_reg(ZX234290_REG_SYS_CTRL, &sys_ctrl);
646 if (ret != SUCCESS)
647 {
648 return -EIO;
649 }
650 udelay((100000/3000)*5); /* delay 5ms */
651 ret = zx234290_i2c_read_reg(ZX234290_REG_ADDR_STSA, &status_a);
652 if (ret != SUCCESS)
653 {
654 return -EIO;
655 }
656 if(status_a & 0x04)
657 {
658 printf( "vbat get adc,break num =%d ...\n", num);
659 break;
660 }
661 }
662#endif
663 //ret = zx234290_i2c_read_reg(ZX234290_REG_ADC_ADC1MSB, &msb);
664 ret = zx234290_i2c_read_reg(ZX234290_REG_ADC_VBATMSB, &msb);
665 if (ret != SUCCESS)
666 {
667 return -EIO;
668 }
669 //ret = zx234290_i2c_read_reg(ZX234290_REG_ADC_ADC1LSB, &lsb);
670 ret = zx234290_i2c_read_reg(ZX234290_REG_ADC_VBATLSB, &lsb);
671 if (ret != SUCCESS)
672 {
673 return -EIO;
674 }
675 ret = zx234290_i2c_read_reg(ZX234290_REG_INTA, &adcReadInt);
676 if (ret != SUCCESS)
677 {
678 return -EIO;
679 }
680 ret =zx234290_i2c_read_reg(ZX234290_REG_INTB, &adcReadInt);
681 if (ret != SUCCESS)
682 {
683 return -EIO;
684 }
685 nTempAdc = ((msb<<4)|(lsb>>4));
686 nTempAdc = (int)((double)(5000-0)*(nTempAdc)/4096);
687 return nTempAdc;
688}
689
690int zx234290_set_llp_enable(void)
691{
692 int ret = -1;
693 ushort reg=ZX234290_REG_ADDR_PWRON;
694 uchar val=0x05;
695
696 ret = zx234290_i2c_write_reg(reg, &val);
697 if (ret != SUCCESS)
698 {
699 return -EIO;
700 }
701 return ret;
702}
703
704/*get the poweron key state 0x1<<5: poweron press 0:poweron up*/
705int zx234290_get_poweron_state(void)
706{
707 int val = 0,ret = -1;
708 uchar reg = 0;
709
710 ret = zx234290_i2c_read_reg(STATUS_A,&reg);
711 if (ret != SUCCESS)
712 {
713 return -EIO;
714 }
715 val = reg&STATUS_PWR_ON;
716 return val;
717}
718
719/* get the rtc_alarm status: bit0 in reg 0x05 */
720int zx234290_get_rtc_state(void)
721{
722 int val = 0,ret = -1;
723 uchar reg = 0;
724
725 ret = zx234290_i2c_read_reg(STATUS_B, &reg);
726 if (ret != SUCCESS)
727 {
728 return -EIO;
729 }
730 val = reg & STATUS_RTC_ALARM;
731 return val;
732}
733
734/* Set or clear SoftOn bit in ZX234290_REG_SYS_CTRL */
735int zx234290_set_softon(int on)
736{
737 uchar reg = 0;
738 int ret;
739
740 ret = zx234290_i2c_read_reg(ZX234290_REG_SYS_CTRL, &reg);
741 if (ret != SUCCESS)
742 {
743 return -EIO;
744 }
745
746 if ((reg >> 7) != on) {
747 reg ^= (0x01<<7);
748 ret = zx234290_i2c_write_reg(ZX234290_REG_SYS_CTRL, &reg);
749 if (ret != SUCCESS)
750 {
751 return -EIO;
752 }
753 }
754 return 0;
755}
756
757/*set ldo8 SD VOL*/
758int zx234290_set_ldo8_voltage(T_ZDrvZx234290_VldoD vol)
759{
760 int ret = 0;
761 unsigned char reg_addr=0, reg_val=0;
762
763 if(vol > VLDOD_MAX)
764 {
765 return -EINVAL;
766 }
767 reg_addr = ZX234290_REG_ADDR_LDO78_VOL;
768 ret = zx234290_i2c_read_reg(reg_addr,&reg_val);
769 if (ret != SUCCESS)
770 {
771 return -EIO;
772 }
773 reg_val &= ~(0xf<<ZX234290_LDO8_VSEL_LSH);
774 reg_val |= (vol<<ZX234290_LDO8_VSEL_LSH);
775
776 ret = zx234290_i2c_write_reg(reg_addr, &reg_val);
777 if (ret != SUCCESS)
778 {
779 return -EIO;
780 }
781
782 return 0;
783}
784
785int zx234290_set_ldo8_sleep_voltage(T_ZDrvZx234290_VldoD vol)
786{
787 int ret = 0;
788 unsigned char reg_addr=0, reg_val=0;
789
790 if(vol > VLDOD_MAX)
791 {
792 return -EINVAL;
793 }
794 reg_addr = ZX234290_REG_ADDR_LDO78_VOL;
795 ret = zx234290_i2c_read_reg(reg_addr,&reg_val);
796 if (ret != SUCCESS)
797 {
798 return -EIO;
799 }
800 reg_val &= ~(0xf<<ZX234290_LDO8_SLP_VSEL_LSH);
801 reg_val |= (vol<<ZX234290_LDO8_SLP_VSEL_LSH);
802
803 ret = zx234290_i2c_write_reg(reg_addr, &reg_val);
804 if (ret != SUCCESS)
805 {
806 return -EIO;
807 }
808
809 return 0;
810}
811
812
813/* clear SoftOn bit in ZX234290_REG_SYS_CTRL bit7 */
814int zx234290_ldo8_enable(int enable)
815{
816 int ret = -1;
817 uchar reg = 0;
818
819 ret = zx234290_i2c_read_reg(ZX234290_REG_LDO_EN1, &reg);
820 if (ret != SUCCESS)
821 {
822 return -EIO;
823 }
824 reg &= ~(0x01<<7);
825 reg |= (enable<<7);
826 ret = zx234290_i2c_write_reg(ZX234290_REG_LDO_EN1, &reg);
827 if (ret != SUCCESS)
828 {
829 return -EIO;
830 }
831 return 0;
832}
833int zx234290_set_sink(T_ZX234290_SINK sink_num, int is_on, T_ZX234297_SINK_CURRENT sink_current)
834{
835 int ret = 0;
836 unsigned char lsh_on, lsh_current;
837 uchar reg = 0;
838
839 ret = zx234290_i2c_read_reg(ZX234297_REG_ADDR_SINK_CONTROL, &reg);
840 if (ret != SUCCESS)
841 {
842 return -EIO;
843 }
844 if(0xff==reg){
845 printf("pmu zx234296 no sink\n");
846 return SUCCESS;
847 }
848 if (sink_num == SINK_1) {
849 lsh_on = ZX234297_SINK1_ON_LSH;
850 lsh_current = ZX234297_SINK1_CURRENT_LSH;
851 } else if (sink_num == SINK_2) {
852 lsh_on = ZX234297_SINK2_ON_LSH;
853 lsh_current = ZX234297_SINK2_CURRENT_LSH;
854 } else
855 return -EINVAL;
856
857 if (is_on) {
858 if (sink_current >= SINK_CURRENT_MAX)
859 sink_current = SINK_CURRENT_120MA;
860
861 ret = zx234290_i2c_read_reg(ZX234297_REG_ADDR_SINK_CONTROL, &reg);
862 if (ret != SUCCESS)
863 {
864 return -EIO;
865 }
866 reg &= ~(0xf<<lsh_current);
867 reg |= (sink_current<<lsh_current);
868 ret = zx234290_i2c_write_reg(ZX234297_REG_ADDR_SINK_CONTROL, &reg);
869 if (ret != SUCCESS)
870 {
871 return -EIO;
872 }
873 }
874
875 is_on = !!is_on;
876 ret = zx234290_i2c_read_reg(ZX234290_REG_ADDR_LDO_EN2, &reg);
877 if (ret != SUCCESS)
878 {
879 return -EIO;
880 }
881 reg &= ~(0x1<<lsh_on);
882 reg |= (is_on<<lsh_on);
883 ret = zx234290_i2c_write_reg(ZX234290_REG_ADDR_LDO_EN2, &reg);
884 if (ret != SUCCESS)
885 {
886 return -EIO;
887 }
888
889 return 0;
890}
891
892#if 0
893int zx234290_SetVldo8(Zx234290_VldoD vol)
894{
895 int reg = 0,val = 0,ret = -1;
896 ret = zx234290_i2c_read_reg(ZX234290_REG_LD78_VOL, &reg);
897 if (ret != SUCCESS)
898 {
899 return -EIO;
900 }
901 BOOT_PRINTF(UBOOT_ERR, "********First REG0x15=0x%x!!!\n",reg);
902 reg &= 0xf;/*00001111*/
903 reg |= (vol<<4);
904 ret = zx234290_i2c_write_reg(ZX234290_REG_LD78_VOL, &reg);
905 if (ret != SUCCESS)
906 {
907 return -EIO;
908 }
909 ret = zx234290_i2c_read_reg(ZX234290_REG_LD78_VOL, &reg);
910 if (ret != SUCCESS)
911 {
912 return -EIO;
913 }
914 BOOT_PRINTF(UBOOT_ERR, "********Last REG0x15=0x%x!!!\n",reg);
915 return 0;
916}
917
918#endif
919
920