lh | 9ed821d | 2023-04-07 01:36:19 -0700 | [diff] [blame] | 1 | #include <common.h>
|
| 2 | #include <command.h>
|
| 3 | #include <net.h>
|
| 4 | #include <jffs2/load_kernel.h>
|
| 5 | #include <common.h>
|
| 6 | #include <asm/arch/hardware.h>
|
| 7 | #include <asm/arch/uart.h>
|
| 8 | #include <asm/arch/lsp_crpm.h>
|
| 9 | #include "errno.h"
|
| 10 | #include <config.h>
|
| 11 | #include <drvs_gpio.h>
|
| 12 |
|
| 13 |
|
| 14 | #if CONFIG_HARDWARE_TEST
|
| 15 |
|
| 16 | #define DDR_START 0x20000000
|
| 17 | #define DDR_END 0x27800000
|
| 18 |
|
| 19 | void led_init(void)
|
| 20 | {
|
| 21 | int32_t reg = 0;
|
| 22 |
|
| 23 | reg = __REG(0x10d440); /* ¹¦ÄÜÒý½Å */
|
| 24 | reg |= (0x1 << 24);
|
| 25 | __REG(0x10d440)=reg;
|
| 26 |
|
| 27 | reg = __REG(0x10dC04); /* config OUT */
|
| 28 | reg &= (~(0x1<<9));
|
| 29 | __REG(0x10dC04)=reg;
|
| 30 |
|
| 31 | #if 1
|
| 32 | reg = __REG(0x10dC08);
|
| 33 | reg |= (0x1<<9);
|
| 34 | __REG(0x10dC08)=reg;
|
| 35 | #endif
|
| 36 | }
|
| 37 |
|
| 38 | void led_on(void)
|
| 39 | {
|
| 40 | int32_t reg = __REG(0x10dC08);
|
| 41 | reg |= (0x1<<9);
|
| 42 | __REG(0x10dC08)=reg;
|
| 43 | }
|
| 44 |
|
| 45 | void led_off(void)
|
| 46 | {
|
| 47 | int32_t reg = __REG(0x10dC08);
|
| 48 | reg &= ~(0x1<<9);
|
| 49 | __REG(0x10dC08)=reg;
|
| 50 | }
|
| 51 |
|
| 52 |
|
| 53 | int do_test_ddr(void)
|
| 54 | {
|
| 55 | volatile unsigned char *test_count = 0;
|
| 56 | static int test_cnt = 0;
|
| 57 | unsigned int cnt = 0;
|
| 58 | volatile unsigned int state = 0;
|
| 59 | int ret = 0;
|
| 60 | test_cnt++;
|
| 61 | printf("single byte test round:%d\n",test_cnt);
|
| 62 | for(test_count = (unsigned char *)DDR_START; test_count < (unsigned char *)DDR_END; test_count++)
|
| 63 | {
|
| 64 | *test_count = 0x55;
|
| 65 | if(*test_count != 0x55)
|
| 66 | {
|
| 67 | break;
|
| 68 | ret = -1;
|
| 69 | }
|
| 70 | *test_count = 0xAA;
|
| 71 | if(*test_count != 0xAA)
|
| 72 | {
|
| 73 | break;
|
| 74 | ret = -1;
|
| 75 | }
|
| 76 |
|
| 77 | cnt++;
|
| 78 | if(cnt%2000000 == 0)
|
| 79 | {
|
| 80 | if(state==0)
|
| 81 | {
|
| 82 | zDrvGpio_SetOutputValue(GPIO32,GPIO_HIGH);
|
| 83 | printf("single byte test round:%d\n",cnt);
|
| 84 | state = 1;
|
| 85 | }
|
| 86 | else
|
| 87 | {
|
| 88 | zDrvGpio_SetOutputValue(GPIO32,GPIO_LOW);
|
| 89 | printf("single byte test round:%d\n",cnt);
|
| 90 | state = 0;
|
| 91 | }
|
| 92 | }
|
| 93 |
|
| 94 |
|
| 95 | }
|
| 96 | if(test_count != (unsigned char *)DDR_END)
|
| 97 | {
|
| 98 | printf("test ddr faile\n");
|
| 99 | ret = -1;
|
| 100 | }
|
| 101 | else
|
| 102 | {
|
| 103 | printf("test ddr success\n");
|
| 104 | }
|
| 105 |
|
| 106 | if(ret == -1)
|
| 107 | {
|
| 108 | zDrvGpio_SetOutputValue(GPIO70,GPIO_HIGH);
|
| 109 | while(1);
|
| 110 | }
|
| 111 | printf("memset test round:%d\n",test_cnt);
|
| 112 | memset(DDR_START,0x5a,DDR_END-DDR_START);
|
| 113 | printf("check memset\n");
|
| 114 | for(test_count = (unsigned char *)DDR_START; test_count < (unsigned char *)DDR_END; test_count++)
|
| 115 | {
|
| 116 | if(*test_count != 0x5a)
|
| 117 | {
|
| 118 | break;
|
| 119 | ret = -1;
|
| 120 | }
|
| 121 | cnt++;
|
| 122 | if(cnt%2000000 == 0)
|
| 123 | {
|
| 124 | if(state==0)
|
| 125 | {
|
| 126 | zDrvGpio_SetOutputValue(GPIO32,GPIO_HIGH);
|
| 127 | state = 1;
|
| 128 | }
|
| 129 | else
|
| 130 | {
|
| 131 | zDrvGpio_SetOutputValue(GPIO32,GPIO_LOW);
|
| 132 | state = 0;
|
| 133 | }
|
| 134 | }
|
| 135 | }
|
| 136 | if(test_count != (unsigned char *)DDR_END)
|
| 137 | {
|
| 138 | printf("test ddr faile\n");
|
| 139 | ret = -1;
|
| 140 | }
|
| 141 | else
|
| 142 | {
|
| 143 | printf("test ddr success\n");
|
| 144 | }
|
| 145 |
|
| 146 | if(ret == -1)
|
| 147 | {
|
| 148 | zDrvGpio_SetOutputValue(GPIO70,GPIO_HIGH);
|
| 149 | while(1);
|
| 150 | }
|
| 151 | return 0;
|
| 152 | }
|
| 153 |
|
| 154 | U_BOOT_CMD(
|
| 155 | test_ddr, CONFIG_SYS_MAXARGS, 0, do_test_ddr,
|
| 156 | "test_ddr: test_ddr ",
|
| 157 | ""
|
| 158 | );
|
| 159 |
|
| 160 | #endif
|
| 161 |
|