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192.168.1.100 / T106_DC / 9ed821d7e5d875a3395740a9cc2545671fa429b7 / . / ap / build / uClibc / libc / string / cris / memcpy.c
blob: 94e576f4f3dfd1e6235222778a3d6cc348a0654c [file] [log] [blame]
lh9ed821d2023-04-07 01:36:19 -0700[diff] [blame^]1/* A memcpy for CRIS.
2 Copyright (C) 1994-2008 Axis Communications.
3 All rights reserved.
4
5 Redistribution and use in source and binary forms, with or without
6 modification, are permitted provided that the following conditions
7 are met:
8
9 1. Redistributions of source code must retain the above copyright
10 notice, this list of conditions and the following disclaimer.
11
12 2. Neither the name of Axis Communications nor the names of its
13 contributors may be used to endorse or promote products derived
14 from this software without specific prior written permission.
15
16 THIS SOFTWARE IS PROVIDED BY AXIS COMMUNICATIONS AND ITS CONTRIBUTORS
17 ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL AXIS
20 COMMUNICATIONS OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
21 INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
22 (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
23 SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
25 STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
26 IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
27 POSSIBILITY OF SUCH DAMAGE. */
28
29/* FIXME: This file should really only be used for reference, as the
30 result is somewhat depending on gcc generating what we expect rather
31 than what we describe. An assembly file should be used instead. */
32
33#include <string.h>
34
35#ifdef __arch_v32
36/* For CRISv32, movem is very cheap. */
37#define MEMCPY_BY_BLOCK_THRESHOLD (44)
38#else
39/* Break even between movem and move16 is really at 38.7 * 2, but
40 modulo 44, so up to the next multiple of 44, we use ordinary code. */
41#define MEMCPY_BY_BLOCK_THRESHOLD (44 * 2)
42#endif
43
44/* No name ambiguities in this file. */
45__asm__ (".syntax no_register_prefix");
46
47void *
48memcpy(void *pdst, const void *psrc, size_t pn)
49{
50 /* Now we want the parameters put in special registers.
51 Make sure the compiler is able to make something useful of this.
52 As it is now: r10 -> r13; r11 -> r11 (nop); r12 -> r12 (nop).
53
54 If gcc was allright, it really would need no temporaries, and no
55 stack space to save stuff on. */
56
57 register void *return_dst __asm__ ("r10") = pdst;
58 register unsigned char *dst __asm__ ("r13") = pdst;
59 register unsigned const char *src __asm__ ("r11") = psrc;
60 register int n __asm__ ("r12") = pn;
61
62 /* When src is aligned but not dst, this makes a few extra needless
63 cycles. I believe it would take as many to check that the
64 re-alignment was unnecessary. */
65 if (((unsigned long) dst & 3) != 0
66 /* Don't align if we wouldn't copy more than a few bytes; so we
67 don't have to check further for overflows. */
68 && n >= 3)
69 {
70 if ((unsigned long) dst & 1)
71 {
72 n--;
73 *dst = *src;
74 src++;
75 dst++;
76 }
77
78 if ((unsigned long) dst & 2)
79 {
80 n -= 2;
81 *(short *) dst = *(short *) src;
82 src += 2;
83 dst += 2;
84 }
85 }
86
87 /* Decide which copying method to use. */
88 if (n >= MEMCPY_BY_BLOCK_THRESHOLD)
89 {
90 /* It is not optimal to tell the compiler about clobbering any
91 registers; that will move the saving/restoring of those registers
92 to the function prologue/epilogue, and make non-movem sizes
93 suboptimal. */
94 __asm__ __volatile__
95 ("\
96 ;; GCC does promise correct register allocations, but let's \n\
97 ;; make sure it keeps its promises. \n\
98 .ifnc %0-%1-%2,$r13-$r11-$r12 \n\
99 .error \"GCC reg alloc bug: %0-%1-%4 != $r13-$r12-$r11\" \n\
100 .endif \n\
101 \n\
102 ;; Save the registers we'll use in the movem process \n\
103 ;; on the stack. \n\
104 subq 11*4,sp \n\
105 movem r10,[sp] \n\
106 \n\
107 ;; Now we've got this: \n\
108 ;; r11 - src \n\
109 ;; r13 - dst \n\
110 ;; r12 - n \n\
111 \n\
112 ;; Update n for the first loop. \n\
113 subq 44,r12 \n\
1140: \n\
115"
116#ifdef __arch_common_v10_v32
117 /* Cater to branch offset difference between v32 and v10. We
118 assume the branch below has an 8-bit offset. */
119" setf\n"
120#endif
121" movem [r11+],r10 \n\
122 subq 44,r12 \n\
123 bge 0b \n\
124 movem r10,[r13+] \n\
125 \n\
126 ;; Compensate for last loop underflowing n. \n\
127 addq 44,r12 \n\
128 \n\
129 ;; Restore registers from stack. \n\
130 movem [sp+],r10"
131
132 /* Outputs. */
133 : "=r" (dst), "=r" (src), "=r" (n)
134
135 /* Inputs. */
136 : "0" (dst), "1" (src), "2" (n));
137 }
138
139 while (n >= 16)
140 {
141 *(long *) dst = *(long *) src; dst += 4; src += 4;
142 *(long *) dst = *(long *) src; dst += 4; src += 4;
143 *(long *) dst = *(long *) src; dst += 4; src += 4;
144 *(long *) dst = *(long *) src; dst += 4; src += 4;
145
146 n -= 16;
147 }
148
149 switch (n)
150 {
151 case 0:
152 break;
153
154 case 1:
155 *dst = *src;
156 break;
157
158 case 2:
159 *(short *) dst = *(short *) src;
160 break;
161
162 case 3:
163 *(short *) dst = *(short *) src; dst += 2; src += 2;
164 *dst = *src;
165 break;
166
167 case 4:
168 *(long *) dst = *(long *) src;
169 break;
170
171 case 5:
172 *(long *) dst = *(long *) src; dst += 4; src += 4;
173 *dst = *src;
174 break;
175
176 case 6:
177 *(long *) dst = *(long *) src; dst += 4; src += 4;
178 *(short *) dst = *(short *) src;
179 break;
180
181 case 7:
182 *(long *) dst = *(long *) src; dst += 4; src += 4;
183 *(short *) dst = *(short *) src; dst += 2; src += 2;
184 *dst = *src;
185 break;
186
187 case 8:
188 *(long *) dst = *(long *) src; dst += 4; src += 4;
189 *(long *) dst = *(long *) src;
190 break;
191
192 case 9:
193 *(long *) dst = *(long *) src; dst += 4; src += 4;
194 *(long *) dst = *(long *) src; dst += 4; src += 4;
195 *dst = *src;
196 break;
197
198 case 10:
199 *(long *) dst = *(long *) src; dst += 4; src += 4;
200 *(long *) dst = *(long *) src; dst += 4; src += 4;
201 *(short *) dst = *(short *) src;
202 break;
203
204 case 11:
205 *(long *) dst = *(long *) src; dst += 4; src += 4;
206 *(long *) dst = *(long *) src; dst += 4; src += 4;
207 *(short *) dst = *(short *) src; dst += 2; src += 2;
208 *dst = *src;
209 break;
210
211 case 12:
212 *(long *) dst = *(long *) src; dst += 4; src += 4;
213 *(long *) dst = *(long *) src; dst += 4; src += 4;
214 *(long *) dst = *(long *) src;
215 break;
216
217 case 13:
218 *(long *) dst = *(long *) src; dst += 4; src += 4;
219 *(long *) dst = *(long *) src; dst += 4; src += 4;
220 *(long *) dst = *(long *) src; dst += 4; src += 4;
221 *dst = *src;
222 break;
223
224 case 14:
225 *(long *) dst = *(long *) src; dst += 4; src += 4;
226 *(long *) dst = *(long *) src; dst += 4; src += 4;
227 *(long *) dst = *(long *) src; dst += 4; src += 4;
228 *(short *) dst = *(short *) src;
229 break;
230
231 case 15:
232 *(long *) dst = *(long *) src; dst += 4; src += 4;
233 *(long *) dst = *(long *) src; dst += 4; src += 4;
234 *(long *) dst = *(long *) src; dst += 4; src += 4;
235 *(short *) dst = *(short *) src; dst += 2; src += 2;
236 *dst = *src;
237 break;
238 }
239
240 return return_dst;
241}
242libc_hidden_def(memcpy)