blob: d6e2deee7bf04c66c84248b411f32ff7a2523bb4 [file] [log] [blame]
lh9ed821d2023-04-07 01:36:19 -07001/*
2 * Xen event channels
3 *
4 * Xen models interrupts with abstract event channels. Because each
5 * domain gets 1024 event channels, but NR_IRQ is not that large, we
6 * must dynamically map irqs<->event channels. The event channels
7 * interface with the rest of the kernel by defining a xen interrupt
8 * chip. When an event is received, it is mapped to an irq and sent
9 * through the normal interrupt processing path.
10 *
11 * There are four kinds of events which can be mapped to an event
12 * channel:
13 *
14 * 1. Inter-domain notifications. This includes all the virtual
15 * device events, since they're driven by front-ends in another domain
16 * (typically dom0).
17 * 2. VIRQs, typically used for timers. These are per-cpu events.
18 * 3. IPIs.
19 * 4. PIRQs - Hardware interrupts.
20 *
21 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
22 */
23
24#include <linux/linkage.h>
25#include <linux/interrupt.h>
26#include <linux/irq.h>
27#include <linux/module.h>
28#include <linux/string.h>
29#include <linux/bootmem.h>
30#include <linux/slab.h>
31#include <linux/irqnr.h>
32#include <linux/pci.h>
33
34#include <asm/desc.h>
35#include <asm/ptrace.h>
36#include <asm/irq.h>
37#include <asm/idle.h>
38#include <asm/io_apic.h>
39#include <asm/sync_bitops.h>
40#include <asm/xen/page.h>
41#include <asm/xen/pci.h>
42#include <asm/xen/hypercall.h>
43#include <asm/xen/hypervisor.h>
44
45#include <xen/xen.h>
46#include <xen/hvm.h>
47#include <xen/xen-ops.h>
48#include <xen/events.h>
49#include <xen/interface/xen.h>
50#include <xen/interface/event_channel.h>
51#include <xen/interface/hvm/hvm_op.h>
52#include <xen/interface/hvm/params.h>
53
54/*
55 * This lock protects updates to the following mapping and reference-count
56 * arrays. The lock does not need to be acquired to read the mapping tables.
57 */
58static DEFINE_MUTEX(irq_mapping_update_lock);
59
60static LIST_HEAD(xen_irq_list_head);
61
62/* IRQ <-> VIRQ mapping. */
63static DEFINE_PER_CPU(int [NR_VIRQS], virq_to_irq) = {[0 ... NR_VIRQS-1] = -1};
64
65/* IRQ <-> IPI mapping */
66static DEFINE_PER_CPU(int [XEN_NR_IPIS], ipi_to_irq) = {[0 ... XEN_NR_IPIS-1] = -1};
67
68/* Interrupt types. */
69enum xen_irq_type {
70 IRQT_UNBOUND = 0,
71 IRQT_PIRQ,
72 IRQT_VIRQ,
73 IRQT_IPI,
74 IRQT_EVTCHN
75};
76
77/*
78 * Packed IRQ information:
79 * type - enum xen_irq_type
80 * event channel - irq->event channel mapping
81 * cpu - cpu this event channel is bound to
82 * index - type-specific information:
83 * PIRQ - vector, with MSB being "needs EIO", or physical IRQ of the HVM
84 * guest, or GSI (real passthrough IRQ) of the device.
85 * VIRQ - virq number
86 * IPI - IPI vector
87 * EVTCHN -
88 */
89struct irq_info {
90 struct list_head list;
91 int refcnt;
92 enum xen_irq_type type; /* type */
93 unsigned irq;
94 unsigned short evtchn; /* event channel */
95 unsigned short cpu; /* cpu bound */
96
97 union {
98 unsigned short virq;
99 enum ipi_vector ipi;
100 struct {
101 unsigned short pirq;
102 unsigned short gsi;
103 unsigned char vector;
104 unsigned char flags;
105 uint16_t domid;
106 } pirq;
107 } u;
108};
109#define PIRQ_NEEDS_EOI (1 << 0)
110#define PIRQ_SHAREABLE (1 << 1)
111
112static int *evtchn_to_irq;
113static unsigned long *pirq_eoi_map;
114static bool (*pirq_needs_eoi)(unsigned irq);
115
116static DEFINE_PER_CPU(unsigned long [NR_EVENT_CHANNELS/BITS_PER_LONG],
117 cpu_evtchn_mask);
118
119/* Xen will never allocate port zero for any purpose. */
120#define VALID_EVTCHN(chn) ((chn) != 0)
121
122static struct irq_chip xen_dynamic_chip;
123static struct irq_chip xen_percpu_chip;
124static struct irq_chip xen_pirq_chip;
125static void enable_dynirq(struct irq_data *data);
126static void disable_dynirq(struct irq_data *data);
127
128/* Get info for IRQ */
129static struct irq_info *info_for_irq(unsigned irq)
130{
131 return irq_get_handler_data(irq);
132}
133
134/* Constructors for packed IRQ information. */
135static void xen_irq_info_common_init(struct irq_info *info,
136 unsigned irq,
137 enum xen_irq_type type,
138 unsigned short evtchn,
139 unsigned short cpu)
140{
141
142 BUG_ON(info->type != IRQT_UNBOUND && info->type != type);
143
144 info->type = type;
145 info->irq = irq;
146 info->evtchn = evtchn;
147 info->cpu = cpu;
148
149 evtchn_to_irq[evtchn] = irq;
150}
151
152static void xen_irq_info_evtchn_init(unsigned irq,
153 unsigned short evtchn)
154{
155 struct irq_info *info = info_for_irq(irq);
156
157 xen_irq_info_common_init(info, irq, IRQT_EVTCHN, evtchn, 0);
158}
159
160static void xen_irq_info_ipi_init(unsigned cpu,
161 unsigned irq,
162 unsigned short evtchn,
163 enum ipi_vector ipi)
164{
165 struct irq_info *info = info_for_irq(irq);
166
167 xen_irq_info_common_init(info, irq, IRQT_IPI, evtchn, 0);
168
169 info->u.ipi = ipi;
170
171 per_cpu(ipi_to_irq, cpu)[ipi] = irq;
172}
173
174static void xen_irq_info_virq_init(unsigned cpu,
175 unsigned irq,
176 unsigned short evtchn,
177 unsigned short virq)
178{
179 struct irq_info *info = info_for_irq(irq);
180
181 xen_irq_info_common_init(info, irq, IRQT_VIRQ, evtchn, 0);
182
183 info->u.virq = virq;
184
185 per_cpu(virq_to_irq, cpu)[virq] = irq;
186}
187
188static void xen_irq_info_pirq_init(unsigned irq,
189 unsigned short evtchn,
190 unsigned short pirq,
191 unsigned short gsi,
192 unsigned short vector,
193 uint16_t domid,
194 unsigned char flags)
195{
196 struct irq_info *info = info_for_irq(irq);
197
198 xen_irq_info_common_init(info, irq, IRQT_PIRQ, evtchn, 0);
199
200 info->u.pirq.pirq = pirq;
201 info->u.pirq.gsi = gsi;
202 info->u.pirq.vector = vector;
203 info->u.pirq.domid = domid;
204 info->u.pirq.flags = flags;
205}
206
207/*
208 * Accessors for packed IRQ information.
209 */
210static unsigned int evtchn_from_irq(unsigned irq)
211{
212 if (unlikely(WARN(irq < 0 || irq >= nr_irqs, "Invalid irq %d!\n", irq)))
213 return 0;
214
215 return info_for_irq(irq)->evtchn;
216}
217
218unsigned irq_from_evtchn(unsigned int evtchn)
219{
220 return evtchn_to_irq[evtchn];
221}
222EXPORT_SYMBOL_GPL(irq_from_evtchn);
223
224static enum ipi_vector ipi_from_irq(unsigned irq)
225{
226 struct irq_info *info = info_for_irq(irq);
227
228 BUG_ON(info == NULL);
229 BUG_ON(info->type != IRQT_IPI);
230
231 return info->u.ipi;
232}
233
234static unsigned virq_from_irq(unsigned irq)
235{
236 struct irq_info *info = info_for_irq(irq);
237
238 BUG_ON(info == NULL);
239 BUG_ON(info->type != IRQT_VIRQ);
240
241 return info->u.virq;
242}
243
244static unsigned pirq_from_irq(unsigned irq)
245{
246 struct irq_info *info = info_for_irq(irq);
247
248 BUG_ON(info == NULL);
249 BUG_ON(info->type != IRQT_PIRQ);
250
251 return info->u.pirq.pirq;
252}
253
254static enum xen_irq_type type_from_irq(unsigned irq)
255{
256 return info_for_irq(irq)->type;
257}
258
259static unsigned cpu_from_irq(unsigned irq)
260{
261 return info_for_irq(irq)->cpu;
262}
263
264static unsigned int cpu_from_evtchn(unsigned int evtchn)
265{
266 int irq = evtchn_to_irq[evtchn];
267 unsigned ret = 0;
268
269 if (irq != -1)
270 ret = cpu_from_irq(irq);
271
272 return ret;
273}
274
275static bool pirq_check_eoi_map(unsigned irq)
276{
277 return test_bit(pirq_from_irq(irq), pirq_eoi_map);
278}
279
280static bool pirq_needs_eoi_flag(unsigned irq)
281{
282 struct irq_info *info = info_for_irq(irq);
283 BUG_ON(info->type != IRQT_PIRQ);
284
285 return info->u.pirq.flags & PIRQ_NEEDS_EOI;
286}
287
288static inline unsigned long active_evtchns(unsigned int cpu,
289 struct shared_info *sh,
290 unsigned int idx)
291{
292 return sh->evtchn_pending[idx] &
293 per_cpu(cpu_evtchn_mask, cpu)[idx] &
294 ~sh->evtchn_mask[idx];
295}
296
297static void bind_evtchn_to_cpu(unsigned int chn, unsigned int cpu)
298{
299 int irq = evtchn_to_irq[chn];
300
301 BUG_ON(irq == -1);
302#ifdef CONFIG_SMP
303 cpumask_copy(irq_to_desc(irq)->irq_data.affinity, cpumask_of(cpu));
304#endif
305
306 clear_bit(chn, per_cpu(cpu_evtchn_mask, cpu_from_irq(irq)));
307 set_bit(chn, per_cpu(cpu_evtchn_mask, cpu));
308
309 info_for_irq(irq)->cpu = cpu;
310}
311
312static void init_evtchn_cpu_bindings(void)
313{
314 int i;
315#ifdef CONFIG_SMP
316 struct irq_info *info;
317
318 /* By default all event channels notify CPU#0. */
319 list_for_each_entry(info, &xen_irq_list_head, list) {
320 struct irq_desc *desc = irq_to_desc(info->irq);
321 cpumask_copy(desc->irq_data.affinity, cpumask_of(0));
322 }
323#endif
324
325 for_each_possible_cpu(i)
326 memset(per_cpu(cpu_evtchn_mask, i),
327 (i == 0) ? ~0 : 0, NR_EVENT_CHANNELS/8);
328}
329
330static inline void clear_evtchn(int port)
331{
332 struct shared_info *s = HYPERVISOR_shared_info;
333 sync_clear_bit(port, &s->evtchn_pending[0]);
334}
335
336static inline void set_evtchn(int port)
337{
338 struct shared_info *s = HYPERVISOR_shared_info;
339 sync_set_bit(port, &s->evtchn_pending[0]);
340}
341
342static inline int test_evtchn(int port)
343{
344 struct shared_info *s = HYPERVISOR_shared_info;
345 return sync_test_bit(port, &s->evtchn_pending[0]);
346}
347
348
349/**
350 * notify_remote_via_irq - send event to remote end of event channel via irq
351 * @irq: irq of event channel to send event to
352 *
353 * Unlike notify_remote_via_evtchn(), this is safe to use across
354 * save/restore. Notifications on a broken connection are silently
355 * dropped.
356 */
357void notify_remote_via_irq(int irq)
358{
359 int evtchn = evtchn_from_irq(irq);
360
361 if (VALID_EVTCHN(evtchn))
362 notify_remote_via_evtchn(evtchn);
363}
364EXPORT_SYMBOL_GPL(notify_remote_via_irq);
365
366static void mask_evtchn(int port)
367{
368 struct shared_info *s = HYPERVISOR_shared_info;
369 sync_set_bit(port, &s->evtchn_mask[0]);
370}
371
372static void unmask_evtchn(int port)
373{
374 struct shared_info *s = HYPERVISOR_shared_info;
375 unsigned int cpu = get_cpu();
376
377 BUG_ON(!irqs_disabled());
378
379 /* Slow path (hypercall) if this is a non-local port. */
380 if (unlikely(cpu != cpu_from_evtchn(port))) {
381 struct evtchn_unmask unmask = { .port = port };
382 (void)HYPERVISOR_event_channel_op(EVTCHNOP_unmask, &unmask);
383 } else {
384 struct vcpu_info *vcpu_info = __this_cpu_read(xen_vcpu);
385
386 sync_clear_bit(port, &s->evtchn_mask[0]);
387
388 /*
389 * The following is basically the equivalent of
390 * 'hw_resend_irq'. Just like a real IO-APIC we 'lose
391 * the interrupt edge' if the channel is masked.
392 */
393 if (sync_test_bit(port, &s->evtchn_pending[0]) &&
394 !sync_test_and_set_bit(port / BITS_PER_LONG,
395 &vcpu_info->evtchn_pending_sel))
396 vcpu_info->evtchn_upcall_pending = 1;
397 }
398
399 put_cpu();
400}
401
402static void xen_irq_init(unsigned irq)
403{
404 struct irq_info *info;
405#ifdef CONFIG_SMP
406 struct irq_desc *desc = irq_to_desc(irq);
407
408 /* By default all event channels notify CPU#0. */
409 cpumask_copy(desc->irq_data.affinity, cpumask_of(0));
410#endif
411
412 info = kzalloc(sizeof(*info), GFP_KERNEL);
413 if (info == NULL)
414 panic("Unable to allocate metadata for IRQ%d\n", irq);
415
416 info->type = IRQT_UNBOUND;
417 info->refcnt = -1;
418
419 irq_set_handler_data(irq, info);
420
421 list_add_tail(&info->list, &xen_irq_list_head);
422}
423
424static int __must_check xen_allocate_irq_dynamic(void)
425{
426 int first = 0;
427 int irq;
428
429#ifdef CONFIG_X86_IO_APIC
430 /*
431 * For an HVM guest or domain 0 which see "real" (emulated or
432 * actual respectively) GSIs we allocate dynamic IRQs
433 * e.g. those corresponding to event channels or MSIs
434 * etc. from the range above those "real" GSIs to avoid
435 * collisions.
436 */
437 if (xen_initial_domain() || xen_hvm_domain())
438 first = get_nr_irqs_gsi();
439#endif
440
441 irq = irq_alloc_desc_from(first, -1);
442
443 if (irq >= 0)
444 xen_irq_init(irq);
445
446 return irq;
447}
448
449static int __must_check xen_allocate_irq_gsi(unsigned gsi)
450{
451 int irq;
452
453 /*
454 * A PV guest has no concept of a GSI (since it has no ACPI
455 * nor access to/knowledge of the physical APICs). Therefore
456 * all IRQs are dynamically allocated from the entire IRQ
457 * space.
458 */
459 if (xen_pv_domain() && !xen_initial_domain())
460 return xen_allocate_irq_dynamic();
461
462 /* Legacy IRQ descriptors are already allocated by the arch. */
463 if (gsi < NR_IRQS_LEGACY)
464 irq = gsi;
465 else
466 irq = irq_alloc_desc_at(gsi, -1);
467
468 xen_irq_init(irq);
469
470 return irq;
471}
472
473static void xen_free_irq(unsigned irq)
474{
475 struct irq_info *info = irq_get_handler_data(irq);
476
477 list_del(&info->list);
478
479 irq_set_handler_data(irq, NULL);
480
481 WARN_ON(info->refcnt > 0);
482
483 kfree(info);
484
485 /* Legacy IRQ descriptors are managed by the arch. */
486 if (irq < NR_IRQS_LEGACY)
487 return;
488
489 irq_free_desc(irq);
490}
491
492static void pirq_query_unmask(int irq)
493{
494 struct physdev_irq_status_query irq_status;
495 struct irq_info *info = info_for_irq(irq);
496
497 BUG_ON(info->type != IRQT_PIRQ);
498
499 irq_status.irq = pirq_from_irq(irq);
500 if (HYPERVISOR_physdev_op(PHYSDEVOP_irq_status_query, &irq_status))
501 irq_status.flags = 0;
502
503 info->u.pirq.flags &= ~PIRQ_NEEDS_EOI;
504 if (irq_status.flags & XENIRQSTAT_needs_eoi)
505 info->u.pirq.flags |= PIRQ_NEEDS_EOI;
506}
507
508static bool probing_irq(int irq)
509{
510 struct irq_desc *desc = irq_to_desc(irq);
511
512 return desc && desc->action == NULL;
513}
514
515static void eoi_pirq(struct irq_data *data)
516{
517 int evtchn = evtchn_from_irq(data->irq);
518 struct physdev_eoi eoi = { .irq = pirq_from_irq(data->irq) };
519 int rc = 0;
520
521 irq_move_irq(data);
522
523 if (VALID_EVTCHN(evtchn))
524 clear_evtchn(evtchn);
525
526 if (pirq_needs_eoi(data->irq)) {
527 rc = HYPERVISOR_physdev_op(PHYSDEVOP_eoi, &eoi);
528 WARN_ON(rc);
529 }
530}
531
532static void mask_ack_pirq(struct irq_data *data)
533{
534 disable_dynirq(data);
535 eoi_pirq(data);
536}
537
538static unsigned int __startup_pirq(unsigned int irq)
539{
540 struct evtchn_bind_pirq bind_pirq;
541 struct irq_info *info = info_for_irq(irq);
542 int evtchn = evtchn_from_irq(irq);
543 int rc;
544
545 BUG_ON(info->type != IRQT_PIRQ);
546
547 if (VALID_EVTCHN(evtchn))
548 goto out;
549
550 bind_pirq.pirq = pirq_from_irq(irq);
551 /* NB. We are happy to share unless we are probing. */
552 bind_pirq.flags = info->u.pirq.flags & PIRQ_SHAREABLE ?
553 BIND_PIRQ__WILL_SHARE : 0;
554 rc = HYPERVISOR_event_channel_op(EVTCHNOP_bind_pirq, &bind_pirq);
555 if (rc != 0) {
556 if (!probing_irq(irq))
557 printk(KERN_INFO "Failed to obtain physical IRQ %d\n",
558 irq);
559 return 0;
560 }
561 evtchn = bind_pirq.port;
562
563 pirq_query_unmask(irq);
564
565 evtchn_to_irq[evtchn] = irq;
566 info->evtchn = evtchn;
567 bind_evtchn_to_cpu(evtchn, 0);
568
569out:
570 unmask_evtchn(evtchn);
571 eoi_pirq(irq_get_irq_data(irq));
572
573 return 0;
574}
575
576static unsigned int startup_pirq(struct irq_data *data)
577{
578 return __startup_pirq(data->irq);
579}
580
581static void shutdown_pirq(struct irq_data *data)
582{
583 struct evtchn_close close;
584 unsigned int irq = data->irq;
585 struct irq_info *info = info_for_irq(irq);
586 int evtchn = evtchn_from_irq(irq);
587
588 BUG_ON(info->type != IRQT_PIRQ);
589
590 if (!VALID_EVTCHN(evtchn))
591 return;
592
593 mask_evtchn(evtchn);
594
595 close.port = evtchn;
596 if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0)
597 BUG();
598
599 bind_evtchn_to_cpu(evtchn, 0);
600 evtchn_to_irq[evtchn] = -1;
601 info->evtchn = 0;
602}
603
604static void enable_pirq(struct irq_data *data)
605{
606 startup_pirq(data);
607}
608
609static void disable_pirq(struct irq_data *data)
610{
611 disable_dynirq(data);
612}
613
614int xen_irq_from_gsi(unsigned gsi)
615{
616 struct irq_info *info;
617
618 list_for_each_entry(info, &xen_irq_list_head, list) {
619 if (info->type != IRQT_PIRQ)
620 continue;
621
622 if (info->u.pirq.gsi == gsi)
623 return info->irq;
624 }
625
626 return -1;
627}
628EXPORT_SYMBOL_GPL(xen_irq_from_gsi);
629
630/*
631 * Do not make any assumptions regarding the relationship between the
632 * IRQ number returned here and the Xen pirq argument.
633 *
634 * Note: We don't assign an event channel until the irq actually started
635 * up. Return an existing irq if we've already got one for the gsi.
636 *
637 * Shareable implies level triggered, not shareable implies edge
638 * triggered here.
639 */
640int xen_bind_pirq_gsi_to_irq(unsigned gsi,
641 unsigned pirq, int shareable, char *name)
642{
643 int irq = -1;
644 struct physdev_irq irq_op;
645
646 mutex_lock(&irq_mapping_update_lock);
647
648 irq = xen_irq_from_gsi(gsi);
649 if (irq != -1) {
650 printk(KERN_INFO "xen_map_pirq_gsi: returning irq %d for gsi %u\n",
651 irq, gsi);
652 goto out;
653 }
654
655 irq = xen_allocate_irq_gsi(gsi);
656 if (irq < 0)
657 goto out;
658
659 irq_op.irq = irq;
660 irq_op.vector = 0;
661
662 /* Only the privileged domain can do this. For non-priv, the pcifront
663 * driver provides a PCI bus that does the call to do exactly
664 * this in the priv domain. */
665 if (xen_initial_domain() &&
666 HYPERVISOR_physdev_op(PHYSDEVOP_alloc_irq_vector, &irq_op)) {
667 xen_free_irq(irq);
668 irq = -ENOSPC;
669 goto out;
670 }
671
672 xen_irq_info_pirq_init(irq, 0, pirq, gsi, irq_op.vector, DOMID_SELF,
673 shareable ? PIRQ_SHAREABLE : 0);
674
675 pirq_query_unmask(irq);
676 /* We try to use the handler with the appropriate semantic for the
677 * type of interrupt: if the interrupt is an edge triggered
678 * interrupt we use handle_edge_irq.
679 *
680 * On the other hand if the interrupt is level triggered we use
681 * handle_fasteoi_irq like the native code does for this kind of
682 * interrupts.
683 *
684 * Depending on the Xen version, pirq_needs_eoi might return true
685 * not only for level triggered interrupts but for edge triggered
686 * interrupts too. In any case Xen always honors the eoi mechanism,
687 * not injecting any more pirqs of the same kind if the first one
688 * hasn't received an eoi yet. Therefore using the fasteoi handler
689 * is the right choice either way.
690 */
691 if (shareable)
692 irq_set_chip_and_handler_name(irq, &xen_pirq_chip,
693 handle_fasteoi_irq, name);
694 else
695 irq_set_chip_and_handler_name(irq, &xen_pirq_chip,
696 handle_edge_irq, name);
697
698out:
699 mutex_unlock(&irq_mapping_update_lock);
700
701 return irq;
702}
703
704#ifdef CONFIG_PCI_MSI
705int xen_allocate_pirq_msi(struct pci_dev *dev, struct msi_desc *msidesc)
706{
707 int rc;
708 struct physdev_get_free_pirq op_get_free_pirq;
709
710 op_get_free_pirq.type = MAP_PIRQ_TYPE_MSI;
711 rc = HYPERVISOR_physdev_op(PHYSDEVOP_get_free_pirq, &op_get_free_pirq);
712
713 WARN_ONCE(rc == -ENOSYS,
714 "hypervisor does not support the PHYSDEVOP_get_free_pirq interface\n");
715
716 return rc ? -1 : op_get_free_pirq.pirq;
717}
718
719int xen_bind_pirq_msi_to_irq(struct pci_dev *dev, struct msi_desc *msidesc,
720 int pirq, int vector, const char *name,
721 domid_t domid)
722{
723 int irq, ret;
724
725 mutex_lock(&irq_mapping_update_lock);
726
727 irq = xen_allocate_irq_dynamic();
728 if (irq < 0)
729 goto out;
730
731 irq_set_chip_and_handler_name(irq, &xen_pirq_chip, handle_edge_irq,
732 name);
733
734 xen_irq_info_pirq_init(irq, 0, pirq, 0, vector, domid, 0);
735 ret = irq_set_msi_desc(irq, msidesc);
736 if (ret < 0)
737 goto error_irq;
738out:
739 mutex_unlock(&irq_mapping_update_lock);
740 return irq;
741error_irq:
742 mutex_unlock(&irq_mapping_update_lock);
743 xen_free_irq(irq);
744 return ret;
745}
746#endif
747
748int xen_destroy_irq(int irq)
749{
750 struct irq_desc *desc;
751 struct physdev_unmap_pirq unmap_irq;
752 struct irq_info *info = info_for_irq(irq);
753 int rc = -ENOENT;
754
755 mutex_lock(&irq_mapping_update_lock);
756
757 desc = irq_to_desc(irq);
758 if (!desc)
759 goto out;
760
761 if (xen_initial_domain()) {
762 unmap_irq.pirq = info->u.pirq.pirq;
763 unmap_irq.domid = info->u.pirq.domid;
764 rc = HYPERVISOR_physdev_op(PHYSDEVOP_unmap_pirq, &unmap_irq);
765 /* If another domain quits without making the pci_disable_msix
766 * call, the Xen hypervisor takes care of freeing the PIRQs
767 * (free_domain_pirqs).
768 */
769 if ((rc == -ESRCH && info->u.pirq.domid != DOMID_SELF))
770 printk(KERN_INFO "domain %d does not have %d anymore\n",
771 info->u.pirq.domid, info->u.pirq.pirq);
772 else if (rc) {
773 printk(KERN_WARNING "unmap irq failed %d\n", rc);
774 goto out;
775 }
776 }
777
778 xen_free_irq(irq);
779
780out:
781 mutex_unlock(&irq_mapping_update_lock);
782 return rc;
783}
784
785int xen_irq_from_pirq(unsigned pirq)
786{
787 int irq;
788
789 struct irq_info *info;
790
791 mutex_lock(&irq_mapping_update_lock);
792
793 list_for_each_entry(info, &xen_irq_list_head, list) {
794 if (info->type != IRQT_PIRQ)
795 continue;
796 irq = info->irq;
797 if (info->u.pirq.pirq == pirq)
798 goto out;
799 }
800 irq = -1;
801out:
802 mutex_unlock(&irq_mapping_update_lock);
803
804 return irq;
805}
806
807
808int xen_pirq_from_irq(unsigned irq)
809{
810 return pirq_from_irq(irq);
811}
812EXPORT_SYMBOL_GPL(xen_pirq_from_irq);
813int bind_evtchn_to_irq(unsigned int evtchn)
814{
815 int irq;
816
817 mutex_lock(&irq_mapping_update_lock);
818
819 irq = evtchn_to_irq[evtchn];
820
821 if (irq == -1) {
822 irq = xen_allocate_irq_dynamic();
823 if (irq == -1)
824 goto out;
825
826 irq_set_chip_and_handler_name(irq, &xen_dynamic_chip,
827 handle_edge_irq, "event");
828
829 xen_irq_info_evtchn_init(irq, evtchn);
830 }
831
832out:
833 mutex_unlock(&irq_mapping_update_lock);
834
835 return irq;
836}
837EXPORT_SYMBOL_GPL(bind_evtchn_to_irq);
838
839static int bind_ipi_to_irq(unsigned int ipi, unsigned int cpu)
840{
841 struct evtchn_bind_ipi bind_ipi;
842 int evtchn, irq;
843
844 mutex_lock(&irq_mapping_update_lock);
845
846 irq = per_cpu(ipi_to_irq, cpu)[ipi];
847
848 if (irq == -1) {
849 irq = xen_allocate_irq_dynamic();
850 if (irq < 0)
851 goto out;
852
853 irq_set_chip_and_handler_name(irq, &xen_percpu_chip,
854 handle_percpu_irq, "ipi");
855
856 bind_ipi.vcpu = cpu;
857 if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
858 &bind_ipi) != 0)
859 BUG();
860 evtchn = bind_ipi.port;
861
862 xen_irq_info_ipi_init(cpu, irq, evtchn, ipi);
863
864 bind_evtchn_to_cpu(evtchn, cpu);
865 }
866
867 out:
868 mutex_unlock(&irq_mapping_update_lock);
869 return irq;
870}
871
872static int bind_interdomain_evtchn_to_irq(unsigned int remote_domain,
873 unsigned int remote_port)
874{
875 struct evtchn_bind_interdomain bind_interdomain;
876 int err;
877
878 bind_interdomain.remote_dom = remote_domain;
879 bind_interdomain.remote_port = remote_port;
880
881 err = HYPERVISOR_event_channel_op(EVTCHNOP_bind_interdomain,
882 &bind_interdomain);
883
884 return err ? : bind_evtchn_to_irq(bind_interdomain.local_port);
885}
886
887static int find_virq(unsigned int virq, unsigned int cpu)
888{
889 struct evtchn_status status;
890 int port, rc = -ENOENT;
891
892 memset(&status, 0, sizeof(status));
893 for (port = 0; port <= NR_EVENT_CHANNELS; port++) {
894 status.dom = DOMID_SELF;
895 status.port = port;
896 rc = HYPERVISOR_event_channel_op(EVTCHNOP_status, &status);
897 if (rc < 0)
898 continue;
899 if (status.status != EVTCHNSTAT_virq)
900 continue;
901 if (status.u.virq == virq && status.vcpu == cpu) {
902 rc = port;
903 break;
904 }
905 }
906 return rc;
907}
908
909int bind_virq_to_irq(unsigned int virq, unsigned int cpu, bool percpu)
910{
911 struct evtchn_bind_virq bind_virq;
912 int evtchn, irq, ret;
913
914 mutex_lock(&irq_mapping_update_lock);
915
916 irq = per_cpu(virq_to_irq, cpu)[virq];
917
918 if (irq == -1) {
919 irq = xen_allocate_irq_dynamic();
920 if (irq == -1)
921 goto out;
922
923 if (percpu)
924 irq_set_chip_and_handler_name(irq, &xen_percpu_chip,
925 handle_percpu_irq, "virq");
926 else
927 irq_set_chip_and_handler_name(irq, &xen_dynamic_chip,
928 handle_edge_irq, "virq");
929
930 bind_virq.virq = virq;
931 bind_virq.vcpu = cpu;
932 ret = HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
933 &bind_virq);
934 if (ret == 0)
935 evtchn = bind_virq.port;
936 else {
937 if (ret == -EEXIST)
938 ret = find_virq(virq, cpu);
939 BUG_ON(ret < 0);
940 evtchn = ret;
941 }
942
943 xen_irq_info_virq_init(cpu, irq, evtchn, virq);
944
945 bind_evtchn_to_cpu(evtchn, cpu);
946 }
947
948out:
949 mutex_unlock(&irq_mapping_update_lock);
950
951 return irq;
952}
953
954static void unbind_from_irq(unsigned int irq)
955{
956 struct evtchn_close close;
957 int evtchn = evtchn_from_irq(irq);
958 struct irq_info *info = irq_get_handler_data(irq);
959
960 mutex_lock(&irq_mapping_update_lock);
961
962 if (info->refcnt > 0) {
963 info->refcnt--;
964 if (info->refcnt != 0)
965 goto done;
966 }
967
968 if (VALID_EVTCHN(evtchn)) {
969 close.port = evtchn;
970 if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0)
971 BUG();
972
973 switch (type_from_irq(irq)) {
974 case IRQT_VIRQ:
975 per_cpu(virq_to_irq, cpu_from_evtchn(evtchn))
976 [virq_from_irq(irq)] = -1;
977 break;
978 case IRQT_IPI:
979 per_cpu(ipi_to_irq, cpu_from_evtchn(evtchn))
980 [ipi_from_irq(irq)] = -1;
981 break;
982 default:
983 break;
984 }
985
986 /* Closed ports are implicitly re-bound to VCPU0. */
987 bind_evtchn_to_cpu(evtchn, 0);
988
989 evtchn_to_irq[evtchn] = -1;
990 }
991
992 BUG_ON(info_for_irq(irq)->type == IRQT_UNBOUND);
993
994 xen_free_irq(irq);
995
996 done:
997 mutex_unlock(&irq_mapping_update_lock);
998}
999
1000int bind_evtchn_to_irqhandler(unsigned int evtchn,
1001 irq_handler_t handler,
1002 unsigned long irqflags,
1003 const char *devname, void *dev_id)
1004{
1005 int irq, retval;
1006
1007 irq = bind_evtchn_to_irq(evtchn);
1008 if (irq < 0)
1009 return irq;
1010 retval = request_irq(irq, handler, irqflags, devname, dev_id);
1011 if (retval != 0) {
1012 unbind_from_irq(irq);
1013 return retval;
1014 }
1015
1016 return irq;
1017}
1018EXPORT_SYMBOL_GPL(bind_evtchn_to_irqhandler);
1019
1020int bind_interdomain_evtchn_to_irqhandler(unsigned int remote_domain,
1021 unsigned int remote_port,
1022 irq_handler_t handler,
1023 unsigned long irqflags,
1024 const char *devname,
1025 void *dev_id)
1026{
1027 int irq, retval;
1028
1029 irq = bind_interdomain_evtchn_to_irq(remote_domain, remote_port);
1030 if (irq < 0)
1031 return irq;
1032
1033 retval = request_irq(irq, handler, irqflags, devname, dev_id);
1034 if (retval != 0) {
1035 unbind_from_irq(irq);
1036 return retval;
1037 }
1038
1039 return irq;
1040}
1041EXPORT_SYMBOL_GPL(bind_interdomain_evtchn_to_irqhandler);
1042
1043int bind_virq_to_irqhandler(unsigned int virq, unsigned int cpu,
1044 irq_handler_t handler,
1045 unsigned long irqflags, const char *devname, void *dev_id)
1046{
1047 int irq, retval;
1048
1049 irq = bind_virq_to_irq(virq, cpu, irqflags & IRQF_PERCPU);
1050 if (irq < 0)
1051 return irq;
1052 retval = request_irq(irq, handler, irqflags, devname, dev_id);
1053 if (retval != 0) {
1054 unbind_from_irq(irq);
1055 return retval;
1056 }
1057
1058 return irq;
1059}
1060EXPORT_SYMBOL_GPL(bind_virq_to_irqhandler);
1061
1062int bind_ipi_to_irqhandler(enum ipi_vector ipi,
1063 unsigned int cpu,
1064 irq_handler_t handler,
1065 unsigned long irqflags,
1066 const char *devname,
1067 void *dev_id)
1068{
1069 int irq, retval;
1070
1071 irq = bind_ipi_to_irq(ipi, cpu);
1072 if (irq < 0)
1073 return irq;
1074
1075 irqflags |= IRQF_NO_SUSPEND | IRQF_FORCE_RESUME | IRQF_EARLY_RESUME;
1076 retval = request_irq(irq, handler, irqflags, devname, dev_id);
1077 if (retval != 0) {
1078 unbind_from_irq(irq);
1079 return retval;
1080 }
1081
1082 return irq;
1083}
1084
1085void unbind_from_irqhandler(unsigned int irq, void *dev_id)
1086{
1087 free_irq(irq, dev_id);
1088 unbind_from_irq(irq);
1089}
1090EXPORT_SYMBOL_GPL(unbind_from_irqhandler);
1091
1092int evtchn_make_refcounted(unsigned int evtchn)
1093{
1094 int irq = evtchn_to_irq[evtchn];
1095 struct irq_info *info;
1096
1097 if (irq == -1)
1098 return -ENOENT;
1099
1100 info = irq_get_handler_data(irq);
1101
1102 if (!info)
1103 return -ENOENT;
1104
1105 WARN_ON(info->refcnt != -1);
1106
1107 info->refcnt = 1;
1108
1109 return 0;
1110}
1111EXPORT_SYMBOL_GPL(evtchn_make_refcounted);
1112
1113int evtchn_get(unsigned int evtchn)
1114{
1115 int irq;
1116 struct irq_info *info;
1117 int err = -ENOENT;
1118
1119 if (evtchn >= NR_EVENT_CHANNELS)
1120 return -EINVAL;
1121
1122 mutex_lock(&irq_mapping_update_lock);
1123
1124 irq = evtchn_to_irq[evtchn];
1125 if (irq == -1)
1126 goto done;
1127
1128 info = irq_get_handler_data(irq);
1129
1130 if (!info)
1131 goto done;
1132
1133 err = -EINVAL;
1134 if (info->refcnt <= 0)
1135 goto done;
1136
1137 info->refcnt++;
1138 err = 0;
1139 done:
1140 mutex_unlock(&irq_mapping_update_lock);
1141
1142 return err;
1143}
1144EXPORT_SYMBOL_GPL(evtchn_get);
1145
1146void evtchn_put(unsigned int evtchn)
1147{
1148 int irq = evtchn_to_irq[evtchn];
1149 if (WARN_ON(irq == -1))
1150 return;
1151 unbind_from_irq(irq);
1152}
1153EXPORT_SYMBOL_GPL(evtchn_put);
1154
1155void xen_send_IPI_one(unsigned int cpu, enum ipi_vector vector)
1156{
1157 int irq = per_cpu(ipi_to_irq, cpu)[vector];
1158 BUG_ON(irq < 0);
1159 notify_remote_via_irq(irq);
1160}
1161
1162irqreturn_t xen_debug_interrupt(int irq, void *dev_id)
1163{
1164 struct shared_info *sh = HYPERVISOR_shared_info;
1165 int cpu = smp_processor_id();
1166 unsigned long *cpu_evtchn = per_cpu(cpu_evtchn_mask, cpu);
1167 int i;
1168 unsigned long flags;
1169 static DEFINE_SPINLOCK(debug_lock);
1170 struct vcpu_info *v;
1171
1172 spin_lock_irqsave(&debug_lock, flags);
1173
1174 printk("\nvcpu %d\n ", cpu);
1175
1176 for_each_online_cpu(i) {
1177 int pending;
1178 v = per_cpu(xen_vcpu, i);
1179 pending = (get_irq_regs() && i == cpu)
1180 ? xen_irqs_disabled(get_irq_regs())
1181 : v->evtchn_upcall_mask;
1182 printk("%d: masked=%d pending=%d event_sel %0*lx\n ", i,
1183 pending, v->evtchn_upcall_pending,
1184 (int)(sizeof(v->evtchn_pending_sel)*2),
1185 v->evtchn_pending_sel);
1186 }
1187 v = per_cpu(xen_vcpu, cpu);
1188
1189 printk("\npending:\n ");
1190 for (i = ARRAY_SIZE(sh->evtchn_pending)-1; i >= 0; i--)
1191 printk("%0*lx%s", (int)sizeof(sh->evtchn_pending[0])*2,
1192 sh->evtchn_pending[i],
1193 i % 8 == 0 ? "\n " : " ");
1194 printk("\nglobal mask:\n ");
1195 for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
1196 printk("%0*lx%s",
1197 (int)(sizeof(sh->evtchn_mask[0])*2),
1198 sh->evtchn_mask[i],
1199 i % 8 == 0 ? "\n " : " ");
1200
1201 printk("\nglobally unmasked:\n ");
1202 for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
1203 printk("%0*lx%s", (int)(sizeof(sh->evtchn_mask[0])*2),
1204 sh->evtchn_pending[i] & ~sh->evtchn_mask[i],
1205 i % 8 == 0 ? "\n " : " ");
1206
1207 printk("\nlocal cpu%d mask:\n ", cpu);
1208 for (i = (NR_EVENT_CHANNELS/BITS_PER_LONG)-1; i >= 0; i--)
1209 printk("%0*lx%s", (int)(sizeof(cpu_evtchn[0])*2),
1210 cpu_evtchn[i],
1211 i % 8 == 0 ? "\n " : " ");
1212
1213 printk("\nlocally unmasked:\n ");
1214 for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--) {
1215 unsigned long pending = sh->evtchn_pending[i]
1216 & ~sh->evtchn_mask[i]
1217 & cpu_evtchn[i];
1218 printk("%0*lx%s", (int)(sizeof(sh->evtchn_mask[0])*2),
1219 pending, i % 8 == 0 ? "\n " : " ");
1220 }
1221
1222 printk("\npending list:\n");
1223 for (i = 0; i < NR_EVENT_CHANNELS; i++) {
1224 if (sync_test_bit(i, sh->evtchn_pending)) {
1225 int word_idx = i / BITS_PER_LONG;
1226 printk(" %d: event %d -> irq %d%s%s%s\n",
1227 cpu_from_evtchn(i), i,
1228 evtchn_to_irq[i],
1229 sync_test_bit(word_idx, &v->evtchn_pending_sel)
1230 ? "" : " l2-clear",
1231 !sync_test_bit(i, sh->evtchn_mask)
1232 ? "" : " globally-masked",
1233 sync_test_bit(i, cpu_evtchn)
1234 ? "" : " locally-masked");
1235 }
1236 }
1237
1238 spin_unlock_irqrestore(&debug_lock, flags);
1239
1240 return IRQ_HANDLED;
1241}
1242
1243static DEFINE_PER_CPU(unsigned, xed_nesting_count);
1244static DEFINE_PER_CPU(unsigned int, current_word_idx);
1245static DEFINE_PER_CPU(unsigned int, current_bit_idx);
1246
1247/*
1248 * Mask out the i least significant bits of w
1249 */
1250#define MASK_LSBS(w, i) (w & ((~0UL) << i))
1251
1252/*
1253 * Search the CPUs pending events bitmasks. For each one found, map
1254 * the event number to an irq, and feed it into do_IRQ() for
1255 * handling.
1256 *
1257 * Xen uses a two-level bitmap to speed searching. The first level is
1258 * a bitset of words which contain pending event bits. The second
1259 * level is a bitset of pending events themselves.
1260 */
1261static void __xen_evtchn_do_upcall(void)
1262{
1263 int start_word_idx, start_bit_idx;
1264 int word_idx, bit_idx;
1265 int i, irq;
1266 int cpu = get_cpu();
1267 struct shared_info *s = HYPERVISOR_shared_info;
1268 struct vcpu_info *vcpu_info = __this_cpu_read(xen_vcpu);
1269 unsigned count;
1270
1271 do {
1272 unsigned long pending_words;
1273 unsigned long pending_bits;
1274 struct irq_desc *desc;
1275
1276 vcpu_info->evtchn_upcall_pending = 0;
1277
1278 if (__this_cpu_inc_return(xed_nesting_count) - 1)
1279 goto out;
1280
1281#ifndef CONFIG_X86 /* No need for a barrier -- XCHG is a barrier on x86. */
1282 /* Clear master flag /before/ clearing selector flag. */
1283 wmb();
1284#endif
1285 if ((irq = per_cpu(virq_to_irq, cpu)[VIRQ_TIMER]) != -1) {
1286 int evtchn = evtchn_from_irq(irq);
1287 word_idx = evtchn / BITS_PER_LONG;
1288 pending_bits = evtchn % BITS_PER_LONG;
1289 if (active_evtchns(cpu, s, word_idx) & (1ULL << pending_bits)) {
1290 desc = irq_to_desc(irq);
1291 if (desc)
1292 generic_handle_irq_desc(irq, desc);
1293 }
1294 }
1295
1296 pending_words = xchg(&vcpu_info->evtchn_pending_sel, 0);
1297
1298 start_word_idx = __this_cpu_read(current_word_idx);
1299 start_bit_idx = __this_cpu_read(current_bit_idx);
1300
1301 word_idx = start_word_idx;
1302
1303 for (i = 0; pending_words != 0; i++) {
1304 unsigned long words;
1305
1306 words = MASK_LSBS(pending_words, word_idx);
1307
1308 /*
1309 * If we masked out all events, wrap to beginning.
1310 */
1311 if (words == 0) {
1312 word_idx = 0;
1313 bit_idx = 0;
1314 continue;
1315 }
1316 word_idx = __ffs(words);
1317
1318 pending_bits = active_evtchns(cpu, s, word_idx);
1319 bit_idx = 0; /* usually scan entire word from start */
1320 if (word_idx == start_word_idx) {
1321 /* We scan the starting word in two parts */
1322 if (i == 0)
1323 /* 1st time: start in the middle */
1324 bit_idx = start_bit_idx;
1325 else
1326 /* 2nd time: mask bits done already */
1327 bit_idx &= (1UL << start_bit_idx) - 1;
1328 }
1329
1330 do {
1331 unsigned long bits;
1332 int port;
1333
1334 bits = MASK_LSBS(pending_bits, bit_idx);
1335
1336 /* If we masked out all events, move on. */
1337 if (bits == 0)
1338 break;
1339
1340 bit_idx = __ffs(bits);
1341
1342 /* Process port. */
1343 port = (word_idx * BITS_PER_LONG) + bit_idx;
1344 irq = evtchn_to_irq[port];
1345
1346 if (irq != -1) {
1347 desc = irq_to_desc(irq);
1348 if (desc)
1349 generic_handle_irq_desc(irq, desc);
1350 }
1351
1352 bit_idx = (bit_idx + 1) % BITS_PER_LONG;
1353
1354 /* Next caller starts at last processed + 1 */
1355 __this_cpu_write(current_word_idx,
1356 bit_idx ? word_idx :
1357 (word_idx+1) % BITS_PER_LONG);
1358 __this_cpu_write(current_bit_idx, bit_idx);
1359 } while (bit_idx != 0);
1360
1361 /* Scan start_l1i twice; all others once. */
1362 if ((word_idx != start_word_idx) || (i != 0))
1363 pending_words &= ~(1UL << word_idx);
1364
1365 word_idx = (word_idx + 1) % BITS_PER_LONG;
1366 }
1367
1368 BUG_ON(!irqs_disabled());
1369
1370 count = __this_cpu_read(xed_nesting_count);
1371 __this_cpu_write(xed_nesting_count, 0);
1372 } while (count != 1 || vcpu_info->evtchn_upcall_pending);
1373
1374out:
1375
1376 put_cpu();
1377}
1378
1379void xen_evtchn_do_upcall(struct pt_regs *regs)
1380{
1381 struct pt_regs *old_regs = set_irq_regs(regs);
1382
1383 irq_enter();
1384 exit_idle();
1385
1386 __xen_evtchn_do_upcall();
1387
1388 irq_exit();
1389 set_irq_regs(old_regs);
1390}
1391
1392void xen_hvm_evtchn_do_upcall(void)
1393{
1394 __xen_evtchn_do_upcall();
1395}
1396EXPORT_SYMBOL_GPL(xen_hvm_evtchn_do_upcall);
1397
1398/* Rebind a new event channel to an existing irq. */
1399void rebind_evtchn_irq(int evtchn, int irq)
1400{
1401 struct irq_info *info = info_for_irq(irq);
1402
1403 /* Make sure the irq is masked, since the new event channel
1404 will also be masked. */
1405 disable_irq(irq);
1406
1407 mutex_lock(&irq_mapping_update_lock);
1408
1409 /* After resume the irq<->evtchn mappings are all cleared out */
1410 BUG_ON(evtchn_to_irq[evtchn] != -1);
1411 /* Expect irq to have been bound before,
1412 so there should be a proper type */
1413 BUG_ON(info->type == IRQT_UNBOUND);
1414
1415 xen_irq_info_evtchn_init(irq, evtchn);
1416
1417 mutex_unlock(&irq_mapping_update_lock);
1418
1419 /* new event channels are always bound to cpu 0 */
1420 irq_set_affinity(irq, cpumask_of(0));
1421
1422 /* Unmask the event channel. */
1423 enable_irq(irq);
1424}
1425
1426/* Rebind an evtchn so that it gets delivered to a specific cpu */
1427static int rebind_irq_to_cpu(unsigned irq, unsigned tcpu)
1428{
1429 struct shared_info *s = HYPERVISOR_shared_info;
1430 struct evtchn_bind_vcpu bind_vcpu;
1431 int evtchn = evtchn_from_irq(irq);
1432 int masked;
1433
1434 if (!VALID_EVTCHN(evtchn))
1435 return -1;
1436
1437 /*
1438 * Events delivered via platform PCI interrupts are always
1439 * routed to vcpu 0 and hence cannot be rebound.
1440 */
1441 if (xen_hvm_domain() && !xen_have_vector_callback)
1442 return -1;
1443
1444 /* Send future instances of this interrupt to other vcpu. */
1445 bind_vcpu.port = evtchn;
1446 bind_vcpu.vcpu = tcpu;
1447
1448 /*
1449 * Mask the event while changing the VCPU binding to prevent
1450 * it being delivered on an unexpected VCPU.
1451 */
1452 masked = sync_test_and_set_bit(evtchn, s->evtchn_mask);
1453
1454 /*
1455 * If this fails, it usually just indicates that we're dealing with a
1456 * virq or IPI channel, which don't actually need to be rebound. Ignore
1457 * it, but don't do the xenlinux-level rebind in that case.
1458 */
1459 if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_vcpu, &bind_vcpu) >= 0)
1460 bind_evtchn_to_cpu(evtchn, tcpu);
1461
1462 if (!masked)
1463 unmask_evtchn(evtchn);
1464
1465 return 0;
1466}
1467
1468static int set_affinity_irq(struct irq_data *data, const struct cpumask *dest,
1469 bool force)
1470{
1471 unsigned tcpu = cpumask_first(dest);
1472
1473 return rebind_irq_to_cpu(data->irq, tcpu);
1474}
1475
1476int resend_irq_on_evtchn(unsigned int irq)
1477{
1478 int masked, evtchn = evtchn_from_irq(irq);
1479 struct shared_info *s = HYPERVISOR_shared_info;
1480
1481 if (!VALID_EVTCHN(evtchn))
1482 return 1;
1483
1484 masked = sync_test_and_set_bit(evtchn, s->evtchn_mask);
1485 sync_set_bit(evtchn, s->evtchn_pending);
1486 if (!masked)
1487 unmask_evtchn(evtchn);
1488
1489 return 1;
1490}
1491
1492static void enable_dynirq(struct irq_data *data)
1493{
1494 int evtchn = evtchn_from_irq(data->irq);
1495
1496 if (VALID_EVTCHN(evtchn))
1497 unmask_evtchn(evtchn);
1498}
1499
1500static void disable_dynirq(struct irq_data *data)
1501{
1502 int evtchn = evtchn_from_irq(data->irq);
1503
1504 if (VALID_EVTCHN(evtchn))
1505 mask_evtchn(evtchn);
1506}
1507
1508static void ack_dynirq(struct irq_data *data)
1509{
1510 int evtchn = evtchn_from_irq(data->irq);
1511
1512 irq_move_irq(data);
1513
1514 if (VALID_EVTCHN(evtchn))
1515 clear_evtchn(evtchn);
1516}
1517
1518static void mask_ack_dynirq(struct irq_data *data)
1519{
1520 disable_dynirq(data);
1521 ack_dynirq(data);
1522}
1523
1524static int retrigger_dynirq(struct irq_data *data)
1525{
1526 int evtchn = evtchn_from_irq(data->irq);
1527 struct shared_info *sh = HYPERVISOR_shared_info;
1528 int ret = 0;
1529
1530 if (VALID_EVTCHN(evtchn)) {
1531 int masked;
1532
1533 masked = sync_test_and_set_bit(evtchn, sh->evtchn_mask);
1534 sync_set_bit(evtchn, sh->evtchn_pending);
1535 if (!masked)
1536 unmask_evtchn(evtchn);
1537 ret = 1;
1538 }
1539
1540 return ret;
1541}
1542
1543static void restore_pirqs(void)
1544{
1545 int pirq, rc, irq, gsi;
1546 struct physdev_map_pirq map_irq;
1547 struct irq_info *info;
1548
1549 list_for_each_entry(info, &xen_irq_list_head, list) {
1550 if (info->type != IRQT_PIRQ)
1551 continue;
1552
1553 pirq = info->u.pirq.pirq;
1554 gsi = info->u.pirq.gsi;
1555 irq = info->irq;
1556
1557 /* save/restore of PT devices doesn't work, so at this point the
1558 * only devices present are GSI based emulated devices */
1559 if (!gsi)
1560 continue;
1561
1562 map_irq.domid = DOMID_SELF;
1563 map_irq.type = MAP_PIRQ_TYPE_GSI;
1564 map_irq.index = gsi;
1565 map_irq.pirq = pirq;
1566
1567 rc = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq, &map_irq);
1568 if (rc) {
1569 printk(KERN_WARNING "xen map irq failed gsi=%d irq=%d pirq=%d rc=%d\n",
1570 gsi, irq, pirq, rc);
1571 xen_free_irq(irq);
1572 continue;
1573 }
1574
1575 printk(KERN_DEBUG "xen: --> irq=%d, pirq=%d\n", irq, map_irq.pirq);
1576
1577 __startup_pirq(irq);
1578 }
1579}
1580
1581static void restore_cpu_virqs(unsigned int cpu)
1582{
1583 struct evtchn_bind_virq bind_virq;
1584 int virq, irq, evtchn;
1585
1586 for (virq = 0; virq < NR_VIRQS; virq++) {
1587 if ((irq = per_cpu(virq_to_irq, cpu)[virq]) == -1)
1588 continue;
1589
1590 BUG_ON(virq_from_irq(irq) != virq);
1591
1592 /* Get a new binding from Xen. */
1593 bind_virq.virq = virq;
1594 bind_virq.vcpu = cpu;
1595 if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
1596 &bind_virq) != 0)
1597 BUG();
1598 evtchn = bind_virq.port;
1599
1600 /* Record the new mapping. */
1601 xen_irq_info_virq_init(cpu, irq, evtchn, virq);
1602 bind_evtchn_to_cpu(evtchn, cpu);
1603 }
1604}
1605
1606static void restore_cpu_ipis(unsigned int cpu)
1607{
1608 struct evtchn_bind_ipi bind_ipi;
1609 int ipi, irq, evtchn;
1610
1611 for (ipi = 0; ipi < XEN_NR_IPIS; ipi++) {
1612 if ((irq = per_cpu(ipi_to_irq, cpu)[ipi]) == -1)
1613 continue;
1614
1615 BUG_ON(ipi_from_irq(irq) != ipi);
1616
1617 /* Get a new binding from Xen. */
1618 bind_ipi.vcpu = cpu;
1619 if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
1620 &bind_ipi) != 0)
1621 BUG();
1622 evtchn = bind_ipi.port;
1623
1624 /* Record the new mapping. */
1625 xen_irq_info_ipi_init(cpu, irq, evtchn, ipi);
1626 bind_evtchn_to_cpu(evtchn, cpu);
1627 }
1628}
1629
1630/* Clear an irq's pending state, in preparation for polling on it */
1631void xen_clear_irq_pending(int irq)
1632{
1633 int evtchn = evtchn_from_irq(irq);
1634
1635 if (VALID_EVTCHN(evtchn))
1636 clear_evtchn(evtchn);
1637}
1638EXPORT_SYMBOL(xen_clear_irq_pending);
1639void xen_set_irq_pending(int irq)
1640{
1641 int evtchn = evtchn_from_irq(irq);
1642
1643 if (VALID_EVTCHN(evtchn))
1644 set_evtchn(evtchn);
1645}
1646
1647bool xen_test_irq_pending(int irq)
1648{
1649 int evtchn = evtchn_from_irq(irq);
1650 bool ret = false;
1651
1652 if (VALID_EVTCHN(evtchn))
1653 ret = test_evtchn(evtchn);
1654
1655 return ret;
1656}
1657
1658/* Poll waiting for an irq to become pending with timeout. In the usual case,
1659 * the irq will be disabled so it won't deliver an interrupt. */
1660void xen_poll_irq_timeout(int irq, u64 timeout)
1661{
1662 evtchn_port_t evtchn = evtchn_from_irq(irq);
1663
1664 if (VALID_EVTCHN(evtchn)) {
1665 struct sched_poll poll;
1666
1667 poll.nr_ports = 1;
1668 poll.timeout = timeout;
1669 set_xen_guest_handle(poll.ports, &evtchn);
1670
1671 if (HYPERVISOR_sched_op(SCHEDOP_poll, &poll) != 0)
1672 BUG();
1673 }
1674}
1675EXPORT_SYMBOL(xen_poll_irq_timeout);
1676/* Poll waiting for an irq to become pending. In the usual case, the
1677 * irq will be disabled so it won't deliver an interrupt. */
1678void xen_poll_irq(int irq)
1679{
1680 xen_poll_irq_timeout(irq, 0 /* no timeout */);
1681}
1682
1683/* Check whether the IRQ line is shared with other guests. */
1684int xen_test_irq_shared(int irq)
1685{
1686 struct irq_info *info = info_for_irq(irq);
1687 struct physdev_irq_status_query irq_status = { .irq = info->u.pirq.pirq };
1688
1689 if (HYPERVISOR_physdev_op(PHYSDEVOP_irq_status_query, &irq_status))
1690 return 0;
1691 return !(irq_status.flags & XENIRQSTAT_shared);
1692}
1693EXPORT_SYMBOL_GPL(xen_test_irq_shared);
1694
1695void xen_irq_resume(void)
1696{
1697 unsigned int cpu, evtchn;
1698 struct irq_info *info;
1699
1700 init_evtchn_cpu_bindings();
1701
1702 /* New event-channel space is not 'live' yet. */
1703 for (evtchn = 0; evtchn < NR_EVENT_CHANNELS; evtchn++)
1704 mask_evtchn(evtchn);
1705
1706 /* No IRQ <-> event-channel mappings. */
1707 list_for_each_entry(info, &xen_irq_list_head, list)
1708 info->evtchn = 0; /* zap event-channel binding */
1709
1710 for (evtchn = 0; evtchn < NR_EVENT_CHANNELS; evtchn++)
1711 evtchn_to_irq[evtchn] = -1;
1712
1713 for_each_possible_cpu(cpu) {
1714 restore_cpu_virqs(cpu);
1715 restore_cpu_ipis(cpu);
1716 }
1717
1718 restore_pirqs();
1719}
1720
1721static struct irq_chip xen_dynamic_chip __read_mostly = {
1722 .name = "xen-dyn",
1723
1724 .irq_disable = disable_dynirq,
1725 .irq_mask = disable_dynirq,
1726 .irq_unmask = enable_dynirq,
1727
1728 .irq_ack = ack_dynirq,
1729 .irq_mask_ack = mask_ack_dynirq,
1730
1731 .irq_set_affinity = set_affinity_irq,
1732 .irq_retrigger = retrigger_dynirq,
1733};
1734
1735static struct irq_chip xen_pirq_chip __read_mostly = {
1736 .name = "xen-pirq",
1737
1738 .irq_startup = startup_pirq,
1739 .irq_shutdown = shutdown_pirq,
1740 .irq_enable = enable_pirq,
1741 .irq_disable = disable_pirq,
1742
1743 .irq_mask = disable_dynirq,
1744 .irq_unmask = enable_dynirq,
1745
1746 .irq_ack = eoi_pirq,
1747 .irq_eoi = eoi_pirq,
1748 .irq_mask_ack = mask_ack_pirq,
1749
1750 .irq_set_affinity = set_affinity_irq,
1751
1752 .irq_retrigger = retrigger_dynirq,
1753};
1754
1755static struct irq_chip xen_percpu_chip __read_mostly = {
1756 .name = "xen-percpu",
1757
1758 .irq_disable = disable_dynirq,
1759 .irq_mask = disable_dynirq,
1760 .irq_unmask = enable_dynirq,
1761
1762 .irq_ack = ack_dynirq,
1763};
1764
1765int xen_set_callback_via(uint64_t via)
1766{
1767 struct xen_hvm_param a;
1768 a.domid = DOMID_SELF;
1769 a.index = HVM_PARAM_CALLBACK_IRQ;
1770 a.value = via;
1771 return HYPERVISOR_hvm_op(HVMOP_set_param, &a);
1772}
1773EXPORT_SYMBOL_GPL(xen_set_callback_via);
1774
1775#ifdef CONFIG_XEN_PVHVM
1776/* Vector callbacks are better than PCI interrupts to receive event
1777 * channel notifications because we can receive vector callbacks on any
1778 * vcpu and we don't need PCI support or APIC interactions. */
1779void xen_callback_vector(void)
1780{
1781 int rc;
1782 uint64_t callback_via;
1783 if (xen_have_vector_callback) {
1784 callback_via = HVM_CALLBACK_VECTOR(XEN_HVM_EVTCHN_CALLBACK);
1785 rc = xen_set_callback_via(callback_via);
1786 if (rc) {
1787 printk(KERN_ERR "Request for Xen HVM callback vector"
1788 " failed.\n");
1789 xen_have_vector_callback = 0;
1790 return;
1791 }
1792 printk(KERN_INFO "Xen HVM callback vector for event delivery is "
1793 "enabled\n");
1794 /* in the restore case the vector has already been allocated */
1795 if (!test_bit(XEN_HVM_EVTCHN_CALLBACK, used_vectors))
1796 alloc_intr_gate(XEN_HVM_EVTCHN_CALLBACK, xen_hvm_callback_vector);
1797 }
1798}
1799#else
1800void xen_callback_vector(void) {}
1801#endif
1802
1803void __init xen_init_IRQ(void)
1804{
1805 int i, rc;
1806
1807 evtchn_to_irq = kcalloc(NR_EVENT_CHANNELS, sizeof(*evtchn_to_irq),
1808 GFP_KERNEL);
1809 BUG_ON(!evtchn_to_irq);
1810 for (i = 0; i < NR_EVENT_CHANNELS; i++)
1811 evtchn_to_irq[i] = -1;
1812
1813 init_evtchn_cpu_bindings();
1814
1815 /* No event channels are 'live' right now. */
1816 for (i = 0; i < NR_EVENT_CHANNELS; i++)
1817 mask_evtchn(i);
1818
1819 pirq_needs_eoi = pirq_needs_eoi_flag;
1820
1821 if (xen_hvm_domain()) {
1822 xen_callback_vector();
1823 native_init_IRQ();
1824 /* pci_xen_hvm_init must be called after native_init_IRQ so that
1825 * __acpi_register_gsi can point at the right function */
1826 pci_xen_hvm_init();
1827 } else {
1828 struct physdev_pirq_eoi_gmfn eoi_gmfn;
1829
1830 irq_ctx_init(smp_processor_id());
1831 if (xen_initial_domain())
1832 pci_xen_initial_domain();
1833
1834 pirq_eoi_map = (void *)__get_free_page(GFP_KERNEL|__GFP_ZERO);
1835 eoi_gmfn.gmfn = virt_to_mfn(pirq_eoi_map);
1836 rc = HYPERVISOR_physdev_op(PHYSDEVOP_pirq_eoi_gmfn_v2, &eoi_gmfn);
1837 if (rc != 0) {
1838 free_page((unsigned long) pirq_eoi_map);
1839 pirq_eoi_map = NULL;
1840 } else
1841 pirq_needs_eoi = pirq_check_eoi_map;
1842 }
1843}