lh | 9ed821d | 2023-04-07 01:36:19 -0700 | [diff] [blame^] | 1 | /*******************************************************************************
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| 2 | * Copyright (C) 2007, ZTE Corporation.
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| 3 | *
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| 4 | * File Name: drv_stub.h
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| 5 | * File Mark:
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| 6 | * Description:
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| 7 | * Others:
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| 8 | * Version: 1.0
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| 9 | * Author: wangxia
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| 10 | * Date: 2008-2-22
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| 11 | * History 1:
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| 12 | * Date:
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| 13 | * Version:
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| 14 | * Author:
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| 15 | * Modification:
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| 16 | * History 2:
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| 17 | ********************************************************************************/
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| 18 |
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| 19 | #ifndef _DRV_STUB_H
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| 20 | #define _DRV_STUB_H
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| 21 |
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| 22 |
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| 23 | /****************************************************************************
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| 24 | * Include files
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| 25 | ****************************************************************************/
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| 26 |
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| 27 |
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| 28 | /****************************************************************************
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| 29 | * Macros
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| 30 | ****************************************************************************/
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| 31 |
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| 32 |
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| 33 | /****************************************************************************
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| 34 | * Types
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| 35 | ****************************************************************************/
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| 36 |
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| 37 | /****************************************************************************************
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| 38 | ****************************************************************************************
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| 39 | * PCL configuration
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| 40 | ****************************************************************************************
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| 41 | ****************************************************************************************/
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| 42 |
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| 43 | /* Table of symbolic names for the pcl registers
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| 44 | keep in sync with PAD_pcl_registers.
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| 45 | ONLY APPEND TO THIS LIST NEVER REMOVE OR PUT ENTRIES INBETWEEN*/
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| 46 | enum PAD_symbolic_names
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| 47 | {
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| 48 | /*0*/
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| 49 | PAD_HS_DET,
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| 50 | PAD_ACC_DET,
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| 51 | PAD_ACC_PWR_EN,
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| 52 | PAD_PERF_MON,
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| 53 | PAD_HS_SENDEND,
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| 54 |
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| 55 | /*5*/
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| 56 | PAD_FLIP_SENSE,
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| 57 | PAD_AP_RESET,
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| 58 | PAD_AP_CLK_REQ,
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| 59 | PAD_VCXO_EN,
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| 60 | PAD_MAIN_SUB,
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| 61 |
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| 62 | /*10*/
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| 63 | PAD_LCD_RESET,
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| 64 | PAD_LCD_COMPIC_RESET,
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| 65 | PCD_LCD_COMPIC,
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| 66 | PAD_SMC_VZ_N,
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| 67 | PAD_SMC_RST,
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| 68 |
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| 69 | /*15*/
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| 70 | PAD_USB_ID,
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| 71 | PAD_VBOOST_SEL,
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| 72 | PAD_VBOOST_EN,
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| 73 | GPS_GPIO_ASIC_STDBY,
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| 74 | GPS_GPIO_ASIC_RESET,
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| 75 |
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| 76 | /*20*/
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| 77 | GPS_GPIO_ASIC_RFON,
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| 78 | PAD_CHK_EXT_32KHZ,
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| 79 | PAD_HS_AMP_SD,
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| 80 | PAD_HS_AMP_UD,
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| 81 | PAD_HS_AMP_CLK,
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| 82 |
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| 83 | /*25*/
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| 84 | PAD_GDC_INT,
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| 85 | PAD_LED_RED,
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| 86 | PAD_LED_GREEN,
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| 87 | PAD_LED_BLUE,
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| 88 | PAD_IRDA_SD,
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| 89 |
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| 90 | /*30*/
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| 91 | PAD_MMC_CMD,
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| 92 | PAD_MMC_DAT,
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| 93 | PAD_MMC_ROD_EN,
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| 94 | PAD_MMC_VDD_EN, /* VDD for MMC Interface */
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| 95 | PAD_SD_MMC_DAT1, /* DAT1 for extended SD/MMC */
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| 96 |
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| 97 | /*35*/
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| 98 | PAD_SD_MMC_DAT2, /* DAT2 for extended SD/MMC */
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| 99 | PAD_SD_MMC_DAT3, /* DAT3 for extended SD/MMC */
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| 100 | PAD_CS_SD_MMC, /* RDE: CS for SD/MMC when using SPI Interface */
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| 101 | PAD_MTSR_SD_MMC, /* RDE: CS for SD/MMC when using SPI Interface */
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| 102 | PAD_MRST_SD_MMC, /* RDE: CS for SD/MMC when using SPI Interface */
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| 103 |
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| 104 | /*40*/
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| 105 | PAD_CLK_SD_MMC, /* RDE: CS for SD/MMC when using SPI Interface */
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| 106 | PAD_USART1_RTS,
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| 107 | PAD_DIF_CD,
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| 108 | PAD_DIF_CS,
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| 109 | PAD_HS_MONO_STEREO,
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| 110 |
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| 111 | /*45*/
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| 112 | PAD_CIF_RESET, /*reset for camera on MPE*/
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| 113 | PAD_CIF_PD, /*PowerDown of camera on MPE*/
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| 114 | PAD_SIM_VCC,
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| 115 | PAD_LEDPWM2, /* SUB LCD Backlight enable for NBG_HW_MPE: name corresponds to schematic name but PWM is not supported by HW */
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| 116 | PAD_I2S1_CLK0,
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| 117 |
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| 118 | /*50*/
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| 119 | PAD_I2S1_RX,
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| 120 | PAD_I2S1_TX,
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| 121 | PAD_I2S1_WA0,
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| 122 | PAD_MMC_DETECT, /*MMC/SD card detection on MPE*/
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| 123 | PAD_CHG_VAL,
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| 124 |
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| 125 | /*55*/
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| 126 | PAD_I2C_SCL,
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| 127 | PAD_I2C_SDA,
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| 128 | PAD_RST_FM,
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| 129 | PAD_FLASH,
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| 130 | PAD_VIBRATOR,
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| 131 |
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| 132 | /*60*/
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| 133 | PAD_FM_AMP_SHDN,
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| 134 | PAD_CIF_RESET2, /* Reset for the second camera */
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| 135 | PAD_DIF_VD, /* Intensity setting via boost converter for both Displays on MPEU Userboard */
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| 136 | PAD_I2S2_CLK0,
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| 137 | PAD_I2S2_RX,
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| 138 |
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| 139 | /*65*/
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| 140 | PAD_I2S2_TX,
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| 141 | PAD_I2S2_WA0,
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| 142 | PAD_BT_RST,
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| 143 | PAD_IRDA_TX,
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| 144 | PAD_IRDA_RX,
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| 145 |
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| 146 | /*70*/
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| 147 | PAD_BB_TEST, /* Setting bb into test mode */
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| 148 | PAD_RESET_DET, /* Set on traps */
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| 149 | PAD_PP_PMU_EXT_ON, /* Wakeup ap pmu */
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| 150 | PAD_IPC_ACK,
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| 151 | PAD_USIF1_RTS,
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| 152 |
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| 153 | /*75*/
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| 154 | PAD_USIF1_CTS,
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| 155 | PAD_USIF2_RTS,
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| 156 | PAD_USIF2_CTS,
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| 157 | PAD_USIF3_RTS,
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| 158 | PAD_USIF3_CTS,
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| 159 |
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| 160 | /*80*/
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| 161 | PAD_MIC_INT,
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| 162 | PAD_AUD_AMP,
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| 163 | PAD_SP_AMP_SD,
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| 164 | PAD_SPK_RCV_SEL,
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| 165 | PAD_FM_BBP_SEL,
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| 166 |
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| 167 | /*85*/
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| 168 | PAD_BT_TX, /* serial (USIF) port pins used for BT communication */
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| 169 | PAD_BT_RX,
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| 170 | PAD_BT_RTS,
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| 171 | PAD_BT_CTS,
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| 172 | PAD_UART0_RTS,
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| 173 |
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| 174 | /*90*/
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| 175 | PAD_UART0_CTS,
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| 176 | PAD_UART1_RTS,
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| 177 | PAD_UART1_CTS,
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| 178 | PAD_UART1_RX,
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| 179 | PAD_UART1_TX,
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| 180 |
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| 181 | /*95*/
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| 182 | PAD_I2S1_CLK1,
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| 183 | PAD_I2S1_WA1,
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| 184 | PAD_I2S2_CLK1,
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| 185 | PAD_I2S2_WA1,
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| 186 | PAD_USIF1_TXD,
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| 187 |
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| 188 | /*100*/
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| 189 | PAD_USIF1_RXD,
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| 190 | PAD_WLAN_1V8_EN,
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| 191 | PAD_MMC2_VDD_EN,
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| 192 | PAD_MMC2_ROD_EN,
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| 193 | PAD_MMC2_CLK,
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| 194 |
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| 195 | /*105*/
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| 196 | PAD_MMC2_CMD,
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| 197 | PAD_MMC2_DAT0,
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| 198 | PAD_MMC2_DAT1,
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| 199 | PAD_MMC2_DAT2,
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| 200 | PAD_MMC2_DAT3,
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| 201 |
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| 202 | /*110*/
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| 203 | PAD_MMCI_IO_RESET,
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| 204 | PAD_AUD_SPK_AMP, /*Used for SPK_AMP for NX1*/
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| 205 | PAD_AUDIO_SELECT, /*Used for AUDIO_SELECT for NX1*/
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| 206 | PAD_EE_WP,
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| 207 | PAD_USIF1_CLK,
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| 208 |
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| 209 | /*115*/
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| 210 | PAD_USIF1_HWAKE,
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| 211 | PAD_USIF1_MWAKE,
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| 212 | PAD_USIF1_RX,
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| 213 | PAD_USIF1_TX,
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| 214 | PAD_USIF2_CLK,
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| 215 |
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| 216 | /*120*/
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| 217 | PAD_USIF2_HWAKE,
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| 218 | PAD_USIF2_MWAKE,
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| 219 | PAD_USIF2_RX,
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| 220 | PAD_USIF2_TX,
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| 221 | PAD_USIF3_CLK,
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| 222 |
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| 223 | /*125*/
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| 224 | PAD_USIF3_HWAKE,
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| 225 | PAD_USIF3_MWAKE,
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| 226 | PAD_USIF3_RX,
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| 227 | PAD_USIF3_TX,
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| 228 | PAD_CAM_STBY_2,
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| 229 |
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| 230 | /*130*/
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| 231 | PAD_CAM_RESET_2,
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| 232 | PAD_CAM_STBY_1,
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| 233 | PAD_CAM_RESET_1,
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| 234 | PAD_CHG_DET,
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| 235 | PAD_BAT_DET,
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| 236 |
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| 237 | /*135*/
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| 238 | PAD_CHG_ON,
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| 239 | PAD_USB_ON,
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| 240 | BL_LED_DIM,
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| 241 | PAD_USB_DET,
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| 242 | PAD_USB_CHR_EN,
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| 243 |
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| 244 | /*140*/
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| 245 | PAD_CIF_DATA0,
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| 246 | PAD_CIF_DATA1,
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| 247 | PAD_CIF_DATA2,
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| 248 | PAD_CIF_DATA3,
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| 249 | PAD_CIF_DATA4,
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| 250 |
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| 251 | /*145*/
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| 252 | PAD_CIF_DATA5,
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| 253 | PAD_CIF_DATA6,
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| 254 | PAD_CIF_DATA7,
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| 255 | PAD_CIF_PCLK,
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| 256 | PAD_CIF_HSYNC,
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| 257 |
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| 258 | /*150*/
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| 259 | PAD_CIF_VSYNC,
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| 260 | PAD_MODEM_READY,
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| 261 |
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| 262 | PAD_LAST_ELEMENT /* always last element, used to verify PCL setup */
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| 263 | };
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| 264 |
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| 265 | /*IFX BB version*/
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| 266 | typedef enum
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| 267 | {
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| 268 | SYS_BB_VER_INVALID,
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| 269 | SYS_BB_VER_SGOLD,
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| 270 | SYS_BB_VER_SGOLDLITE,
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| 271 | SYS_BB_VER_SGOLD2,
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| 272 | SYS_BB_VER_SGOLD3,
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| 273 | SYS_BB_VER_SGOLDRADIO
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| 274 | } bb_ver_enum;
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| 275 |
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| 276 | typedef enum
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| 277 | {
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| 278 | SYS_BB_REV_INVALID,
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| 279 | SYS_BB_REV_10,
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| 280 | SYS_BB_REV_11,
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| 281 | SYS_BB_REV_11A,
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| 282 | SYS_BB_REV_11B,
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| 283 | SYS_BB_REV_12,
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| 284 | SYS_BB_REV_20
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| 285 | } bb_rev_enum;
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| 286 | /****************************************************************************
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| 287 | * Constants
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| 288 | ****************************************************************************/
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| 289 |
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| 290 | /****************************************************************************
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| 291 | * Global Variables
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| 292 | ****************************************************************************/
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| 293 |
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| 294 | /****************************************************************************
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| 295 | * Function Prototypes
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| 296 | ****************************************************************************/
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| 297 |
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| 298 |
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| 299 |
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| 300 | #endif/*_DRV_STUB_H*/
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| 301 |
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