| lh | 9ed821d | 2023-04-07 01:36:19 -0700 | [diff] [blame^] | 1 | /*******************************************************************************
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| 2 | * Copyright (C) 2007, ZTE Corporation.
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| 3 | *
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| 4 | * File Name:
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| 5 | * File Mark:
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| 6 | * Description:
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| 7 |
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| 8 | * Others:
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| 9 | * Version:
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| 10 | * Author: zhangpei
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| 11 | * Date:
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| 12 | * History 1:
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| 13 | * Date:
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| 14 | * Version:
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| 15 | * Author:
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| 16 | * Modification:
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| 17 | *
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| 18 | * History 2:
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| 19 | ********************************************************************************/
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| 20 |
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| 21 | #ifndef _NVCONFIG_H
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| 22 | #define _NVCONFIG_H
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| 23 |
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| 24 | /****************************************************************************
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| 25 | * Include files
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| 26 | ****************************************************************************/
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| 27 | #include "RONvConfig.h"
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| 28 | #include "RWNvConfig.h"
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| 29 | #include "ram_config.h"
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| 30 |
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| 31 | /****************************************************************************
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| 32 | * Local Macros
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| 33 | ****************************************************************************/
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| 34 | // ZSP²àÎïÀí²ãNVµÄµØÖ·
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| 35 | //NV-RO-AMT
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| 36 | #define AMT_CALIB_LTE_NVRAM_BASE_ADDR (DDR_BASE_ADDR_PHY_NV)
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| 37 | #define AMT_CALIB_LTE_NVRAM_LENTH OS_FLASH_AMT_LTE_RO_NONFAC_SIZE
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| 38 |
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| 39 | #define AMT_CALIB_TDS_NVRAM_BASE_ADDR (AMT_CALIB_LTE_NVRAM_BASE_ADDR+AMT_CALIB_LTE_NVRAM_LENTH)
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| 40 | #define AMT_CALIB_TDS_NVRAM_LENTH OS_FLASH_AMT_TDS_RO_NONFAC_SIZE
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| 41 |
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| 42 | #define AMT_CALIB_GGE_NVRAM_BASE_ADDR (AMT_CALIB_TDS_NVRAM_BASE_ADDR+AMT_CALIB_TDS_NVRAM_LENTH)
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| 43 | #define AMT_CALIB_GGE_NVRAM_LENTH OS_FLASH_AMT_GGE_RO_NONFAC_SIZE
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| 44 |
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| 45 | #define AMT_CALIB_WCDMA_NVRAM_BASE_ADDR (AMT_CALIB_GGE_NVRAM_BASE_ADDR+AMT_CALIB_GGE_NVRAM_LENTH)
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| 46 | #define AMT_CALIB_WCDMA_NVRAM_LENTH OS_FLASH_AMT_WCDMA_RO_NONFAC_SIZE
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| 47 |
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| 48 | #define AMT_CALIB_LTEA_NVRAM_BASE_ADDR (AMT_CALIB_WCDMA_NVRAM_BASE_ADDR+AMT_CALIB_WCDMA_NVRAM_LENTH)
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| 49 | #define AMT_CALIB_LTEA_NVRAM_LENTH OS_FLASH_AMT_LTEA_RO_NONFAC_SIZE
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| 50 |
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| 51 | //NV-RW-AMT-USER
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| 52 | #define AMT_USER_LTE_NVRAM_BASE_ADDR (AMT_CALIB_LTEA_NVRAM_BASE_ADDR+AMT_CALIB_LTEA_NVRAM_LENTH)
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| 53 | #define AMT_USER_LTE_NVRAM_LENTH OS_FLASH_AMT_RW_USER_LTE_SIZE
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| 54 |
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| 55 | #define AMT_USER_TDS_NVRAM_BASE_ADDR (AMT_USER_LTE_NVRAM_BASE_ADDR+AMT_USER_LTE_NVRAM_LENTH)
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| 56 | #define AMT_USER_TDS_NVRAM_LENTH OS_FLASH_AMT_RW_USER_TDS_SIZE
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| 57 |
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| 58 | #define AMT_USER_GGE_NVRAM_BASE_ADDR (AMT_USER_TDS_NVRAM_BASE_ADDR+AMT_USER_TDS_NVRAM_LENTH)
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| 59 | #define AMT_USER_GGE_NVRAM_LENTH OS_FLASH_AMT_RW_USER_GGE_SIZE
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| 60 |
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| 61 | #define AMT_USER_WCDMA_NVRAM_BASE_ADDR (AMT_USER_GGE_NVRAM_BASE_ADDR+AMT_USER_GGE_NVRAM_LENTH)
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| 62 | #define AMT_USER_WCDMA_NVRAM_LENTH OS_FLASH_AMT_RW_USER_WCDMA_SIZE
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| 63 |
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| 64 | #define AMT_USER_LTEA_NVRAM_BASE_ADDR (AMT_USER_WCDMA_NVRAM_BASE_ADDR+AMT_USER_WCDMA_NVRAM_LENTH)
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| 65 | #define AMT_USER_LTEA_NVRAM_LENTH OS_FLASH_AMT_RW_USER_LTEA_SIZE
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| 66 |
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| 67 | //NV-RW-PHY
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| 68 | #define LTEA_PHY_NVRAM_BASE_ADDR (AMT_USER_LTEA_NVRAM_BASE_ADDR+AMT_USER_LTEA_NVRAM_LENTH)
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| 69 | #define LTEA_PHY_NVRAM_LENTH OS_FLASH_LTEAPHY_RW_NONFAC_SIZE
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| 70 |
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| 71 | #define TDS_PHY_NVRAM_BASE_ADDR (LTEA_PHY_NVRAM_BASE_ADDR+LTEA_PHY_NVRAM_LENTH)
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| 72 | #define TDS_PHY_NVRAM_LENTH OS_FLASH_TDPHY_RW_NONFAC_SIZE
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| 73 |
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| 74 | #define GSM_PHY_NVRAM_BASE_ADDR (TDS_PHY_NVRAM_BASE_ADDR+TDS_PHY_NVRAM_LENTH)
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| 75 | #define GSM_PHY_NVRAM_LENTH OS_FLASH_GSML1G_RW_NONFAC_SIZE
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| 76 |
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| 77 | #define WCDMA_PHY_NVRAM_BASE_ADDR (GSM_PHY_NVRAM_BASE_ADDR+GSM_PHY_NVRAM_LENTH)
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| 78 | #define WCDMA_PHY_NVRAM_LENTH OS_FLASH_WCDMAPHY_RW_NONFAC_SIZE
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| 79 |
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| 80 | #define PHY_CFG_NVRAM_BASE_ADDR (WCDMA_PHY_NVRAM_BASE_ADDR+WCDMA_PHY_NVRAM_LENTH)
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| 81 | #define PHY_CFG_NVRAM_LENTH OS_FLASH_PHYCFG_RW_NONFAC_SIZE
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| 82 |
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| 83 | #define PHY_TXETAB_NVRAM_BASE_ADDR (PHY_CFG_NVRAM_BASE_ADDR+PHY_CFG_NVRAM_LENTH)
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| 84 | #define PHY_TXETAB_NVRAM_LENTH OS_FLASH_TXETAB_RW_NONFAC_SIZE
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| 85 |
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| 86 | #define PHY_NV_CFG_END 0xFFFFFFFF
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| 87 |
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| 88 | typedef struct _T_zPhyNVCfg
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| 89 | {
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| 90 | UINT32 uNVFlashBaseAddr; /*NV src addr(nand flash)*/
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| 91 | UINT32 uNVRamBaseAddr; /*NV dst addr(DDRAM)*/
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| 92 | UINT32 uNVSize; /*NV SIZE*/
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| 93 | }
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| 94 | T_zPhyNVCfg;
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| 95 |
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| 96 | extern T_zPhyNVCfg g_PhyNVCfg[];
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| 97 |
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| 98 | #endif /*_NVCONFIG_H*/
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