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lh9ed821d2023-04-07 01:36:19 -07001/**************************************************************************
2*
3* Copyright (c) 2014 ZTE Corporation.
4*
5***************************************************************************
6* Ä£ ¿é Ãû :
7* ÎÄ ¼þ Ãû : RWNvConfig.h
8* Ïà¹ØÎļþ :
9* ʵÏÖ¹¦ÄÜ :
10* ×÷ Õß :
11* °æ ±¾ :
12* Íê³ÉÈÕÆÚ :
13* ÆäËü˵Ã÷ :
14**************************************************************************/
15
16/**************************************************************************
17* Ð޸ļǼ
18**************************************************************************/
19#ifndef _RWNVCONFIG_H
20#define _RWNVCONFIG_H
21
22#include "RONvConfig.h"
23
24/****************************************************************************
25 rwo area
26****************************************************************************/
27
28#define OS_FLASH_RWO_OFFSET_FROM_NV (OS_FLASH_ROW_OFFSET_FROM_NV + OS_FLASH_ROW_NVRAM_SIZE) /* ÏÞÖÆ¶ÁÐ´ÇøÆ«ÒÆ */
29#define OS_FLASH_RWO_NVRAM_SIZE (512 * 1024)
30
31/***************************
32 AMT user config 42KB : LTE 10KB
33***************************/
34#define OS_FLASH_AMT_RW_USER_LTE_OFFSET_FROM_NV OS_FLASH_RWO_OFFSET_FROM_NV
35#define OS_FLASH_AMT_RW_USER_LTE_BASE_ADDR (OS_FLASH_NV_PARTITION_BASE_ADDR + OS_FLASH_AMT_RW_USER_LTE_OFFSET_FROM_NV)
36#define OS_FLASH_AMT_RW_USER_LTE_SIZE (10 * 1024)
37
38/***************************
39 AMT user config 42KB: TDS 3KB
40***************************/
41#define OS_FLASH_AMT_RW_USER_TDS_OFFSET_FROM_NV (OS_FLASH_AMT_RW_USER_LTE_OFFSET_FROM_NV + OS_FLASH_AMT_RW_USER_LTE_SIZE)
42#define OS_FLASH_AMT_RW_USER_TDS_BASE_ADDR (OS_FLASH_NV_PARTITION_BASE_ADDR + OS_FLASH_AMT_RW_USER_TDS_OFFSET_FROM_NV)
43#define OS_FLASH_AMT_RW_USER_TDS_SIZE (3 * 1024)
44
45/***************************
46 AMT user config 42KB:GGE 7KB
47***************************/
48#define OS_FLASH_AMT_RW_USER_GGE_OFFSET_FROM_NV (OS_FLASH_AMT_RW_USER_TDS_OFFSET_FROM_NV + OS_FLASH_AMT_RW_USER_TDS_SIZE)
49#define OS_FLASH_AMT_RW_USER_GGE_BASE_ADDR (OS_FLASH_NV_PARTITION_BASE_ADDR + OS_FLASH_AMT_RW_USER_GGE_OFFSET_FROM_NV)
50#define OS_FLASH_AMT_RW_USER_GGE_SIZE (7 * 1024)
51
52/***************************
53 AMT user config 42KB: WCDMA 10KB
54***************************/
55#define OS_FLASH_AMT_RW_USER_WCDMA_OFFSET_FROM_NV (OS_FLASH_AMT_RW_USER_GGE_OFFSET_FROM_NV + OS_FLASH_AMT_RW_USER_GGE_SIZE)
56#define OS_FLASH_AMT_RW_USER_WCDMA_BASE_ADDR (OS_FLASH_NV_PARTITION_BASE_ADDR + OS_FLASH_AMT_RW_USER_WCDMA_OFFSET_FROM_NV)
57#define OS_FLASH_AMT_RW_USER_WCDMA_SIZE (10 * 1024)
58
59/***************************
60 AMT user config 42KB: LTEA 27KB
61***************************/
62#define OS_FLASH_AMT_RW_USER_LTEA_OFFSET_FROM_NV (OS_FLASH_AMT_RW_USER_WCDMA_OFFSET_FROM_NV + OS_FLASH_AMT_RW_USER_WCDMA_SIZE)
63#define OS_FLASH_AMT_RW_USER_LTEA_BASE_ADDR (OS_FLASH_NV_PARTITION_BASE_ADDR + OS_FLASH_AMT_RW_USER_LTEA_OFFSET_FROM_NV)
64#define OS_FLASH_AMT_RW_USER_LTEA_SIZE (27 * 1024)
65
66/***************************
67 LTE physical area config 0KB
68***************************/
69#define OS_FLASH_LTEPHY_RW_NONFAC_OFFSET_FROM_NV (OS_FLASH_AMT_RW_USER_LTEA_OFFSET_FROM_NV + OS_FLASH_AMT_RW_USER_LTEA_SIZE)
70#define OS_FLASH_LTEPHY_RW_NONFAC_BASE_ADDR (OS_FLASH_NV_PARTITION_BASE_ADDR + OS_FLASH_LTEPHY_RW_NONFAC_OFFSET_FROM_NV)
71#define OS_FLASH_LTEPHY_RW_NONFAC_SIZE (0 * 1024)
72
73/***************************
74 TDS physical area config 2KB
75***************************/
76#define OS_FLASH_TDPHY_RW_NONFAC_OFFSET_FROM_NV (OS_FLASH_LTEPHY_RW_NONFAC_OFFSET_FROM_NV + OS_FLASH_LTEPHY_RW_NONFAC_SIZE)
77#define OS_FLASH_TDPHY_RW_NONFAC_BASE_ADDR (OS_FLASH_NV_PARTITION_BASE_ADDR + OS_FLASH_TDPHY_RW_NONFAC_OFFSET_FROM_NV)
78#define OS_FLASH_TDPHY_RW_NONFAC_SIZE (2 * 1024)
79
80/***************************
81 GSM l1g area config 14KB
82***************************/
83#define OS_FLASH_GSML1G_RW_NONFAC_OFFSET_FROM_NV (OS_FLASH_TDPHY_RW_NONFAC_OFFSET_FROM_NV + OS_FLASH_TDPHY_RW_NONFAC_SIZE)
84#define OS_FLASH_GSML1G_RW_NONFAC_BASE_ADDR (OS_FLASH_NV_PARTITION_BASE_ADDR + OS_FLASH_GSML1G_RW_NONFAC_OFFSET_FROM_NV)
85#define OS_FLASH_GSML1G_RW_NONFAC_SIZE (14 * 1024)
86
87/***************************
88 WCDMA physical area config 2KB
89***************************/
90#define OS_FLASH_WCDMAPHY_RW_NONFAC_OFFSET_FROM_NV (OS_FLASH_GSML1G_RW_NONFAC_OFFSET_FROM_NV + OS_FLASH_GSML1G_RW_NONFAC_SIZE)
91#define OS_FLASH_WCDMAPHY_RW_NONFAC_BASE_ADDR (OS_FLASH_NV_PARTITION_BASE_ADDR + OS_FLASH_WCDMAPHY_RW_NONFAC_OFFSET_FROM_NV)
92#define OS_FLASH_WCDMAPHY_RW_NONFAC_SIZE (2 * 1024)
93
94/***************************
95 LTEA physical area config 16KB
96***************************/
97#define OS_FLASH_LTEAPHY_RW_NONFAC_OFFSET_FROM_NV (OS_FLASH_WCDMAPHY_RW_NONFAC_OFFSET_FROM_NV + OS_FLASH_WCDMAPHY_RW_NONFAC_SIZE)
98#define OS_FLASH_LTEAPHY_RW_NONFAC_BASE_ADDR (OS_FLASH_NV_PARTITION_BASE_ADDR + OS_FLASH_LTEAPHY_RW_NONFAC_OFFSET_FROM_NV)
99#define OS_FLASH_LTEAPHY_RW_NONFAC_SIZE (16 * 1024)
100
101/***************************
102 zx_rf m0 config 20KB
103***************************/
104#define OS_FLASH_ZXRFM0_RW_NONFAC_OFFSET_FROM_NV (OS_FLASH_LTEAPHY_RW_NONFAC_OFFSET_FROM_NV + OS_FLASH_LTEAPHY_RW_NONFAC_SIZE)
105#define OS_FLASH_ZXRFM0_RW_NONFAC_BASE_ADDR (OS_FLASH_NV_PARTITION_BASE_ADDR + OS_FLASH_ZXRFM0_RW_NONFAC_OFFSET_FROM_NV)
106#define OS_FLASH_ZXRFM0_RW_NONFAC_SIZE (20 * 1024)
107
108/***************************
109 tx event table 64KB
110***************************/
111#define OS_FLASH_TXETAB_RW_NONFAC_OFFSET_FROM_NV (OS_FLASH_ZXRFM0_RW_NONFAC_OFFSET_FROM_NV + OS_FLASH_ZXRFM0_RW_NONFAC_SIZE)
112#define OS_FLASH_TXETAB_RW_NONFAC_BASE_ADDR (OS_FLASH_NV_PARTITION_BASE_ADDR + OS_FLASH_TXETAB_RW_NONFAC_OFFSET_FROM_NV)
113#define OS_FLASH_TXETAB_RW_NONFAC_SIZE (64 * 1024)
114
115/***************************
116 phycom area 2KB
117***************************/
118#define OS_FLASH_RFCOM_RW_NONFAC_OFFSET_FROM_NV (OS_FLASH_TXETAB_RW_NONFAC_OFFSET_FROM_NV + OS_FLASH_TXETAB_RW_NONFAC_SIZE)
119#define OS_FLASH_RFCOM_RW_NONFAC_BASE_ADDR (OS_FLASH_NV_PARTITION_BASE_ADDR + OS_FLASH_RFCOM_RW_NONFAC_OFFSET_FROM_NV)
120#define OS_FLASH_RFCOM_RW_NONFAC_SIZE (2 * 1024)
121
122/***************************
123 rwo area reserved 335KB
124***************************/
125#define OS_FLASH_RWO_RESERVED_OFFSET_FROM_NV (OS_FLASH_RFCOM_RW_NONFAC_OFFSET_FROM_NV + OS_FLASH_RFCOM_RW_NONFAC_SIZE)
126#define OS_FLASH_RWO_RESERVED_BASE_ADDR (OS_FLASH_NV_PARTITION_BASE_ADDR + OS_FLASH_RWO_RESERVED_OFFSET_FROM_NV)
127#define OS_FLASH_RWO_RESERVED_SIZE (335 * 1024)
128
129/****************************************************************************
130 rw area
131****************************************************************************/
132#define OS_FLASH_RW_OFFSET_FROM_NV (OS_FLASH_RWO_OFFSET_FROM_NV + OS_FLASH_RWO_NVRAM_SIZE) /* ¶ÁÐ´ÇøÆ«ÒÆ */
133#define OS_FLASH_RW_NVRAM_SIZE (768 * 1024)
134
135/***************************
136 TSP area config 2KB
137***************************/
138#define OS_FLASH_TSP_RW_NONFAC_OFFSET_FROM_NV OS_FLASH_RW_OFFSET_FROM_NV
139#define OS_FLASH_TSP_RW_NONFAC_BASE_ADDR (OS_FLASH_NV_PARTITION_BASE_ADDR + OS_FLASH_TSP_RW_NONFAC_OFFSET_FROM_NV)
140#define OS_FLASH_TSP_RW_NONFAC_SIZE (2 * 1024)
141#define OS_FLASH_TSP_RW_NONFAC_AT_MODE_ADDR (OS_FLASH_TSP_RW_NONFAC_BASE_ADDR + 1024)
142
143
144/***************************
145 ATI area config 2KB
146***************************/
147#define OS_FLASH_ATI_RW_NONFAC_OFFSET_FROM_NV (OS_FLASH_TSP_RW_NONFAC_OFFSET_FROM_NV + OS_FLASH_TSP_RW_NONFAC_SIZE)
148#define OS_FLASH_ATI_RW_NONFAC_BASE_ADDR (OS_FLASH_NV_PARTITION_BASE_ADDR + OS_FLASH_ATI_RW_NONFAC_OFFSET_FROM_NV)
149#define OS_FLASH_ATI_RW_NONFAC_SIZE (2 * 1024)
150
151/***************************
152 at config setting 1KB
153***************************/
154#define OS_FLASH_ATCFG_RW_NONFAC_OFFSET_FROM_NV (OS_FLASH_ATI_RW_NONFAC_OFFSET_FROM_NV + OS_FLASH_ATI_RW_NONFAC_SIZE)
155#define OS_FLASH_ATCFG_RW_NONFAC_BASE_ADDR (OS_FLASH_NV_PARTITION_BASE_ADDR + OS_FLASH_ATCFG_RW_NONFAC_OFFSET_FROM_NV)
156#define OS_FLASH_ATCFG_RW_NONFAC_SIZE (1 * 1024)
157
158/***************************
159 phy config 2KB
160***************************/
161#define OS_FLASH_PHYCFG_RW_NONFAC_OFFSET_FROM_NV (OS_FLASH_ATCFG_RW_NONFAC_OFFSET_FROM_NV + OS_FLASH_ATCFG_RW_NONFAC_SIZE)
162#define OS_FLASH_PHYCFG_RW_NONFAC_BASE_ADDR (OS_FLASH_NV_PARTITION_BASE_ADDR + OS_FLASH_PHYCFG_RW_NONFAC_OFFSET_FROM_NV)
163#define OS_FLASH_PHYCFG_RW_NONFAC_SIZE (2 * 1024)
164
165/***************************
166volte area config 1KB
167***************************/
168#define OS_FLASH_VOLTE_RW_NONFAC_OFFSET_FROM_NV (OS_FLASH_PHYCFG_RW_NONFAC_OFFSET_FROM_NV + OS_FLASH_PHYCFG_RW_NONFAC_SIZE)
169#define OS_FLASH_VOLTE_RW_NONFAC_BASE_ADDR (OS_FLASH_NV_PARTITION_BASE_ADDR + OS_FLASH_VOLTE_RW_NONFAC_OFFSET_FROM_NV)
170#define OS_FLASH_VOLTE_RW_NONFAC_SIZE (1 * 1024)
171
172/***************************
173 ps area config 64KB
174***************************/
175#define OS_FLASH_PS_RW_NONFAC_OFFSET_FROM_NV (OS_FLASH_VOLTE_RW_NONFAC_OFFSET_FROM_NV + OS_FLASH_VOLTE_RW_NONFAC_SIZE)
176#define OS_FLASH_PS_RW_NONFAC_BASE_ADDR (OS_FLASH_NV_PARTITION_BASE_ADDR + OS_FLASH_PS_RW_NONFAC_OFFSET_FROM_NV)
177#define OS_FLASH_PS_RW_NONFAC_SIZE (64 * 1024)
178
179/***************************
180 driver area config 16KB
181***************************/
182#define OS_FLASH_DRV_RW_NONFAC_OFFSET_FROM_NV (OS_FLASH_PS_RW_NONFAC_OFFSET_FROM_NV + OS_FLASH_PS_RW_NONFAC_SIZE)
183#define OS_FLASH_DRV_RW_NONFAC_BASE_ADDR (OS_FLASH_NV_PARTITION_BASE_ADDR + OS_FLASH_DRV_RW_NONFAC_OFFSET_FROM_NV)
184#define OS_FLASH_DRV_RW_NONFAC_SIZE (16 * 1024)
185
186/***************************
187plat area config 0KB
188***************************/
189#define OS_FLASH_PLAT_RW_NONFAC_OFFSET_FROM_NV (OS_FLASH_DRV_RW_NONFAC_OFFSET_FROM_NV + OS_FLASH_DRV_RW_NONFAC_SIZE)
190#define OS_FLASH_PLAT_RW_NONFAC_BASE_ADDR (OS_FLASH_NV_PARTITION_BASE_ADDR + OS_FLASH_PLAT_RW_NONFAC_OFFSET_FROM_NV)
191#define OS_FLASH_PLAT_RW_NONFAC_SIZE (0 * 1024)
192
193/***************************
194user area config 0KB
195***************************/
196#define OS_FLASH_USER_RW_NONFAC_OFFSET_FROM_NV (OS_FLASH_PLAT_RW_NONFAC_OFFSET_FROM_NV + OS_FLASH_PLAT_RW_NONFAC_SIZE)
197#define OS_FLASH_USER_RW_NONFAC_BASE_ADDR (OS_FLASH_NV_PARTITION_BASE_ADDR + OS_FLASH_USER_RW_NONFAC_OFFSET_FROM_NV)
198#define OS_FLASH_USER_RW_NONFAC_SIZE 0
199
200/***************************
201 voice area config 64KB
202***************************/
203#define OS_FLASH_VOICE_RW_NONFAC_OFFSET_FROM_NV (OS_FLASH_USER_RW_NONFAC_OFFSET_FROM_NV + OS_FLASH_USER_RW_NONFAC_SIZE)
204#define OS_FLASH_VOICE_RW_NONFAC_BASE_ADDR (OS_FLASH_NV_PARTITION_BASE_ADDR + OS_FLASH_VOICE_RW_NONFAC_OFFSET_FROM_NV)
205#define OS_FLASH_VOICE_RW_NONFAC_SIZE (64 * 1024)
206
207/******************************
208 ref RWdate area 16KB
209******************************/
210#define OS_FLASH_REF_DESIGN_RW_OFFSET_FROM_NV (OS_FLASH_VOICE_RW_NONFAC_OFFSET_FROM_NV + OS_FLASH_VOICE_RW_NONFAC_SIZE)
211#define OS_FLASH_REF_DESIGN_RW_BASE_ADDR (OS_FLASH_NV_PARTITION_BASE_ADDR + OS_FLASH_REF_DESIGN_RW_OFFSET_FROM_NV)
212#define OS_FLASH_REF_DESIGN_RW_SIZE (16 * 1024)
213
214/******************************
215 reserved RWdate area config 600KB
216******************************/
217#define OS_FLASH_RW_RESERVED_OFFSET_FROM_NV (OS_FLASH_REF_DESIGN_RW_OFFSET_FROM_NV + OS_FLASH_REF_DESIGN_RW_SIZE)
218#define OS_FLASH_RW_RESERVED_BASE_ADDR (OS_FLASH_NV_PARTITION_BASE_ADDR + OS_FLASH_RW_RESERVED_OFFSET_FROM_NV)
219#define OS_FLASH_RW_RESERVED_SIZE (600 * 1024)
220
221/******************************
222 nv flag area
223******************************/
224#define OS_FLASH_FLAG_NVRAM_BASE_ADD (OS_FLASH_RW_OFFSET_FROM_NV + OS_FLASH_RW_NVRAM_SIZE)
225#define OS_FLASH_FLAG_NVRAM_SIZE (1024 * 1024)
226
227/******************************
228 work area symbol 1 BYTE
229*******************************/
230#define OS_FLASH_WORK_AREA_SYMBOL_BASE_ADDR (OS_FLASH_FLAG_NVRAM_BASE_ADD)
231#define OS_FLASH_WORK_AREA_SYMBOL_SIZE (256 * 1024)
232
233/******************************
234 backup area symbol 1 BYTE
235******************************/
236#define OS_FLASH_BACKUP_AREA_SYMBOL_BASE_ADDR (OS_FLASH_WORK_AREA_SYMBOL_BASE_ADDR+OS_FLASH_WORK_AREA_SYMBOL_SIZE)
237#define OS_FLASH_BACKUP_AREA_SYMBOL_SIZE (256 * 1024)
238
239/******************************
240 factory area symbol 1 BYTE
241******************************/
242#define OS_FLASH_FACTORY_AREA_SYMBOL_BASE_ADDR (OS_FLASH_BACKUP_AREA_SYMBOL_BASE_ADDR+OS_FLASH_BACKUP_AREA_SYMBOL_SIZE)
243#define OS_FLASH_FACTORY_AREA_SYMBOL_SIZE (256 * 1024)
244
245/******************************
246 reset factory symbol 1 BYTE
247******************************/
248#define OS_FLASH_RESET_FACTORY_SYMBOL_BASE_ADDR (OS_FLASH_FACTORY_AREA_SYMBOL_BASE_ADDR+OS_FLASH_FACTORY_AREA_SYMBOL_SIZE)
249#define OS_FLASH_RESET_FACTORY_SYMBOL_SIZE (256 * 1024)
250
251/******************************
252 RWdate BACKUP area 0.75M
253******************************/
254#define OS_FLASH_RW_BACKUP_NVRAM_BASE_ADDR (OS_FLASH_FLAG_NVRAM_BASE_ADD + OS_FLASH_FLAG_NVRAM_SIZE)
255#define OS_FLASH_RW_BACKUP_NVRAM_SIZE OS_FLASH_RW_NVRAM_SIZE /*NV RW±¸·ÝÇø×Ü´óС768K*/
256
257#if 1 /**/
258/***************************
259 SM MEMORY bakeup RWvate area config
260***************************/
261#define OS_FLASH_RW_SM_BAKEUP_OFFSET_FROM_NV (OS_FLASH_RW_BACKUP_NVRAM_BASE_ADDR + OS_FLASH_RW_BACKUP_NVRAM_SIZE)
262#define OS_FLASH_RW_SM_BAKEUP_BASE_ADDR (OS_FLASH_NV_PARTITION_BASE_ADDR + OS_FLASH_RW_SM_BAKEUP_OFFSET_FROM_NV)
263#define OS_FLASH_RW_SM_BAKEUP_SIZE 0
264#endif
265
266/******************************
267 factory setting nvram area 1.5M
268******************************/
269#define OS_FLASH_FACTORY_NVRAM_BASE_ADDR 0 /* ³ö³§ÇøÊǵ¥¶ÀµÄÒ»¸ö·ÖÇønvfac£¬½èÖúÔÚ´ËÎļþ¶¨Òå */
270#define OS_FLASH_FACTORY_NVRAM_SIZE (512 * 1024) /* 0.5M£¬ÇëÈ·±£nvrwµÄ¹¤×÷ÇøÊ¹Óû®·Ö²»³¬¹ý0.5M */
271
272/******************************
273 Reserved NV Head addr
274******************************/
275#define PS_SELLSTAT_NVHEAD_OFFSET_FROM_NV (OS_FLASH_PS_RW_NONFAC_OFFSET_FROM_NV + 4)
276#define PS_PLMNCFG_NVHEAD_OFFSET_FROM_NV (OS_FLASH_PS_RW_NONFAC_OFFSET_FROM_NV + 304)
277#define PS_UEINFO_NVHEAD_OFFSET_FROM_NV (OS_FLASH_PS_RW_NONFAC_OFFSET_FROM_NV + 20320)
278#define PS_SIGNALBOX_NVHEAD_OFFSET_FROM_NV (OS_FLASH_PS_RW_NONFAC_OFFSET_FROM_NV + 27448)
279#define PS_UECAPA_NVHEAD_OFFSET_FROM_NV (OS_FLASH_PS_RW_NONFAC_OFFSET_FROM_NV + 27492)
280#define PS_USERSET_NVHEAD_OFFSET_FROM_NV (OS_FLASH_PS_RW_NONFAC_OFFSET_FROM_NV + 38136)
281
282#define REF_DESIGN_USER_OFFSET_FROM_NV (OS_FLASH_REF_DESIGN_RW_OFFSET_FROM_NV + 1262)
283
284/******************************
285 vsim area
286******************************/
287#define OS_FLASH_VSIM_WORK_AREA_BASE_ADDR 0
288#define OS_FLASH_VSIM_WORK_AREA_SIZE (256 * 1024)
289
290#define OS_FLASH_VSIM_RESERVED0_BASE_ADDR (OS_FLASH_VSIM_WORK_AREA_BASE_ADDR + OS_FLASH_VSIM_WORK_AREA_SIZE)
291#define OS_FLASH_VSIM_RESERVED0_SIZE (256 * 1024)
292
293#define OS_FLASH_VSIM_BACKUP_AREA_BASE_ADDR (OS_FLASH_VSIM_RESERVED0_BASE_ADDR + OS_FLASH_VSIM_RESERVED0_SIZE)
294#define OS_FLASH_VSIM_BACKUP_AREA_SIZE OS_FLASH_VSIM_WORK_AREA_SIZE
295
296#define OS_FLASH_VSIM_RESERVED1_BASE_ADDR (OS_FLASH_VSIM_BACKUP_AREA_BASE_ADDR + OS_FLASH_VSIM_BACKUP_AREA_SIZE)
297#define OS_FLASH_VSIM_RESERVED1_SIZE (256 * 1024)
298
299#define OS_FLASH_VSIM_WORK_AREA_SYMBOL_BASE_ADDR (OS_FLASH_VSIM_RESERVED1_BASE_ADDR + OS_FLASH_VSIM_RESERVED1_SIZE)
300#define OS_FLASH_VSIM_WORK_AREA_SYMBOL_SIZE (256 * 1024)
301
302#define OS_FLASH_VSIM_BACKUP_AREA_SYMBOL_BASE_ADDR (OS_FLASH_VSIM_WORK_AREA_SYMBOL_BASE_ADDR + OS_FLASH_VSIM_WORK_AREA_SYMBOL_SIZE)
303#define OS_FLASH_VSIM_BACKUP_AREA_SYMBOL_SIZE (256 * 1024)
304
305#define OS_FLASH_VSIM_FAC_AREA_SYMBOL_BASE_ADDR (OS_FLASH_VSIM_BACKUP_AREA_SYMBOL_BASE_ADDR + OS_FLASH_VSIM_BACKUP_AREA_SYMBOL_SIZE)
306#define OS_FLASH_VSIM_FAC_AREA_SYMBOL_SIZE (256 * 1024)
307
308#define OS_FLASH_VSIM_FAC_AREA_BASE_ADDR 0
309#define OS_FLASH_VSIM_FAC_AREA_SIZE OS_FLASH_VSIM_WORK_AREA_SIZE
310
311/****************************************************************************
312 End
313****************************************************************************/
314
315#endif
316