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192.168.1.100 / T106_DC / d546008db7a151569ec4942069160aa1846278a2 / . / boot / common / src / uboot / include / configs / zx297520v3.h
blob: e2184081e9dc20a21f64346aebe133f6e95e7ad0 [file] [log] [blame]
lh9ed821d2023-04-07 01:36:19 -0700[diff] [blame]1/*
2 * (C) Copyright 2016, ZIXC Corporation.
3 *
4 */
5#ifndef __CONFIG_H
6#define __CONFIG_H
7
8#include "board.h"
9#include "../../downloader/downloader_config.h"
10#include "dma_cfg.h"
11
12/*================================================================= version ======== */
13#define CONFIG_PRINTF 1 /*uart downloader,this should be set to 0*/
14//#ifdef CONFIG_ZX297520V3E_MDL_AB
xf.li6c8fc1e2023-08-12 00:11:09 -0700[diff] [blame]15#if defined(CONFIG_ZX297520V3E_MDL_AB) || defined(CONFIG_ZX297520V3E_VEHICLE_DC) || defined(CONFIG_ZX297520V3E_VEHICLE_DC_REF)
lh9ed821d2023-04-07 01:36:19 -0700[diff] [blame]16#define VERSION_RELEASE 1
17#else
18#define VERSION_RELEASE 0
19#endif
20#define CONFIG_USB_DL 1
21#define CONFIG_UART_DL 0
22
23/*==================================================================== gpio ======== */
24#define CONFIG_ZX75XX_LED 1
25#define CONFIG_ZX75XX_KEY 1
26
27
28/*==================================================================== pmu ========= */
29#include <module/pmu.h>
30
31
32#define WORK_MODE_AMT 3
33#define WORK_MODE_PRODUCTION 2
34#define WORK_MODE_DEVELOPMENT 1
35#define WORK_MODE_USER 0
36
37
38/*=============================================================== modle config ===== */
39#define CONFIG_MODLE_LCD 0
40
41#define CONFIG_MODLE_CHARGER 0
42#define CONFIG_PMU_LOW_BATTERY 3100
43#define CONFIG_PMU_FULL_BATTERY 4200
44#define CONFIG_MAX_TIME_OUT (20*1000000) /* 20s */
45
46/*=============================================================== cpu & boar ======= */
47#define CONFIG_IDENT_STRING " for ZXIC "
48
49
50/*================================================================ debub & log ===== */
51#define NAND_DOWN_LOAD_CMD 1 /* °æ±¾µÄÏÂÔØ£¬·ÖÇø±í´òÓ¡ */
52#define LOAD_IMAGE_CRC 1 /* °æ±¾µÄУÑé */
53#define LOAD_IMAGE_DEBUG 1
54#define NAND_BAD_DEBUG 1
55#define PRINTF_PARTITION_TABLE 1
56#define TIME_DEBUG 1
57#define ZFTL_DEBUG 1
58#define DENALI_DEBUG 1
59#define SPI_NAND_DEBUG 0
60#define DEBUG 1
61#define CONFIG_DISPLAY_CPUINFO 1
62#define CONFIG_DISPLAY_BOARDINFO 1
63#define CONFIG_MTD_DEBUG 0
64#define CONFIG_MTD_DEBUG_VERBOSE 2
65#define CONFIG_MUTUAL_DEBUG 0 /* µ÷ÊÔʱʹÓã¬ÓÃÓÚ¿ØÖÆ̨µÄ½»»¥ */
66
67/*================================================================== mmu =========== */
68#define CONFIG_ENABLE_MMU 1
xf.libdd93d52023-05-12 07:10:14 -0700[diff] [blame]69#if CONFIG_ZX297520V3T_64M_UBOOT
70#define CONFIG_NAND_DMA_BUF_ADDR 0x23A00000
71#elif CONFIG_ZX297520V3T_128M_UBOOT
72#define CONFIG_NAND_DMA_BUF_ADDR 0x27A00000
lh9ed821d2023-04-07 01:36:19 -0700[diff] [blame]73#else
74#define CONFIG_NAND_DMA_BUF_ADDR 0x21A00000
75#endif
76
77#define CONFIG_USB_DMA_BUF_ADDR 0x20000000
78#define CONFIG_GMAC_DMA_BUF_ADDR DOWNLOADER_BUFFER_BASE
79
80/*================================================================ cache =========== */
81#define CONFIG_SYS_ICACHE 1
82#define CONFIG_SYS_DCACHE 1
83#if !CONFIG_SYS_ICACHE
84#define CONFIG_SYS_ICACHE_OFF
85#endif
86#if !CONFIG_SYS_DCACHE
87#define CONFIG_SYS_DCACHE_OFF
88#endif
89
90/*================================================================== int =========== */
91#define CONFIG_USE_IRQ 0
92#define CONFIG_STACKSIZE_IRQ (4*1024)
93#define CONFIG_STACKSIZE_FIQ (4*1024)
94#define CONFIG_USE_VIC 0 /* ʹÓÃÖжϿØÖÆÆ÷ */
95#define CONFIG_VIC_BASE 0x0080000B
96#define CONFIG_PERIPORT_SIZE 0x13
97
98#define CFG_TLOAD_MODE 0x87654321 /* ͬ²½ LOADER */
99#define CFG_ZLOAD_MODE 0x12345678 /* ͬ²½ LOADER */
100
101#define CFG_START_MODE_NAND 0x11111111 /* IRAM1 <--> U-BOOT */
102#define CFG_START_MODE_SPI_NAND 0x22222222 /* IRAM1 <--> U-BOOT */
103#define CFG_START_MODE_SDIO 0x33333333 /* IRAM1 <--> U-BOOT */
104#define CFG_START_MODE_EMMC 0x44444444 /* IRAM1 <--> U-BOOT */
105#define CFG_START_MODE_NOR 0x55555555 /* IRAM1 <--> U-BOOT */
106
107
108
109/* ================================================================== iram ========= */
110#define CONFIG_SYS_IRAM_BASE 0x82000000 /* Internal SRAM base address */
111#define CONFIG_SYS_IRAM_SIZE 0x8000 /* 8 KB of internal SRAM memory */
112#define CONFIG_SYS_IRAM_END (CONFIG_SYS_IRAM_BASE + CONFIG_SYS_IRAM_SIZE)
113#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_IRAM_END - GENERATED_GBL_DATA_SIZE)
114
115
116/* ================================================================== ddr ========== */
117#define CONFIG_NR_DRAM_BANKS 1
118#define CONFIG_SYS_SDRAM_BASE 0x20000800 /*2k DDR for soc test*/
119#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE /* SDRAM Bank #1 */
120
xf.libdd93d52023-05-12 07:10:14 -0700[diff] [blame]121#if CONFIG_ZX297520V3T_64M_UBOOT
lh9ed821d2023-04-07 01:36:19 -0700[diff] [blame]122#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64MB */
123#define CONFIG_SYS_SDRAM_SIZE 0x04000000 /* 64MB in DDR */
124#define CONFIG_SYS_SDRAM_CUTDOWN_SIZE 0x01000000
125#define CONFIG_SYS_SDRAM_IMAGEFS_BASE 0x22300000
126#define CONFIG_SYS_SDRAM_IMAGEFS_END 0x23000000
127#define CONFIG_SYS_SDRAM_IMAGEFS_SIZE (CONFIG_SYS_SDRAM_IMAGEFS_END - CONFIG_SYS_SDRAM_IMAGEFS_BASE)
xf.libdd93d52023-05-12 07:10:14 -0700[diff] [blame]128#elif CONFIG_ZX297520V3T_128M_UBOOT
129#define PHYS_SDRAM_1_SIZE 0x08000000 /* 128MB */
130#define CONFIG_SYS_SDRAM_SIZE 0x08000000 /* 128MB in DDR */
131#define CONFIG_SYS_SDRAM_IMAGEFS_BASE 0x25000000
132#define CONFIG_SYS_SDRAM_IMAGEFS_END 0x27000000
133#define CONFIG_SYS_SDRAM_IMAGEFS_SIZE (CONFIG_SYS_SDRAM_IMAGEFS_END - CONFIG_SYS_SDRAM_IMAGEFS_BASE)
lh9ed821d2023-04-07 01:36:19 -0700[diff] [blame]134#else
135#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32MB */
136#define CONFIG_SYS_SDRAM_SIZE 0x02000000 /* 32MB in DDR */
137#define CONFIG_SYS_SDRAM_IMAGEFS_BASE 0x20C00000
xf.libdd93d52023-05-12 07:10:14 -0700[diff] [blame]138#define CONFIG_SYS_SDRAM_IMAGEFS_END 0x21400000
lh9ed821d2023-04-07 01:36:19 -0700[diff] [blame]139#define CONFIG_SYS_SDRAM_IMAGEFS_SIZE (CONFIG_SYS_SDRAM_IMAGEFS_END - CONFIG_SYS_SDRAM_IMAGEFS_BASE)
140#endif
141
142#define CONFIG_SYS_SDRAM_TEMP_BASE 0x21400000 /* ddrÊý¾Ý°æ±¾ÁÙʱ»º´æµØÖ· */
143#define CONFIG_SYS_SDRAM_TEMP_LZMA 0X21600000 /* »º´æµØÖ·£¬ÓÃÓÚ½âѹ°æ±¾Ê±Ê¹Óà */
144
145#define CONFIG_SYS_SDRAM_UPDATE_ALIGNED_OFFSET 0x5000000 /* 80MB for LocalUpdate Use. */
146
147/* boot ´«µÝ¸økernelµÄÄÚ´æ²ÎÊý*/
148#define CONFIG_SYS_SDRAM32_A9_SIZE 0x01BC0000 //27.75M
149#define CONFIG_SYS_SDRAM32_RECOVERY_A9_SIZE 0x02000000
150
151#ifdef CONFIG_ZX297520V3E_WATCH_CAP
152#define CONFIG_SYS_SDRAM64_A9_SIZE 0x02AC0000 //42.75M
153#else
154#define CONFIG_SYS_SDRAM64_A9_SIZE 0x03BC0000 //59.75M
155#endif
156#define CONFIG_SYS_SDRAM64_RECOVERY_A9_SIZE 0x04000000
157
158#define CONFIG_SYS_SDRAM128_A9_SIZE 0x07BC0000 //123.75M
159#define CONFIG_SYS_SDRAM128_RECOVERY_A9_SIZE 0x08000000
160
161#define CONFIG_SYS_SDRAM256_A9_SIZE 0x0FBC0000 //251S.75M
162#define CONFIG_SYS_SDRAM256_RECOVERY_A9_SIZE 0x10000000
163
164#define AMT_MODE_FLAG 0x544D
165
166
167/* ================================================================= boot ========= */
168#define CONFIG_MACH_TYPE 7523
169#define CONFIG_SETUP_MEMORY_TAGS 1
170#define CONFIG_CMDLINE_TAG 1
171#define CONFIG_INITRD_TAG 1
172
173#define CONFIG_BOOTARGS "" /* partition.c */
174#define CONFIG_BOOTCOMMAND "" /* load_image.c */
175#define CONFIG_CMD_BOOTM
176
177
178/* ================================================================= malloc ======== */
179#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2048 * 1024)/* 2M */
180
181
182/* ================================================================ Command ======== */
183#include <config_cmd_default.h>
184#define CONFIG_CMD_CACHE
185
186/* ============================================================= usb download ====== */
187#define CONFIG_USB_LOAD_MAX_LEN CONFIG_SYS_SDRAM_SIZE-0x400000
188#define CONFIG_USB_LOAD_MAX_PACKET_LEN CONFIG_USB_LOAD_MAX_LEN
189
190
191/* ==================================================================== nand ======= */
192#define CONFIG_NAND 1
193#define CONFIG_CMD_NAND_YAFFS
194#define CONFIG_CMD_NAND
195#define CONFIG_NAND_MTD 1
196#define CONFIG_NAND_DENALI 1
197#define CFG_DENALI_DMA_BUF_SIZE 0x4000 /* 16k */
198#define CFG_DENALI_DMA_BUF_ADDR (CONFIG_SYS_SDRAM_BASE + \
199 CONFIG_SYS_SDRAM_SIZE - \
200 CONFIG_SYS_UBOOT_SIZE - 0x10000 - \
201 CFG_DENALI_DMA_BUF_SIZE)/* TLB 64K */
202#define CONFIG_SYS_MAX_NAND_DEVICE 1
203#define CONFIG_SYS_NAND_BASE 0x0 /* Ò»¿ªÊ¼Ã»ÓÐÒâÒ壬ºóÃ滹»á³õʼ»¯ */
204#define CONFIG_BOOT_NAND
205
206
207/* ===================================================================== mtd ======= */
208#define CONFIG_PARTITIONS
209
210/* ================================================================== time ========= */
211#define CONFIG_POWER_ON_DELAY_TIME 3000000 /* 3s */
212#define CONFIG_SYS_HZ 1000
213#if CONFIG_MUTUAL_DEBUG
214#define CONFIG_BOOTDELAY 8
215#else
216#define CONFIG_BOOTDELAY 0
217#endif
218#define CONFIG_ZERO_BOOTDELAY_CHECK
219
220
221/* ============================================================ uboot system ======= */
222#define CONFIG_SYS_UBOOT_SIZE (2 * 1024 * 1024)
223#define CONFIG_SYS_PHY_UBOOT_BASE (CONFIG_SYS_SDRAM_BASE + \
224 CONFIG_SYS_SDRAM_SIZE - \
225 CONFIG_SYS_UBOOT_SIZE - 0x10000)
226#define CONFIG_SYS_LONGHELP
227#define CONFIG_SYS_PROMPT "[ZXIC]# "
228#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
229#define CONFIG_SYS_PBSIZE 512 /* Print Buffer Size */
230#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
231#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
232#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE /* memtest works on */
233#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE) /* 32MB in DRAM */
234#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE /* default load address */
235
236#define CONFIG_LOADADDR 0x22000000
237
238/* ================================================================= serial ======== */
239#define CONFIG_BAUDRATE 921600
240#define CONFIG_SERIAL1 1 /* we use SERIAL 1 */
241#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
242#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 921600}
243#ifdef CONFIG_SYS_HUSH_PARSER
244#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
245#endif
246#define CONFIG_AUTO_COMPLETE
247#define CONFIG_CMDLINE_EDITING
248#define CONFIG_ENV_OVERWRITE
249
250
251/* ============================================================== nor flash ======== */
252#define CONFIG_SYS_NO_FLASH
253
254#define CONFIG_CMD_JFFS2
255#define CONFIG_JFFS2_DEV "nand0"
256#define CONFIG_JFFS2_NAND
257/* ================================================================= env =========== */
258#define CONFIG_ENV_IS_NOWHERE 1
259#define CONFIG_ENV_SIZE 0x4000
260#define CONFIG_ENV_OFFSET 0x0040000
261
262#define NoBatteryTempratureVoltage 4000
263
264#define CONFIG_CMD_MII 0
265#define CONFIG_CMD_NET 1
266#define CONFIG_CMD_PING 1
267#define CONFIG_ZX_MDIO 1
268#define CONFIG_CMD_TFTPPUT 1
269
270#define CONFIG_ZTE_CMD 1
271#define CONFIG_CMD_TFTPDOWNER 0
272
273/***************************************************/
274/*ÒÔÏÂÊÇuboot»·¾³±äÁ¿µÄ¶¨Òå*/
275
276#if 1
277//#define CONFIG_ETHADDR 00:02:f7:ef:00:02 //?????macµØÖ·²»È·¶¨
278#define CONFIG_ETHADDR ec:1d:7f:b0:2f:32 //?????macµØÖ·²»È·¶¨
279//#define CONFIG_ETHADDR 00:22:93:4e:d9:dd //?????macµØÖ·²»È·¶¨
280//#define CONFIG_ETHADDR 6c:0b:84:3b:f8:42 //?????macµØÖ·²»È·¶¨
281#define CONFIG_HOSTNAME unknown
282#define CONFIG_NETMASK 255.255.255.0 /*×ÓÍøÑÚÂë*/
283#define CONFIG_IPADDR 192.168.1.1 /*¿ª·¢°åIPµØÖ·*/
284#define CONFIG_SERVERIP 192.168.1.20 /*·þÎñÆ÷IPµØÖ·*/
285#define CONFIG_GATEWAYIP 192.168.1.1 /*Íø¹ØIPµØÖ·*/
286#define CONFIG_BOOTFILE ZX297520V3.bin
287//#define CONFIG_ROOTPATH /opt/nfsroot /*NFS ·þÎñÆ÷¶ËĿ¼*/
288#endif
289#endif /* __CONFIG_H */