blob: 791f1b947ce1d747d259abd40c12dbd9aa56218d [file] [log] [blame]
lh9ed821d2023-04-07 01:36:19 -07001/*
2 ***********************************************************
3 */
4
5#ifndef __EFUSE_H__
6#define __EFUSE_H__
7
8
9/* -------- efuse ¼Ä´æÆ÷-------------*/
10#define SYS_EFUSE_BASE 0x0121b000
11#define EFUSE_RAM_BASE (SYS_EFUSE_BASE+0x40)
12
13#define SYS_CTRL_BASE 0x00140000
14#define EFUSE_BYPASS (SYS_CTRL_BASE+0x140)
15
16
17#define CHIP_DDR_32M 0
18#define CHIP_DDR_64M 1
19#define CHIP_DDR_128M 2
20#define CHIP_DDR_256M 3
lh758261d2023-07-13 05:52:04 -070021#define CHIP_DDR_512M 4
lh9ed821d2023-04-07 01:36:19 -070022
23
24#define SECURE_VERIFY_ENABLE 0
25#define SECURE_VERIFY_DISABLE 1
26
27#define ZX297520V3_GW_NYB_1G_DDR 0xF86302
28#define ZX297520V3_GW_NYC_1G_DDR 0xF86303
29#define ZX297520V3ECO_GW_UNILC_512M_DDR 0xF86304
30#define ZX297520V3ECO_GW_APM_512M_DDR 0xF86305
31#define ZX297520V3ECO_GW_NYB_1G_DDR 0xF86306
32#define ZX297520V3ECO_GW_NYC_1G_DDR 0xF86307
33#define ZX297520V3ECO_GW_WINBD_256M_DDR 0xF86308
34#define ZX297520V3ECO_GW_UNILC_256M_DDR 0xF86309
35#define ZX297520V3ECO_GW_APM_256M_DDR 0xF8630a
36#define ZX297520V3ECO_GW_ESMT_512M_DDR 0xF8630b
37#define ZX297520V3SC_GW_NYC_1G_DDR 0xF8630c
38#define ZX297520V3ECOSCC_GW_UNILC_1G_DDR 0xF8630d
39#define ZX297520V3ECOSCC_GW_NYC_1G_DDR 0xF8630e
40#define ZX297520V3ECOSC_GW_NYC_1G_DDR 0xF8630f
41#define ZX297520V3ECOSC_GW_UNILC_1G_DDR 0xF86310
42#define ZX297520V3ECOSC_GW_NYC_2G_DDR 0xF86311
lh758261d2023-07-13 05:52:04 -070043#define ZX297520V3ECOSCC_GW_NYB_4G_DDR 0xF86313
44#define ZX297520V3ECOGG_GW_NYC_2G_DDR 0xF86314
45#define ZX297520V3ECOGG_GW_NYB_4G_DDR 0xF86315
xf.liaa4d92f2023-09-13 00:18:58 -070046#define ZX297520V3ECOGG_GW_NYC_NOR_2G_DDR 0xF86316
47#define ZX297520V3ECOSC_GW_NYC_NOR_2G_DDR 0xF86317
lh9ed821d2023-04-07 01:36:19 -070048
49#define ZX297520V3_ZW_NYB_1G_DDR 0x1E871E
50#define ZX297520V3_ZW_NYC_1G_DDR 0x1E871F
51#define ZX297520V3ECO_ZW_UNILC_512M_DDR 0x1E8720
52#define ZX297520V3ECO_ZW_APM_512M_DDR 0x1E8721
53#define ZX297520V3ECO_ZW_NYB_1G_DDR 0x1E8722
54#define ZX297520V3ECO_ZW_NYC_1G_DDR 0x1E8723
55#define ZX297520V3ECO_ZW_WINBD_256M_DDR 0x1E8724
56#define ZX297520V3ECO_ZW_UNILC_256M_DDR 0x1E8725
57#define ZX297520V3ECO_ZW_APM_256M_DDR 0x1E8726
58#define ZX297520V3ECO_ZW_ESMT_512M_DDR 0x1E8727
59
60#define ZX297520V3ECO_AZW_UNILC_512M_DDR 0x1F9801
61
62
63/*ΪÁË¿´ÆðÀ´·½±ã, hashºÍkeyÔÚbufferµÄ´æ·Å˳ÐòΪµÍµØÖ··Å¸ßλÊý¾Ý*/
64// ¶¨Òå½á¹¹
65typedef volatile struct
66{
67 u32 secure_flag;
68 u32 puk_hash[4];
69} efuse_struct;
70
71
72
73void efuse_init(void);
74int get_ddr_flag(void);
75int get_secure_verify_status(void);
76
77
78#endif /* __EFUSE_H__ */