blob: 4f3f9b90714c9596eddabeb64e475081932f7023 [file] [log] [blame]
lh9ed821d2023-04-07 01:36:19 -07001/*******************************************************************************
2 * Copyright (C) 2007, ZTE Corporation.
3 *
4 * File Name:
5 * File Mark:
6 * Description:
7 * Others:
8 * Version: 1.0
9 * Author: geanfeng
10 * Date: 2013-09-25
11 * History 1:
12 * Date:
13 * Version:
14 * Author:
15 * Modification:
16 * History 2:
17 ********************************************************************************/
18
19#ifndef _DRVS_REGIO_H_
20#define _DRVS_REGIO_H_
21
22/****************************************************************************
23* Include files
24****************************************************************************/
25
26/****************************************************************************
27* Macros
28****************************************************************************/
29
30
31/****************************************************************************
32* Types
33****************************************************************************/
34
35/****************************************************************************
36* Constants
37****************************************************************************/
38
39/****************************************************************************
40* Global Variables
41****************************************************************************/
42
43/****************************************************************************
44* Function Prototypes
45****************************************************************************/
46#ifdef _OS_TOS
47#define wfi() __asm__ __volatile__ ("wfi" : : : "memory")
48
49/*
50* memory barriers
51*/
52#define isb() __asm__ __volatile__ ("isb" : : : "memory")
53#define dsb() __asm__ __volatile__ ("dsb" : : : "memory")
54#define dmb() __asm__ __volatile__ ("dmb" : : : "memory")
55
56#define wmb() do { dsb(); zDrvL2x0_Sync(); } while (0)
57#define rmb() dsb()
58#endif
59
60/****************************************************************************
61* io operation definition
62****************************************************************************/
63/*
64* io operation without memory barriers
65*/
66#define reg(addr) (*(volatile unsigned *)(addr))
67#define reg8(addr) (*(volatile unsigned char *)(addr))
68#define reg16(addr) (*(volatile unsigned short *)(addr))
69#define reg32(addr) (*(volatile unsigned long *)(addr))
70
71/*
72* io operation with memory barriers
73* cortex-R7 has out-of-order instruction execution
74* these macro functions below maybe used in some special case
75*/
76#define ioread8(p) ({ unsigned char __v = reg8(p); rmb(); __v; })
77#define ioread16(p) ({ unsigned short __v = reg16(p)); rmb(); __v; })
78#define ioread32(p) ({ unsigned long __v = reg32(p)); rmb(); __v; })
79
80#define iowrite8(v,p) ({ wmb(); reg8(p) = v; })
81#define iowrite16(v,p) ({ wmb(); reg16(p) = v; })
82#define iowrite32(v,p) ({ wmb(); reg32(p) = v; })
83
84VOID zDrv_MemcpyToIo32(VOID *dst, VOID *src, UINT32 byteCount);
85
86#endif