| lh | 9ed821d | 2023-04-07 01:36:19 -0700 | [diff] [blame] | 1 | /* | 
 | 2 |  * rtc-ds1307.c - RTC driver for some mostly-compatible I2C chips. | 
 | 3 |  * | 
 | 4 |  *  Copyright (C) 2005 James Chapman (ds1337 core) | 
 | 5 |  *  Copyright (C) 2006 David Brownell | 
 | 6 |  *  Copyright (C) 2009 Matthias Fuchs (rx8025 support) | 
 | 7 |  * | 
 | 8 |  * This program is free software; you can redistribute it and/or modify | 
 | 9 |  * it under the terms of the GNU General Public License version 2 as | 
 | 10 |  * published by the Free Software Foundation. | 
 | 11 |  */ | 
 | 12 |  | 
 | 13 | #include <linux/module.h> | 
 | 14 | #include <linux/init.h> | 
 | 15 | #include <linux/slab.h> | 
 | 16 | #include <linux/i2c.h> | 
 | 17 | #include <linux/string.h> | 
 | 18 | #include <linux/rtc.h> | 
 | 19 | #include <linux/bcd.h> | 
 | 20 |  | 
 | 21 |  | 
 | 22 |  | 
 | 23 | /* | 
 | 24 |  * We can't determine type by probing, but if we expect pre-Linux code | 
 | 25 |  * to have set the chip up as a clock (turning on the oscillator and | 
 | 26 |  * setting the date and time), Linux can ignore the non-clock features. | 
 | 27 |  * That's a natural job for a factory or repair bench. | 
 | 28 |  */ | 
 | 29 | enum ds_type { | 
 | 30 | 	ds_1307, | 
 | 31 | 	ds_1337, | 
 | 32 | 	ds_1338, | 
 | 33 | 	ds_1339, | 
 | 34 | 	ds_1340, | 
 | 35 | 	ds_1388, | 
 | 36 | 	ds_3231, | 
 | 37 | 	m41t00, | 
 | 38 | 	mcp7941x, | 
 | 39 | 	rx_8025, | 
 | 40 | 	last_ds_type /* always last */ | 
 | 41 | 	/* rs5c372 too?  different address... */ | 
 | 42 | }; | 
 | 43 |  | 
 | 44 |  | 
 | 45 | /* RTC registers don't differ much, except for the century flag */ | 
 | 46 | #define DS1307_REG_SECS		0x00	/* 00-59 */ | 
 | 47 | #	define DS1307_BIT_CH		0x80 | 
 | 48 | #	define DS1340_BIT_nEOSC		0x80 | 
 | 49 | #	define MCP7941X_BIT_ST		0x80 | 
 | 50 | #define DS1307_REG_MIN		0x01	/* 00-59 */ | 
 | 51 | #define DS1307_REG_HOUR		0x02	/* 00-23, or 1-12{am,pm} */ | 
 | 52 | #	define DS1307_BIT_12HR		0x40	/* in REG_HOUR */ | 
 | 53 | #	define DS1307_BIT_PM		0x20	/* in REG_HOUR */ | 
 | 54 | #	define DS1340_BIT_CENTURY_EN	0x80	/* in REG_HOUR */ | 
 | 55 | #	define DS1340_BIT_CENTURY	0x40	/* in REG_HOUR */ | 
 | 56 | #define DS1307_REG_WDAY		0x03	/* 01-07 */ | 
 | 57 | #	define MCP7941X_BIT_VBATEN	0x08 | 
 | 58 | #define DS1307_REG_MDAY		0x04	/* 01-31 */ | 
 | 59 | #define DS1307_REG_MONTH	0x05	/* 01-12 */ | 
 | 60 | #	define DS1337_BIT_CENTURY	0x80	/* in REG_MONTH */ | 
 | 61 | #define DS1307_REG_YEAR		0x06	/* 00-99 */ | 
 | 62 |  | 
 | 63 | /* | 
 | 64 |  * Other registers (control, status, alarms, trickle charge, NVRAM, etc) | 
 | 65 |  * start at 7, and they differ a LOT. Only control and status matter for | 
 | 66 |  * basic RTC date and time functionality; be careful using them. | 
 | 67 |  */ | 
 | 68 | #define DS1307_REG_CONTROL	0x07		/* or ds1338 */ | 
 | 69 | #	define DS1307_BIT_OUT		0x80 | 
 | 70 | #	define DS1338_BIT_OSF		0x20 | 
 | 71 | #	define DS1307_BIT_SQWE		0x10 | 
 | 72 | #	define DS1307_BIT_RS1		0x02 | 
 | 73 | #	define DS1307_BIT_RS0		0x01 | 
 | 74 | #define DS1337_REG_CONTROL	0x0e | 
 | 75 | #	define DS1337_BIT_nEOSC		0x80 | 
 | 76 | #	define DS1339_BIT_BBSQI		0x20 | 
 | 77 | #	define DS3231_BIT_BBSQW		0x40 /* same as BBSQI */ | 
 | 78 | #	define DS1337_BIT_RS2		0x10 | 
 | 79 | #	define DS1337_BIT_RS1		0x08 | 
 | 80 | #	define DS1337_BIT_INTCN		0x04 | 
 | 81 | #	define DS1337_BIT_A2IE		0x02 | 
 | 82 | #	define DS1337_BIT_A1IE		0x01 | 
 | 83 | #define DS1340_REG_CONTROL	0x07 | 
 | 84 | #	define DS1340_BIT_OUT		0x80 | 
 | 85 | #	define DS1340_BIT_FT		0x40 | 
 | 86 | #	define DS1340_BIT_CALIB_SIGN	0x20 | 
 | 87 | #	define DS1340_M_CALIBRATION	0x1f | 
 | 88 | #define DS1340_REG_FLAG		0x09 | 
 | 89 | #	define DS1340_BIT_OSF		0x80 | 
 | 90 | #define DS1337_REG_STATUS	0x0f | 
 | 91 | #	define DS1337_BIT_OSF		0x80 | 
 | 92 | #	define DS1337_BIT_A2I		0x02 | 
 | 93 | #	define DS1337_BIT_A1I		0x01 | 
 | 94 | #define DS1339_REG_ALARM1_SECS	0x07 | 
 | 95 | #define DS1339_REG_TRICKLE	0x10 | 
 | 96 |  | 
 | 97 | #define RX8025_REG_CTRL1	0x0e | 
 | 98 | #	define RX8025_BIT_2412		0x20 | 
 | 99 | #define RX8025_REG_CTRL2	0x0f | 
 | 100 | #	define RX8025_BIT_PON		0x10 | 
 | 101 | #	define RX8025_BIT_VDET		0x40 | 
 | 102 | #	define RX8025_BIT_XST		0x20 | 
 | 103 |  | 
 | 104 |  | 
 | 105 | struct ds1307 { | 
 | 106 | 	u8			offset; /* register's offset */ | 
 | 107 | 	u8			regs[11]; | 
 | 108 | 	u16			nvram_offset; | 
 | 109 | 	struct bin_attribute	*nvram; | 
 | 110 | 	enum ds_type		type; | 
 | 111 | 	unsigned long		flags; | 
 | 112 | #define HAS_NVRAM	0		/* bit 0 == sysfs file active */ | 
 | 113 | #define HAS_ALARM	1		/* bit 1 == irq claimed */ | 
 | 114 | 	struct i2c_client	*client; | 
 | 115 | 	struct rtc_device	*rtc; | 
 | 116 | 	struct work_struct	work; | 
 | 117 | 	s32 (*read_block_data)(const struct i2c_client *client, u8 command, | 
 | 118 | 			       u8 length, u8 *values); | 
 | 119 | 	s32 (*write_block_data)(const struct i2c_client *client, u8 command, | 
 | 120 | 				u8 length, const u8 *values); | 
 | 121 | }; | 
 | 122 |  | 
 | 123 | struct chip_desc { | 
 | 124 | 	unsigned		alarm:1; | 
 | 125 | 	u16			nvram_offset; | 
 | 126 | 	u16			nvram_size; | 
 | 127 | }; | 
 | 128 |  | 
 | 129 | static const struct chip_desc chips[last_ds_type] = { | 
 | 130 | 	[ds_1307] = { | 
 | 131 | 		.nvram_offset	= 8, | 
 | 132 | 		.nvram_size	= 56, | 
 | 133 | 	}, | 
 | 134 | 	[ds_1337] = { | 
 | 135 | 		.alarm		= 1, | 
 | 136 | 	}, | 
 | 137 | 	[ds_1338] = { | 
 | 138 | 		.nvram_offset	= 8, | 
 | 139 | 		.nvram_size	= 56, | 
 | 140 | 	}, | 
 | 141 | 	[ds_1339] = { | 
 | 142 | 		.alarm		= 1, | 
 | 143 | 	}, | 
 | 144 | 	[ds_3231] = { | 
 | 145 | 		.alarm		= 1, | 
 | 146 | 	}, | 
 | 147 | 	[mcp7941x] = { | 
 | 148 | 		/* this is battery backed SRAM */ | 
 | 149 | 		.nvram_offset	= 0x20, | 
 | 150 | 		.nvram_size	= 0x40, | 
 | 151 | 	}, | 
 | 152 | }; | 
 | 153 |  | 
 | 154 | static const struct i2c_device_id ds1307_id[] = { | 
 | 155 | 	{ "ds1307", ds_1307 }, | 
 | 156 | 	{ "ds1337", ds_1337 }, | 
 | 157 | 	{ "ds1338", ds_1338 }, | 
 | 158 | 	{ "ds1339", ds_1339 }, | 
 | 159 | 	{ "ds1388", ds_1388 }, | 
 | 160 | 	{ "ds1340", ds_1340 }, | 
 | 161 | 	{ "ds3231", ds_3231 }, | 
 | 162 | 	{ "m41t00", m41t00 }, | 
 | 163 | 	{ "mcp7941x", mcp7941x }, | 
 | 164 | 	{ "pt7c4338", ds_1307 }, | 
 | 165 | 	{ "rx8025", rx_8025 }, | 
 | 166 | 	{ } | 
 | 167 | }; | 
 | 168 | MODULE_DEVICE_TABLE(i2c, ds1307_id); | 
 | 169 |  | 
 | 170 | /*----------------------------------------------------------------------*/ | 
 | 171 |  | 
 | 172 | #define BLOCK_DATA_MAX_TRIES 10 | 
 | 173 |  | 
 | 174 | static s32 ds1307_read_block_data_once(const struct i2c_client *client, | 
 | 175 | 				       u8 command, u8 length, u8 *values) | 
 | 176 | { | 
 | 177 | 	s32 i, data; | 
 | 178 |  | 
 | 179 | 	for (i = 0; i < length; i++) { | 
 | 180 | 		data = i2c_smbus_read_byte_data(client, command + i); | 
 | 181 | 		if (data < 0) | 
 | 182 | 			return data; | 
 | 183 | 		values[i] = data; | 
 | 184 | 	} | 
 | 185 | 	return i; | 
 | 186 | } | 
 | 187 |  | 
 | 188 | static s32 ds1307_read_block_data(const struct i2c_client *client, u8 command, | 
 | 189 | 				  u8 length, u8 *values) | 
 | 190 | { | 
 | 191 | 	u8 oldvalues[I2C_SMBUS_BLOCK_MAX]; | 
 | 192 | 	s32 ret; | 
 | 193 | 	int tries = 0; | 
 | 194 |  | 
 | 195 | 	dev_dbg(&client->dev, "ds1307_read_block_data (length=%d)\n", length); | 
 | 196 | 	ret = ds1307_read_block_data_once(client, command, length, values); | 
 | 197 | 	if (ret < 0) | 
 | 198 | 		return ret; | 
 | 199 | 	do { | 
 | 200 | 		if (++tries > BLOCK_DATA_MAX_TRIES) { | 
 | 201 | 			dev_err(&client->dev, | 
 | 202 | 				"ds1307_read_block_data failed\n"); | 
 | 203 | 			return -EIO; | 
 | 204 | 		} | 
 | 205 | 		memcpy(oldvalues, values, length); | 
 | 206 | 		ret = ds1307_read_block_data_once(client, command, length, | 
 | 207 | 						  values); | 
 | 208 | 		if (ret < 0) | 
 | 209 | 			return ret; | 
 | 210 | 	} while (memcmp(oldvalues, values, length)); | 
 | 211 | 	return length; | 
 | 212 | } | 
 | 213 |  | 
 | 214 | static s32 ds1307_write_block_data(const struct i2c_client *client, u8 command, | 
 | 215 | 				   u8 length, const u8 *values) | 
 | 216 | { | 
 | 217 | 	u8 currvalues[I2C_SMBUS_BLOCK_MAX]; | 
 | 218 | 	int tries = 0; | 
 | 219 |  | 
 | 220 | 	dev_dbg(&client->dev, "ds1307_write_block_data (length=%d)\n", length); | 
 | 221 | 	do { | 
 | 222 | 		s32 i, ret; | 
 | 223 |  | 
 | 224 | 		if (++tries > BLOCK_DATA_MAX_TRIES) { | 
 | 225 | 			dev_err(&client->dev, | 
 | 226 | 				"ds1307_write_block_data failed\n"); | 
 | 227 | 			return -EIO; | 
 | 228 | 		} | 
 | 229 | 		for (i = 0; i < length; i++) { | 
 | 230 | 			ret = i2c_smbus_write_byte_data(client, command + i, | 
 | 231 | 							values[i]); | 
 | 232 | 			if (ret < 0) | 
 | 233 | 				return ret; | 
 | 234 | 		} | 
 | 235 | 		ret = ds1307_read_block_data_once(client, command, length, | 
 | 236 | 						  currvalues); | 
 | 237 | 		if (ret < 0) | 
 | 238 | 			return ret; | 
 | 239 | 	} while (memcmp(currvalues, values, length)); | 
 | 240 | 	return length; | 
 | 241 | } | 
 | 242 |  | 
 | 243 | /*----------------------------------------------------------------------*/ | 
 | 244 |  | 
 | 245 | /* | 
 | 246 |  * The IRQ logic includes a "real" handler running in IRQ context just | 
 | 247 |  * long enough to schedule this workqueue entry.   We need a task context | 
 | 248 |  * to talk to the RTC, since I2C I/O calls require that; and disable the | 
 | 249 |  * IRQ until we clear its status on the chip, so that this handler can | 
 | 250 |  * work with any type of triggering (not just falling edge). | 
 | 251 |  * | 
 | 252 |  * The ds1337 and ds1339 both have two alarms, but we only use the first | 
 | 253 |  * one (with a "seconds" field).  For ds1337 we expect nINTA is our alarm | 
 | 254 |  * signal; ds1339 chips have only one alarm signal. | 
 | 255 |  */ | 
 | 256 | static void ds1307_work(struct work_struct *work) | 
 | 257 | { | 
 | 258 | 	struct ds1307		*ds1307; | 
 | 259 | 	struct i2c_client	*client; | 
 | 260 | 	struct mutex		*lock; | 
 | 261 | 	int			stat, control; | 
 | 262 |  | 
 | 263 | 	ds1307 = container_of(work, struct ds1307, work); | 
 | 264 | 	client = ds1307->client; | 
 | 265 | 	lock = &ds1307->rtc->ops_lock; | 
 | 266 |  | 
 | 267 | 	mutex_lock(lock); | 
 | 268 | 	stat = i2c_smbus_read_byte_data(client, DS1337_REG_STATUS); | 
 | 269 | 	if (stat < 0) | 
 | 270 | 		goto out; | 
 | 271 |  | 
 | 272 | 	if (stat & DS1337_BIT_A1I) { | 
 | 273 | 		stat &= ~DS1337_BIT_A1I; | 
 | 274 | 		i2c_smbus_write_byte_data(client, DS1337_REG_STATUS, stat); | 
 | 275 |  | 
 | 276 | 		control = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL); | 
 | 277 | 		if (control < 0) | 
 | 278 | 			goto out; | 
 | 279 |  | 
 | 280 | 		control &= ~DS1337_BIT_A1IE; | 
 | 281 | 		i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, control); | 
 | 282 |  | 
 | 283 | 		rtc_update_irq(ds1307->rtc, 1, RTC_AF | RTC_IRQF); | 
 | 284 | 	} | 
 | 285 |  | 
 | 286 | out: | 
 | 287 | 	if (test_bit(HAS_ALARM, &ds1307->flags)) | 
 | 288 | 		enable_irq(client->irq); | 
 | 289 | 	mutex_unlock(lock); | 
 | 290 | } | 
 | 291 |  | 
 | 292 | static irqreturn_t ds1307_irq(int irq, void *dev_id) | 
 | 293 | { | 
 | 294 | 	struct i2c_client	*client = dev_id; | 
 | 295 | 	struct ds1307		*ds1307 = i2c_get_clientdata(client); | 
 | 296 |  | 
 | 297 | 	disable_irq_nosync(irq); | 
 | 298 | 	schedule_work(&ds1307->work); | 
 | 299 | 	return IRQ_HANDLED; | 
 | 300 | } | 
 | 301 |  | 
 | 302 | /*----------------------------------------------------------------------*/ | 
 | 303 |  | 
 | 304 | static int ds1307_get_time(struct device *dev, struct rtc_time *t) | 
 | 305 | { | 
 | 306 | 	struct ds1307	*ds1307 = dev_get_drvdata(dev); | 
 | 307 | 	int		tmp; | 
 | 308 |  | 
 | 309 | 	/* read the RTC date and time registers all at once */ | 
 | 310 | 	tmp = ds1307->read_block_data(ds1307->client, | 
 | 311 | 		ds1307->offset, 7, ds1307->regs); | 
 | 312 | 	if (tmp != 7) { | 
 | 313 | 		dev_err(dev, "%s error %d\n", "read", tmp); | 
 | 314 | 		return -EIO; | 
 | 315 | 	} | 
 | 316 |  | 
 | 317 | 	dev_dbg(dev, "%s: %02x %02x %02x %02x %02x %02x %02x\n", | 
 | 318 | 			"read", | 
 | 319 | 			ds1307->regs[0], ds1307->regs[1], | 
 | 320 | 			ds1307->regs[2], ds1307->regs[3], | 
 | 321 | 			ds1307->regs[4], ds1307->regs[5], | 
 | 322 | 			ds1307->regs[6]); | 
 | 323 |  | 
 | 324 | 	t->tm_sec = bcd2bin(ds1307->regs[DS1307_REG_SECS] & 0x7f); | 
 | 325 | 	t->tm_min = bcd2bin(ds1307->regs[DS1307_REG_MIN] & 0x7f); | 
 | 326 | 	tmp = ds1307->regs[DS1307_REG_HOUR] & 0x3f; | 
 | 327 | 	t->tm_hour = bcd2bin(tmp); | 
 | 328 | 	t->tm_wday = bcd2bin(ds1307->regs[DS1307_REG_WDAY] & 0x07) - 1; | 
 | 329 | 	t->tm_mday = bcd2bin(ds1307->regs[DS1307_REG_MDAY] & 0x3f); | 
 | 330 | 	tmp = ds1307->regs[DS1307_REG_MONTH] & 0x1f; | 
 | 331 | 	t->tm_mon = bcd2bin(tmp) - 1; | 
 | 332 |  | 
 | 333 | 	/* assume 20YY not 19YY, and ignore DS1337_BIT_CENTURY */ | 
 | 334 | 	t->tm_year = bcd2bin(ds1307->regs[DS1307_REG_YEAR]) + 100; | 
 | 335 |  | 
 | 336 | 	dev_dbg(dev, "%s secs=%d, mins=%d, " | 
 | 337 | 		"hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n", | 
 | 338 | 		"read", t->tm_sec, t->tm_min, | 
 | 339 | 		t->tm_hour, t->tm_mday, | 
 | 340 | 		t->tm_mon, t->tm_year, t->tm_wday); | 
 | 341 |  | 
 | 342 | 	/* initial clock setting can be undefined */ | 
 | 343 | 	return rtc_valid_tm(t); | 
 | 344 | } | 
 | 345 |  | 
 | 346 | static int ds1307_set_time(struct device *dev, struct rtc_time *t) | 
 | 347 | { | 
 | 348 | 	struct ds1307	*ds1307 = dev_get_drvdata(dev); | 
 | 349 | 	int		result; | 
 | 350 | 	int		tmp; | 
 | 351 | 	u8		*buf = ds1307->regs; | 
 | 352 |  | 
 | 353 | 	dev_dbg(dev, "%s secs=%d, mins=%d, " | 
 | 354 | 		"hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n", | 
 | 355 | 		"write", t->tm_sec, t->tm_min, | 
 | 356 | 		t->tm_hour, t->tm_mday, | 
 | 357 | 		t->tm_mon, t->tm_year, t->tm_wday); | 
 | 358 |  | 
 | 359 | 	buf[DS1307_REG_SECS] = bin2bcd(t->tm_sec); | 
 | 360 | 	buf[DS1307_REG_MIN] = bin2bcd(t->tm_min); | 
 | 361 | 	buf[DS1307_REG_HOUR] = bin2bcd(t->tm_hour); | 
 | 362 | 	buf[DS1307_REG_WDAY] = bin2bcd(t->tm_wday + 1); | 
 | 363 | 	buf[DS1307_REG_MDAY] = bin2bcd(t->tm_mday); | 
 | 364 | 	buf[DS1307_REG_MONTH] = bin2bcd(t->tm_mon + 1); | 
 | 365 |  | 
 | 366 | 	/* assume 20YY not 19YY */ | 
 | 367 | 	tmp = t->tm_year - 100; | 
 | 368 | 	buf[DS1307_REG_YEAR] = bin2bcd(tmp); | 
 | 369 |  | 
 | 370 | 	switch (ds1307->type) { | 
 | 371 | 	case ds_1337: | 
 | 372 | 	case ds_1339: | 
 | 373 | 	case ds_3231: | 
 | 374 | 		buf[DS1307_REG_MONTH] |= DS1337_BIT_CENTURY; | 
 | 375 | 		break; | 
 | 376 | 	case ds_1340: | 
 | 377 | 		buf[DS1307_REG_HOUR] |= DS1340_BIT_CENTURY_EN | 
 | 378 | 				| DS1340_BIT_CENTURY; | 
 | 379 | 		break; | 
 | 380 | 	case mcp7941x: | 
 | 381 | 		/* | 
 | 382 | 		 * these bits were cleared when preparing the date/time | 
 | 383 | 		 * values and need to be set again before writing the | 
 | 384 | 		 * buffer out to the device. | 
 | 385 | 		 */ | 
 | 386 | 		buf[DS1307_REG_SECS] |= MCP7941X_BIT_ST; | 
 | 387 | 		buf[DS1307_REG_WDAY] |= MCP7941X_BIT_VBATEN; | 
 | 388 | 		break; | 
 | 389 | 	default: | 
 | 390 | 		break; | 
 | 391 | 	} | 
 | 392 |  | 
 | 393 | 	dev_dbg(dev, "%s: %02x %02x %02x %02x %02x %02x %02x\n", | 
 | 394 | 		"write", buf[0], buf[1], buf[2], buf[3], | 
 | 395 | 		buf[4], buf[5], buf[6]); | 
 | 396 |  | 
 | 397 | 	result = ds1307->write_block_data(ds1307->client, | 
 | 398 | 		ds1307->offset, 7, buf); | 
 | 399 | 	if (result < 0) { | 
 | 400 | 		dev_err(dev, "%s error %d\n", "write", result); | 
 | 401 | 		return result; | 
 | 402 | 	} | 
 | 403 | 	return 0; | 
 | 404 | } | 
 | 405 |  | 
 | 406 | static int ds1337_read_alarm(struct device *dev, struct rtc_wkalrm *t) | 
 | 407 | { | 
 | 408 | 	struct i2c_client       *client = to_i2c_client(dev); | 
 | 409 | 	struct ds1307		*ds1307 = i2c_get_clientdata(client); | 
 | 410 | 	int			ret; | 
 | 411 |  | 
 | 412 | 	if (!test_bit(HAS_ALARM, &ds1307->flags)) | 
 | 413 | 		return -EINVAL; | 
 | 414 |  | 
 | 415 | 	/* read all ALARM1, ALARM2, and status registers at once */ | 
 | 416 | 	ret = ds1307->read_block_data(client, | 
 | 417 | 			DS1339_REG_ALARM1_SECS, 9, ds1307->regs); | 
 | 418 | 	if (ret != 9) { | 
 | 419 | 		dev_err(dev, "%s error %d\n", "alarm read", ret); | 
 | 420 | 		return -EIO; | 
 | 421 | 	} | 
 | 422 |  | 
 | 423 | 	dev_dbg(dev, "%s: %02x %02x %02x %02x, %02x %02x %02x, %02x %02x\n", | 
 | 424 | 			"alarm read", | 
 | 425 | 			ds1307->regs[0], ds1307->regs[1], | 
 | 426 | 			ds1307->regs[2], ds1307->regs[3], | 
 | 427 | 			ds1307->regs[4], ds1307->regs[5], | 
 | 428 | 			ds1307->regs[6], ds1307->regs[7], | 
 | 429 | 			ds1307->regs[8]); | 
 | 430 |  | 
 | 431 | 	/* | 
 | 432 | 	 * report alarm time (ALARM1); assume 24 hour and day-of-month modes, | 
 | 433 | 	 * and that all four fields are checked matches | 
 | 434 | 	 */ | 
 | 435 | 	t->time.tm_sec = bcd2bin(ds1307->regs[0] & 0x7f); | 
 | 436 | 	t->time.tm_min = bcd2bin(ds1307->regs[1] & 0x7f); | 
 | 437 | 	t->time.tm_hour = bcd2bin(ds1307->regs[2] & 0x3f); | 
 | 438 | 	t->time.tm_mday = bcd2bin(ds1307->regs[3] & 0x3f); | 
 | 439 | 	t->time.tm_mon = -1; | 
 | 440 | 	t->time.tm_year = -1; | 
 | 441 | 	t->time.tm_wday = -1; | 
 | 442 | 	t->time.tm_yday = -1; | 
 | 443 | 	t->time.tm_isdst = -1; | 
 | 444 |  | 
 | 445 | 	/* ... and status */ | 
 | 446 | 	t->enabled = !!(ds1307->regs[7] & DS1337_BIT_A1IE); | 
 | 447 | 	t->pending = !!(ds1307->regs[8] & DS1337_BIT_A1I); | 
 | 448 |  | 
 | 449 | 	dev_dbg(dev, "%s secs=%d, mins=%d, " | 
 | 450 | 		"hours=%d, mday=%d, enabled=%d, pending=%d\n", | 
 | 451 | 		"alarm read", t->time.tm_sec, t->time.tm_min, | 
 | 452 | 		t->time.tm_hour, t->time.tm_mday, | 
 | 453 | 		t->enabled, t->pending); | 
 | 454 |  | 
 | 455 | 	return 0; | 
 | 456 | } | 
 | 457 |  | 
 | 458 | static int ds1337_set_alarm(struct device *dev, struct rtc_wkalrm *t) | 
 | 459 | { | 
 | 460 | 	struct i2c_client	*client = to_i2c_client(dev); | 
 | 461 | 	struct ds1307		*ds1307 = i2c_get_clientdata(client); | 
 | 462 | 	unsigned char		*buf = ds1307->regs; | 
 | 463 | 	u8			control, status; | 
 | 464 | 	int			ret; | 
 | 465 |  | 
 | 466 | 	if (!test_bit(HAS_ALARM, &ds1307->flags)) | 
 | 467 | 		return -EINVAL; | 
 | 468 |  | 
 | 469 | 	dev_dbg(dev, "%s secs=%d, mins=%d, " | 
 | 470 | 		"hours=%d, mday=%d, enabled=%d, pending=%d\n", | 
 | 471 | 		"alarm set", t->time.tm_sec, t->time.tm_min, | 
 | 472 | 		t->time.tm_hour, t->time.tm_mday, | 
 | 473 | 		t->enabled, t->pending); | 
 | 474 |  | 
 | 475 | 	/* read current status of both alarms and the chip */ | 
 | 476 | 	ret = ds1307->read_block_data(client, | 
 | 477 | 			DS1339_REG_ALARM1_SECS, 9, buf); | 
 | 478 | 	if (ret != 9) { | 
 | 479 | 		dev_err(dev, "%s error %d\n", "alarm write", ret); | 
 | 480 | 		return -EIO; | 
 | 481 | 	} | 
 | 482 | 	control = ds1307->regs[7]; | 
 | 483 | 	status = ds1307->regs[8]; | 
 | 484 |  | 
 | 485 | 	dev_dbg(dev, "%s: %02x %02x %02x %02x, %02x %02x %02x, %02x %02x\n", | 
 | 486 | 			"alarm set (old status)", | 
 | 487 | 			ds1307->regs[0], ds1307->regs[1], | 
 | 488 | 			ds1307->regs[2], ds1307->regs[3], | 
 | 489 | 			ds1307->regs[4], ds1307->regs[5], | 
 | 490 | 			ds1307->regs[6], control, status); | 
 | 491 |  | 
 | 492 | 	/* set ALARM1, using 24 hour and day-of-month modes */ | 
 | 493 | 	buf[0] = bin2bcd(t->time.tm_sec); | 
 | 494 | 	buf[1] = bin2bcd(t->time.tm_min); | 
 | 495 | 	buf[2] = bin2bcd(t->time.tm_hour); | 
 | 496 | 	buf[3] = bin2bcd(t->time.tm_mday); | 
 | 497 |  | 
 | 498 | 	/* set ALARM2 to non-garbage */ | 
 | 499 | 	buf[4] = 0; | 
 | 500 | 	buf[5] = 0; | 
 | 501 | 	buf[6] = 0; | 
 | 502 |  | 
 | 503 | 	/* optionally enable ALARM1 */ | 
 | 504 | 	buf[7] = control & ~(DS1337_BIT_A1IE | DS1337_BIT_A2IE); | 
 | 505 | 	if (t->enabled) { | 
 | 506 | 		dev_dbg(dev, "alarm IRQ armed\n"); | 
 | 507 | 		buf[7] |= DS1337_BIT_A1IE;	/* only ALARM1 is used */ | 
 | 508 | 	} | 
 | 509 | 	buf[8] = status & ~(DS1337_BIT_A1I | DS1337_BIT_A2I); | 
 | 510 |  | 
 | 511 | 	ret = ds1307->write_block_data(client, | 
 | 512 | 			DS1339_REG_ALARM1_SECS, 9, buf); | 
 | 513 | 	if (ret < 0) { | 
 | 514 | 		dev_err(dev, "can't set alarm time\n"); | 
 | 515 | 		return ret; | 
 | 516 | 	} | 
 | 517 |  | 
 | 518 | 	return 0; | 
 | 519 | } | 
 | 520 |  | 
 | 521 | static int ds1307_alarm_irq_enable(struct device *dev, unsigned int enabled) | 
 | 522 | { | 
 | 523 | 	struct i2c_client	*client = to_i2c_client(dev); | 
 | 524 | 	struct ds1307		*ds1307 = i2c_get_clientdata(client); | 
 | 525 | 	int			ret; | 
 | 526 |  | 
 | 527 | 	if (!test_bit(HAS_ALARM, &ds1307->flags)) | 
 | 528 | 		return -ENOTTY; | 
 | 529 |  | 
 | 530 | 	ret = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL); | 
 | 531 | 	if (ret < 0) | 
 | 532 | 		return ret; | 
 | 533 |  | 
 | 534 | 	if (enabled) | 
 | 535 | 		ret |= DS1337_BIT_A1IE; | 
 | 536 | 	else | 
 | 537 | 		ret &= ~DS1337_BIT_A1IE; | 
 | 538 |  | 
 | 539 | 	ret = i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, ret); | 
 | 540 | 	if (ret < 0) | 
 | 541 | 		return ret; | 
 | 542 |  | 
 | 543 | 	return 0; | 
 | 544 | } | 
 | 545 |  | 
 | 546 | static const struct rtc_class_ops ds13xx_rtc_ops = { | 
 | 547 | 	.read_time	= ds1307_get_time, | 
 | 548 | 	.set_time	= ds1307_set_time, | 
 | 549 | 	.read_alarm	= ds1337_read_alarm, | 
 | 550 | 	.set_alarm	= ds1337_set_alarm, | 
 | 551 | 	.alarm_irq_enable = ds1307_alarm_irq_enable, | 
 | 552 | }; | 
 | 553 |  | 
 | 554 | /*----------------------------------------------------------------------*/ | 
 | 555 |  | 
 | 556 | static ssize_t | 
 | 557 | ds1307_nvram_read(struct file *filp, struct kobject *kobj, | 
 | 558 | 		struct bin_attribute *attr, | 
 | 559 | 		char *buf, loff_t off, size_t count) | 
 | 560 | { | 
 | 561 | 	struct i2c_client	*client; | 
 | 562 | 	struct ds1307		*ds1307; | 
 | 563 | 	int			result; | 
 | 564 |  | 
 | 565 | 	client = kobj_to_i2c_client(kobj); | 
 | 566 | 	ds1307 = i2c_get_clientdata(client); | 
 | 567 |  | 
 | 568 | 	if (unlikely(off >= ds1307->nvram->size)) | 
 | 569 | 		return 0; | 
 | 570 | 	if ((off + count) > ds1307->nvram->size) | 
 | 571 | 		count = ds1307->nvram->size - off; | 
 | 572 | 	if (unlikely(!count)) | 
 | 573 | 		return count; | 
 | 574 |  | 
 | 575 | 	result = ds1307->read_block_data(client, ds1307->nvram_offset + off, | 
 | 576 | 								count, buf); | 
 | 577 | 	if (result < 0) | 
 | 578 | 		dev_err(&client->dev, "%s error %d\n", "nvram read", result); | 
 | 579 | 	return result; | 
 | 580 | } | 
 | 581 |  | 
 | 582 | static ssize_t | 
 | 583 | ds1307_nvram_write(struct file *filp, struct kobject *kobj, | 
 | 584 | 		struct bin_attribute *attr, | 
 | 585 | 		char *buf, loff_t off, size_t count) | 
 | 586 | { | 
 | 587 | 	struct i2c_client	*client; | 
 | 588 | 	struct ds1307		*ds1307; | 
 | 589 | 	int			result; | 
 | 590 |  | 
 | 591 | 	client = kobj_to_i2c_client(kobj); | 
 | 592 | 	ds1307 = i2c_get_clientdata(client); | 
 | 593 |  | 
 | 594 | 	if (unlikely(off >= ds1307->nvram->size)) | 
 | 595 | 		return -EFBIG; | 
 | 596 | 	if ((off + count) > ds1307->nvram->size) | 
 | 597 | 		count = ds1307->nvram->size - off; | 
 | 598 | 	if (unlikely(!count)) | 
 | 599 | 		return count; | 
 | 600 |  | 
 | 601 | 	result = ds1307->write_block_data(client, ds1307->nvram_offset + off, | 
 | 602 | 								count, buf); | 
 | 603 | 	if (result < 0) { | 
 | 604 | 		dev_err(&client->dev, "%s error %d\n", "nvram write", result); | 
 | 605 | 		return result; | 
 | 606 | 	} | 
 | 607 | 	return count; | 
 | 608 | } | 
 | 609 |  | 
 | 610 | /*----------------------------------------------------------------------*/ | 
 | 611 |  | 
 | 612 | static int __devinit ds1307_probe(struct i2c_client *client, | 
 | 613 | 				  const struct i2c_device_id *id) | 
 | 614 | { | 
 | 615 | 	struct ds1307		*ds1307; | 
 | 616 | 	int			err = -ENODEV; | 
 | 617 | 	int			tmp; | 
 | 618 | 	const struct chip_desc	*chip = &chips[id->driver_data]; | 
 | 619 | 	struct i2c_adapter	*adapter = to_i2c_adapter(client->dev.parent); | 
 | 620 | 	int			want_irq = false; | 
 | 621 | 	unsigned char		*buf; | 
 | 622 | 	static const int	bbsqi_bitpos[] = { | 
 | 623 | 		[ds_1337] = 0, | 
 | 624 | 		[ds_1339] = DS1339_BIT_BBSQI, | 
 | 625 | 		[ds_3231] = DS3231_BIT_BBSQW, | 
 | 626 | 	}; | 
 | 627 |  | 
 | 628 | 	if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA) | 
 | 629 | 	    && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) | 
 | 630 | 		return -EIO; | 
 | 631 |  | 
 | 632 | 	ds1307 = kzalloc(sizeof(struct ds1307), GFP_KERNEL); | 
 | 633 | 	if (!ds1307) | 
 | 634 | 		return -ENOMEM; | 
 | 635 |  | 
 | 636 | 	i2c_set_clientdata(client, ds1307); | 
 | 637 |  | 
 | 638 | 	ds1307->client	= client; | 
 | 639 | 	ds1307->type	= id->driver_data; | 
 | 640 | 	ds1307->offset	= 0; | 
 | 641 |  | 
 | 642 | 	buf = ds1307->regs; | 
 | 643 | 	if (i2c_check_functionality(adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) { | 
 | 644 | 		ds1307->read_block_data = i2c_smbus_read_i2c_block_data; | 
 | 645 | 		ds1307->write_block_data = i2c_smbus_write_i2c_block_data; | 
 | 646 | 	} else { | 
 | 647 | 		ds1307->read_block_data = ds1307_read_block_data; | 
 | 648 | 		ds1307->write_block_data = ds1307_write_block_data; | 
 | 649 | 	} | 
 | 650 |  | 
 | 651 | 	switch (ds1307->type) { | 
 | 652 | 	case ds_1337: | 
 | 653 | 	case ds_1339: | 
 | 654 | 	case ds_3231: | 
 | 655 | 		/* get registers that the "rtc" read below won't read... */ | 
 | 656 | 		tmp = ds1307->read_block_data(ds1307->client, | 
 | 657 | 				DS1337_REG_CONTROL, 2, buf); | 
 | 658 | 		if (tmp != 2) { | 
 | 659 | 			pr_debug("read error %d\n", tmp); | 
 | 660 | 			err = -EIO; | 
 | 661 | 			goto exit_free; | 
 | 662 | 		} | 
 | 663 |  | 
 | 664 | 		/* oscillator off?  turn it on, so clock can tick. */ | 
 | 665 | 		if (ds1307->regs[0] & DS1337_BIT_nEOSC) | 
 | 666 | 			ds1307->regs[0] &= ~DS1337_BIT_nEOSC; | 
 | 667 |  | 
 | 668 | 		/* | 
 | 669 | 		 * Using IRQ?  Disable the square wave and both alarms. | 
 | 670 | 		 * For some variants, be sure alarms can trigger when we're | 
 | 671 | 		 * running on Vbackup (BBSQI/BBSQW) | 
 | 672 | 		 */ | 
 | 673 | 		if (ds1307->client->irq > 0 && chip->alarm) { | 
 | 674 | 			INIT_WORK(&ds1307->work, ds1307_work); | 
 | 675 |  | 
 | 676 | 			ds1307->regs[0] |= DS1337_BIT_INTCN | 
 | 677 | 					| bbsqi_bitpos[ds1307->type]; | 
 | 678 | 			ds1307->regs[0] &= ~(DS1337_BIT_A2IE | DS1337_BIT_A1IE); | 
 | 679 |  | 
 | 680 | 			want_irq = true; | 
 | 681 | 		} | 
 | 682 |  | 
 | 683 | 		i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, | 
 | 684 | 							ds1307->regs[0]); | 
 | 685 |  | 
 | 686 | 		/* oscillator fault?  clear flag, and warn */ | 
 | 687 | 		if (ds1307->regs[1] & DS1337_BIT_OSF) { | 
 | 688 | 			i2c_smbus_write_byte_data(client, DS1337_REG_STATUS, | 
 | 689 | 				ds1307->regs[1] & ~DS1337_BIT_OSF); | 
 | 690 | 			dev_warn(&client->dev, "SET TIME!\n"); | 
 | 691 | 		} | 
 | 692 | 		break; | 
 | 693 |  | 
 | 694 | 	case rx_8025: | 
 | 695 | 		tmp = i2c_smbus_read_i2c_block_data(ds1307->client, | 
 | 696 | 				RX8025_REG_CTRL1 << 4 | 0x08, 2, buf); | 
 | 697 | 		if (tmp != 2) { | 
 | 698 | 			pr_debug("read error %d\n", tmp); | 
 | 699 | 			err = -EIO; | 
 | 700 | 			goto exit_free; | 
 | 701 | 		} | 
 | 702 |  | 
 | 703 | 		/* oscillator off?  turn it on, so clock can tick. */ | 
 | 704 | 		if (!(ds1307->regs[1] & RX8025_BIT_XST)) { | 
 | 705 | 			ds1307->regs[1] |= RX8025_BIT_XST; | 
 | 706 | 			i2c_smbus_write_byte_data(client, | 
 | 707 | 						  RX8025_REG_CTRL2 << 4 | 0x08, | 
 | 708 | 						  ds1307->regs[1]); | 
 | 709 | 			dev_warn(&client->dev, | 
 | 710 | 				 "oscillator stop detected - SET TIME!\n"); | 
 | 711 | 		} | 
 | 712 |  | 
 | 713 | 		if (ds1307->regs[1] & RX8025_BIT_PON) { | 
 | 714 | 			ds1307->regs[1] &= ~RX8025_BIT_PON; | 
 | 715 | 			i2c_smbus_write_byte_data(client, | 
 | 716 | 						  RX8025_REG_CTRL2 << 4 | 0x08, | 
 | 717 | 						  ds1307->regs[1]); | 
 | 718 | 			dev_warn(&client->dev, "power-on detected\n"); | 
 | 719 | 		} | 
 | 720 |  | 
 | 721 | 		if (ds1307->regs[1] & RX8025_BIT_VDET) { | 
 | 722 | 			ds1307->regs[1] &= ~RX8025_BIT_VDET; | 
 | 723 | 			i2c_smbus_write_byte_data(client, | 
 | 724 | 						  RX8025_REG_CTRL2 << 4 | 0x08, | 
 | 725 | 						  ds1307->regs[1]); | 
 | 726 | 			dev_warn(&client->dev, "voltage drop detected\n"); | 
 | 727 | 		} | 
 | 728 |  | 
 | 729 | 		/* make sure we are running in 24hour mode */ | 
 | 730 | 		if (!(ds1307->regs[0] & RX8025_BIT_2412)) { | 
 | 731 | 			u8 hour; | 
 | 732 |  | 
 | 733 | 			/* switch to 24 hour mode */ | 
 | 734 | 			i2c_smbus_write_byte_data(client, | 
 | 735 | 						  RX8025_REG_CTRL1 << 4 | 0x08, | 
 | 736 | 						  ds1307->regs[0] | | 
 | 737 | 						  RX8025_BIT_2412); | 
 | 738 |  | 
 | 739 | 			tmp = i2c_smbus_read_i2c_block_data(ds1307->client, | 
 | 740 | 					RX8025_REG_CTRL1 << 4 | 0x08, 2, buf); | 
 | 741 | 			if (tmp != 2) { | 
 | 742 | 				pr_debug("read error %d\n", tmp); | 
 | 743 | 				err = -EIO; | 
 | 744 | 				goto exit_free; | 
 | 745 | 			} | 
 | 746 |  | 
 | 747 | 			/* correct hour */ | 
 | 748 | 			hour = bcd2bin(ds1307->regs[DS1307_REG_HOUR]); | 
 | 749 | 			if (hour == 12) | 
 | 750 | 				hour = 0; | 
 | 751 | 			if (ds1307->regs[DS1307_REG_HOUR] & DS1307_BIT_PM) | 
 | 752 | 				hour += 12; | 
 | 753 |  | 
 | 754 | 			i2c_smbus_write_byte_data(client, | 
 | 755 | 						  DS1307_REG_HOUR << 4 | 0x08, | 
 | 756 | 						  hour); | 
 | 757 | 		} | 
 | 758 | 		break; | 
 | 759 | 	case ds_1388: | 
 | 760 | 		ds1307->offset = 1; /* Seconds starts at 1 */ | 
 | 761 | 		break; | 
 | 762 | 	default: | 
 | 763 | 		break; | 
 | 764 | 	} | 
 | 765 |  | 
 | 766 | read_rtc: | 
 | 767 | 	/* read RTC registers */ | 
 | 768 | 	tmp = ds1307->read_block_data(ds1307->client, ds1307->offset, 8, buf); | 
 | 769 | 	if (tmp != 8) { | 
 | 770 | 		pr_debug("read error %d\n", tmp); | 
 | 771 | 		err = -EIO; | 
 | 772 | 		goto exit_free; | 
 | 773 | 	} | 
 | 774 |  | 
 | 775 | 	/* | 
 | 776 | 	 * minimal sanity checking; some chips (like DS1340) don't | 
 | 777 | 	 * specify the extra bits as must-be-zero, but there are | 
 | 778 | 	 * still a few values that are clearly out-of-range. | 
 | 779 | 	 */ | 
 | 780 | 	tmp = ds1307->regs[DS1307_REG_SECS]; | 
 | 781 | 	switch (ds1307->type) { | 
 | 782 | 	case ds_1307: | 
 | 783 | 	case m41t00: | 
 | 784 | 		/* clock halted?  turn it on, so clock can tick. */ | 
 | 785 | 		if (tmp & DS1307_BIT_CH) { | 
 | 786 | 			i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0); | 
 | 787 | 			dev_warn(&client->dev, "SET TIME!\n"); | 
 | 788 | 			goto read_rtc; | 
 | 789 | 		} | 
 | 790 | 		break; | 
 | 791 | 	case ds_1338: | 
 | 792 | 		/* clock halted?  turn it on, so clock can tick. */ | 
 | 793 | 		if (tmp & DS1307_BIT_CH) | 
 | 794 | 			i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0); | 
 | 795 |  | 
 | 796 | 		/* oscillator fault?  clear flag, and warn */ | 
 | 797 | 		if (ds1307->regs[DS1307_REG_CONTROL] & DS1338_BIT_OSF) { | 
 | 798 | 			i2c_smbus_write_byte_data(client, DS1307_REG_CONTROL, | 
 | 799 | 					ds1307->regs[DS1307_REG_CONTROL] | 
 | 800 | 					& ~DS1338_BIT_OSF); | 
 | 801 | 			dev_warn(&client->dev, "SET TIME!\n"); | 
 | 802 | 			goto read_rtc; | 
 | 803 | 		} | 
 | 804 | 		break; | 
 | 805 | 	case ds_1340: | 
 | 806 | 		/* clock halted?  turn it on, so clock can tick. */ | 
 | 807 | 		if (tmp & DS1340_BIT_nEOSC) | 
 | 808 | 			i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0); | 
 | 809 |  | 
 | 810 | 		tmp = i2c_smbus_read_byte_data(client, DS1340_REG_FLAG); | 
 | 811 | 		if (tmp < 0) { | 
 | 812 | 			pr_debug("read error %d\n", tmp); | 
 | 813 | 			err = -EIO; | 
 | 814 | 			goto exit_free; | 
 | 815 | 		} | 
 | 816 |  | 
 | 817 | 		/* oscillator fault?  clear flag, and warn */ | 
 | 818 | 		if (tmp & DS1340_BIT_OSF) { | 
 | 819 | 			i2c_smbus_write_byte_data(client, DS1340_REG_FLAG, 0); | 
 | 820 | 			dev_warn(&client->dev, "SET TIME!\n"); | 
 | 821 | 		} | 
 | 822 | 		break; | 
 | 823 | 	case mcp7941x: | 
 | 824 | 		/* make sure that the backup battery is enabled */ | 
 | 825 | 		if (!(ds1307->regs[DS1307_REG_WDAY] & MCP7941X_BIT_VBATEN)) { | 
 | 826 | 			i2c_smbus_write_byte_data(client, DS1307_REG_WDAY, | 
 | 827 | 					ds1307->regs[DS1307_REG_WDAY] | 
 | 828 | 					| MCP7941X_BIT_VBATEN); | 
 | 829 | 		} | 
 | 830 |  | 
 | 831 | 		/* clock halted?  turn it on, so clock can tick. */ | 
 | 832 | 		if (!(tmp & MCP7941X_BIT_ST)) { | 
 | 833 | 			i2c_smbus_write_byte_data(client, DS1307_REG_SECS, | 
 | 834 | 					MCP7941X_BIT_ST); | 
 | 835 | 			dev_warn(&client->dev, "SET TIME!\n"); | 
 | 836 | 			goto read_rtc; | 
 | 837 | 		} | 
 | 838 |  | 
 | 839 | 		break; | 
 | 840 | 	default: | 
 | 841 | 		break; | 
 | 842 | 	} | 
 | 843 |  | 
 | 844 | 	tmp = ds1307->regs[DS1307_REG_HOUR]; | 
 | 845 | 	switch (ds1307->type) { | 
 | 846 | 	case ds_1340: | 
 | 847 | 	case m41t00: | 
 | 848 | 		/* | 
 | 849 | 		 * NOTE: ignores century bits; fix before deploying | 
 | 850 | 		 * systems that will run through year 2100. | 
 | 851 | 		 */ | 
 | 852 | 		break; | 
 | 853 | 	case rx_8025: | 
 | 854 | 		break; | 
 | 855 | 	default: | 
 | 856 | 		if (!(tmp & DS1307_BIT_12HR)) | 
 | 857 | 			break; | 
 | 858 |  | 
 | 859 | 		/* | 
 | 860 | 		 * Be sure we're in 24 hour mode.  Multi-master systems | 
 | 861 | 		 * take note... | 
 | 862 | 		 */ | 
 | 863 | 		tmp = bcd2bin(tmp & 0x1f); | 
 | 864 | 		if (tmp == 12) | 
 | 865 | 			tmp = 0; | 
 | 866 | 		if (ds1307->regs[DS1307_REG_HOUR] & DS1307_BIT_PM) | 
 | 867 | 			tmp += 12; | 
 | 868 | 		i2c_smbus_write_byte_data(client, | 
 | 869 | 				ds1307->offset + DS1307_REG_HOUR, | 
 | 870 | 				bin2bcd(tmp)); | 
 | 871 | 	} | 
 | 872 |  | 
 | 873 | 	ds1307->rtc = rtc_device_register(client->name, &client->dev, | 
 | 874 | 				&ds13xx_rtc_ops, THIS_MODULE); | 
 | 875 | 	if (IS_ERR(ds1307->rtc)) { | 
 | 876 | 		err = PTR_ERR(ds1307->rtc); | 
 | 877 | 		dev_err(&client->dev, | 
 | 878 | 			"unable to register the class device\n"); | 
 | 879 | 		goto exit_free; | 
 | 880 | 	} | 
 | 881 |  | 
 | 882 | 	if (want_irq) { | 
 | 883 | 		err = request_irq(client->irq, ds1307_irq, IRQF_SHARED, | 
 | 884 | 			  ds1307->rtc->name, client); | 
 | 885 | 		if (err) { | 
 | 886 | 			dev_err(&client->dev, | 
 | 887 | 				"unable to request IRQ!\n"); | 
 | 888 | 			goto exit_irq; | 
 | 889 | 		} | 
 | 890 |  | 
 | 891 | 		device_set_wakeup_capable(&client->dev, 1); | 
 | 892 | 		set_bit(HAS_ALARM, &ds1307->flags); | 
 | 893 | 		dev_dbg(&client->dev, "got IRQ %d\n", client->irq); | 
 | 894 | 	} | 
 | 895 |  | 
 | 896 | 	if (chip->nvram_size) { | 
 | 897 | 		ds1307->nvram = kzalloc(sizeof(struct bin_attribute), | 
 | 898 | 							GFP_KERNEL); | 
 | 899 | 		if (!ds1307->nvram) { | 
 | 900 | 			err = -ENOMEM; | 
 | 901 | 			goto exit_nvram; | 
 | 902 | 		} | 
 | 903 | 		ds1307->nvram->attr.name = "nvram"; | 
 | 904 | 		ds1307->nvram->attr.mode = S_IRUGO | S_IWUSR; | 
 | 905 | 		sysfs_bin_attr_init(ds1307->nvram); | 
 | 906 | 		ds1307->nvram->read = ds1307_nvram_read, | 
 | 907 | 		ds1307->nvram->write = ds1307_nvram_write, | 
 | 908 | 		ds1307->nvram->size = chip->nvram_size; | 
 | 909 | 		ds1307->nvram_offset = chip->nvram_offset; | 
 | 910 | 		err = sysfs_create_bin_file(&client->dev.kobj, ds1307->nvram); | 
 | 911 | 		if (err) { | 
 | 912 | 			kfree(ds1307->nvram); | 
 | 913 | 			goto exit_nvram; | 
 | 914 | 		} | 
 | 915 | 		set_bit(HAS_NVRAM, &ds1307->flags); | 
 | 916 | 		dev_info(&client->dev, "%zu bytes nvram\n", ds1307->nvram->size); | 
 | 917 | 	} | 
 | 918 |  | 
 | 919 | 	return 0; | 
 | 920 |  | 
 | 921 | exit_nvram: | 
 | 922 | exit_irq: | 
 | 923 | 	rtc_device_unregister(ds1307->rtc); | 
 | 924 | exit_free: | 
 | 925 | 	kfree(ds1307); | 
 | 926 | 	return err; | 
 | 927 | } | 
 | 928 |  | 
 | 929 | static int __devexit ds1307_remove(struct i2c_client *client) | 
 | 930 | { | 
 | 931 | 	struct ds1307 *ds1307 = i2c_get_clientdata(client); | 
 | 932 |  | 
 | 933 | 	if (test_and_clear_bit(HAS_ALARM, &ds1307->flags)) { | 
 | 934 | 		free_irq(client->irq, client); | 
 | 935 | 		cancel_work_sync(&ds1307->work); | 
 | 936 | 	} | 
 | 937 |  | 
 | 938 | 	if (test_and_clear_bit(HAS_NVRAM, &ds1307->flags)) { | 
 | 939 | 		sysfs_remove_bin_file(&client->dev.kobj, ds1307->nvram); | 
 | 940 | 		kfree(ds1307->nvram); | 
 | 941 | 	} | 
 | 942 |  | 
 | 943 | 	rtc_device_unregister(ds1307->rtc); | 
 | 944 | 	kfree(ds1307); | 
 | 945 | 	return 0; | 
 | 946 | } | 
 | 947 |  | 
 | 948 | static struct i2c_driver ds1307_driver = { | 
 | 949 | 	.driver = { | 
 | 950 | 		.name	= "rtc-ds1307", | 
 | 951 | 		.owner	= THIS_MODULE, | 
 | 952 | 	}, | 
 | 953 | 	.probe		= ds1307_probe, | 
 | 954 | 	.remove		= __devexit_p(ds1307_remove), | 
 | 955 | 	.id_table	= ds1307_id, | 
 | 956 | }; | 
 | 957 |  | 
 | 958 | module_i2c_driver(ds1307_driver); | 
 | 959 |  | 
 | 960 | MODULE_DESCRIPTION("RTC driver for DS1307 and similar chips"); | 
 | 961 | MODULE_LICENSE("GPL"); |