xf.li | bdd93d5 | 2023-05-12 07:10:14 -0700 | [diff] [blame^] | 1 | @node Platform, Contributors, Maintenance, Top |
| 2 | @c %MENU% Describe all platform-specific facilities provided |
| 3 | @appendix Platform-specific facilities |
| 4 | |
| 5 | @Theglibc{} can provide machine-specific functionality. |
| 6 | |
| 7 | @menu |
| 8 | * PowerPC:: Facilities Specific to the PowerPC Architecture |
| 9 | @end menu |
| 10 | |
| 11 | @node PowerPC |
| 12 | @appendixsec PowerPC-specific Facilities |
| 13 | |
| 14 | Facilities specific to PowerPC that are not specific to a particular |
| 15 | operating system are declared in @file{sys/platform/ppc.h}. |
| 16 | |
| 17 | @deftypefun {uint64_t} __ppc_get_timebase (void) |
| 18 | @safety{@prelim{}@mtsafe{}@assafe{}@acsafe{}} |
| 19 | Read the current value of the Time Base Register. |
| 20 | |
| 21 | The @dfn{Time Base Register} is a 64-bit register that stores a monotonically |
| 22 | incremented value updated at a system-dependent frequency that may be |
| 23 | different from the processor frequency. More information is available in |
| 24 | @cite{Power ISA 2.06b - Book II - Section 5.2}. |
| 25 | |
| 26 | @code{__ppc_get_timebase} uses the processor's time base facility directly |
| 27 | without requiring assistance from the operating system, so it is very |
| 28 | efficient. |
| 29 | @end deftypefun |
| 30 | |
| 31 | @deftypefun {uint64_t} __ppc_get_timebase_freq (void) |
| 32 | @safety{@prelim{}@mtunsafe{@mtuinit{}}@asunsafe{@asucorrupt{:init}}@acunsafe{@acucorrupt{:init}}} |
| 33 | @c __ppc_get_timebase_freq=__get_timebase_freq @mtuinit @acsfd |
| 34 | @c __get_clockfreq @mtuinit @asucorrupt:init @acucorrupt:init @acsfd |
| 35 | @c the initialization of the static timebase_freq is not exactly |
| 36 | @c safe, because hp_timing_t cannot be atomically set up. |
| 37 | @c syscall:get_tbfreq ok |
| 38 | @c open dup @acsfd |
| 39 | @c read dup ok |
| 40 | @c memcpy dup ok |
| 41 | @c memmem dup ok |
| 42 | @c close dup @acsfd |
| 43 | Read the current frequency at which the Time Base Register is updated. |
| 44 | |
| 45 | This frequency is not related to the processor clock or the bus clock. |
| 46 | It is also possible that this frequency is not constant. More information is |
| 47 | available in @cite{Power ISA 2.06b - Book II - Section 5.2}. |
| 48 | @end deftypefun |
| 49 | |
| 50 | The following functions provide hints about the usage of resources that are |
| 51 | shared with other processors. They can be used, for example, if a program |
| 52 | waiting on a lock intends to divert the shared resources to be used by other |
| 53 | processors. More information is available in @cite{Power ISA 2.06b - Book II - |
| 54 | Section 3.2}. |
| 55 | |
| 56 | @deftypefun {void} __ppc_yield (void) |
| 57 | @safety{@prelim{}@mtsafe{}@assafe{}@acsafe{}} |
| 58 | Provide a hint that performance will probably be improved if shared resources |
| 59 | dedicated to the executing processor are released for use by other processors. |
| 60 | @end deftypefun |
| 61 | |
| 62 | @deftypefun {void} __ppc_mdoio (void) |
| 63 | @safety{@prelim{}@mtsafe{}@assafe{}@acsafe{}} |
| 64 | Provide a hint that performance will probably be improved if shared resources |
| 65 | dedicated to the executing processor are released until all outstanding storage |
| 66 | accesses to caching-inhibited storage have been completed. |
| 67 | @end deftypefun |
| 68 | |
| 69 | @deftypefun {void} __ppc_mdoom (void) |
| 70 | @safety{@prelim{}@mtsafe{}@assafe{}@acsafe{}} |
| 71 | Provide a hint that performance will probably be improved if shared resources |
| 72 | dedicated to the executing processor are released until all outstanding storage |
| 73 | accesses to cacheable storage for which the data is not in the cache have been |
| 74 | completed. |
| 75 | @end deftypefun |
| 76 | |
| 77 | @deftypefun {void} __ppc_set_ppr_med (void) |
| 78 | @safety{@prelim{}@mtsafe{}@assafe{}@acsafe{}} |
| 79 | Set the Program Priority Register to medium value (default). |
| 80 | |
| 81 | The @dfn{Program Priority Register} (PPR) is a 64-bit register that controls |
| 82 | the program's priority. By adjusting the PPR value the programmer may |
| 83 | improve system throughput by causing the system resources to be used |
| 84 | more efficiently, especially in contention situations. |
| 85 | The three unprivileged states available are covered by the functions |
| 86 | @code{__ppc_set_ppr_med} (medium -- default), @code{__ppc_set_ppc_low} (low) |
| 87 | and @code{__ppc_set_ppc_med_low} (medium low). More information |
| 88 | available in @cite{Power ISA 2.06b - Book II - Section 3.1}. |
| 89 | @end deftypefun |
| 90 | |
| 91 | @deftypefun {void} __ppc_set_ppr_low (void) |
| 92 | @safety{@prelim{}@mtsafe{}@assafe{}@acsafe{}} |
| 93 | Set the Program Priority Register to low value. |
| 94 | @end deftypefun |
| 95 | |
| 96 | @deftypefun {void} __ppc_set_ppr_med_low (void) |
| 97 | @safety{@prelim{}@mtsafe{}@assafe{}@acsafe{}} |
| 98 | Set the Program Priority Register to medium low value. |
| 99 | @end deftypefun |
| 100 | |
| 101 | Power ISA 2.07 extends the priorities that can be set to the Program Priority |
| 102 | Register (PPR). The following functions implement the new priority levels: |
| 103 | very low and medium high. |
| 104 | |
| 105 | @deftypefun {void} __ppc_set_ppr_very_low (void) |
| 106 | @safety{@prelim{}@mtsafe{}@assafe{}@acsafe{}} |
| 107 | Set the Program Priority Register to very low value. |
| 108 | @end deftypefun |
| 109 | |
| 110 | @deftypefun {void} __ppc_set_ppr_med_high (void) |
| 111 | @safety{@prelim{}@mtsafe{}@assafe{}@acsafe{}} |
| 112 | Set the Program Priority Register to medium high value. The medium high |
| 113 | priority is privileged and may only be set during certain time intervals by |
| 114 | problem-state programs. If the program priority is medium high when the time |
| 115 | interval expires or if an attempt is made to set the priority to medium high |
| 116 | when it is not allowed, the priority is set to medium. |
| 117 | @end deftypefun |