| lh | 9ed821d | 2023-04-07 01:36:19 -0700 | [diff] [blame] | 1 |
|
| 2 | #include "drv_rsa.h"
|
| 3 | #include <sdio.h>
|
| 4 |
|
| 5 | /* º¯Êý¹¦ÄÜ: ʵÏÖ- N^-1 mod 2^32 µÄËã·¨*/
|
| 6 | static u32 get_N_inv(u32 N0)
|
| 7 | {
|
| 8 | u32 N_inv=1;
|
| 9 | u32 i,a,b;
|
| 10 |
|
| 11 | for(i=1; i<32; i++)
|
| 12 | {
|
| 13 | a = 1<<i;
|
| 14 | b = (N0*N_inv)&((2<<i)-1);
|
| 15 | if(a<b)
|
| 16 | {
|
| 17 | N_inv = N_inv+ a;
|
| 18 | }
|
| 19 | }
|
| 20 |
|
| 21 | return (0xffffffff-N_inv+1);
|
| 22 | }
|
| 23 |
|
| 24 | static void rsa_WriteDataToReg(u32* pudAddr, u32 udReg, u32 Len)
|
| 25 | {
|
| 26 | u32 udI;
|
| 27 | for(udI=0;udI<Len;udI++)
|
| 28 | {
|
| 29 | //Ä£¿éµÍµØÖ·¼Ä´æÆ÷´æ·ÅµÍµØÖ·Êý¾Ý£¬Êý¾Ý´æ·ÅÊǵ͵ØÖ··Å¸ßλÊý¾Ý
|
| 30 | REG32(udReg + udI*4) = *(pudAddr+Len-1-udI);
|
| 31 | }
|
| 32 | }
|
| 33 |
|
| 34 | static void rsa_ReadDataFromReg(u32* pudAddr, u32 udReg, u32 Len)
|
| 35 | {
|
| 36 | u32 udI;
|
| 37 | for(udI=0;udI<Len;udI++)
|
| 38 | {
|
| 39 | //Ä£¿éµÍµØÖ·¼Ä´æÆ÷´æ·ÅµÍµØÖ·Êý¾Ý£¬Êý¾Ý´æ·ÅÊǵ͵ØÖ··Å¸ßλÊý¾Ý
|
| 40 | *(pudAddr+Len-1-udI) = REG32(udReg + udI*4);
|
| 41 | }
|
| 42 | }
|
| 43 |
|
| 44 | #ifdef RSA_CODE_SUPPORT_ALL
|
| 45 | /**-------------------------------------------------------------------------------------------------------------------@n
|
| 46 | * @brief ´óÊý³Ë·¨¼ÆËã
|
| 47 | *
|
| 48 | * ¹¦ÄÜÏêÊö:
|
| 49 | * - Rsa_BigNumMultipleº¯ÊýÊôÓÚÄÚ²¿º¯Êý, Æ书ÄÜÊÇ:
|
| 50 | * - ¼ÆËãÁ½¸ö´óÊýÏà³Ë
|
| 51 | *
|
| 52 | * ²ÎÊý¸ÅÊö:
|
| 53 | *
|
| 54 | *
|
| 55 | * ·µ »Ø Öµ: ÎÞ
|
| 56 | *
|
| 57 | *--------------------------------------------------------------------------------------------------------------------*/
|
| 58 | static u32 rsa_BigNumMultiple(u32 udNbitLen, u32* pudInputM, u32* pudInputE, u32* pudOutputP)
|
| 59 | {
|
| 60 | u32 Nlen_word, Elen_word;
|
| 61 | //input M, E, udNbitLen
|
| 62 | if(udNbitLen>2048||udNbitLen==0\
|
| 63 | ||pudInputM==NULL||pudInputE==NULL||pudOutputP==NULL)
|
| 64 | {
|
| 65 | return 1;
|
| 66 | }
|
| 67 |
|
| 68 | REG32(RSA_INT_MASK) = 0; /*unmask interrupt*/
|
| 69 | REG32(RSA_INT_ENABLE) = 0; /*disable interrupt*/
|
| 70 | REG32(RSA_CALC_MODE) = RSA_BIG_NUM_MULTIPLE; /* set computemode*/
|
| 71 |
|
| 72 | //ÅäÖÃM,E µ½RAM¼Ä´æÆ÷ÖÐ
|
| 73 | Nlen_word = (udNbitLen+31)/32;
|
| 74 | rsa_WriteDataToReg(pudInputM, RSA_M_RAM, Nlen_word);
|
| 75 | rsa_WriteDataToReg(pudInputE, RSA_E_RAM, Nlen_word);
|
| 76 | //ÅäÖÃN µÄbit ³¤¶È
|
| 77 | REG32(RSA_MODULAR_LENGTH) = udNbitLen-1;/*set modelength, µ¥Î»bit*/
|
| 78 |
|
| 79 | //enable compute
|
| 80 | REG32(RSA_MODULE_ENABLE) = 1;
|
| 81 |
|
| 82 | /*check interrupt status, waiting for calculating finished*/
|
| 83 | while(!(REG32(RSA_INT_STATUS)& 0x01));
|
| 84 |
|
| 85 | /* clear the interrupt,input any */
|
| 86 | REG32(RSA_INT_STATUS) = 1;
|
| 87 |
|
| 88 | /* read the result */
|
| 89 | rsa_ReadDataFromReg(pudOutputP, RSA_RESULT_RAM, Nlen_word);
|
| 90 |
|
| 91 | /*close mode enable*/
|
| 92 | REG32(RSA_MODULE_ENABLE) = 0;
|
| 93 |
|
| 94 | return 0;
|
| 95 |
|
| 96 | }
|
| 97 |
|
| 98 | /**-------------------------------------------------------------------------------------------------------------------@n
|
| 99 | * @brief ³õʼ»¯¼ÆËã
|
| 100 | *
|
| 101 | * ¹¦ÄÜÏêÊö:
|
| 102 | * - Rsa_InitComputeº¯ÊýÊôÓÚÄÚ²¿º¯Êý, Æ书ÄÜÊÇ:
|
| 103 | * - ³õʼ»¯¼ÆËã c= r*r mod N
|
| 104 | *
|
| 105 | * ²ÎÊý¸ÅÊö:
|
| 106 | *
|
| 107 | *
|
| 108 | * ·µ »Ø Öµ: ÎÞ
|
| 109 | *
|
| 110 | *--------------------------------------------------------------------------------------------------------------------*/
|
| 111 | static u32 rsa_InitCompute(u32 udNbitLen, u32* pudInputN, u32* pudOutputP)
|
| 112 | {
|
| 113 | u32 Nlen_word;
|
| 114 | //input N, udNbitLen
|
| 115 | if(udNbitLen>2048||udNbitLen==0\
|
| 116 | ||pudInputN==NULL||pudOutputP==NULL)
|
| 117 | {
|
| 118 | return 1;
|
| 119 | }
|
| 120 |
|
| 121 | REG32(RSA_INT_MASK) = 0; /*unmask interrupt*/
|
| 122 | REG32(RSA_INT_ENABLE) = 0; /*disable interrupt*/
|
| 123 | REG32(RSA_CALC_MODE) = RSA_INIT_COMPUTE; /* set computemode*/
|
| 124 |
|
| 125 | //ÅäÖÃN µ½RAM¼Ä´æÆ÷ÖÐ
|
| 126 | Nlen_word = (udNbitLen+31)/32;
|
| 127 | rsa_WriteDataToReg(pudInputN, RSA_N_RAM, Nlen_word);
|
| 128 |
|
| 129 | //ÅäÖÃN µÄbit ³¤¶È
|
| 130 | if((pudInputN[0]&0x80000000) == 0)
|
| 131 | {
|
| 132 | REG32(RSA_MODULAR_LENGTH) = udNbitLen-2;/*set modelength, µ¥Î»bit*/
|
| 133 | }
|
| 134 | else
|
| 135 | {
|
| 136 | REG32(RSA_MODULAR_LENGTH) = udNbitLen-1;/*set modelength, µ¥Î»bit*/
|
| 137 | }
|
| 138 |
|
| 139 | //enable compute
|
| 140 | REG32(RSA_MODULE_ENABLE) = 1;
|
| 141 |
|
| 142 | /*check interrupt status, waiting for calculating finished*/
|
| 143 | while(!(REG32(RSA_INT_STATUS)& 0x01));
|
| 144 |
|
| 145 | /* clear the interrupt,input any */
|
| 146 | REG32(RSA_INT_STATUS) = 1;
|
| 147 |
|
| 148 | /* read the result */
|
| 149 | rsa_ReadDataFromReg(pudOutputP, RSA_INIT_CALC_RAM, Nlen_word);
|
| 150 |
|
| 151 | /*close mode enable*/
|
| 152 | REG32(RSA_MODULE_ENABLE) = 0;
|
| 153 |
|
| 154 | return 0;
|
| 155 |
|
| 156 | }
|
| 157 |
|
| 158 | /**-------------------------------------------------------------------------------------------------------------------@n
|
| 159 | * @brief ²»´ø³õʼ»¯¼ÆËãµÄÄ£³Ë
|
| 160 | *
|
| 161 | * ¹¦ÄÜÏêÊö:
|
| 162 | * - Rsa_ModMultipleNoInitº¯ÊýÊôÓÚÄÚ²¿º¯Êý, Æ书ÄÜÊÇ:
|
| 163 | * - ÔÚÄ£³ËÖУ¬²»½øÐгõʼ»¯¼ÆËã
|
| 164 | *
|
| 165 | * ²ÎÊý¸ÅÊö:
|
| 166 | *
|
| 167 | *
|
| 168 | * ·µ »Ø Öµ: ÎÞ
|
| 169 | *
|
| 170 | *--------------------------------------------------------------------------------------------------------------------*/
|
| 171 | static void rsa_ModMultipleNoInit(u32 udNbitLen, u32 udEbitLen, u32* pudInputM, u32* pudInputE, u32* pudInputN, u32* pudInputC, u32* pudOutputP)
|
| 172 | {
|
| 173 | u32 Nlen_word, Elen_word;
|
| 174 | //input M, E, N, C, udNbitLen, udEbitLen
|
| 175 | if(udNbitLen>2048||udNbitLen==0||udEbitLen>2048||udEbitLen==0\
|
| 176 | ||pudInputM==NULL||pudInputE==NULL||pudInputN==NULL||pudInputC==NULL||pudOutputP==NULL)
|
| 177 | {
|
| 178 | return 1;
|
| 179 | }
|
| 180 |
|
| 181 | REG32(RSA_INT_MASK) = 0; /*unmask interrupt*/
|
| 182 | REG32(RSA_INT_ENABLE) = 0; /*disable interrupt*/
|
| 183 | REG32(RSA_CALC_MODE) = RSA_MOD_MULTIPLE_NO_INIT; /* set computemode*/
|
| 184 |
|
| 185 | Nlen_word = (udNbitLen+31)/32;
|
| 186 | Elen_word = (udEbitLen+31)/32;
|
| 187 |
|
| 188 | //ÉèÖòÎÊýN0, µÈÓÚ²ÎÊýN µÄ×îµÍλ
|
| 189 | REG32(RSA_NZORE) = pudInputN[Nlen_word-1];
|
| 190 | // ÉèÖòÎÊýN0' , µÈÓÚ- N^-1 mod 2^32
|
| 191 | REG32(RSA_NZORE_INV) = get_N_inv(pudInputN[Nlen_word-1]);
|
| 192 |
|
| 193 | //ÅäÖÃM,E,N µ½RAM¼Ä´æÆ÷ÖÐ
|
| 194 | rsa_WriteDataToReg(pudInputM, RSA_M_RAM, Nlen_word);
|
| 195 | rsa_WriteDataToReg(pudInputE, RSA_E_RAM, Elen_word);
|
| 196 | rsa_WriteDataToReg(pudInputN, RSA_N_RAM, Nlen_word);
|
| 197 | rsa_WriteDataToReg(pudInputC, RSA_INIT_CALC_RAM, Nlen_word);
|
| 198 |
|
| 199 | //ÅäÖÃN,E µÄbit ³¤¶È
|
| 200 | if((pudInputN[0]&0x80000000) == 0)
|
| 201 | {
|
| 202 | REG32(RSA_MODULAR_LENGTH) = udNbitLen-2;/*set modelength, µ¥Î»bit*/
|
| 203 | }
|
| 204 | else
|
| 205 | {
|
| 206 | REG32(RSA_MODULAR_LENGTH) = udNbitLen-1;/*set modelength, µ¥Î»bit*/
|
| 207 | }
|
| 208 | REG32(RSA_EXP_LENGTH) = (Elen_word-1)<<5; /*set expolength, µ¥Î»word*/
|
| 209 |
|
| 210 | //enable compute
|
| 211 | REG32(RSA_MODULE_ENABLE) = 1;
|
| 212 |
|
| 213 | /*check interrupt status, waiting for calculating finished*/
|
| 214 | while(!(REG32(RSA_INT_STATUS)& 0x01));
|
| 215 |
|
| 216 | /* clear the interrupt,input any */
|
| 217 | REG32(RSA_INT_STATUS) = 1;
|
| 218 |
|
| 219 | /* read the result */
|
| 220 | rsa_ReadDataFromReg(pudOutputP, RSA_RESULT_RAM, Nlen_word);
|
| 221 |
|
| 222 | /*close mode enable*/
|
| 223 | REG32(RSA_MODULE_ENABLE) = 0;
|
| 224 |
|
| 225 | return 0;
|
| 226 | }
|
| 227 |
|
| 228 | /**-------------------------------------------------------------------------------------------------------------------@n
|
| 229 | * @brief ´ø³õʼ»¯¼ÆËãµÄÄ£³Ë
|
| 230 | *
|
| 231 | * ¹¦ÄÜÏêÊö:
|
| 232 | * - Rsa_ModMultipleWithInitº¯ÊýÊôÓÚÄÚ²¿º¯Êý, Æ书ÄÜÊÇ:
|
| 233 | * - ÔÚÄ£³ËÖУ¬½øÐгõʼ»¯¼ÆËã
|
| 234 | *
|
| 235 | * ²ÎÊý¸ÅÊö:
|
| 236 | *
|
| 237 | *
|
| 238 | * ·µ »Ø Öµ: ÎÞ
|
| 239 | *
|
| 240 | *--------------------------------------------------------------------------------------------------------------------*/
|
| 241 | static u32 rsa_ModMultipleWithInit(u32 udNbitLen, u32 udEbitLen, u32* pudInputM, u32* pudInputE, u32* pudInputN, u32* pudOutputP)
|
| 242 | {
|
| 243 | u32 Nlen_word, Elen_word;
|
| 244 | //input M, E, N, udNbitLen, udEbitLen
|
| 245 | if(udNbitLen>2048||udNbitLen==0||udEbitLen>2048||udEbitLen==0\
|
| 246 | ||pudInputM==NULL||pudInputE==NULL||pudInputN==NULL||pudOutputP==NULL)
|
| 247 | {
|
| 248 | return 1;
|
| 249 | }
|
| 250 |
|
| 251 | REG32(RSA_INT_MASK) = 0; /*unmask interrupt*/
|
| 252 | REG32(RSA_INT_ENABLE) = 0; /*disable interrupt*/
|
| 253 | REG32(RSA_CALC_MODE) = RSA_MOD_MULTIPLE_WITH_INIT; /* set computemode*/
|
| 254 |
|
| 255 | Nlen_word = (udNbitLen+31)/32;
|
| 256 | Elen_word = (udEbitLen+31)/32;
|
| 257 |
|
| 258 | //ÉèÖòÎÊýN0, µÈÓÚ²ÎÊýN µÄ×îµÍλ
|
| 259 | REG32(RSA_NZORE) = pudInputN[Nlen_word-1];
|
| 260 | // ÉèÖòÎÊýN0' , µÈÓÚ- N^-1 mod 2^32
|
| 261 | REG32(RSA_NZORE_INV) = get_N_inv(pudInputN[Nlen_word-1]);
|
| 262 |
|
| 263 | //ÅäÖÃM,E,N µ½RAM¼Ä´æÆ÷ÖÐ
|
| 264 | rsa_WriteDataToReg(pudInputM, RSA_M_RAM, Nlen_word);
|
| 265 | rsa_WriteDataToReg(pudInputE, RSA_E_RAM, Elen_word);
|
| 266 | rsa_WriteDataToReg(pudInputN, RSA_N_RAM, Nlen_word);
|
| 267 |
|
| 268 | //ÅäÖÃN,E µÄbit ³¤¶È
|
| 269 | if((pudInputN[0]&0x80000000) == 0)
|
| 270 | {
|
| 271 | REG32(RSA_MODULAR_LENGTH) = udNbitLen-2;/*set modelength, µ¥Î»bit*/
|
| 272 | }
|
| 273 | else
|
| 274 | {
|
| 275 | REG32(RSA_MODULAR_LENGTH) = udNbitLen-1;/*set modelength, µ¥Î»bit*/
|
| 276 | }
|
| 277 | REG32(RSA_EXP_LENGTH) = (Elen_word-1)<<5; /*set expolength, µ¥Î»word*/
|
| 278 |
|
| 279 | //enable compute
|
| 280 | REG32(RSA_MODULE_ENABLE) = 1;
|
| 281 |
|
| 282 | /*check interrupt status, waiting for calculating finished*/
|
| 283 | while(!(REG32(RSA_INT_STATUS)& 0x01));
|
| 284 |
|
| 285 | /* clear the interrupt,input any */
|
| 286 | REG32(RSA_INT_STATUS) = 1;
|
| 287 |
|
| 288 | /* read the result */
|
| 289 | rsa_ReadDataFromReg(pudOutputP, RSA_RESULT_RAM, Nlen_word);
|
| 290 |
|
| 291 | /*close mode enable*/
|
| 292 | REG32(RSA_MODULE_ENABLE) = 0;
|
| 293 |
|
| 294 | return 0;
|
| 295 | }
|
| 296 |
|
| 297 |
|
| 298 | /**-------------------------------------------------------------------------------------------------------------------@n
|
| 299 | * @brief ²»´ø³õʼ»¯¼ÆËãµÄÄ£ÃÝÔËËã
|
| 300 | *
|
| 301 | * ¹¦ÄÜÏêÊö:
|
| 302 | * - Rsa_ModExpoNoInitº¯ÊýÊôÓÚÄÚ²¿º¯Êý, Æ书ÄÜÊÇ:
|
| 303 | * - ÔÚÄ£ÃÝÔËËãÖУ¬²»½øÐгõʼ»¯¼ÆËã
|
| 304 | *
|
| 305 | * ²ÎÊý¸ÅÊö:
|
| 306 | *
|
| 307 | *
|
| 308 | * ·µ »Ø Öµ: ÎÞ
|
| 309 | *
|
| 310 | *--------------------------------------------------------------------------------------------------------------------*/
|
| 311 | static u32 rsa_ModExpoNoInit(u32 udNbitLen, u32 udEbitLen, u32* pudInputM, u32* pudInputE, u32* pudInputN, u32* pudInputC, u32* pudOutputP)
|
| 312 | {
|
| 313 | u32 Nlen_word, Elen_word;
|
| 314 | //input M, E, N, C, udNbitLen, udEbitLen
|
| 315 | if(udNbitLen>2048||udNbitLen==0||udEbitLen>2048||udEbitLen==0\
|
| 316 | ||pudInputM==NULL||pudInputE==NULL||pudInputN==NULL||pudInputC==NULL||pudOutputP==NULL)
|
| 317 | {
|
| 318 | return 1;
|
| 319 | }
|
| 320 |
|
| 321 | REG32(RSA_INT_MASK) = 0; /*unmask interrupt*/
|
| 322 | REG32(RSA_INT_ENABLE) = 0; /*disable interrupt*/
|
| 323 | REG32(RSA_CALC_MODE) = RSA_MOD_EXPO_NO_INIT; /* set computemode*/
|
| 324 |
|
| 325 | Nlen_word = (udNbitLen+31)/32;
|
| 326 | Elen_word = (udEbitLen+31)/32;
|
| 327 |
|
| 328 | //ÉèÖòÎÊýN0, µÈÓÚ²ÎÊýN µÄ×îµÍλ
|
| 329 | REG32(RSA_NZORE) = pudInputN[Nlen_word-1];
|
| 330 | // ÉèÖòÎÊýN0' , µÈÓÚ- N^-1 mod 2^32
|
| 331 | REG32(RSA_NZORE_INV) = get_N_inv(pudInputN[Nlen_word-1]);
|
| 332 |
|
| 333 | //ÅäÖÃM,E,N µ½RAM¼Ä´æÆ÷ÖÐ
|
| 334 | rsa_WriteDataToReg(pudInputM, RSA_M_RAM, Nlen_word);
|
| 335 | rsa_WriteDataToReg(pudInputE, RSA_E_RAM, Elen_word);
|
| 336 | rsa_WriteDataToReg(pudInputN, RSA_N_RAM, Nlen_word);
|
| 337 | rsa_WriteDataToReg(pudInputC, RSA_INIT_CALC_RAM, Nlen_word);
|
| 338 |
|
| 339 | //ÅäÖÃN,E µÄbit ³¤¶È
|
| 340 | if((pudInputN[0]&0x80000000) == 0)
|
| 341 | {
|
| 342 | REG32(RSA_MODULAR_LENGTH) = udNbitLen-2;/*set modelength, µ¥Î»bit*/
|
| 343 | }
|
| 344 | else
|
| 345 | {
|
| 346 | REG32(RSA_MODULAR_LENGTH) = udNbitLen-1;/*set modelength, µ¥Î»bit*/
|
| 347 | }
|
| 348 | REG32(RSA_EXP_LENGTH) = (Elen_word-1)<<5; /*set expolength, µ¥Î»word*/
|
| 349 |
|
| 350 | //enable compute
|
| 351 | REG32(RSA_MODULE_ENABLE) = 1;
|
| 352 |
|
| 353 | /*check interrupt status, waiting for calculating finished*/
|
| 354 | while(!(REG32(RSA_INT_STATUS)& 0x01));
|
| 355 |
|
| 356 | /* clear the interrupt,input any */
|
| 357 | REG32(RSA_INT_STATUS) = 1;
|
| 358 |
|
| 359 | /* read the result */
|
| 360 | rsa_ReadDataFromReg(pudOutputP, RSA_RESULT_RAM, Nlen_word);
|
| 361 |
|
| 362 | /*close mode enable*/
|
| 363 | REG32(RSA_MODULE_ENABLE) = 0;
|
| 364 |
|
| 365 | return 0;
|
| 366 | }
|
| 367 | #endif
|
| 368 |
|
| 369 | /**-------------------------------------------------------------------------------------------------------------------@n
|
| 370 | * @brief ´ø³õʼ»¯¼ÆËãµÄÄ£ÃÝÔËËã
|
| 371 | *
|
| 372 | * ¹¦ÄÜÏêÊö:
|
| 373 | * - Rsa_ModExpoWithInitº¯ÊýÊôÓÚÄÚ²¿º¯Êý, Æ书ÄÜÊÇ:
|
| 374 | * - ÔÚÄ£ÃÝÔËËãÖУ¬½øÐгõʼ»¯¼ÆËã
|
| 375 | *
|
| 376 | * ²ÎÊý¸ÅÊö:
|
| 377 | *
|
| 378 | *
|
| 379 | * ·µ »Ø Öµ: ÎÞ
|
| 380 | *
|
| 381 | *--------------------------------------------------------------------------------------------------------------------*/
|
| 382 | static u32 rsa_ModExpoWithInit(u32 udNbitLen, u32 udEbitLen, u32* pudInputM, u32* pudInputE, u32* pudInputN, u32* pudOutputP)
|
| 383 | {
|
| 384 | u32 Nlen_word, Elen_word;
|
| 385 | //input M, E, N, udNbitLen, udEbitLen
|
| 386 | if(udNbitLen>2048||udNbitLen==0||udEbitLen>2048||udEbitLen==0\
|
| 387 | ||pudInputM==NULL||pudInputE==NULL||pudInputN==NULL||pudOutputP==NULL)
|
| 388 | {
|
| 389 | return 1;
|
| 390 | }
|
| 391 |
|
| 392 | REG32(RSA_INT_MASK) = 0; /*unmask interrupt*/
|
| 393 | REG32(RSA_INT_ENABLE) = 0; /*disable interrupt*/
|
| 394 | REG32(RSA_CALC_MODE) = RSA_MOD_EXPO_WITH_INIT; /* set computemode*/
|
| 395 |
|
| 396 | Nlen_word = (udNbitLen+31)/32;
|
| 397 | Elen_word = (udEbitLen+31)/32;
|
| 398 |
|
| 399 | //ÉèÖòÎÊýN0, µÈÓÚ²ÎÊýN µÄ×îµÍλ
|
| 400 | REG32(RSA_NZORE) = pudInputN[Nlen_word-1];
|
| 401 | // ÉèÖòÎÊýN0' , µÈÓÚ- N^-1 mod 2^32
|
| 402 | REG32(RSA_NZORE_INV) = get_N_inv(pudInputN[Nlen_word-1]);
|
| 403 |
|
| 404 | //ÅäÖÃM,E,N µ½RAM¼Ä´æÆ÷ÖÐ
|
| 405 | rsa_WriteDataToReg(pudInputM, RSA_M_RAM, Nlen_word);
|
| 406 | rsa_WriteDataToReg(pudInputE, RSA_E_RAM, Elen_word);
|
| 407 | rsa_WriteDataToReg(pudInputN, RSA_N_RAM, Nlen_word);
|
| 408 |
|
| 409 | //ÅäÖÃN,E µÄbit ³¤¶È
|
| 410 | if((pudInputN[0]&0x80000000) == 0)
|
| 411 | {
|
| 412 | REG32(RSA_MODULAR_LENGTH) = udNbitLen - 2; /*set modelength, µ¥Î»bit*/
|
| 413 | }
|
| 414 | else
|
| 415 | {
|
| 416 | REG32(RSA_MODULAR_LENGTH) = udNbitLen -1; /*set modelength, µ¥Î»bit*/
|
| 417 | }
|
| 418 | REG32(RSA_EXP_LENGTH) = (Elen_word-1)<<5; /*set expolength, µ¥Î»word*/
|
| 419 |
|
| 420 | //enable compute
|
| 421 | REG32(RSA_MODULE_ENABLE) = 1;
|
| 422 |
|
| 423 | /*check interrupt status, waiting for calculating finished*/
|
| 424 | while(!(REG32(RSA_INT_STATUS)& 0x01));
|
| 425 |
|
| 426 | /* clear the interrupt,input any */
|
| 427 | REG32(RSA_INT_STATUS) = 1;
|
| 428 |
|
| 429 | /* read the result */
|
| 430 | rsa_ReadDataFromReg(pudOutputP, RSA_RESULT_RAM, Nlen_word);
|
| 431 |
|
| 432 | /*close mode enable*/
|
| 433 | REG32(RSA_MODULE_ENABLE) = 0;
|
| 434 |
|
| 435 | return 0;
|
| 436 | }
|
| 437 | /*
|
| 438 | ¹¦ÄÜÏêÊö:RSA ¸÷ÖÖ¼ÆËãµÄ½Ó¿Úº¯Êý
|
| 439 | ¸÷²ÎÊý:
|
| 440 | ptInput Ïê¼û½á¹¹Ìå˵Ã÷
|
| 441 | */
|
| 442 | u32 Rsa_Calculate(T_Rsa_Paramter ptInput)
|
| 443 | {
|
| 444 | switch(ptInput.udCalMode)
|
| 445 | {
|
| 446 | #ifdef RSA_CODE_SUPPORT_ALL
|
| 447 | case RSA_BIG_NUM_MULTIPLE: //input M, E, udNbitLen
|
| 448 | return rsa_BigNumMultiple(ptInput.udNbitLen, ptInput.pudInputM, ptInput.pudInputE, ptInput.pudOutputP);
|
| 449 |
|
| 450 | case RSA_INIT_COMPUTE: //input N, udNbitLen
|
| 451 | return rsa_InitCompute(ptInput.udNbitLen, ptInput.pudInputN, ptInput.pudOutputP);
|
| 452 |
|
| 453 | case RSA_MOD_MULTIPLE_NO_INIT: //input M, E, N, C, udNbitLen, udEbitLen
|
| 454 | return rsa_ModMultipleNoInit(ptInput.udNbitLen, ptInput.udEbitLen, ptInput.pudInputM, ptInput.pudInputE, ptInput.pudInputN, ptInput.pudInputC, ptInput.pudOutputP);
|
| 455 |
|
| 456 | case RSA_MOD_EXPO_NO_INIT: //input M, E, N, C, udNbitLen, udEbitLen
|
| 457 | return rsa_ModExpoNoInit(ptInput.udNbitLen, ptInput.udEbitLen, ptInput.pudInputM, ptInput.pudInputE, ptInput.pudInputN, ptInput.pudInputC, ptInput.pudOutputP);
|
| 458 |
|
| 459 | case RSA_MOD_MULTIPLE_WITH_INIT: //input M, E, N, udNbitLen, udEbitLen
|
| 460 | return rsa_ModMultipleWithInit(ptInput.udNbitLen, ptInput.udEbitLen, ptInput.pudInputM, ptInput.pudInputE, ptInput.pudInputN, ptInput.pudOutputP);
|
| 461 | #endif
|
| 462 | case RSA_MOD_EXPO_WITH_INIT: //input M, E, N, udNbitLen, udEbitLen
|
| 463 | return rsa_ModExpoWithInit(ptInput.udNbitLen, ptInput.udEbitLen, ptInput.pudInputM, ptInput.pudInputE, ptInput.pudInputN, ptInput.pudOutputP);
|
| 464 |
|
| 465 | default:
|
| 466 | return 1;
|
| 467 | }
|
| 468 | }
|
| 469 |
|