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lh9ed821d2023-04-07 01:36:19 -07001/*****************************************************************************
2 *°æ±¾ËùÓÐ (C)2017ÖÐÐËͨѶ¹É·ÝÓÐÏÞ¹«Ë¾
3 * Ä£¿éÃû £ºPS-PHYͨѶͨµÀ¶¨Òå
4 * ÎļþÃû ps_phy_channel.h
5 * Îļþ±êʶ£º
6 * Ïà¹ØÎļþ£º
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8 * ×÷Õß £º
9 * °æ±¾ £º
10 * Íê³ÉÈÕÆÚ£º
11 * ÆäËü˵Ã÷£ºÐ½¨
12 *
13 *****************************************************************************/
14#ifndef _PS_PHY_CHANNEL_H
15#define _PS_PHY_CHANNEL_H
16
17/**************************************************************************
18 * Í·Îļþ°üº¬ *
19 **************************************************************************/
20//#include "drv_rpmsg.h"
21//#ifndef _OS_WIN
22//#include "ram_config.h"
23//#endif
24/**************************************************************************************************
25ICPͨµÀÃüÃû¹æÔò
26 RP_MSG_LTE_PS_PHY_SYNC
27 | | | |
28 | | | |--> ÏûÏ¢ÀàÐÍ
29 | | |--> ºË2
30 | |------>ºË1
31 |-->ʹÓÃÖÆÊ½
32***************************************************************************************************/
33
34
35/******************************************************************************************
36//PS<->PHYÖ®¼ä¹²¿É¶¨Òå64¸öͨµÀ
37******************************************************************************************/
38
39//LTE
40#define RP_MSG_LTE_PHY_PS_WAKEUP channel_10 //PHY»½ÐÑPSͨµÀ£¬PSÊ¡µç²à»Øµ÷º¯Êý´¦Àí
41#define RP_MSG_LTE_PHY_PS_SYNC channel_11 //ps¡¢ltephyÖ®¼äµÄͬ²½ÏûÏ¢
42#define RP_MSG_LTE_PHY_PS_ASYNC channel_12 //ps¡¢ltephyÖ®¼äµÄÒì²½ÏûÏ¢
43#define RP_MSG_LTE_PHY_PS_ICP channel_13 //ps¡¢ltephy·¢ËÍÒì²½ÏûϢʱ£¬´¥·¢ICP
44
45//Ë«´ýÐÂÔöÕ»2µÄͨµÀºÅ
46#define RP_MSG_LTE_PHY_PS_SYNC_2 channel_14 //ps¡¢ltephyÖ®¼äµÄͬ²½ÏûÏ¢
47#define RP_MSG_LTE_PHY_PS_ASYNC_2 channel_15 //ps¡¢ltephyÖ®¼äµÄÒì²½ÏûÏ¢
48//#define RP_MSG_LTE_PHY_PS_ICP_2 channel_16 //ps¡¢ltephy·¢ËÍÒì²½ÏûϢʱ£¬´¥·¢ICP
49
50//TD
51#define RP_MSG_TD_PS_PHY_MSG channel_21 //ps¡¢tdphyÖ®¼äµÄÏûϢͨµÀ
52#define RP_MSG_TD_PS_PHY_UPA_DATA channel_22
53#define RP_MSG_TD_PS_PHY_LPM_WAKEUP channel_23
54#define RP_MSG_TD_PHY_PS_WAKEUP channel_24 //»½ÐÑͨµÀ
55#define RP_MSG_TD_PHY_PS_FRAME_INT channel_25 //0x100000000
56//#define RP_MSG_TD_DPRAM_CMD channel_26 //H2U U2H
57#define RP_MSG_TD_EAGCH_DATA channel_27 //EAGCH only phy--->ps
58#define RP_MSG_TD_BCH_DATA channel_28 //BCH only phy--->ps
59#define RP_MSG_TD_HSUPA_DATA channel_29 //TD HSUPAÊý¾Ýps--->phy
60
61
62//W
63#define RP_MSG_W_PS_PHY_MSG channel_31//Éϱ¨
64#define RP_MSG_W_PHY_PS_WAKEUP channel_32
65#define RP_MSG_W_PS_PHY_UPA_DATA channel_33//0x100000000
66#define RP_MSG_W_PS_PHY_LPM_WAKEUP channel_34//0x400000000
67#define RP_MSG_W_PHY_PS_FRAME_INT channel_35//0x2
68//#define RP_MSG_W_DPRAM_CMD channel_36//DPRAM CMD
69
70//td,W ²»Í¬Ê±´æÔÚ¸´ÓÃͨµÀ
71#define RP_MSG_TD_W_UL_DATA channel_37 //TD,WÆÕͨÉÏÐÐÊý¾Ý
72#define RP_MSG_TD_W_DL_DATA channel_38 //TD,WÆÕͨÏÂÐÐÊý¾Ý
73#define RP_MSG_TD_W_HSDPA_DATA channel_39 //TD,W DPAÊý¾Ý
74
75
76//PUB
77#define RP_MSG_PS_PHY_RAMDUMP channel_40 //arm¡¢zspÖ®¼äµÄramdumpͨµÀ
78#define RP_MSG_PHY_PS_DDR_DVFS channel_41 //ddrµ÷ƵͨµÀ
79//#define RP_MSG_UICC_VSIMAGT_CHANNEL channel_42 //vsim ͨµÀ
80
81/******************************************************************************************
82Éæ¼°M0ºËµÄ£¬Ã¿¸öºËÓëM0Ö®¼ä¹²10¸öͨµÀ
83******************************************************************************************/
84
85//PHY<->M0
86#define RP_MSG_PHY_M0_AXI_DFS channel_1 //axiµ÷ƵͨµÀ
87#define RP_MSG_M0_PHY_WDT channel_2 //m0¡¢zspÖ®¼äµÄWDT
88
89//PS<->M0
90#define RP_MSG_PS_M0_AXI_DFS channel_1 //axiµ÷ƵͨµÀ
91#define RP_MSG_M0_PS_WDT channel_2 //m0¡¢armÖ®¼äµÄWDT
92
93#define ICP_CHANNEL_DEFAULT_SIZE (UINT32)255
94
95
96/******************************************************************************************
97PS¡¢PHYÔ¼¶¨¸÷Êý¾Ý¿éµÄ´óС£¬ÊýÄ¿ºê
98******************************************************************************************/
99#define RP_MSG_TD_EAGCH_DATA_BLOCK_SIZE 40/*¶ÔÓ¦RP_MSG_TD_EAGCH_DATAͨµÀ*/
100#define RP_MSG_TD_EAGCH_DATA_BLOCK_NUM 2
101
102#define RP_MSG_TD_BCH_DATA_BLOCK_SIZE 48/*¶ÔÓ¦RP_MSG_TD_BCH_DATAͨµÀ*/
103#define RP_MSG_TD_BCH_DATA_BLOCK_NUM 1
104
105#define RP_MSG_TD_HSUPA_DATA_BLOCK_SIZE 1440/*¶ÔÓ¦RP_MSG_TD_HSUPA_DATAͨµÀ*/
106#define RP_MSG_TD_HSUPA_DATA_BLOCK_NUM 2
107
108#define RP_MSG_TD_W_UL_DATA_BLOCK_SIZE 1244/*¶ÔÓ¦RP_MSG_TD_W_UL_DATAͨµÀ*/
109#define RP_MSG_TD_W_UL_DATA_BLOCK_NUM 1
110
111#define RP_MSG_TD_W_DL_DATA_BLOCK_SIZE 1340/*¶ÔÓ¦RP_MSG_TD_W_DL_DATAͨµÀ. W¸ñʽ[T_zW_P_dl_data_buffer]; TD¸ñʽ [T_zTD_P_mac_dl_buffer]*/
112#define RP_MSG_TD_W_DL_DATA_BLOCK_NUM 3
113
114#define RP_MSG_TD_W_HSDPA_DATA_BLOCK_SIZE 5284/*¶ÔÓ¦RP_MSG_TD_W_HSDPA_DATAͨµÀ.W¸ñʽ[T_zW_P_hsdpa_buffer]; TD¸ñʽ[T_zTD_P_mac_Hsdpa_Buf]*/
115#define RP_MSG_TD_W_HSDPA_DATA_BLOCK_NUM 5
116
117#define RP_MSG_TD_PS_TO_PHY_CMD_SIZE 5020
118#define RP_MSG_TD_PHY_TO_PS_CMD_SIZE 3620
119
120#define RP_MSG_W_PS_TO_PHY_CMD_SIZE 25020
121#define RP_MSG_W_PHY_TO_PS_CMD_SIZE 8020
122
123
124#endif // _PS_PHY_CHANNEL_H