lh | 9ed821d | 2023-04-07 01:36:19 -0700 | [diff] [blame] | 1 | #include <linux/init.h> /* For init/exit macros */
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| 2 | #include <linux/module.h> /* For MODULE_ marcros */
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| 3 | #include <linux/interrupt.h>
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| 4 | #include <linux/spinlock.h>
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| 5 | #include <linux/platform_device.h>
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| 6 |
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| 7 | #include <linux/device.h>
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| 8 | #include <linux/fs.h>
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| 9 | #include <linux/cdev.h>
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| 10 | #include <linux/delay.h>
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| 11 | #include <linux/mutex.h>
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| 12 | #include <linux/kthread.h>
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| 13 | #include <linux/rtc.h>
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| 14 | #include <linux/mfd/zx234290.h>
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| 15 | #include <mach/spinlock.h>
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| 16 | #include <linux/wakelock.h>
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| 17 |
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| 18 | #define ZX234290_VBAT_ADC_COMPENDATE_VALUE 50
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| 19 | typedef enum adc_channel
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| 20 | {
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| 21 | ADC_CHANNEL_VBAT_ADC = 0,
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| 22 | ADC_CHANNEL_VADC2 = 1, /* 01 */
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| 23 | ADC_CHANNEL_VADC1 = 2, /* 10 */
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| 24 | MAX_ADC_CHANNEL
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| 25 | }zx234290_adc_channel;
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| 26 |
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| 27 | /*******************************************************************************
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| 28 | * Function:zx234290_adc_correspond
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| 29 | * Description:adjust battery voltage according to compensate value
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| 30 | * Parameters:
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| 31 | * Input:
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| 32 | * channel: adc channel
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| 33 | * value:battery voltage needed be compensated
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| 34 | * Output:
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| 35 | *
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| 36 | * Returns:
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| 37 | * 0: success
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| 38 | * -1:failed
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| 39 | *
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| 40 | * Others:
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| 41 | ********************************************************************************/
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| 42 | static int zx234290_adc_correspond(zx234290_adc_channel channel, int *value)
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| 43 | {
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| 44 | int nTemp;
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| 45 |
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| 46 | switch (channel)
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| 47 | {
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| 48 | case ADC_CHANNEL_VBAT_ADC:
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| 49 | {
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| 50 | nTemp = (int)((uint64_t)(5000-0)*(*value)/4096);
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| 51 | *value = nTemp + 0;//ZX234290_VBAT_ADC_COMPENDATE_VALUE; // compensate the battery voltage value
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| 52 | break;
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| 53 | }
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| 54 | case ADC_CHANNEL_VADC1:
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| 55 | {
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| 56 | nTemp = (int)((uint64_t)(5000-0)*(*value)/4096);
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| 57 | *value = nTemp + 0;
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| 58 | break;
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| 59 | }
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| 60 |
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| 61 | case ADC_CHANNEL_VADC2:
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| 62 | {
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| 63 | nTemp = (int)((uint64_t)(5000-0)*(*value)/4096);
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| 64 | *value = nTemp + 0;
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| 65 | break;
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| 66 | }
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| 67 | default:
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| 68 | {
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| 69 | return -1;
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| 70 | }
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| 71 | }
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| 72 |
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| 73 |
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| 74 | return 0;
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| 75 |
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| 76 | }
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| 77 |
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| 78 | /*******************************************************************************
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| 79 | * Function:zx234290_adc_read_vbat
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| 80 | * Description:read vbat adc value
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| 81 | * Parameters:
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| 82 | * Input:
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| 83 | *
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| 84 | * Output:
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| 85 | *
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| 86 | * Returns:
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| 87 | * nTempAdc:the value of vbat adc
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| 88 | * Others:
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| 89 | ********************************************************************************/
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| 90 | static int zx234290_adc_read_vbat(void)
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| 91 | {
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| 92 | int nRet;
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| 93 | int nTempAdc = 0;
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| 94 | unsigned char msb=0, lsb=0;
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| 95 |
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| 96 | /* read msb */
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| 97 | //nRet = zx234290_i2c_read_simple(ZX234290_REG_ADDR_ADC_VBATMSB, &msb);
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| 98 | nRet = zx234290_i2c_read_simple(ZX234290_REG_ADDR_VBATADC_MSB, &msb);
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| 99 | if (nRet != 0)
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| 100 | {
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| 101 | return nRet;
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| 102 | }
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| 103 |
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| 104 | /* read lsb */
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| 105 | //nRet = zx234290_i2c_read_simple(ZX234290_REG_ADDR_ADC_VBATLSB, &lsb);
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| 106 | nRet = zx234290_i2c_read_simple(ZX234290_REG_ADDR_VBATADC_LSB, &lsb);
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| 107 | if (nRet != 0)
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| 108 | {
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| 109 | return nRet;
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| 110 | }
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| 111 | nTempAdc = (int)msb;
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| 112 | nTempAdc = ((nTempAdc<<4)|lsb>>4);
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| 113 |
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| 114 | return nTempAdc;
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| 115 | }
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| 116 |
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| 117 | /*******************************************************************************
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| 118 | * Function:zx234290_adc_read_adc1
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| 119 | * Description:read the channel of adc1 value
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| 120 | * Parameters:
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| 121 | * Input:
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| 122 | *
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| 123 | * Output:
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| 124 | *
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| 125 | * Returns:
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| 126 | * nTempAdc:the value of adc1 channel
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| 127 | * Others:
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| 128 | ********************************************************************************/
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| 129 | static int zx234290_adc_read_adc1(void)
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| 130 | {
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| 131 | int nRet;
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| 132 | int nTempAdc = 0;
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| 133 | unsigned char msb=0, lsb=0;
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| 134 |
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| 135 | /* read msb */
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| 136 | //nRet = zx234290_i2c_read_simple(ZX234290_REG_ADDR_ADC1MSB, &msb);
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| 137 | nRet = zx234290_i2c_read_simple(ZX234290_REG_ADDR_ADC1_MSB, &msb);
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| 138 | if (nRet != 0)
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| 139 | {
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| 140 | return nRet;
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| 141 | }
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| 142 |
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| 143 | /* read lsb */
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| 144 | //nRet = zx234290_i2c_read_simple(ZX234290_REG_ADDR_ADC1LSB, &lsb);
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| 145 | nRet = zx234290_i2c_read_simple(ZX234290_REG_ADDR_ADC1_LSB, &lsb);
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| 146 | if (nRet != 0)
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| 147 | {
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| 148 | return nRet;
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| 149 | }
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| 150 |
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| 151 | nTempAdc = (int)msb;
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| 152 | nTempAdc = ((nTempAdc<<4)|lsb>>4);
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| 153 |
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| 154 | return nTempAdc;
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| 155 | }
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| 156 |
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| 157 | /*******************************************************************************
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| 158 | * Function:zx234290_adc_read_adc2
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| 159 | * Description:read the channel of adc2value
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| 160 | * Parameters:
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| 161 | * Input:
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| 162 | *
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| 163 | * Output:
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| 164 | *
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| 165 | * Returns:
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| 166 | * nTempAdc:the value of adc2 channel
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| 167 | * Others:
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| 168 | ********************************************************************************/
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| 169 | static int zx234290_adc_read_adc2(void)
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| 170 | {
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| 171 | int nRet;
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| 172 | int nTempAdc = 0;
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| 173 | unsigned char msb=0, lsb=0;
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| 174 |
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| 175 | /* read msb */
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| 176 | //nRet = zx234290_i2c_read_simple(ZX234290_REG_ADDR_ADC2MSB, &msb);
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| 177 | nRet = zx234290_i2c_read_simple(ZX234290_REG_ADDR_ADC2_MSB, &msb);
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| 178 | if (nRet != 0)
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| 179 | {
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| 180 | return nRet;
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| 181 | }
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| 182 |
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| 183 | /* read lsb */
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| 184 | //nRet = zx234290_i2c_read_simple(ZX234290_REG_ADDR_ADC2LSB, &lsb);
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| 185 | nRet = zx234290_i2c_read_simple(ZX234290_REG_ADDR_ADC2_LSB, &lsb);
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| 186 | if (nRet != 0)
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| 187 | {
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| 188 | return nRet;
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| 189 | }
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| 190 |
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| 191 | nTempAdc = (int)msb;
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| 192 | nTempAdc = ((nTempAdc<<4)|lsb>>4);
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| 193 |
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| 194 | return nTempAdc;
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| 195 | }
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| 196 |
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| 197 |
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| 198 | /**************************************************************************
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| 199 | * Function: zx234290_adc_read
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| 200 | * Description: read ADC value according to adc channel
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| 201 | * Parameters:
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| 202 | * Input:
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| 203 | * channel:which channel want to be read
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| 204 | *
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| 205 | * Output:
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| 206 | * value:the adc value correspond to channel
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| 207 | * Returns:
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| 208 | * 0 if success, not 0 if faile
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| 209 | * Others: None
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| 210 | **************************************************************************/
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| 211 | extern struct wake_lock adc_wake_lock;
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| 212 | static int zx234290_adc_read(zx234290_adc_channel channel, int *value)
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| 213 | {
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| 214 | int nRet = 0;
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| 215 | int nTempAdc = 0;
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| 216 | int reg_val=0, mask=0;
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| 217 | int num=1;
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| 218 | unsigned char status_a=0;
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| 219 | unsigned char content =0;
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| 220 | if(channel >= MAX_ADC_CHANNEL)
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| 221 | {
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| 222 | return -1;
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| 223 | }
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| 224 |
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| 225 | soft_spin_lock(ADC_SFLOCK);
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| 226 | wake_lock(&adc_wake_lock);
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| 227 | if (channel != ADC_CHANNEL_VBAT_ADC)
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| 228 | {
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| 229 | /* select channel */
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| 230 | reg_val = channel << 3; /* ×óÒÆ3λ£¬Î»¿í 2λ */
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| 231 | mask = 0x18;
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| 232 | nRet = zx234290_i2c_read_simple(ZX234290_REG_ADDR_SYS_CTRL, &content);
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| 233 | if (nRet != 0)
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| 234 | {
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| 235 | wake_unlock(&adc_wake_lock);
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| 236 | soft_spin_unlock(ADC_SFLOCK);
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| 237 | return nRet;
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| 238 | }
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| 239 | content &= ~mask;
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| 240 | content |= reg_val;
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| 241 | nRet = zx234290_i2c_write_simple(ZX234290_REG_ADDR_SYS_CTRL, &content);
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| 242 | if (nRet != 0)
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| 243 | {
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| 244 | wake_unlock(&adc_wake_lock);
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| 245 | soft_spin_unlock(ADC_SFLOCK);
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| 246 | return nRet;
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| 247 | }
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| 248 | }
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| 249 | #if 0
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| 250 | /* set start bit */
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| 251 | reg_val = 1 << 5; /* ¸ÃλÖà 1 */
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| 252 | mask = 0x20;
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| 253 | nRet = zx234290_i2c_read_simple(ZX234290_REG_ADDR_SYS_CTRL, &content);
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| 254 | if (nRet != 0)
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| 255 | {
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| 256 | return nRet;
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| 257 | }
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| 258 | content &= ~mask;
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| 259 | content |= reg_val;
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| 260 | nRet = zx234290_i2c_write_simple(ZX234290_REG_ADDR_SYS_CTRL, &content);
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| 261 | if (nRet != 0)
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| 262 | {
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| 263 | return nRet;
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| 264 | }
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| 265 |
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| 266 | msleep(30); /* ÑÓʱ30ms */
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| 267 | #else
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| 268 | reg_val = 1 << 5; /* ¸ÃλÖà 1 */
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| 269 | mask = 0x20;
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| 270 | for(num=1; num <= 50; num++)
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| 271 | {
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| 272 | /* set start bit */
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| 273 | nRet = zx234290_i2c_read_simple(ZX234290_REG_ADDR_SYS_CTRL, &content);
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| 274 | if (nRet != 0)
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| 275 | {
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| 276 | wake_unlock(&adc_wake_lock);
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| 277 | soft_spin_unlock(ADC_SFLOCK);
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| 278 | return nRet;
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| 279 | }
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| 280 | content &= ~mask;
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| 281 | content |= reg_val;
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| 282 | nRet = zx234290_i2c_write_simple(ZX234290_REG_ADDR_SYS_CTRL, &content);
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| 283 | if (nRet != 0)
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| 284 | {
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| 285 | wake_unlock(&adc_wake_lock);
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| 286 | soft_spin_unlock(ADC_SFLOCK);
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| 287 | return nRet;
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| 288 | }
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| 289 | udelay(500);
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| 290 | /*read status_A*/
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| 291 | nRet = zx234290_i2c_read_simple(ZX234290_REG_ADDR_STSA, &status_a);
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| 292 | if (nRet != 0)
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| 293 | {
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| 294 | wake_unlock(&adc_wake_lock);
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| 295 | soft_spin_unlock(ADC_SFLOCK);
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| 296 | return nRet;
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| 297 | }
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| 298 | if(status_a & 0x04)
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| 299 | {
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| 300 | // printk( "get adc,break num =%d ...\n", num);
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| 301 | break;
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| 302 | }
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| 303 | }
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| 304 | #endif
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| 305 | /* ÕâÀïÒªµÈÖжÏÀ´ ²ÅÄܶÁ */
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| 306 | switch (channel) {
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| 307 | case ADC_CHANNEL_VBAT_ADC:
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| 308 | nTempAdc = zx234290_adc_read_vbat();
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| 309 | break;
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| 310 | case ADC_CHANNEL_VADC1:
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| 311 | nTempAdc = zx234290_adc_read_adc1();
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| 312 | break;
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| 313 | case ADC_CHANNEL_VADC2:
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| 314 | nTempAdc = zx234290_adc_read_adc2();
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| 315 | break;
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| 316 | default:
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| 317 | break;
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| 318 | }
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| 319 |
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| 320 | if (nTempAdc < 0)
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| 321 | {
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| 322 | wake_unlock(&adc_wake_lock);
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| 323 | soft_spin_unlock(ADC_SFLOCK);
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| 324 | return 0;
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| 325 | }
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| 326 |
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| 327 | /* ת»» */
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| 328 | zx234290_adc_correspond(channel, &nTempAdc);
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| 329 | *value = (int)nTempAdc;
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| 330 | wake_unlock(&adc_wake_lock);
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| 331 | soft_spin_unlock(ADC_SFLOCK);
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| 332 | //pmic_AdcUnlock();
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| 333 | return nRet;
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| 334 | }
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| 335 |
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| 336 |
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| 337 |
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| 338 | /**************************************************************************
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| 339 | * Function: get_battery_voltage
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| 340 | * Description: get battery voltage
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| 341 | * Parameters:
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| 342 | * Input:
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| 343 | *
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| 344 | *
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| 345 | * Output:
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| 346 | *
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| 347 | * Returns:
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| 348 | * avgValue:battery voltage
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| 349 | * Others: None
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| 350 | **************************************************************************/
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| 351 | uint get_battery_voltage(void)
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| 352 | {
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| 353 | int counter = 3;
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| 354 | int index=0;
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| 355 | int tmpValue=0,totalValue=0;
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| 356 | uint avgValue;
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xf.li | 6236ea7 | 2023-07-26 04:58:33 -0700 | [diff] [blame] | 357 |
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lh | 9ed821d | 2023-04-07 01:36:19 -0700 | [diff] [blame] | 358 | for(index = 0; index < counter; index++)
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| 359 | {
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| 360 | zx234290_adc_read(ADC_CHANNEL_VBAT_ADC, &tmpValue);
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| 361 | totalValue += tmpValue;
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| 362 | }
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| 363 | avgValue = (uint)(totalValue / counter);
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| 364 | return avgValue;
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| 365 | }
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| 366 | EXPORT_SYMBOL(get_battery_voltage);
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| 367 |
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| 368 | /**************************************************************************
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| 369 | * Function: get_adc1_voltage
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| 370 | * Description: get adc1 voltage
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| 371 | * Parameters:
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| 372 | * Input:
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| 373 | *
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| 374 | *
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| 375 | * Output:
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| 376 | *
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| 377 | * Returns:
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| 378 | * avgValue:adc voltage
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| 379 | * Others: None
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| 380 | **************************************************************************/
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| 381 | uint get_adc1_voltage(void)
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| 382 | {
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| 383 | int counter = 3;
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| 384 | int index=0;
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| 385 | int tmpValue=0,totalValue=0;
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| 386 | uint avgValue;
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xf.li | 6236ea7 | 2023-07-26 04:58:33 -0700 | [diff] [blame] | 387 |
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lh | 9ed821d | 2023-04-07 01:36:19 -0700 | [diff] [blame] | 388 | for(index = 0; index < counter; index++)
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| 389 | {
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| 390 | zx234290_adc_read(ADC_CHANNEL_VADC1, &tmpValue);
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| 391 | totalValue += tmpValue;
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| 392 | }
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| 393 | avgValue = (uint)(totalValue / counter);
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| 394 | return avgValue;
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| 395 | }
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| 396 | EXPORT_SYMBOL(get_adc1_voltage);
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| 397 |
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| 398 | /**************************************************************************
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| 399 | * Function: get_adc2_voltage
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| 400 | * Description: get adc2 voltage
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| 401 | * Parameters:
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| 402 | * Input:
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| 403 | *
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| 404 | *
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| 405 | * Output:
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| 406 | *
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| 407 | * Returns:
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| 408 | * avgValue:adc2 voltage
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| 409 | * Others: None
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| 410 | **************************************************************************/
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| 411 | //extern struct wake_lock adc_wake_lock;
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| 412 | uint get_adc2_voltage(void)
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| 413 | {
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| 414 | int counter = 3;
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| 415 | int index=0;
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| 416 | int tmpValue=0,totalValue=0;
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| 417 | uint avgValue;
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xf.li | 6236ea7 | 2023-07-26 04:58:33 -0700 | [diff] [blame] | 418 |
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lh | 9ed821d | 2023-04-07 01:36:19 -0700 | [diff] [blame] | 419 | //wake_lock(&adc_wake_lock);
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| 420 | for(index = 0; index < counter; index++)
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| 421 | {
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| 422 | zx234290_adc_read(ADC_CHANNEL_VADC2, &tmpValue);
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| 423 | totalValue += tmpValue;
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| 424 | }
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| 425 | //wake_unlock(&adc_wake_lock);
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| 426 | avgValue = (uint)(totalValue / counter);
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| 427 | return avgValue;
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| 428 | }
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| 429 | EXPORT_SYMBOL(get_adc2_voltage);
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