blob: 010e3aa298b1fc23d67ed8452c06f84f53fac62a [file] [log] [blame]
lh9ed821d2023-04-07 01:36:19 -07001/*******************************************************************************
2 * Copyright (C) 2008, ZTE Corporation.
3 *
4 * File Name: drvs_cfg.h
5 * File Mark:
6 * Description: This file contains the
7 * Others:
8 * Version: V1.0
9 * Author: huji
10 * Date: 2008-11-18
11 * History 1:
12 * Date: 2008-12-31
13 * Version:
14 * Author: wangxia
15 * Modification: add flash address for zx2930,zx2960,zx2802
16 *********************************************************************************/
17
18#ifndef _DRV_CFG_H
19#define _DRV_CFG_H
20
21/****************************************************************************
22* Include files
23****************************************************************************/
24/*for iram ddr*/
25#include "ram_config.h"
26/*for registers*/
27#include "drvs_chip_cfg.h"
28/*for dma regions*/
29#include "dma_cfg.h"
30#include "drvs_int.h"
31
32/****************************************************************************
33* type
34****************************************************************************/
35
36/****************************************************************************
37* Macros
38****************************************************************************/
39//add for voice drv by xuxinqiang
40#define BASEADR_SM_INT (UINT16 *) 0xF6001000
41/****************************************************************************
42* i2S configuration
43****************************************************************************/
44#define ARM_TOP_REG_BASE 0x0010D000
45
46#define ARM_I2S_LOOP_CFG *((volatile UINT32 *)(0x00140060))
47
48#define ARM_FRAC_DIV_FREQ *((volatile UINT32 *)(0x0010D09C))
49#define ARM_CODEC_MCLK *((volatile UINT32 *)(0x0010D0a0))
50
51/*ARM I2S SEL & SET*/
52#define CRPM_CLKSEL *((volatile UINT32 *)(LSP_CRM_REG_BASE+0x00))
53#define I2S0_CLKDIV *((volatile UINT32 *)(LSP_CRM_REG_BASE+0x14))
54#define I2S1_CLKDIV *((volatile UINT32 *)(LSP_CRM_REG_BASE+0x18))
55
56
57/*xxxx config---------------------------------------------------------------*/
58#define DMA_SILLY_MODE_EN 0
59//zhouyuchao add for usb phy suspend
60#define NAND_USB_CTRL (0x00)
61
62/****************************************************************************
63* sd configuration
64****************************************************************************/
65#define SD_MAX_SLOT_NUM 1 //max slot numbers
66#if (defined _CHIP_ZX2975)||(defined _CHIP_ZX297520)||(defined _CHIP_ZX297520V2)
67#define IO_OUT_POWER_READ_REG ((volatile UINT32*)(0x60005098))
68#define IO_OUT_POWER_WRITE_REG ((volatile UINT32*)(0x60005098))
69#else
70#define IO_OUT_POWER_READ_REG ((volatile UINT32*)(0x60005068))
71#define IO_OUT_POWER_WRITE_REG ((volatile UINT32*)(0x60005098))
72#endif
73
74#endif/*_DRV_CFG_H*/
75