lh | 9ed821d | 2023-04-07 01:36:19 -0700 | [diff] [blame] | 1 | /*******************************************************************************
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| 2 | * Copyright (C) 2008, ZTE Corporation.
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| 3 | *
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| 4 | * File Name: drvs_cfg.h
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| 5 | * File Mark:
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| 6 | * Description: This file contains the
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| 7 | * Others:
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| 8 | * Version: V1.0
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| 9 | * Author: huji
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| 10 | * Date: 2008-11-18
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| 11 | * History 1:
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| 12 | * Date: 2008-12-31
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| 13 | * Version:
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| 14 | * Author: wangxia
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| 15 | * Modification: add flash address for zx2930,zx2960,zx2802
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| 16 | *********************************************************************************/
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| 17 |
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| 18 | #ifndef _DRV_CFG_H
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| 19 | #define _DRV_CFG_H
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| 20 |
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| 21 | /****************************************************************************
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| 22 | * Include files
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| 23 | ****************************************************************************/
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| 24 | /*for iram ddr*/
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| 25 | #include "ram_config.h"
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| 26 | /*for registers*/
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| 27 | #include "drvs_chip_cfg.h"
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| 28 | /*for dma regions*/
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| 29 | #include "dma_cfg.h"
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| 30 | #include "drvs_int.h"
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| 31 |
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| 32 | /****************************************************************************
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| 33 | * type
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| 34 | ****************************************************************************/
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| 35 |
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| 36 | /****************************************************************************
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| 37 | * Macros
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| 38 | ****************************************************************************/
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| 39 | //add for voice drv by xuxinqiang
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| 40 | #define BASEADR_SM_INT (UINT16 *) 0xF6001000
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| 41 | /****************************************************************************
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| 42 | * i2S configuration
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| 43 | ****************************************************************************/
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| 44 | #define ARM_TOP_REG_BASE 0x0010D000
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| 45 |
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| 46 | #define ARM_I2S_LOOP_CFG *((volatile UINT32 *)(0x00140060))
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| 47 |
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| 48 | #define ARM_FRAC_DIV_FREQ *((volatile UINT32 *)(0x0010D09C))
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| 49 | #define ARM_CODEC_MCLK *((volatile UINT32 *)(0x0010D0a0))
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| 50 |
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| 51 | /*ARM I2S SEL & SET*/
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| 52 | #define CRPM_CLKSEL *((volatile UINT32 *)(LSP_CRM_REG_BASE+0x00))
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| 53 | #define I2S0_CLKDIV *((volatile UINT32 *)(LSP_CRM_REG_BASE+0x14))
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| 54 | #define I2S1_CLKDIV *((volatile UINT32 *)(LSP_CRM_REG_BASE+0x18))
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| 55 |
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| 56 |
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| 57 | /*xxxx config---------------------------------------------------------------*/
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| 58 | #define DMA_SILLY_MODE_EN 0
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| 59 | //zhouyuchao add for usb phy suspend
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| 60 | #define NAND_USB_CTRL (0x00)
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| 61 |
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| 62 | /****************************************************************************
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| 63 | * sd configuration
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| 64 | ****************************************************************************/
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| 65 | #define SD_MAX_SLOT_NUM 1 //max slot numbers
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| 66 | #if (defined _CHIP_ZX2975)||(defined _CHIP_ZX297520)||(defined _CHIP_ZX297520V2)
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| 67 | #define IO_OUT_POWER_READ_REG ((volatile UINT32*)(0x60005098))
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| 68 | #define IO_OUT_POWER_WRITE_REG ((volatile UINT32*)(0x60005098))
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| 69 | #else
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| 70 | #define IO_OUT_POWER_READ_REG ((volatile UINT32*)(0x60005068))
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| 71 | #define IO_OUT_POWER_WRITE_REG ((volatile UINT32*)(0x60005098))
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| 72 | #endif
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| 73 |
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| 74 | #endif/*_DRV_CFG_H*/
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| 75 |
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