| lh | 9ed821d | 2023-04-07 01:36:19 -0700 | [diff] [blame] | 1 | /* | 
|  | 2 | * linux/kernel/irq/chip.c | 
|  | 3 | * | 
|  | 4 | * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar | 
|  | 5 | * Copyright (C) 2005-2006, Thomas Gleixner, Russell King | 
|  | 6 | * | 
|  | 7 | * This file contains the core interrupt handling code, for irq-chip | 
|  | 8 | * based architectures. | 
|  | 9 | * | 
|  | 10 | * Detailed information is available in Documentation/DocBook/genericirq | 
|  | 11 | */ | 
|  | 12 |  | 
|  | 13 | #include <linux/irq.h> | 
|  | 14 | #include <linux/msi.h> | 
|  | 15 | #include <linux/module.h> | 
|  | 16 | #include <linux/interrupt.h> | 
|  | 17 | #include <linux/kernel_stat.h> | 
|  | 18 |  | 
|  | 19 | #include <trace/events/irq.h> | 
|  | 20 |  | 
|  | 21 | #include "internals.h" | 
|  | 22 |  | 
|  | 23 | /** | 
|  | 24 | *	irq_set_chip - set the irq chip for an irq | 
|  | 25 | *	@irq:	irq number | 
|  | 26 | *	@chip:	pointer to irq chip description structure | 
|  | 27 | */ | 
|  | 28 | int irq_set_chip(unsigned int irq, struct irq_chip *chip) | 
|  | 29 | { | 
|  | 30 | unsigned long flags; | 
|  | 31 | struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0); | 
|  | 32 |  | 
|  | 33 | if (!desc) | 
|  | 34 | return -EINVAL; | 
|  | 35 |  | 
|  | 36 | if (!chip) | 
|  | 37 | chip = &no_irq_chip; | 
|  | 38 |  | 
|  | 39 | desc->irq_data.chip = chip; | 
|  | 40 | irq_put_desc_unlock(desc, flags); | 
|  | 41 | /* | 
|  | 42 | * For !CONFIG_SPARSE_IRQ make the irq show up in | 
|  | 43 | * allocated_irqs. For the CONFIG_SPARSE_IRQ case, it is | 
|  | 44 | * already marked, and this call is harmless. | 
|  | 45 | */ | 
|  | 46 | irq_reserve_irq(irq); | 
|  | 47 | return 0; | 
|  | 48 | } | 
|  | 49 | EXPORT_SYMBOL(irq_set_chip); | 
|  | 50 |  | 
|  | 51 | /** | 
|  | 52 | *	irq_set_type - set the irq trigger type for an irq | 
|  | 53 | *	@irq:	irq number | 
|  | 54 | *	@type:	IRQ_TYPE_{LEVEL,EDGE}_* value - see include/linux/irq.h | 
|  | 55 | */ | 
|  | 56 | int irq_set_irq_type(unsigned int irq, unsigned int type) | 
|  | 57 | { | 
|  | 58 | unsigned long flags; | 
|  | 59 | struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL); | 
|  | 60 | int ret = 0; | 
|  | 61 |  | 
|  | 62 | if (!desc) | 
|  | 63 | return -EINVAL; | 
|  | 64 |  | 
|  | 65 | type &= IRQ_TYPE_SENSE_MASK; | 
|  | 66 | ret = __irq_set_trigger(desc, irq, type); | 
|  | 67 | irq_put_desc_busunlock(desc, flags); | 
|  | 68 | return ret; | 
|  | 69 | } | 
|  | 70 | EXPORT_SYMBOL(irq_set_irq_type); | 
|  | 71 |  | 
|  | 72 | /** | 
|  | 73 | *	irq_set_handler_data - set irq handler data for an irq | 
|  | 74 | *	@irq:	Interrupt number | 
|  | 75 | *	@data:	Pointer to interrupt specific data | 
|  | 76 | * | 
|  | 77 | *	Set the hardware irq controller data for an irq | 
|  | 78 | */ | 
|  | 79 | int irq_set_handler_data(unsigned int irq, void *data) | 
|  | 80 | { | 
|  | 81 | unsigned long flags; | 
|  | 82 | struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0); | 
|  | 83 |  | 
|  | 84 | if (!desc) | 
|  | 85 | return -EINVAL; | 
|  | 86 | desc->irq_data.handler_data = data; | 
|  | 87 | irq_put_desc_unlock(desc, flags); | 
|  | 88 | return 0; | 
|  | 89 | } | 
|  | 90 | EXPORT_SYMBOL(irq_set_handler_data); | 
|  | 91 |  | 
|  | 92 | /** | 
|  | 93 | *	irq_set_msi_desc - set MSI descriptor data for an irq | 
|  | 94 | *	@irq:	Interrupt number | 
|  | 95 | *	@entry:	Pointer to MSI descriptor data | 
|  | 96 | * | 
|  | 97 | *	Set the MSI descriptor entry for an irq | 
|  | 98 | */ | 
|  | 99 | int irq_set_msi_desc(unsigned int irq, struct msi_desc *entry) | 
|  | 100 | { | 
|  | 101 | unsigned long flags; | 
|  | 102 | struct irq_desc *desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL); | 
|  | 103 |  | 
|  | 104 | if (!desc) | 
|  | 105 | return -EINVAL; | 
|  | 106 | desc->irq_data.msi_desc = entry; | 
|  | 107 | if (entry) | 
|  | 108 | entry->irq = irq; | 
|  | 109 | irq_put_desc_unlock(desc, flags); | 
|  | 110 | return 0; | 
|  | 111 | } | 
|  | 112 |  | 
|  | 113 | /** | 
|  | 114 | *	irq_set_chip_data - set irq chip data for an irq | 
|  | 115 | *	@irq:	Interrupt number | 
|  | 116 | *	@data:	Pointer to chip specific data | 
|  | 117 | * | 
|  | 118 | *	Set the hardware irq chip data for an irq | 
|  | 119 | */ | 
|  | 120 | int irq_set_chip_data(unsigned int irq, void *data) | 
|  | 121 | { | 
|  | 122 | unsigned long flags; | 
|  | 123 | struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0); | 
|  | 124 |  | 
|  | 125 | if (!desc) | 
|  | 126 | return -EINVAL; | 
|  | 127 | desc->irq_data.chip_data = data; | 
|  | 128 | irq_put_desc_unlock(desc, flags); | 
|  | 129 | return 0; | 
|  | 130 | } | 
|  | 131 | EXPORT_SYMBOL(irq_set_chip_data); | 
|  | 132 |  | 
|  | 133 | struct irq_data *irq_get_irq_data(unsigned int irq) | 
|  | 134 | { | 
|  | 135 | struct irq_desc *desc = irq_to_desc(irq); | 
|  | 136 |  | 
|  | 137 | return desc ? &desc->irq_data : NULL; | 
|  | 138 | } | 
|  | 139 | EXPORT_SYMBOL_GPL(irq_get_irq_data); | 
|  | 140 |  | 
|  | 141 | static void irq_state_clr_disabled(struct irq_desc *desc) | 
|  | 142 | { | 
|  | 143 | irqd_clear(&desc->irq_data, IRQD_IRQ_DISABLED); | 
|  | 144 | } | 
|  | 145 |  | 
|  | 146 | static void irq_state_set_disabled(struct irq_desc *desc) | 
|  | 147 | { | 
|  | 148 | irqd_set(&desc->irq_data, IRQD_IRQ_DISABLED); | 
|  | 149 | } | 
|  | 150 |  | 
|  | 151 | static void irq_state_clr_masked(struct irq_desc *desc) | 
|  | 152 | { | 
|  | 153 | irqd_clear(&desc->irq_data, IRQD_IRQ_MASKED); | 
|  | 154 | } | 
|  | 155 |  | 
|  | 156 | static void irq_state_set_masked(struct irq_desc *desc) | 
|  | 157 | { | 
|  | 158 | irqd_set(&desc->irq_data, IRQD_IRQ_MASKED); | 
|  | 159 | } | 
|  | 160 |  | 
|  | 161 | int irq_startup(struct irq_desc *desc, bool resend) | 
|  | 162 | { | 
|  | 163 | int ret = 0; | 
|  | 164 |  | 
|  | 165 | irq_state_clr_disabled(desc); | 
|  | 166 | desc->depth = 0; | 
|  | 167 |  | 
|  | 168 | if (desc->irq_data.chip->irq_startup) { | 
|  | 169 | ret = desc->irq_data.chip->irq_startup(&desc->irq_data); | 
|  | 170 | irq_state_clr_masked(desc); | 
|  | 171 | } else { | 
|  | 172 | irq_enable(desc); | 
|  | 173 | } | 
|  | 174 | if (resend) | 
|  | 175 | check_irq_resend(desc, desc->irq_data.irq); | 
|  | 176 | return ret; | 
|  | 177 | } | 
|  | 178 |  | 
|  | 179 | void irq_shutdown(struct irq_desc *desc) | 
|  | 180 | { | 
|  | 181 | irq_state_set_disabled(desc); | 
|  | 182 | desc->depth = 1; | 
|  | 183 | if (desc->irq_data.chip->irq_shutdown) | 
|  | 184 | desc->irq_data.chip->irq_shutdown(&desc->irq_data); | 
|  | 185 | else if (desc->irq_data.chip->irq_disable) | 
|  | 186 | desc->irq_data.chip->irq_disable(&desc->irq_data); | 
|  | 187 | else | 
|  | 188 | desc->irq_data.chip->irq_mask(&desc->irq_data); | 
|  | 189 | irq_state_set_masked(desc); | 
|  | 190 | } | 
|  | 191 |  | 
|  | 192 | void irq_enable(struct irq_desc *desc) | 
|  | 193 | { | 
|  | 194 | irq_state_clr_disabled(desc); | 
|  | 195 | if (desc->irq_data.chip->irq_enable) | 
|  | 196 | desc->irq_data.chip->irq_enable(&desc->irq_data); | 
|  | 197 | else | 
|  | 198 | desc->irq_data.chip->irq_unmask(&desc->irq_data); | 
|  | 199 | irq_state_clr_masked(desc); | 
|  | 200 | } | 
|  | 201 |  | 
|  | 202 | void irq_disable(struct irq_desc *desc) | 
|  | 203 | { | 
|  | 204 | irq_state_set_disabled(desc); | 
|  | 205 | if (desc->irq_data.chip->irq_disable) { | 
|  | 206 | desc->irq_data.chip->irq_disable(&desc->irq_data); | 
|  | 207 | irq_state_set_masked(desc); | 
|  | 208 | } | 
|  | 209 | } | 
|  | 210 |  | 
|  | 211 | void irq_percpu_enable(struct irq_desc *desc, unsigned int cpu) | 
|  | 212 | { | 
|  | 213 | if (desc->irq_data.chip->irq_enable) | 
|  | 214 | desc->irq_data.chip->irq_enable(&desc->irq_data); | 
|  | 215 | else | 
|  | 216 | desc->irq_data.chip->irq_unmask(&desc->irq_data); | 
|  | 217 | cpumask_set_cpu(cpu, desc->percpu_enabled); | 
|  | 218 | } | 
|  | 219 |  | 
|  | 220 | void irq_percpu_disable(struct irq_desc *desc, unsigned int cpu) | 
|  | 221 | { | 
|  | 222 | if (desc->irq_data.chip->irq_disable) | 
|  | 223 | desc->irq_data.chip->irq_disable(&desc->irq_data); | 
|  | 224 | else | 
|  | 225 | desc->irq_data.chip->irq_mask(&desc->irq_data); | 
|  | 226 | cpumask_clear_cpu(cpu, desc->percpu_enabled); | 
|  | 227 | } | 
|  | 228 |  | 
|  | 229 | static inline void mask_ack_irq(struct irq_desc *desc) | 
|  | 230 | { | 
|  | 231 | if (desc->irq_data.chip->irq_mask_ack) | 
|  | 232 | desc->irq_data.chip->irq_mask_ack(&desc->irq_data); | 
|  | 233 | else { | 
|  | 234 | desc->irq_data.chip->irq_mask(&desc->irq_data); | 
|  | 235 | if (desc->irq_data.chip->irq_ack) | 
|  | 236 | desc->irq_data.chip->irq_ack(&desc->irq_data); | 
|  | 237 | } | 
|  | 238 | irq_state_set_masked(desc); | 
|  | 239 | } | 
|  | 240 |  | 
|  | 241 | void mask_irq(struct irq_desc *desc) | 
|  | 242 | { | 
|  | 243 | if (desc->irq_data.chip->irq_mask) { | 
|  | 244 | desc->irq_data.chip->irq_mask(&desc->irq_data); | 
|  | 245 | irq_state_set_masked(desc); | 
|  | 246 | } | 
|  | 247 | } | 
|  | 248 | EXPORT_SYMBOL(mask_irq); | 
|  | 249 |  | 
|  | 250 | void unmask_irq(struct irq_desc *desc) | 
|  | 251 | { | 
|  | 252 | if (desc->irq_data.chip->irq_unmask) { | 
|  | 253 | desc->irq_data.chip->irq_unmask(&desc->irq_data); | 
|  | 254 | irq_state_clr_masked(desc); | 
|  | 255 | } | 
|  | 256 | } | 
|  | 257 | EXPORT_SYMBOL(unmask_irq); | 
|  | 258 |  | 
|  | 259 | /* | 
|  | 260 | *	handle_nested_irq - Handle a nested irq from a irq thread | 
|  | 261 | *	@irq:	the interrupt number | 
|  | 262 | * | 
|  | 263 | *	Handle interrupts which are nested into a threaded interrupt | 
|  | 264 | *	handler. The handler function is called inside the calling | 
|  | 265 | *	threads context. | 
|  | 266 | */ | 
|  | 267 | void handle_nested_irq(unsigned int irq) | 
|  | 268 | { | 
|  | 269 | struct irq_desc *desc = irq_to_desc(irq); | 
|  | 270 | struct irqaction *action; | 
|  | 271 | irqreturn_t action_ret; | 
|  | 272 |  | 
|  | 273 | might_sleep(); | 
|  | 274 |  | 
|  | 275 | raw_spin_lock_irq(&desc->lock); | 
|  | 276 |  | 
|  | 277 | kstat_incr_irqs_this_cpu(irq, desc); | 
|  | 278 |  | 
|  | 279 | action = desc->action; | 
|  | 280 | if (unlikely(!action || irqd_irq_disabled(&desc->irq_data))) | 
|  | 281 | goto out_unlock; | 
|  | 282 |  | 
|  | 283 | irqd_set(&desc->irq_data, IRQD_IRQ_INPROGRESS); | 
|  | 284 | raw_spin_unlock_irq(&desc->lock); | 
|  | 285 |  | 
|  | 286 | action_ret = action->thread_fn(action->irq, action->dev_id); | 
|  | 287 | if (!noirqdebug) | 
|  | 288 | note_interrupt(irq, desc, action_ret); | 
|  | 289 |  | 
|  | 290 | raw_spin_lock_irq(&desc->lock); | 
|  | 291 | irqd_clear(&desc->irq_data, IRQD_IRQ_INPROGRESS); | 
|  | 292 |  | 
|  | 293 | out_unlock: | 
|  | 294 | raw_spin_unlock_irq(&desc->lock); | 
|  | 295 | } | 
|  | 296 | EXPORT_SYMBOL_GPL(handle_nested_irq); | 
|  | 297 |  | 
|  | 298 | static bool irq_check_poll(struct irq_desc *desc) | 
|  | 299 | { | 
|  | 300 | if (!(desc->istate & IRQS_POLL_INPROGRESS)) | 
|  | 301 | return false; | 
|  | 302 | return irq_wait_for_poll(desc); | 
|  | 303 | } | 
|  | 304 |  | 
|  | 305 | /** | 
|  | 306 | *	handle_simple_irq - Simple and software-decoded IRQs. | 
|  | 307 | *	@irq:	the interrupt number | 
|  | 308 | *	@desc:	the interrupt description structure for this irq | 
|  | 309 | * | 
|  | 310 | *	Simple interrupts are either sent from a demultiplexing interrupt | 
|  | 311 | *	handler or come from hardware, where no interrupt hardware control | 
|  | 312 | *	is necessary. | 
|  | 313 | * | 
|  | 314 | *	Note: The caller is expected to handle the ack, clear, mask and | 
|  | 315 | *	unmask issues if necessary. | 
|  | 316 | */ | 
|  | 317 | void | 
|  | 318 | handle_simple_irq(unsigned int irq, struct irq_desc *desc) | 
|  | 319 | { | 
|  | 320 | raw_spin_lock(&desc->lock); | 
|  | 321 |  | 
|  | 322 | if (unlikely(irqd_irq_inprogress(&desc->irq_data))) | 
|  | 323 | if (!irq_check_poll(desc)) | 
|  | 324 | goto out_unlock; | 
|  | 325 |  | 
|  | 326 | desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING); | 
|  | 327 | kstat_incr_irqs_this_cpu(irq, desc); | 
|  | 328 |  | 
|  | 329 | if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) | 
|  | 330 | goto out_unlock; | 
|  | 331 |  | 
|  | 332 | handle_irq_event(desc); | 
|  | 333 |  | 
|  | 334 | out_unlock: | 
|  | 335 | raw_spin_unlock(&desc->lock); | 
|  | 336 | } | 
|  | 337 | EXPORT_SYMBOL_GPL(handle_simple_irq); | 
|  | 338 |  | 
|  | 339 | /* | 
|  | 340 | * Called unconditionally from handle_level_irq() and only for oneshot | 
|  | 341 | * interrupts from handle_fasteoi_irq() | 
|  | 342 | */ | 
|  | 343 | static void cond_unmask_irq(struct irq_desc *desc) | 
|  | 344 | { | 
|  | 345 | /* | 
|  | 346 | * We need to unmask in the following cases: | 
|  | 347 | * - Standard level irq (IRQF_ONESHOT is not set) | 
|  | 348 | * - Oneshot irq which did not wake the thread (caused by a | 
|  | 349 | *   spurious interrupt or a primary handler handling it | 
|  | 350 | *   completely). | 
|  | 351 | */ | 
|  | 352 | if (!irqd_irq_disabled(&desc->irq_data) && | 
|  | 353 | irqd_irq_masked(&desc->irq_data) && !desc->threads_oneshot) | 
|  | 354 | unmask_irq(desc); | 
|  | 355 | } | 
|  | 356 |  | 
|  | 357 | /** | 
|  | 358 | *	handle_level_irq - Level type irq handler | 
|  | 359 | *	@irq:	the interrupt number | 
|  | 360 | *	@desc:	the interrupt description structure for this irq | 
|  | 361 | * | 
|  | 362 | *	Level type interrupts are active as long as the hardware line has | 
|  | 363 | *	the active level. This may require to mask the interrupt and unmask | 
|  | 364 | *	it after the associated handler has acknowledged the device, so the | 
|  | 365 | *	interrupt line is back to inactive. | 
|  | 366 | */ | 
|  | 367 | void | 
|  | 368 | handle_level_irq(unsigned int irq, struct irq_desc *desc) | 
|  | 369 | { | 
|  | 370 | raw_spin_lock(&desc->lock); | 
|  | 371 | mask_ack_irq(desc); | 
|  | 372 |  | 
|  | 373 | if (unlikely(irqd_irq_inprogress(&desc->irq_data))) | 
|  | 374 | if (!irq_check_poll(desc)) | 
|  | 375 | goto out_unlock; | 
|  | 376 |  | 
|  | 377 | desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING); | 
|  | 378 | kstat_incr_irqs_this_cpu(irq, desc); | 
|  | 379 |  | 
|  | 380 | /* | 
|  | 381 | * If its disabled or no action available | 
|  | 382 | * keep it masked and get out of here | 
|  | 383 | */ | 
|  | 384 | if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) | 
|  | 385 | goto out_unlock; | 
|  | 386 |  | 
|  | 387 | handle_irq_event(desc); | 
|  | 388 |  | 
|  | 389 | cond_unmask_irq(desc); | 
|  | 390 |  | 
|  | 391 | out_unlock: | 
|  | 392 | raw_spin_unlock(&desc->lock); | 
|  | 393 | } | 
|  | 394 | EXPORT_SYMBOL_GPL(handle_level_irq); | 
|  | 395 |  | 
|  | 396 | #ifdef CONFIG_IRQ_PREFLOW_FASTEOI | 
|  | 397 | static inline void preflow_handler(struct irq_desc *desc) | 
|  | 398 | { | 
|  | 399 | if (desc->preflow_handler) | 
|  | 400 | desc->preflow_handler(&desc->irq_data); | 
|  | 401 | } | 
|  | 402 | #else | 
|  | 403 | static inline void preflow_handler(struct irq_desc *desc) { } | 
|  | 404 | #endif | 
|  | 405 |  | 
|  | 406 | /** | 
|  | 407 | *	handle_fasteoi_irq - irq handler for transparent controllers | 
|  | 408 | *	@irq:	the interrupt number | 
|  | 409 | *	@desc:	the interrupt description structure for this irq | 
|  | 410 | * | 
|  | 411 | *	Only a single callback will be issued to the chip: an ->eoi() | 
|  | 412 | *	call when the interrupt has been serviced. This enables support | 
|  | 413 | *	for modern forms of interrupt handlers, which handle the flow | 
|  | 414 | *	details in hardware, transparently. | 
|  | 415 | */ | 
|  | 416 | void | 
|  | 417 | handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc) | 
|  | 418 | { | 
|  | 419 | raw_spin_lock(&desc->lock); | 
|  | 420 |  | 
|  | 421 | if (unlikely(irqd_irq_inprogress(&desc->irq_data))) | 
|  | 422 | if (!irq_check_poll(desc)) | 
|  | 423 | goto out; | 
|  | 424 |  | 
|  | 425 | desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING); | 
|  | 426 | kstat_incr_irqs_this_cpu(irq, desc); | 
|  | 427 |  | 
|  | 428 | /* | 
|  | 429 | * If its disabled or no action available | 
|  | 430 | * then mask it and get out of here: | 
|  | 431 | */ | 
|  | 432 | if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) { | 
|  | 433 | desc->istate |= IRQS_PENDING; | 
|  | 434 | mask_irq(desc); | 
|  | 435 | goto out; | 
|  | 436 | } | 
|  | 437 |  | 
|  | 438 | if (desc->istate & IRQS_ONESHOT) | 
|  | 439 | mask_irq(desc); | 
|  | 440 |  | 
|  | 441 | preflow_handler(desc); | 
|  | 442 | handle_irq_event(desc); | 
|  | 443 |  | 
|  | 444 | if (desc->istate & IRQS_ONESHOT) | 
|  | 445 | cond_unmask_irq(desc); | 
|  | 446 |  | 
|  | 447 | out_eoi: | 
|  | 448 | desc->irq_data.chip->irq_eoi(&desc->irq_data); | 
|  | 449 | out_unlock: | 
|  | 450 | raw_spin_unlock(&desc->lock); | 
|  | 451 | return; | 
|  | 452 | out: | 
|  | 453 | if (!(desc->irq_data.chip->flags & IRQCHIP_EOI_IF_HANDLED)) | 
|  | 454 | goto out_eoi; | 
|  | 455 | goto out_unlock; | 
|  | 456 | } | 
|  | 457 |  | 
|  | 458 | /** | 
|  | 459 | *	handle_edge_irq - edge type IRQ handler | 
|  | 460 | *	@irq:	the interrupt number | 
|  | 461 | *	@desc:	the interrupt description structure for this irq | 
|  | 462 | * | 
|  | 463 | *	Interrupt occures on the falling and/or rising edge of a hardware | 
|  | 464 | *	signal. The occurrence is latched into the irq controller hardware | 
|  | 465 | *	and must be acked in order to be reenabled. After the ack another | 
|  | 466 | *	interrupt can happen on the same source even before the first one | 
|  | 467 | *	is handled by the associated event handler. If this happens it | 
|  | 468 | *	might be necessary to disable (mask) the interrupt depending on the | 
|  | 469 | *	controller hardware. This requires to reenable the interrupt inside | 
|  | 470 | *	of the loop which handles the interrupts which have arrived while | 
|  | 471 | *	the handler was running. If all pending interrupts are handled, the | 
|  | 472 | *	loop is left. | 
|  | 473 | */ | 
|  | 474 | void | 
|  | 475 | handle_edge_irq(unsigned int irq, struct irq_desc *desc) | 
|  | 476 | { | 
|  | 477 | raw_spin_lock(&desc->lock); | 
|  | 478 |  | 
|  | 479 | desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING); | 
|  | 480 | /* | 
|  | 481 | * If we're currently running this IRQ, or its disabled, | 
|  | 482 | * we shouldn't process the IRQ. Mark it pending, handle | 
|  | 483 | * the necessary masking and go out | 
|  | 484 | */ | 
|  | 485 | if (unlikely(irqd_irq_disabled(&desc->irq_data) || | 
|  | 486 | irqd_irq_inprogress(&desc->irq_data) || !desc->action)) { | 
|  | 487 | if (!irq_check_poll(desc)) { | 
|  | 488 | desc->istate |= IRQS_PENDING; | 
|  | 489 | mask_ack_irq(desc); | 
|  | 490 | goto out_unlock; | 
|  | 491 | } | 
|  | 492 | } | 
|  | 493 | kstat_incr_irqs_this_cpu(irq, desc); | 
|  | 494 |  | 
|  | 495 | /* Start handling the irq */ | 
|  | 496 | desc->irq_data.chip->irq_ack(&desc->irq_data); | 
|  | 497 |  | 
|  | 498 | do { | 
|  | 499 | if (unlikely(!desc->action)) { | 
|  | 500 | mask_irq(desc); | 
|  | 501 | goto out_unlock; | 
|  | 502 | } | 
|  | 503 |  | 
|  | 504 | /* | 
|  | 505 | * When another irq arrived while we were handling | 
|  | 506 | * one, we could have masked the irq. | 
|  | 507 | * Renable it, if it was not disabled in meantime. | 
|  | 508 | */ | 
|  | 509 | if (unlikely(desc->istate & IRQS_PENDING)) { | 
|  | 510 | if (!irqd_irq_disabled(&desc->irq_data) && | 
|  | 511 | irqd_irq_masked(&desc->irq_data)) | 
|  | 512 | unmask_irq(desc); | 
|  | 513 | } | 
|  | 514 |  | 
|  | 515 | handle_irq_event(desc); | 
|  | 516 |  | 
|  | 517 | } while ((desc->istate & IRQS_PENDING) && | 
|  | 518 | !irqd_irq_disabled(&desc->irq_data)); | 
|  | 519 |  | 
|  | 520 | out_unlock: | 
|  | 521 | raw_spin_unlock(&desc->lock); | 
|  | 522 | } | 
|  | 523 | EXPORT_SYMBOL(handle_edge_irq); | 
|  | 524 |  | 
|  | 525 | #ifdef CONFIG_IRQ_EDGE_EOI_HANDLER | 
|  | 526 | /** | 
|  | 527 | *	handle_edge_eoi_irq - edge eoi type IRQ handler | 
|  | 528 | *	@irq:	the interrupt number | 
|  | 529 | *	@desc:	the interrupt description structure for this irq | 
|  | 530 | * | 
|  | 531 | * Similar as the above handle_edge_irq, but using eoi and w/o the | 
|  | 532 | * mask/unmask logic. | 
|  | 533 | */ | 
|  | 534 | void handle_edge_eoi_irq(unsigned int irq, struct irq_desc *desc) | 
|  | 535 | { | 
|  | 536 | struct irq_chip *chip = irq_desc_get_chip(desc); | 
|  | 537 |  | 
|  | 538 | raw_spin_lock(&desc->lock); | 
|  | 539 |  | 
|  | 540 | desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING); | 
|  | 541 | /* | 
|  | 542 | * If we're currently running this IRQ, or its disabled, | 
|  | 543 | * we shouldn't process the IRQ. Mark it pending, handle | 
|  | 544 | * the necessary masking and go out | 
|  | 545 | */ | 
|  | 546 | if (unlikely(irqd_irq_disabled(&desc->irq_data) || | 
|  | 547 | irqd_irq_inprogress(&desc->irq_data) || !desc->action)) { | 
|  | 548 | if (!irq_check_poll(desc)) { | 
|  | 549 | desc->istate |= IRQS_PENDING; | 
|  | 550 | goto out_eoi; | 
|  | 551 | } | 
|  | 552 | } | 
|  | 553 | kstat_incr_irqs_this_cpu(irq, desc); | 
|  | 554 |  | 
|  | 555 | do { | 
|  | 556 | if (unlikely(!desc->action)) | 
|  | 557 | goto out_eoi; | 
|  | 558 |  | 
|  | 559 | handle_irq_event(desc); | 
|  | 560 |  | 
|  | 561 | } while ((desc->istate & IRQS_PENDING) && | 
|  | 562 | !irqd_irq_disabled(&desc->irq_data)); | 
|  | 563 |  | 
|  | 564 | out_eoi: | 
|  | 565 | chip->irq_eoi(&desc->irq_data); | 
|  | 566 | raw_spin_unlock(&desc->lock); | 
|  | 567 | } | 
|  | 568 | #endif | 
|  | 569 |  | 
|  | 570 | /** | 
|  | 571 | *	handle_percpu_irq - Per CPU local irq handler | 
|  | 572 | *	@irq:	the interrupt number | 
|  | 573 | *	@desc:	the interrupt description structure for this irq | 
|  | 574 | * | 
|  | 575 | *	Per CPU interrupts on SMP machines without locking requirements | 
|  | 576 | */ | 
|  | 577 | void | 
|  | 578 | handle_percpu_irq(unsigned int irq, struct irq_desc *desc) | 
|  | 579 | { | 
|  | 580 | struct irq_chip *chip = irq_desc_get_chip(desc); | 
|  | 581 |  | 
|  | 582 | kstat_incr_irqs_this_cpu(irq, desc); | 
|  | 583 |  | 
|  | 584 | if (chip->irq_ack) | 
|  | 585 | chip->irq_ack(&desc->irq_data); | 
|  | 586 |  | 
|  | 587 | handle_irq_event_percpu(desc, desc->action); | 
|  | 588 |  | 
|  | 589 | if (chip->irq_eoi) | 
|  | 590 | chip->irq_eoi(&desc->irq_data); | 
|  | 591 | } | 
|  | 592 |  | 
|  | 593 | /** | 
|  | 594 | * handle_percpu_devid_irq - Per CPU local irq handler with per cpu dev ids | 
|  | 595 | * @irq:	the interrupt number | 
|  | 596 | * @desc:	the interrupt description structure for this irq | 
|  | 597 | * | 
|  | 598 | * Per CPU interrupts on SMP machines without locking requirements. Same as | 
|  | 599 | * handle_percpu_irq() above but with the following extras: | 
|  | 600 | * | 
|  | 601 | * action->percpu_dev_id is a pointer to percpu variables which | 
|  | 602 | * contain the real device id for the cpu on which this handler is | 
|  | 603 | * called | 
|  | 604 | */ | 
|  | 605 | void handle_percpu_devid_irq(unsigned int irq, struct irq_desc *desc) | 
|  | 606 | { | 
|  | 607 | struct irq_chip *chip = irq_desc_get_chip(desc); | 
|  | 608 | struct irqaction *action = desc->action; | 
|  | 609 | void *dev_id = __this_cpu_ptr(action->percpu_dev_id); | 
|  | 610 | irqreturn_t res; | 
|  | 611 |  | 
|  | 612 | kstat_incr_irqs_this_cpu(irq, desc); | 
|  | 613 |  | 
|  | 614 | if (chip->irq_ack) | 
|  | 615 | chip->irq_ack(&desc->irq_data); | 
|  | 616 |  | 
|  | 617 | trace_irq_handler_entry(irq, action); | 
|  | 618 | res = action->handler(irq, dev_id); | 
|  | 619 | trace_irq_handler_exit(irq, action, res); | 
|  | 620 |  | 
|  | 621 | if (chip->irq_eoi) | 
|  | 622 | chip->irq_eoi(&desc->irq_data); | 
|  | 623 | } | 
|  | 624 |  | 
|  | 625 | void | 
|  | 626 | __irq_set_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained, | 
|  | 627 | const char *name) | 
|  | 628 | { | 
|  | 629 | unsigned long flags; | 
|  | 630 | struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, 0); | 
|  | 631 |  | 
|  | 632 | if (!desc) | 
|  | 633 | return; | 
|  | 634 |  | 
|  | 635 | if (!handle) { | 
|  | 636 | handle = handle_bad_irq; | 
|  | 637 | } else { | 
|  | 638 | if (WARN_ON(desc->irq_data.chip == &no_irq_chip)) | 
|  | 639 | goto out; | 
|  | 640 | } | 
|  | 641 |  | 
|  | 642 | /* Uninstall? */ | 
|  | 643 | if (handle == handle_bad_irq) { | 
|  | 644 | if (desc->irq_data.chip != &no_irq_chip) | 
|  | 645 | mask_ack_irq(desc); | 
|  | 646 | irq_state_set_disabled(desc); | 
|  | 647 | desc->depth = 1; | 
|  | 648 | } | 
|  | 649 | desc->handle_irq = handle; | 
|  | 650 | desc->name = name; | 
|  | 651 |  | 
|  | 652 | if (handle != handle_bad_irq && is_chained) { | 
|  | 653 | irq_settings_set_noprobe(desc); | 
|  | 654 | irq_settings_set_norequest(desc); | 
|  | 655 | irq_settings_set_nothread(desc); | 
|  | 656 | irq_startup(desc, true); | 
|  | 657 | } | 
|  | 658 | out: | 
|  | 659 | irq_put_desc_busunlock(desc, flags); | 
|  | 660 | } | 
|  | 661 | EXPORT_SYMBOL_GPL(__irq_set_handler); | 
|  | 662 |  | 
|  | 663 | void | 
|  | 664 | irq_set_chip_and_handler_name(unsigned int irq, struct irq_chip *chip, | 
|  | 665 | irq_flow_handler_t handle, const char *name) | 
|  | 666 | { | 
|  | 667 | irq_set_chip(irq, chip); | 
|  | 668 | __irq_set_handler(irq, handle, 0, name); | 
|  | 669 | } | 
|  | 670 |  | 
|  | 671 | void irq_modify_status(unsigned int irq, unsigned long clr, unsigned long set) | 
|  | 672 | { | 
|  | 673 | unsigned long flags; | 
|  | 674 | struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0); | 
|  | 675 |  | 
|  | 676 | if (!desc) | 
|  | 677 | return; | 
|  | 678 | irq_settings_clr_and_set(desc, clr, set); | 
|  | 679 |  | 
|  | 680 | irqd_clear(&desc->irq_data, IRQD_NO_BALANCING | IRQD_PER_CPU | | 
|  | 681 | IRQD_TRIGGER_MASK | IRQD_LEVEL | IRQD_MOVE_PCNTXT); | 
|  | 682 | if (irq_settings_has_no_balance_set(desc)) | 
|  | 683 | irqd_set(&desc->irq_data, IRQD_NO_BALANCING); | 
|  | 684 | if (irq_settings_is_per_cpu(desc)) | 
|  | 685 | irqd_set(&desc->irq_data, IRQD_PER_CPU); | 
|  | 686 | if (irq_settings_can_move_pcntxt(desc)) | 
|  | 687 | irqd_set(&desc->irq_data, IRQD_MOVE_PCNTXT); | 
|  | 688 | if (irq_settings_is_level(desc)) | 
|  | 689 | irqd_set(&desc->irq_data, IRQD_LEVEL); | 
|  | 690 |  | 
|  | 691 | irqd_set(&desc->irq_data, irq_settings_get_trigger_mask(desc)); | 
|  | 692 |  | 
|  | 693 | irq_put_desc_unlock(desc, flags); | 
|  | 694 | } | 
|  | 695 | EXPORT_SYMBOL_GPL(irq_modify_status); | 
|  | 696 |  | 
|  | 697 | /** | 
|  | 698 | *	irq_cpu_online - Invoke all irq_cpu_online functions. | 
|  | 699 | * | 
|  | 700 | *	Iterate through all irqs and invoke the chip.irq_cpu_online() | 
|  | 701 | *	for each. | 
|  | 702 | */ | 
|  | 703 | void irq_cpu_online(void) | 
|  | 704 | { | 
|  | 705 | struct irq_desc *desc; | 
|  | 706 | struct irq_chip *chip; | 
|  | 707 | unsigned long flags; | 
|  | 708 | unsigned int irq; | 
|  | 709 |  | 
|  | 710 | for_each_active_irq(irq) { | 
|  | 711 | desc = irq_to_desc(irq); | 
|  | 712 | if (!desc) | 
|  | 713 | continue; | 
|  | 714 |  | 
|  | 715 | raw_spin_lock_irqsave(&desc->lock, flags); | 
|  | 716 |  | 
|  | 717 | chip = irq_data_get_irq_chip(&desc->irq_data); | 
|  | 718 | if (chip && chip->irq_cpu_online && | 
|  | 719 | (!(chip->flags & IRQCHIP_ONOFFLINE_ENABLED) || | 
|  | 720 | !irqd_irq_disabled(&desc->irq_data))) | 
|  | 721 | chip->irq_cpu_online(&desc->irq_data); | 
|  | 722 |  | 
|  | 723 | raw_spin_unlock_irqrestore(&desc->lock, flags); | 
|  | 724 | } | 
|  | 725 | } | 
|  | 726 |  | 
|  | 727 | /** | 
|  | 728 | *	irq_cpu_offline - Invoke all irq_cpu_offline functions. | 
|  | 729 | * | 
|  | 730 | *	Iterate through all irqs and invoke the chip.irq_cpu_offline() | 
|  | 731 | *	for each. | 
|  | 732 | */ | 
|  | 733 | void irq_cpu_offline(void) | 
|  | 734 | { | 
|  | 735 | struct irq_desc *desc; | 
|  | 736 | struct irq_chip *chip; | 
|  | 737 | unsigned long flags; | 
|  | 738 | unsigned int irq; | 
|  | 739 |  | 
|  | 740 | for_each_active_irq(irq) { | 
|  | 741 | desc = irq_to_desc(irq); | 
|  | 742 | if (!desc) | 
|  | 743 | continue; | 
|  | 744 |  | 
|  | 745 | raw_spin_lock_irqsave(&desc->lock, flags); | 
|  | 746 |  | 
|  | 747 | chip = irq_data_get_irq_chip(&desc->irq_data); | 
|  | 748 | if (chip && chip->irq_cpu_offline && | 
|  | 749 | (!(chip->flags & IRQCHIP_ONOFFLINE_ENABLED) || | 
|  | 750 | !irqd_irq_disabled(&desc->irq_data))) | 
|  | 751 | chip->irq_cpu_offline(&desc->irq_data); | 
|  | 752 |  | 
|  | 753 | raw_spin_unlock_irqrestore(&desc->lock, flags); | 
|  | 754 | } | 
|  | 755 | } |