blob: 6e82f810372ca6b0290ff6579cb94da3375da1ed [file] [log] [blame]
lh9ed821d2023-04-07 01:36:19 -07001/*********************************************************************
2 Copyright 2016 by ZIXC Corporation.
3*
4* FileName:: zx234290.c
5* File Mark:
6* Description:
7* Others:
8* Version:
9* Author:
10* Date:
11
12* History 1:
13* Date:
14* Version:
15* Author:
16* Modification:
17* History 2:
18**********************************************************************/
19
20#include <common.h>
21#include <errno.h>
22#include <command.h>
23#include <malloc.h>
24#include <asm/io.h>
25#include <boot_mode.h>
26#include <i2c.h>
27#include <drvs_gpio.h>
28#include <power.h>
29#include <zx234290.h>
30#include <zx234502.h>
xf.libdd93d52023-05-12 07:10:14 -070031#include <watchdog.h>
lh9ed821d2023-04-07 01:36:19 -070032
33int zx234290_write_flag(UINT8 val);
34
35#define PIN_PSHOLD_NUM GPIO24
36#define GPIO_PSHOLD_FUNC_SEL GPIO24_GPIO24
37
38static boot_reason_t s_boot_reason = UNKNOWN_BOOT_REASON;
xf.lif2330622024-05-15 18:17:18 -070039unsigned int g_pmu_type = PMU_TYPE_MAX;
lh9ed821d2023-04-07 01:36:19 -070040
41/*******************************************************************************
42 * Function: zx234290_i2c_read_reg
43 * Description:
44 * Parameters:
45 * Input:
46 *
47 * Output:
48 *
49 * Returns:
50 *
51 *
52 * Others:
53 ********************************************************************************/
54int zx234290_i2c_read_reg(ushort reg, uchar *val)
55{
56 return i2c_read(0, ZX234290_I2C_SLAVE_ADDR, reg, 8, val, 1);
57}
58
59/*******************************************************************************
60 * Function: zx234290_i2c_write_reg
61 * Description:
62 * Parameters:
63 * Input:
64 *
65 * Output:
66 *
67 * Returns:
68 *
69 *
70 * Others:
71 ********************************************************************************/
72int zx234290_i2c_write_reg(ushort reg, uchar *val)
73{
74 return i2c_write(0, ZX234290_I2C_SLAVE_ADDR, reg, 8, val, 1);
75}
76
77int zx234290_reset_flag(void)
78{
79#if 0
80 int ret = 0;
81 int val = 0;
82
83 /*
84 int val = 0xff;
85 ret = zx234290_i2c_write_reg(0x0f,&val);
86 */
87 ret = zx234290_i2c_read_reg(BUCK_MODE_CONTROL0, &val);
88 val &= (~0x30);
89 ret += zx234290_i2c_write_reg(BUCK_MODE_CONTROL0, &val);
90
91 return ret;
92#else
93 return zx234290_write_flag(ZX234290_USER_RST_UNDEFINE);
94#endif
95}
96
97int zx234290_write_flag(UINT8 val)
98{
99#if 0
100 int ret = 0;
101 int tmp = 0;
102
103 if(val > 3)
104 {
105 return -1;
106 }
107 ret = zx234290_i2c_read_reg(BUCK_MODE_CONTROL0, &tmp);
108 tmp &= (~0x30);
109 tmp |= (val<<4);
110 ret += zx234290_i2c_write_reg(BUCK_MODE_CONTROL0, &tmp);
111
112 return ret;
113#else
114 int ret = 0;
115 uchar tmp = 0;
116
117 /*
118 ret = zx234290_i2c_read_reg(ZX234290_REG_ADDR_USER_RESERVED, &tmp);
119 tmp &= ~(0x03<<2);
120 tmp |= (val<<2);
121 */
122 tmp = val;
123 ret |= zx234290_i2c_write_reg(ZX234290_REG_USER, &tmp);
124
125 return ret;
126#endif
127}
128
xf.li7ccf8372024-03-07 00:08:02 -0800129
130void zx234290_set_rtc_alarm_off(void)
131{
132 int ret = 0;
133 uchar tmp = 0;
134
135 //set alarm active bit 1 disable
136 ret = zx234290_i2c_read_reg(ZX234290_REG_ADDR_ALARM_MINUTE, &tmp);
137 tmp |= (1<<ZX234290_RTC_AlARM_ACTIVATED_LSH);
138 ret |= zx234290_i2c_write_reg(ZX234290_REG_ADDR_ALARM_MINUTE, &tmp);
139
140 ret |= zx234290_i2c_read_reg(ZX234290_REG_ADDR_ALARM_HOUR, &tmp);
141 tmp |= (1<<ZX234290_RTC_AlARM_ACTIVATED_LSH);
142 ret |= zx234290_i2c_write_reg(ZX234290_REG_ADDR_ALARM_HOUR, &tmp);
143
144 ret |= zx234290_i2c_read_reg(ZX234290_REG_ADDR_ALARM_DAY, &tmp);
145 tmp |= (1<<ZX234290_RTC_AlARM_ACTIVATED_LSH);
146 ret |= zx234290_i2c_write_reg(ZX234290_REG_ADDR_ALARM_DAY, &tmp);
147
148 ret = zx234290_i2c_read_reg(ZX234290_REG_ADDR_ALARM_WEEK, &tmp);
149 tmp |= (1<<ZX234290_RTC_AlARM_ACTIVATED_LSH);
150 ret |= zx234290_i2c_write_reg(ZX234290_REG_ADDR_ALARM_WEEK, &tmp);
151
152
153 ret |= zx234290_i2c_read_reg(ZX234290_REG_ADDR_ALARM_SECOND, &tmp);
154 tmp |= (1<<ZX234290_RTC_AlARM_ACTIVATED_LSH);
155 ret |= zx234290_i2c_write_reg(ZX234290_REG_ADDR_ALARM_SECOND, &tmp);
156
157 /*disable AIE bit && AF*/
158 ret |= zx234290_i2c_read_reg(ZX234290_REG_RTC_CONTROL2, &tmp);
159 tmp &= ~(RTC_CONTROL2_AIE|RTC_CONTROL2_AF);
160 ret |= zx234290_i2c_write_reg(ZX234290_REG_RTC_CONTROL2, &tmp);
161
162 if(ret)
163 printf( "[%s] fail ret=%d...\n", __FUNCTION__, ret);
164
165}
lh9ed821d2023-04-07 01:36:19 -0700166/*******************************************************************************
167 * Function: zx234290_get_boot_reason
168 * Description:
169 * Parameters:
170 * Input:
171 *
172 * Output:
173 *
174 * Returns:
175 *
176 *
177 * Others:
178 ********************************************************************************/
179int zx234290_get_boot_reason(boot_reason_t *boot_reason)
180{
181 if (boot_reason == NULL)
182 {
183 return -1;
184 }
185
186 if(s_boot_reason == UNKNOWN_BOOT_REASON)
187 {
188 return -EIO;
189 }
190 *boot_reason = s_boot_reason;
191
192 return 0;
193}
194
195/*******************************************************************************
196 * Function: zx234290_get_boot_reason
197 * Description:
198 * Parameters:
199 * Input:
200 *
201 * Output:
202 *
203 * Returns:
204 *
205 *
206 * Others:
207 ********************************************************************************/
208static int zx234290_get_boot_reason_prev(void)
209{
210 int ret = 0;
211 uchar reg_user = ZX234290_USER_RST_UNDEFINE;
212 uchar reg_start = 0;
213 uchar reg_write = 0;
214
215 /* ¶Á²¢ÇåSTART_UP_STATUS */
216 ret = zx234290_i2c_read_reg(START_UP_STATUS, &reg_start);
217 if( ret != 0 )
218 {
219 return -EIO;
220 }
221 printf( " [%s][START_UP_STATUS = 0x%X] ...\n", __FUNCTION__, reg_start);
xf.libdd93d52023-05-12 07:10:14 -0700222 (*(volatile unsigned long *)(START_UP_STATUS_BASE))=reg_start;
lh9ed821d2023-04-07 01:36:19 -0700223
224 /* ¶Á²¢ÇåZX234290_REG_USER */
225 ret = zx234290_i2c_read_reg(ZX234290_REG_USER, &reg_user);
226 if(reg_user != ZX234290_USER_RST_UNDEFINE)
227 {
228 reg_write = ZX234290_USER_RST_UNDEFINE; /* write back the reset value */
229
230 ret |= zx234290_i2c_write_reg(ZX234290_REG_USER, &reg_write);
231 }
232 if ( ret != 0 )
233 {
234 return -EIO;
235 }
236 printf( " [%s][USER_RESERVED = 0x%X] ...\n", __FUNCTION__, reg_user);
xf.libdd93d52023-05-12 07:10:14 -0700237 (*(volatile unsigned long *)(USER_RESERVED_BASE)) =reg_user;
lh9ed821d2023-04-07 01:36:19 -0700238
239 /* 1. Õý³£¿ª»ú¼ì²â */
240 if( reg_start & PWR_ON_START_UP )
241 /* ÏµÍ³ÖØÆô,Èç¹ûZX234290_REG_USER²»Îª³õÖµ£¬ÔòÎªÖØÆô */
242 {
243 s_boot_reason = RB_POWER_KEY;
244 return 0;
245 }
246 else if( reg_start & PS_HOLD_START_UP )
247 {
248 s_boot_reason = RB_USB_INSERT;
249
250 /* ZX234290_REG_USERΪÉϵ縴λֵ»ò·Ç·¨Öµ */
251 return 0;
252 }
253 else if( reg_start & RTC_ALARM_START_UP )
254 /* 2. Õý³£¿ª»ú¼ì²â */
255 {
256 uchar rtc_ctrl2 = 0xF0;
257
258 ret = zx234290_i2c_read_reg(ZX234290_REG_RTC_CONTROL2, &rtc_ctrl2);
259 printf( " [%s][RTC_CONTROL2 = 0x%X]\n", __FUNCTION__, rtc_ctrl2);
260
261 if (rtc_ctrl2 & RTC_CONTROL2_AF) {
262 s_boot_reason = RB_RTC;
xf.li7ccf8372024-03-07 00:08:02 -0800263 zx234290_set_rtc_alarm_off();
lh9ed821d2023-04-07 01:36:19 -0700264 } else if (rtc_ctrl2 & RTC_CONTROL2_TF) {
265 s_boot_reason = RB_RESET_NOMAL;
266 }
267
268 return ret;
269 }
270 else if( reg_start & LLP_RESTART_UP )
271 {
272 s_boot_reason = RB_POWER_KEY_LONG;
273 return 0;
274 }
275 /* reg_startΪ0£¬¼´reg_start¶ÁÇåÖ®ºóδµôµç£¬¼´ÏµÍ³ÖØÆô */
276
277 /* 2. ÖØÆô¼ì²â */
278
279 /* ÏµÍ³ÖØÆô,Èç¹ûZX234290_REG_USER²»Îª³õÖµ£¬ÔòÎªÖØÆô */
280 switch (reg_user)
281 {
282 case ZX234290_USER_RST_TO_NORMAL:
283 {
284 s_boot_reason = RB_RESET_NOMAL;
285 return 0;
286 }
287
288 case ZX234290_USER_RST_TO_CHARGER:
289 {
290 s_boot_reason = RB_RESET_USB_OFF;
291 return 0;
292 }
293
294 case ZX234290_USER_RST_TO_ALARM:
295 {
296 s_boot_reason = RB_RESET_ALARM;
297 return 0;
298 }
299
300 /* ZX234290_REG_USERΪÉϵ縴λֵ»ò·Ç·¨Öµ */
301 default:
302 {
303 if ((reg_user & 0xF0) == ZX234290_WDT_RST_FLAG) {
304 s_boot_reason = reg_user;
305 return 0;
306 }
307 break;
308 }
309 }
310
311 s_boot_reason = RB_USB_INSERT;
312
313 return 0;
314}
315
316/*******************************************************************************
317 * Function: zx234290_ps_hold_pull_on
318 * Description:
319 * Parameters:
320 * Input:
321 *
322 * Output:
323 *
324 * Returns:
325 *
326 *
327 * Others:
328 ********************************************************************************/
329int zx234290_ps_hold_pull_on(void)
330{
331 zDrvGpio_PullUpDown(PIN_PSHOLD_NUM, 0);
332 //gpio_set_reuse(PS_HOLD_PIN, 0);
333 zDrvGpio_SetFunc(PIN_PSHOLD_NUM,GPIO_PSHOLD_FUNC_SEL);
334 zDrvGpio_SetDirection(PIN_PSHOLD_NUM,GPIO_IN); //set output;v3 gpio24(pshold) direction is reverse
335 zDrvGpio_SetOutputValue(PIN_PSHOLD_NUM,GPIO_HIGH);
336 return 0;
337}
338
339/*******************************************************************************
340 * Function: zx234290_ps_hold_pull_off
341 * Description:
342 * Parameters:
343 * Input:
344 *
345 * Output:
346 *
347 * Returns:
348 *
349 *
350 * Others:
351 ********************************************************************************/
352int zx234290_ps_hold_pull_off(void)
353{
354 zDrvGpio_PullUpDown(PIN_PSHOLD_NUM, 0);
355 //gpio_set_reuse(PS_HOLD_PIN, 0);
356 //gpio_direction_output(PS_HOLD_PIN, GPIO_LOW);
357 zDrvGpio_SetFunc(PIN_PSHOLD_NUM,GPIO_PSHOLD_FUNC_SEL);
358 zDrvGpio_SetDirection(PIN_PSHOLD_NUM,GPIO_IN); //set output;v3 gpio24(pshold) direction is reverse
359 zDrvGpio_SetOutputValue(PIN_PSHOLD_NUM,GPIO_LOW);
360 return 0;
361}
362
363/*******************************************************************************
364 * Function: zx234290_power_off
365 * Description:
366 * Parameters:
367 * Input:
368 *
369 * Output:
370 *
371 * Returns:
372 *
373 *
374 * Others:
375 ********************************************************************************/
376int zx234290_power_off(void)
377{
378 return zx234290_ps_hold_pull_off();
379}
380
381/*******************************************************************************
382 * Function:
383 * Description:
384 * Parameters:
385 * Input:
386 *
387 * Output:
388 *
389 * Returns:
390 *
391 *
392 * Others:
393 ********************************************************************************/
394int pmu_init(void)
395{
396 int ret = 0;
xf.lie31de8b2023-12-26 23:38:58 -0800397 uchar reg_val = 0;
xf.lif2330622024-05-15 18:17:18 -0700398 uchar reg_val1 = 0;
lh9ed821d2023-04-07 01:36:19 -0700399 struct pmu_opt pmu = {NULL};
400
401 /* GPIO init */
402 //gpio_set_reuse(PS_HOLD_PIN, 0x0);
403 //gpio_direction_output(PS_HOLD_PIN,GPIO_LOW);
404
405 // gpio_set_reuse(POWER_KEY_PIN,0x0);
406 // gpio_direction_input(POWER_KEY_PIN);
407
408 // gpio_noaction(POWER_KEY_PIN);
409
410 /* register pmu opt */
411 pmu.read_reg = zx234290_i2c_read_reg;
412 pmu.write_reg = zx234290_i2c_write_reg;
413 pmu.get_boot_reason = zx234290_get_boot_reason;
414 pmu.ps_hold_pull_on = pmu_pull_on_ps_hold;
415 pmu.ps_hold_pull_off = pmu_pull_off_ps_hold;
416 pmu.power_off = zx234290_power_off;
417 ret = register_pmu_opt(&pmu);
lh9ed821d2023-04-07 01:36:19 -0700418 if( ret != 0 )
419 {
420 return -EIO;
421 }
xf.li7ccf8372024-03-07 00:08:02 -0800422
lh9ed821d2023-04-07 01:36:19 -0700423 ret = zx234290_get_boot_reason_prev();
xf.lie31de8b2023-12-26 23:38:58 -0800424 ret +=zx234290_i2c_read_reg(ZX234297_REG_ADDR_SINK_CONTROL,&reg_val);
xf.lif2330622024-05-15 18:17:18 -0700425 ret +=zx234290_i2c_read_reg(ZX234290_REG_ADDR_TYPE,&reg_val1);
xf.lie31de8b2023-12-26 23:38:58 -0800426 if(reg_val==0x7f){//means 296G C
427 reg_val = 0xff;//define to 296
428 ret+=zx234290_i2c_write_reg(ZX234297_REG_ADDR_SINK_CONTROL,&reg_val);
429 }
430
431 if (ret != SUCCESS)
432 {
433 printf( "[%s]set 0x29 error ret=0x%x!\n", __FUNCTION__,ret);
xf.lif2330622024-05-15 18:17:18 -0700434 return ret;
xf.lie31de8b2023-12-26 23:38:58 -0800435 }
436
xf.lif2330622024-05-15 18:17:18 -0700437 if(0xff == reg_val)//296&296G
438 {
439 if(0==reg_val1)
440 g_pmu_type = PMU_TYPE_296G;
441 else
442 g_pmu_type = PMU_TYPE_296;
443 }
444 else//297
445 {
446 if(0==reg_val1)
447 g_pmu_type = PMU_TYPE_296H;
448 else
449 g_pmu_type = PMU_TYPE_297;
450 }
lh9ed821d2023-04-07 01:36:19 -0700451 return ret;
452}
453
454/* ================================================================================
455 * pmu_init:
456 */
457int pmu_pull_off_ps_hold(void)
458{
459 return zx234290_ps_hold_pull_off();
460}
461
462/* ================================================================================
463 * pmu_init:
464 */
465int pmu_pull_on_ps_hold(void)
466{
467 return zx234290_ps_hold_pull_on();
468}
469
470/* ================================================================================
471 * system_power_off:
472 */
473void system_power_off(void)
474{
475 zx234290_power_off();
476}
477
478int zx234290_get_adc2_voltage(void)
479{
480 int nTempAdc = 0, ret = -1;
481 int adcReadInt = -1;
482 int msb=0, lsb=0;
483 int num;
484 uchar status_a=0;
485 uchar adcEnable = 0x28;
486 uchar sys_ctrl;
487
488 ret = zx234290_i2c_read_reg(ZX234290_REG_SYS_CTRL, &sys_ctrl);
489 if (ret != SUCCESS)
490 {
491 return -EIO;
492 }
493 sys_ctrl = (sys_ctrl & (1 << 7)) | adcEnable;
494
495 /*enable adc*/
496#if 0
497 ret = zx234290_i2c_write_reg(ZX234290_REG_SYS_CTRL,&sys_ctrl);
498 if (ret != SUCCESS)
499 {
500 return -EIO;
501 }
502#else
503 for(num=1; num <= 50; num++)
504 {
505 ret = zx234290_i2c_write_reg(ZX234290_REG_SYS_CTRL, &sys_ctrl);
506 if (ret != SUCCESS)
507 {
508 return -EIO;
509 }
510 udelay((100000/3000)*5); /* delay 5ms */
511 ret = zx234290_i2c_read_reg(ZX234290_REG_ADDR_STSA, &status_a);
512 if (ret != SUCCESS)
513 {
514 return -EIO;
515 }
516
517 if(status_a & 0x04)
518 {
519 printf( "adc2 get adc,break num =%d ...\n", num);
520 break;
521 }
522 }
523#endif
524 udelay((100000/3000)*20); /* delay 20ms */
525
526 /*read adc*/
527 ret = zx234290_i2c_read_reg(ZX234290_REG_ADC_ADC2MSB, &msb);
528 if (ret != SUCCESS)
529 {
530 return -EIO;
531 }
532 ret = zx234290_i2c_read_reg(ZX234290_REG_ADC_ADC2LSB, &lsb);
533 if (ret != SUCCESS)
534 {
535 return -EIO;
536 }
537
538 /*clear int*/
539 ret = zx234290_i2c_read_reg(ZX234290_REG_INTA, &adcReadInt);
540 if (ret != SUCCESS)
541 {
542 return -EIO;
543 }
544 ret =zx234290_i2c_read_reg(ZX234290_REG_INTB, &adcReadInt);
545 if (ret != SUCCESS)
546 {
547 return -EIO;
548 }
549
550 nTempAdc = ((msb<<4)|(lsb>>4));
551
552 nTempAdc = (int)((double)(5000-0)*(nTempAdc)/4096);
553
554 return nTempAdc;
555}
556
557int zx234290_get_adc1_voltage(void) /*read adc1*/
558{
559 int nTempAdc = 0,adcEnable = 0,ret = -1;
560 int adcReadInt = -1;
561 int msb=0, lsb=0;
562 int num;
563 uchar status_a=0;
564 adcEnable = 0x30; /*read adc1*/
565 uchar sys_ctrl;
566
567 ret = zx234290_i2c_read_reg(ZX234290_REG_SYS_CTRL, &sys_ctrl);
568 if (ret != SUCCESS)
569 {
570 return -EIO;
571 }
572 sys_ctrl = (sys_ctrl & (1 << 7)) | adcEnable;
573
574 /*enable adc*/
575#if 0
576 ret = zx234290_i2c_write_reg(ZX234290_REG_SYS_CTRL,&sys_ctrl);
577 if (ret != SUCCESS)
578 {
579 return -EIO;
580 }
581#else
582 for(num=1; num <= 50; num++)
583 {
584 ret = zx234290_i2c_write_reg(ZX234290_REG_SYS_CTRL, &sys_ctrl);
585 if (ret != SUCCESS)
586 {
587 return -EIO;
588 }
589 udelay((100000/3000)*5); /* delay 5ms */
590 ret = zx234290_i2c_read_reg(ZX234290_REG_ADDR_STSA, &status_a);
591 if (ret != SUCCESS)
592 {
593 return -EIO;
594 }
595 if(status_a & 0x04)
596 {
597 printf( "adc1 get adc,break num =%d ...\n", num);
598 break;
599 }
600 }
601#endif
602
603 udelay((100000/3000)*20); /* delay 20ms */
604
605 /*read adc*/
606 ret = zx234290_i2c_read_reg(ZX234290_REG_ADC_ADC1MSB, &msb);
607 if (ret != SUCCESS)
608 {
609 return -EIO;
610 }
611 ret = zx234290_i2c_read_reg(ZX234290_REG_ADC_ADC1LSB, &lsb);
612 if (ret != SUCCESS)
613 {
614 return -EIO;
615 }
616
617 /*clear int*/
618 ret = zx234290_i2c_read_reg(ZX234290_REG_INTA, &adcReadInt);
619 if (ret != SUCCESS)
620 {
621 return -EIO;
622 }
623 ret =zx234290_i2c_read_reg(ZX234290_REG_INTB, &adcReadInt);
624 if (ret != SUCCESS)
625 {
626 return -EIO;
627 }
628
629 nTempAdc = ((msb<<4)|(lsb>>4));
630
631 nTempAdc = (int)((double)(5000-0)*(nTempAdc)/4096);
632
633 return nTempAdc;
634}
635
636int zx234290_get_vbat_voltage(void)
637{
638 int nTempAdc = 0,adcEnable = 0,ret = -1;
639 int adcReadInt = -1;
640 int msb=0, lsb=0;
641 int num;
642 uchar status_a=0;
643 //adcEnable = 0x30;
644 adcEnable = 0x20;
645 uchar sys_ctrl;
646
647 ret = zx234290_i2c_read_reg(ZX234290_REG_SYS_CTRL, &sys_ctrl);
648 if (ret != SUCCESS)
649 {
650 return -EIO;
651 }
652 sys_ctrl = (sys_ctrl & (1 << 7)) | adcEnable;
653
654#if 0
655 ret = zx234290_i2c_write_reg(ZX234290_REG_SYS_CTRL,&sys_ctrl);
656 if (ret != SUCCESS)
657 {
658 return -EIO;
659 }
660#else
661 for(num=1; num <= 50; num++)
662 {
663 ret = zx234290_i2c_write_reg(ZX234290_REG_SYS_CTRL, &sys_ctrl);
664 if (ret != SUCCESS)
665 {
666 return -EIO;
667 }
668 udelay((100000/3000)*5); /* delay 5ms */
669 ret = zx234290_i2c_read_reg(ZX234290_REG_ADDR_STSA, &status_a);
670 if (ret != SUCCESS)
671 {
672 return -EIO;
673 }
674 if(status_a & 0x04)
675 {
676 printf( "vbat get adc,break num =%d ...\n", num);
677 break;
678 }
679 }
680#endif
681 //ret = zx234290_i2c_read_reg(ZX234290_REG_ADC_ADC1MSB, &msb);
682 ret = zx234290_i2c_read_reg(ZX234290_REG_ADC_VBATMSB, &msb);
683 if (ret != SUCCESS)
684 {
685 return -EIO;
686 }
687 //ret = zx234290_i2c_read_reg(ZX234290_REG_ADC_ADC1LSB, &lsb);
688 ret = zx234290_i2c_read_reg(ZX234290_REG_ADC_VBATLSB, &lsb);
689 if (ret != SUCCESS)
690 {
691 return -EIO;
692 }
693 ret = zx234290_i2c_read_reg(ZX234290_REG_INTA, &adcReadInt);
694 if (ret != SUCCESS)
695 {
696 return -EIO;
697 }
698 ret =zx234290_i2c_read_reg(ZX234290_REG_INTB, &adcReadInt);
699 if (ret != SUCCESS)
700 {
701 return -EIO;
702 }
703 nTempAdc = ((msb<<4)|(lsb>>4));
704 nTempAdc = (int)((double)(5000-0)*(nTempAdc)/4096);
705 return nTempAdc;
706}
707
708int zx234290_set_llp_enable(void)
709{
710 int ret = -1;
711 ushort reg=ZX234290_REG_ADDR_PWRON;
712 uchar val=0x05;
713
714 ret = zx234290_i2c_write_reg(reg, &val);
715 if (ret != SUCCESS)
716 {
717 return -EIO;
718 }
719 return ret;
720}
721
722/*get the poweron key state 0x1<<5: poweron press 0:poweron up*/
723int zx234290_get_poweron_state(void)
724{
725 int val = 0,ret = -1;
726 uchar reg = 0;
727
728 ret = zx234290_i2c_read_reg(STATUS_A,&reg);
729 if (ret != SUCCESS)
730 {
731 return -EIO;
732 }
733 val = reg&STATUS_PWR_ON;
734 return val;
735}
736
737/* get the rtc_alarm status: bit0 in reg 0x05 */
738int zx234290_get_rtc_state(void)
739{
740 int val = 0,ret = -1;
741 uchar reg = 0;
742
743 ret = zx234290_i2c_read_reg(STATUS_B, &reg);
744 if (ret != SUCCESS)
745 {
746 return -EIO;
747 }
748 val = reg & STATUS_RTC_ALARM;
749 return val;
750}
751
752/* Set or clear SoftOn bit in ZX234290_REG_SYS_CTRL */
753int zx234290_set_softon(int on)
754{
755 uchar reg = 0;
756 int ret;
757
758 ret = zx234290_i2c_read_reg(ZX234290_REG_SYS_CTRL, &reg);
759 if (ret != SUCCESS)
760 {
761 return -EIO;
762 }
763
764 if ((reg >> 7) != on) {
765 reg ^= (0x01<<7);
766 ret = zx234290_i2c_write_reg(ZX234290_REG_SYS_CTRL, &reg);
767 if (ret != SUCCESS)
768 {
769 return -EIO;
770 }
771 }
772 return 0;
773}
774
775/*set ldo8 SD VOL*/
776int zx234290_set_ldo8_voltage(T_ZDrvZx234290_VldoD vol)
777{
778 int ret = 0;
779 unsigned char reg_addr=0, reg_val=0;
780
781 if(vol > VLDOD_MAX)
782 {
783 return -EINVAL;
784 }
785 reg_addr = ZX234290_REG_ADDR_LDO78_VOL;
786 ret = zx234290_i2c_read_reg(reg_addr,&reg_val);
787 if (ret != SUCCESS)
788 {
789 return -EIO;
790 }
791 reg_val &= ~(0xf<<ZX234290_LDO8_VSEL_LSH);
792 reg_val |= (vol<<ZX234290_LDO8_VSEL_LSH);
793
794 ret = zx234290_i2c_write_reg(reg_addr, &reg_val);
795 if (ret != SUCCESS)
796 {
797 return -EIO;
798 }
799
800 return 0;
801}
802
803int zx234290_set_ldo8_sleep_voltage(T_ZDrvZx234290_VldoD vol)
804{
805 int ret = 0;
806 unsigned char reg_addr=0, reg_val=0;
807
808 if(vol > VLDOD_MAX)
809 {
810 return -EINVAL;
811 }
812 reg_addr = ZX234290_REG_ADDR_LDO78_VOL;
813 ret = zx234290_i2c_read_reg(reg_addr,&reg_val);
814 if (ret != SUCCESS)
815 {
816 return -EIO;
817 }
818 reg_val &= ~(0xf<<ZX234290_LDO8_SLP_VSEL_LSH);
819 reg_val |= (vol<<ZX234290_LDO8_SLP_VSEL_LSH);
820
821 ret = zx234290_i2c_write_reg(reg_addr, &reg_val);
822 if (ret != SUCCESS)
823 {
824 return -EIO;
825 }
826
827 return 0;
828}
829
830
831/* clear SoftOn bit in ZX234290_REG_SYS_CTRL bit7 */
832int zx234290_ldo8_enable(int enable)
833{
834 int ret = -1;
835 uchar reg = 0;
836
837 ret = zx234290_i2c_read_reg(ZX234290_REG_LDO_EN1, &reg);
838 if (ret != SUCCESS)
839 {
840 return -EIO;
841 }
842 reg &= ~(0x01<<7);
843 reg |= (enable<<7);
844 ret = zx234290_i2c_write_reg(ZX234290_REG_LDO_EN1, &reg);
845 if (ret != SUCCESS)
846 {
847 return -EIO;
848 }
849 return 0;
850}
851int zx234290_set_sink(T_ZX234290_SINK sink_num, int is_on, T_ZX234297_SINK_CURRENT sink_current)
852{
853 int ret = 0;
854 unsigned char lsh_on, lsh_current;
855 uchar reg = 0;
856
857 ret = zx234290_i2c_read_reg(ZX234297_REG_ADDR_SINK_CONTROL, &reg);
858 if (ret != SUCCESS)
859 {
860 return -EIO;
861 }
862 if(0xff==reg){
863 printf("pmu zx234296 no sink\n");
864 return SUCCESS;
865 }
866 if (sink_num == SINK_1) {
867 lsh_on = ZX234297_SINK1_ON_LSH;
868 lsh_current = ZX234297_SINK1_CURRENT_LSH;
869 } else if (sink_num == SINK_2) {
870 lsh_on = ZX234297_SINK2_ON_LSH;
871 lsh_current = ZX234297_SINK2_CURRENT_LSH;
872 } else
873 return -EINVAL;
874
875 if (is_on) {
876 if (sink_current >= SINK_CURRENT_MAX)
877 sink_current = SINK_CURRENT_120MA;
878
879 ret = zx234290_i2c_read_reg(ZX234297_REG_ADDR_SINK_CONTROL, &reg);
880 if (ret != SUCCESS)
881 {
882 return -EIO;
883 }
884 reg &= ~(0xf<<lsh_current);
885 reg |= (sink_current<<lsh_current);
886 ret = zx234290_i2c_write_reg(ZX234297_REG_ADDR_SINK_CONTROL, &reg);
887 if (ret != SUCCESS)
888 {
889 return -EIO;
890 }
891 }
892
893 is_on = !!is_on;
894 ret = zx234290_i2c_read_reg(ZX234290_REG_ADDR_LDO_EN2, &reg);
895 if (ret != SUCCESS)
896 {
897 return -EIO;
898 }
899 reg &= ~(0x1<<lsh_on);
900 reg |= (is_on<<lsh_on);
901 ret = zx234290_i2c_write_reg(ZX234290_REG_ADDR_LDO_EN2, &reg);
902 if (ret != SUCCESS)
903 {
904 return -EIO;
905 }
906
907 return 0;
908}
909
910#if 0
911int zx234290_SetVldo8(Zx234290_VldoD vol)
912{
913 int reg = 0,val = 0,ret = -1;
914 ret = zx234290_i2c_read_reg(ZX234290_REG_LD78_VOL, &reg);
915 if (ret != SUCCESS)
916 {
917 return -EIO;
918 }
919 BOOT_PRINTF(UBOOT_ERR, "********First REG0x15=0x%x!!!\n",reg);
920 reg &= 0xf;/*00001111*/
921 reg |= (vol<<4);
922 ret = zx234290_i2c_write_reg(ZX234290_REG_LD78_VOL, &reg);
923 if (ret != SUCCESS)
924 {
925 return -EIO;
926 }
927 ret = zx234290_i2c_read_reg(ZX234290_REG_LD78_VOL, &reg);
928 if (ret != SUCCESS)
929 {
930 return -EIO;
931 }
932 BOOT_PRINTF(UBOOT_ERR, "********Last REG0x15=0x%x!!!\n",reg);
933 return 0;
934}
935
936#endif
937
938