[Feature][T106_eSDK]update from T106-V2.01.01.02P56U09.AP.17.09_CAP.17.09.01 to T106-M42-PLXXXX-P56U11.AP.19.00_CAP.19.00.01 -- code
Only Configure: No
Affected branch: master
Affected module: unknow
Is it affected on both ZXIC and MTK: only ZXIC
Self-test: Yes
Doc Update: No
Change-Id: I5eb7f586f78a987785b0f9885f1300c42bfd6819
diff --git a/upstream/linux-5.10/kernel/tracker.c b/upstream/linux-5.10/kernel/tracker.c
index 6f7e1ab..792818b 100755
--- a/upstream/linux-5.10/kernel/tracker.c
+++ b/upstream/linux-5.10/kernel/tracker.c
@@ -63,6 +63,7 @@
#define OS_IRAM_SOFTIRQ_END (OS_IRAM_SOFTIRQ_START + sizeof(t_os_iram_statistic))
#define OS_IRAM_TIMER_START (OS_IRAM_SOFTIRQ_END + sizeof(t_os_iram_statistic))
#define OS_IRAM_TIMER_END (OS_IRAM_TIMER_START + sizeof(t_os_iram_statistic))
+#define OS_IRAM_RESET_REASON_START (OS_STATISTIC_IRAM_BASE + 0x800 - sizeof(T_Reset_Reason))
#endif
#define os_statistic_check() *((volatile unsigned long *)OS_STATISTIC_IRAM_BASE)
@@ -98,6 +99,12 @@
} statistics[OS_DDR_STATISTIC_CNT];
}t_os_ddr_statistic;
+typedef struct
+{
+ char ramdump_reason[32]; //±ÈÈ磺ramdump_ap_appname
+ char kernel_reboot[32]; //±ÈÈ磺reboot_ap_appname
+} T_Reset_Reason;
+
/*******************************************************************************
* È«¾Ö±äÁ¿ *
*******************************************************************************/
@@ -134,6 +141,7 @@
volatile static t_os_ddr_statistic *g_os_ddr_softirq_end_statistic;
volatile static t_os_ddr_statistic *g_os_ddr_timer_start_statistic;
volatile static t_os_ddr_statistic *g_os_ddr_timer_end_statistic;
+volatile T_Reset_Reason *g_os_reset_reason;
#endif
/*******************************************************************************
@@ -418,7 +426,32 @@
os_statistic_in_ddr(g_os_ddr_timer_end_statistic, func, time);
os_statistic_info_update();
}
+/*
+reason: 1 for ramdump, 2 for reboot
+cpu: ap/cap/rpm/phy
+app: current->comm
+*/
+/* Started by AICoder, pid:pf139dce4f7776c149ec081b508bae14e6084ede */
+void zxic_reset_reason(int reason, const char *cpu, const char *app)
+{
+ char buffer[32];
+ memset(buffer, 0, sizeof(buffer));
+ switch (reason)
+ {
+ case 1:
+ snprintf(buffer, 32, "reset_ramdump_%s_%s", cpu, app);
+ memcpy(g_os_reset_reason->ramdump_reason, buffer, sizeof(buffer));
+ break;
+ case 2:
+ snprintf(buffer, 32, "reset_kreboot_%s_%s", cpu, app);
+ memcpy(g_os_reset_reason->kernel_reboot, buffer, sizeof(buffer));
+ break;
+ default:
+ break;
+ }
+}
+/* Ended by AICoder, pid:pf139dce4f7776c149ec081b508bae14e6084ede */
/*******************************************************************************
* ¹¦ÄÜÃèÊö: ¹ì¼£Í³¼Æµ½DDR
@@ -438,9 +471,10 @@
#ifdef IRAM_BASE_ADDR_VA
g_zxic_trace_apcpu_addr = IRAM_BASE_ADDR_OS_STATISTIC_PSCPU;
#else
- g_zxic_trace_apcpu_addr = ioremap(IRAM_BASE_ADDR_OS_STATISTIC_PSCPU, IRAM_BASE_LEN_OS_STATISTIC_PSCPU);
+ g_zxic_trace_apcpu_addr = ioremap(IRAM_BASE_ADDR_OS_STATISTIC_PSCPU, IRAM_BASE_LEN_OS_STATISTIC_PSCPU + IRAM_BASE_LEN_OS_STATISTIC_PHYCPU + IRAM_BASE_LEN_OS_STATISTIC_APCPU);
#endif
+ g_os_reset_reason = (T_Reset_Reason *)OS_IRAM_RESET_REASON_START;
/*
init_timer(&timer);
timer.expires = jiffies + 40*HZ;//msecs_to_jiffies(40*1000);//ÑÓ³Ù40Ãë