| l.yang | b8fdece | 2024-10-10 14:56:17 +0800 | [diff] [blame] | 1 | /*
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| 2 | * Copyright (C) 2015 ZTE-TSP
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| 3 | *
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| 4 | * This program is free software; you can redistribute it and/or modify
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| 5 | * it under the terms of the GNU General Public License as published by
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| 6 | * the Free Software Foundation; either version 2 of the License, or
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| 7 | * (at your option) any later version.
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| 8 | *
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| 9 | * This program is distributed in the hope that it will be useful,
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| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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| 12 | * GNU General Public License for more details.
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| 13 | */
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| 14 |
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| 15 | #ifndef _SPINLOCK_H
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| 16 | #define _SPINLOCK_H
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| 17 |
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| 18 |
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| 19 | /****************************************************************************
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| 20 | * Include files
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| 21 | ****************************************************************************/
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| 22 | //#include <spinlock_com.h>
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| 23 |
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| 24 | /****************************************************************************
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| 25 | * Macros
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| 26 | ****************************************************************************/
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| 27 |
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| 28 | /****************************************************************************
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| 29 | * Types
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| 30 | ****************************************************************************/
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| 31 |
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| 32 |
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| 33 | #define SPINLOCK_IOC_MAGIC 'S'
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| 34 |
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| 35 | /*ioctl cmd usd by device*/
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| 36 | #define SPINLOCK_GET_STATUS _IOWR(SPINLOCK_IOC_MAGIC, 1, char *)
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| 37 |
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| 38 |
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| 39 |
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| 40 | typedef enum
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| 41 | {
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| 42 | CORE_ID_PS=210,
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| 43 | CORE_ID_PHY=211,
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| 44 | CORE_ID_ZSP=212,
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| 45 | CORE_ID_M0=213,
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| 46 | CORE_ID_AP=214,
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| 47 | CORE_ID_NUM = 215
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| 48 | } zte_coreid;
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| 49 | /* ±êʶӲ¼þËø*/
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| 50 | typedef enum
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| 51 | {
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| 52 | PCU_HWLOCK = 0,/*PCU*/
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| 53 | CLK_HWLOCK = 1,/*Clock*/
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| 54 | REGLOCK_HWLOCK,
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| 55 | SOFTLOCK_HWLOCK,
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| 56 | HWLOCK_NUM
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| 57 | } emhw_lock_id;
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| 58 |
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| 59 | /* ±êʶÈí¼þËø*/
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| 60 | typedef enum
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| 61 | {
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| 62 | I2C0_SFLOCK = 0,/*i2c0*/
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| 63 | I2C1_SFLOCK = 1,/*i2c1*/
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| 64 | I2C2_SFLOCK = 2,/*pmic-i2c*/
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| 65 | NAND_SFLOCK = 3,/*NAND*/
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| 66 | SD0_SFLOCK, /*for sd0*/
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| 67 | SD1_SFLOCK, /*for sd1*/
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| 68 | ADC_SFLOCK, /*for adc*/
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| 69 | UART_SFLOCK,
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| 70 | PMIC_SFLOCK,
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| 71 | #ifdef CONFIG_SYSVIPC_CROSS_SHM
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| 72 | SHM_SFLOCK,
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| 73 | #else
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| 74 | SFLOCK_ID9,
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| 75 | #endif
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| 76 | EFUSE_SFLOCK,
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| 77 | SFLOCK_ID11,
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| 78 | SFLOCK_ID12,
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| 79 | SFLOCK_ID13,
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| 80 | SFLOCK_ID14,
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| 81 | SFLOCK_ID15,
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| 82 | SFLOCK_ID16,
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| 83 | SFLOCK_ID17,
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| 84 | SFLOCK_ID18,
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| 85 | SFLOCK_ID19,
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| 86 | SFLOCK_ID20,
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| 87 | SFLOCK_ID21,
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| 88 | SFLOCK_ID22,
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| 89 | SFLOCK_ID23,
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| 90 | SFLOCK_ID24,
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| 91 | SFLOCK_ID25,
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| 92 | SFLOCK_ID26,
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| 93 | SFLOCK_ID27,
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| 94 | SFLOCK_ID28,
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| 95 | SFLOCK_ID29,
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| 96 | SFLOCK_ID30,
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| 97 | REG_SFLOCK = 31,/*REG*/
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| 98 | SFLOCK_NUM
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| 99 | } emsf_lock_id;
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| 100 |
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| 101 |
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| 102 | void hw_spin_lock(u32 hwid);
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| 103 | void hw_spin_unlock(u32 hwid);
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| 104 | void soft_spin_lock(u32 sfid);
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| 105 | void soft_spin_unlock(u32 sfid);
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| 106 | void reg_spin_lock(void);
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| 107 | void reg_spin_unlock(void);
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| 108 | void soft_spin_lock_psm(emsf_lock_id sfid);
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| 109 | void soft_spin_unlock_psm(emsf_lock_id sfid);
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| 110 |
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| 111 | void zx_spinlock_init(void __iomem *spinlock_base);
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| 112 | int soft_spin_lock_printf(emsf_lock_id sfid);
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| 113 |
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| 114 | #endif/* _SPINLOCK_H */
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| 115 |
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