Add device_info support(Default is enable).
Change-Id: I57e3edffd242ca7598d48a00d5a5ffed64a33d64
diff --git a/build_version b/build_version
index c8796d2..3f4e93a 100755
--- a/build_version
+++ b/build_version
@@ -1,3 +1,4 @@
PROJECT=T108-2
PARTITION=ab
SEC_SUPPORT=Y
+DEV_INFO_RESET=Y
diff --git a/marvell/swd/FACT/asr1806_p301_QSPINAND_Trusted_SDTIM_LPDDR2_AB_DEV_INFO.blf b/marvell/swd/FACT/asr1806_p301_QSPINAND_Trusted_SDTIM_LPDDR2_AB_DEV_INFO.blf
new file mode 100755
index 0000000..afb378e
--- /dev/null
+++ b/marvell/swd/FACT/asr1806_p301_QSPINAND_Trusted_SDTIM_LPDDR2_AB_DEV_INFO.blf
@@ -0,0 +1,2485 @@
+[BLF_Version]
+Blf_Version_Number = V3.0.0
+[UE_Options]
+UE_Boot_Option = 1
+[Flash_Properties]
+Flash_Block_Size = 0x40000
+Flash_NandID = 0xffff
+Nand_Signature_Number = 1
+Max_Upload_Split_Size = 0x4200000
+Max_FBF_Split_Size = 0x4200000
+Max_OTA_Image_Size = 0x3000000
+OTA_Image_Split_Size =
+Flash_Family = SPI-NAND
+Spare_Area_Size = 64
+Data_Area_Size = 2048
+FBF_Sector_Size = 4096
+[Flash_Options]
+ProductionMode = 0
+Skip_Blocks_Number =
+Erase_All_Flash = 0
+Reset_BBT = 0
+AB_System = 2
+[TIM_Configuration]
+Number_of_Images = 23
+Number_of_Keys = 0
+WTM_Save_State_Flash_Signature = 0x4D4D4308
+WTM_Save_State_Flash_Entry_Address = 0x00000000
+WTM_Save_State_BackUp_Entry_Address = 0x00000000
+Boot_Flash_Signature = 0x5350491C
+Processor_Type = ASR1806
+FFOS_Type = OWRT
+OEM_UniqueID = 0x4E5A4133
+Issue_Date = 0x20140601
+Version = 0x00030400
+Trusted = 1
+SDTIM = 1
+[Reserved_Data]
+DTYP
+DDR_Type = 0x00000001
+End_DTYP
+DDR_Flash_Mcp_Map
+DDR_Flash_Map_Number = 0x00000006
+Vendor_DDR_PID#1 = 0x0D08;DDR: UNIC
+Nand_Id#1 = 0xFFFF;NAND: Reserved
+Vendor_DDR_PID#2 = 0x0808;DDR: WINBOND
+Nand_Id#2 = 0xFFFF;NAND: Reserved
+Vendor_DDR_PID#3 = 0x0508;DDR: NANYA
+Nand_Id#3 = 0xFFFF;NAND: Reserved
+Vendor_DDR_PID#4 = 0x0510;DDR: NANYA
+Nand_Id#4 = 0xFFFF;NAND: Reserved
+Vendor_DDR_PID#5 = 0x0908;DDR: ESMT
+Nand_Id#5 = 0xFFFF;NAND: Reserved
+Vendor_DDR_PID#6 = 0x0920;DDR: ESMT
+Nand_Id#6 = 0xFFFF;NAND: Reserved
+End_DDR_Flash_Mcp_Map
+OTAI
+Enabled = 0x00000001
+Flash_Address = 0x2C0000
+Magic = 0x464F5441
+End_OTAI
+BBMT
+Version = 0x00000001
+End_BBMT
+HTFX
+Load_Address = 0xD1004000
+HTFX_PATH = ./FACT/hotfix.bin
+Patch_Size = 0x36C
+End_HTFX
+CITA_CUMIZED_INFO_TRANSFER_TOAP_ID
+Number_cfg_ID_Value_Pairs_below = 0x00000020
+eehP = 0x50686565
+eehP_Cfg_Value = 0x00000000
+CPSR = 0x52535043
+CPSR_Cfg_Value = 0x00000000
+HAWK = 0x4B574148
+HAWK_Cfg_Value = 0x00000000
+IMSD = 0x44534D49
+IMSD_Cfg_Value = 0x00000000
+PROD = 0x444F5250
+PROD_Cfg_Value = 0x00000000
+PIPE = 0x45504950
+PIPE_Cfg_Value = 0x00000000
+FAST = 0x54534146
+FAST_Cfg_Value = 0x47574C33
+APMF = 0x464D5041
+APMF_Cfg_Value = 0x00000001
+CPBT = 0x54425043
+CPBT_Cfg_Value = 0x00000000
+XXXX = 0x00000000
+XXXX_Cfg_Value = 0x00000000
+XXXX = 0x00000000
+XXXX_Cfg_Value = 0x00000000
+XXXX = 0x00000000
+XXXX_Cfg_Value = 0x00000000
+XXXX = 0x00000000
+XXXX_Cfg_Value = 0x00000000
+XXXX = 0x00000000
+XXXX_Cfg_Value = 0x00000000
+XXXX = 0x00000000
+XXXX_Cfg_Value = 0x00000000
+XXXX = 0x00000000
+XXXX_Cfg_Value = 0x00000000
+XXXX = 0x00000000
+XXXX_Cfg_Value = 0x00000000
+XXXX = 0x00000000
+XXXX_Cfg_Value = 0x00000000
+XXXX = 0x00000000
+XXXX_Cfg_Value = 0x00000000
+XXXX = 0x00000000
+XXXX_Cfg_Value = 0x00000000
+XXXX = 0x00000000
+XXXX_Cfg_Value = 0x00000000
+XXXX = 0x00000000
+XXXX_Cfg_Value = 0x00000000
+XXXX = 0x00000000
+XXXX_Cfg_Value = 0x00000000
+XXXX = 0x00000000
+XXXX_Cfg_Value = 0x00000000
+XXXX = 0x00000000
+XXXX_Cfg_Value = 0x00000000
+XXXX = 0x00000000
+XXXX_Cfg_Value = 0x00000000
+XXXX = 0x00000000
+XXXX_Cfg_Value = 0x00000000
+XXXX = 0x00000000
+XXXX_Cfg_Value = 0x00000000
+XXXX = 0x00000000
+XXXX_Cfg_Value = 0x00000000
+XXXX = 0x00000000
+XXXX_Cfg_Value = 0x00000000
+XXXX = 0x00000000
+XXXX_Cfg_Value = 0x00000000
+XXXX = 0x00000000
+XXXX_Cfg_Value = 0x00000000
+End_CITA_CUMIZED_INFO_TRANSFER_TOAP_ID
+End_Reserved_Data
+[EraseOnly_Option]
+Total_Eraseonly_Areas = 2
+; rootfs_data
+1_Eraseonly_Area_Size = 0x01E00000
+1_Eraseonly_Area_FlashStartAddress = 0x0DAC0000
+1_Eraseonly_Area_Partition = 0
+1_Eraseonly_Area_Enable = 1
+; user_data (0x1e5c0000 - FlashStartAddress)
+2_Eraseonly_Area_Size = 0x0ED00000
+2_Eraseonly_Area_FlashStartAddress = 0x0F8C0000
+2_Eraseonly_Area_Partition = 0
+2_Eraseonly_Area_Enable = 0
+[Extended_Reserved_Data]
+Consumer_ID
+CID = TBRI
+PID = DDR1
+End_Consumer_ID
+Custom_Model
+Model = T108-2_AB
+End_Custom_Model
+DDR_Initialization
+DDR_PID = DDR1
+DDROperations
+DDR_INIT_ENABLE = 0x00000001
+DDR_MEMTEST_ENABLE = 0x00000000
+End_DDROperations
+Instructions
+WRITE = <0xD4282948,0x4A200063>
+WRITE = <0xD428294C,0x29006000> ;PLL 1066
+WRITE = <0xD4282950,0x50C5000C>
+WRITE = <0xD428295C,0x00C20000>
+WAIT_FOR_BIT_SET = <0xD428295C,0x00400000,0x00001000>
+DELAY = <0x00001000> ;WAITING FOR DDR_VREF
+AND_VAL = <0xD428295C,0xFFFFFFF0>
+OR_VAL = <0xD428295C,0x00000004> ;set div4 533mbps
+OR_VAL = <0xD42828B0,0x02000000>
+WAIT_FOR_BIT_CLEAR = <0xD42828B0,0x02000000,0x00001000>
+WRITE = <0xD42828F4,0xC0000000>
+WRITE = <0xD42828F4,0xC0000003>
+WRITE = <0xD4282D18,0x33221133>
+WRITE = <0xC0100044,0x00030A00> ;MC_Control_0
+WRITE = <0xC0100048,0x00000001> ;MC_excu_en
+WRITE = <0xC010004C,0x00000000>
+WRITE = <0xC0100064,0x0A040502>
+WRITE = <0xC0100050,0x0007E2FF>
+WRITE = <0xC0100054,0x00000480>
+WRITE = <0xC0100058,0x10356285>
+WRITE = <0xC010005C,0x000494E4>
+WRITE = <0xC0100180,0x00030200>
+WRITE = <0xC0100200,0x000B0001> ;Memory Address Map Register Low CS0
+WRITE = <0xC0100204,0x00000000> ;Memory Address Map Register high CS0
+WRITE = <0xC0100208,0x080B0001> ;Memory Address Map Register Low CS1
+WRITE = <0xC010020C,0x00000000> ;Memory Address Map Register High CS1
+WRITE = <0xC0100220,0x04000332> ;Configuration Register CS0
+WRITE = <0xC0100224,0x04000332> ;Configuration Register CS1
+WRITE = <0xC01002C0,0x0000E000>
+WRITE = <0xC01002C4,0x00000098> ;MC_Control_2
+WRITE = <0xC0100304,0x50800400> ;DRAM Config 2 FSP WR FSP OP FSP=01
+WRITE = <0xC0100300,0x00000008> ;DRAM Config 1
+WRITE = <0xC010030C,0x00000000> ;no pre and post amble
+WRITE = <0xC0100310,0x00020000> ;drive strength 60ohm
+WRITE = <0xC0100314,0x00020000> ;drive strength 60ohm
+WRITE = <0xC010038C,0x001B0216> ;ZQC timing 0
+WRITE = <0xC0100390,0x003000C0> ;ZQC timing 1
+WRITE = <0xC0100394,0x00460065> ;Refresh timing
+WRITE = <0xC0100398,0x01000100> ;SelfRefresh timing 0
+WRITE = <0xC010039C,0x00200808> ;SelfRefresh timing 1
+WRITE = <0xC01003A0,0x01080404> ;Power down timing 0
+WRITE = <0xC01003A4,0x00000001> ;Power down timing 1
+WRITE = <0xC01003A8,0x00000205> ;MRS timing
+WRITE = <0xC01003AC,0x1B200A17> ;ACT timing
+WRITE = <0xC01003B0,0x0C0C040A> ;Pre-Charge timing
+WRITE = <0xC01003B4,0x02000400> ;CAS/RAS timing 0
+WRITE = <0xC01003B8,0x00010600> ;CAS/RAS timing 1
+WRITE = <0xC01003BC,0x02020404> ;Off-spec timing 0
+WRITE = <0xC01003C0,0x00000006> ;Off-spec timing 1
+WRITE = <0xC01003C4,0x00140A03> ;DRAM_read timing
+WRITE = <0xC01003D8,0x025A812D>
+WRITE = <0xC01003DC,0x41081239>
+WRITE = <0xC01003E0,0x00000605>
+WRITE = <0xC0100348,0x00000000>
+WRITE = <0xC010034C,0x00000000>
+WRITE = <0xC01013E4,0x05000300> ;MCK6 DFI phy ctrl register 1 (4to1)
+WRITE = <0xC01013EC,0x0000047E>
+WRITE = <0xC0100304,0x00800400> ;DRAM Config 2 FSP WR FSP OP FSP=00
+WRITE = <0xC0100300,0x00000004> ;DRAM Config 1
+WRITE = <0xC010030C,0x00000000>
+WRITE = <0xC0100310,0x00020000>
+WRITE = <0xC0100314,0x00020000>
+WRITE = <0xC010038C,0x000A00C8> ;ZQC timing 0
+WRITE = <0xC0100390,0x00120048> ;ZQC timing 1
+WRITE = <0xC0100394,0x00230065> ;Refresh timing
+WRITE = <0xC0100398,0x00260026> ;SelfRefresh timing 0
+WRITE = <0xC010039C,0x00200404> ;SelfRefresh timing 1
+WRITE = <0xC01003A0,0x01040202> ;Power down timing 0
+WRITE = <0xC01003A4,0x00000001> ;Power down timing 1
+WRITE = <0xC01003A8,0x00000205> ;MRS timing
+WRITE = <0xC01003AC,0x0E10050C> ;ACT timing
+WRITE = <0xC01003B0,0x06060205> ;Pre-Charge timing
+WRITE = <0xC01003B4,0x02000400> ;CAS/RAS timing 0
+WRITE = <0xC01003B8,0x00010200> ;CAS/RAS timing 1
+WRITE = <0xC01003BC,0x02020404> ;Off-spec timing 0
+WRITE = <0xC01003C0,0x00000006> ;Off-spec timing 1
+WRITE = <0xC01003C4,0x00140A01> ;DRAM_read timing
+WRITE = <0xC01003D8,0x025A812D>
+WRITE = <0xC01003DC,0x41081239>
+WRITE = <0xC01003E0,0x00000605>
+WRITE = <0xC0100348,0x00000000>
+WRITE = <0xC010034C,0x00000000>
+WRITE = <0xC01013E4,0x03000100> ;MCK6 DFI phy ctrl register 1 (1to1)
+WRITE = <0xC01013EC,0x0000047E>
+WRITE = <0xC0100304,0x00800400> ;CH0_DRAM_Config_2 select fp0
+WRITE = <0xC0100380,0x0001B207> ;DDR init timing Control 0
+WRITE = <0xC0100384,0x00000038> ;DDR init timing Control 1
+WRITE = <0xC0100388,0x000015B3> ;DDR init timing Control 2
+WRITE = <0xC01013E0,0x00000000> ;FSP_OP = 0
+WRITE = <0xC0143000,0x00000010> ;phy release and reset
+WRITE = <0xC0143000,0x00000011> ;phy release and reset
+WRITE = <0xC0150024,0x00000000>
+OR_VAL = <0xC0150024,0x00000032>
+WRITE = <0xC0140068,0x0000034A>
+WRITE = <0xC0144068,0x0000034A>
+WRITE = <0xC0140064,0x0000034A>
+WRITE = <0xC0144064,0x0000034A>
+WRITE = <0xC0143004,0x00000830>
+WRITE = <0xC0147004,0x00000830>
+WRITE = <0xC0143008,0x0024244B>
+WRITE = <0xC0147008,0x0024244B>
+WRITE = <0xC014300C,0x00363654>
+WRITE = <0xC014700C,0x00363654>
+WRITE = <0xC0143010,0x00020482>
+WRITE = <0xC0147010,0x00020482>
+WRITE = <0xC0143014,0x87000000>
+WRITE = <0xC0147014,0x87000000>
+WRITE = <0xC0143018,0x08454018>
+WRITE = <0xC0147018,0x08454018>
+WRITE = <0xC0143020,0x00001077>
+OR_VAL = <0xC0150000,0x00000001> ;HWDFC_EN
+WRITE = <0xC01013D0,0x13000001> ;MCK6 DFI phy user cmd
+WRITE = <0xD4050028,0x00001200>
+WRITE = <0xD4282CE8,0x00000053>
+WRITE = <0xD4282CE8,0x00000054>
+WRITE = <0xD4282CE8,0x00000053>
+WRITE = <0xD4282CE8,0x00000054>
+WRITE = <0xD4282CE8,0x00000053>
+WRITE = <0xD4282CE8,0x00000053>
+WRITE = <0xD4282CE8,0x00000063>
+WRITE = <0xD4282CE8,0x00000063>
+WRITE = <0xD4282CE8,0x00000064>
+WRITE = <0xD4282CE8,0x00000063>
+WRITE = <0xD4282CE8,0x00000064>
+WRITE = <0xD4282CE8,0x00000064>
+WRITE = <0xD4282CE8,0x00000073>
+WRITE = <0xD4282CE8,0x00000074>
+WRITE = <0xD4282CE8,0x00000074>
+WRITE = <0xD4282CE8,0x00000073>
+WRITE = <0xD4282CE8,0x00000080>
+WRITE = <0xD4282CE8,0x00000081>
+WRITE = <0xD4282CE8,0x00000082>
+WRITE = <0xD4282CE8,0x00000084>
+WRITE = <0xD4050028,0x00001300>
+WRITE = <0xC01013D0,0x13000100> ;MCK6 DFI phy user cmd
+WRITE = <0xC0100020,0x13000001>
+WAIT_FOR_BIT_SET = <0xC0100008,0x00000011,0x00001000>
+WRITE = <0xC0100020,0x11001000>
+WRITE = <0xC0100020,0x12001000>
+WRITE = <0xC0100024,0x13020001>
+WRITE = <0xC0100024,0x13020002>
+WRITE = <0xC0100024,0x13020003>
+WRITE = <0xC01013D0,0x11100000> ;read gate training
+WAIT_FOR_BIT_SET = <0xC01013FC,0x00000006,0x00001000>
+WRITE = <0xC0143004,0x00000820>
+WRITE = <0xC0147004,0x00000820>
+WRITE = <0xC010012C,0xABCD1234> ;BROM FLAG
+End_Instructions
+End_DDR_Initialization
+Image_Maps
+NUM_MAPS = 4
+1_Image_Map_Info
+1_Image_ID = 0x54494D31
+1_Image_Type = PRIMARYIMAGE
+1_Flash_Address_Lo = 0x004C0000
+1_Flash_Address_Hi = 0x00000000
+1_Partition = 0x00000000
+1_Enable = 1
+1_End_Image_Map_Info
+2_Image_Map_Info
+2_Image_ID = 0x54494D34
+2_Image_Type = PPSETINGIMAG
+2_Flash_Address_Lo = 0x00500000
+2_Flash_Address_Hi = 0x00000000
+2_Partition = 0x00000000
+2_Enable = 1
+2_End_Image_Map_Info
+3_Image_Map_Info
+3_Image_ID = 0x54494D32
+3_Image_Type = RECOVERYIMAGE
+3_Flash_Address_Lo = 0x00540000
+3_Flash_Address_Hi = 0x00000000
+3_Partition = 0x00000000
+3_Enable = 1
+3_End_Image_Map_Info
+4_Image_Map_Info
+4_Image_ID = 0x54494D35
+4_Image_Type = PPSETINGIMAG_2
+4_Flash_Address_Lo = 0x00580000
+4_Flash_Address_Hi = 0x00000000
+4_Partition = 0x00000000
+4_Enable = 1
+4_End_Image_Map_Info
+End_Image_Maps
+Vendor_DDR_Initialization
+DDR_PID = 0x0D08
+DDROperations
+DDR_INIT_ENABLE = 0x00000001
+DDR_MEMTEST_ENABLE = 0x00000000
+End_DDROperations
+Instructions
+WRITE = <0xD428285C,0x0000000B> ;pull down usb dp/dm
+WRITE = <0xD4207094,0x0000E504> ;pull down usb dp/dm
+WRITE = <0xD42070A4,0x00005888> ;pull down usb dp/dm
+WRITE = <0xD420702C,0x00000000> ;suspend usb
+WRITE = <0xD4207028,0x00003000> ;suspend usb
+WRITE = <0xD4282948,0x4A200063>
+WRITE = <0xD428294C,0x29006000> ;PLL 1066
+WRITE = <0xD4282950,0x50C5000C>
+WRITE = <0xD428295C,0x00C20000>
+WAIT_FOR_BIT_SET = <0xD428295C,0x00400000,0x00001000>
+DELAY = <0x00001000> ;WAITING FOR DDR_VREF
+AND_VAL = <0xD428295C,0xFFFFFFF0>
+OR_VAL = <0xD428295C,0x00000004> ;set div4 533mbps
+OR_VAL = <0xD42828B0,0x02000000>
+WAIT_FOR_BIT_CLEAR = <0xD42828B0,0x02000000,0x00001000>
+WRITE = <0xD42828F4,0xC0000000>
+WRITE = <0xD42828F4,0xC0000003>
+WRITE = <0xD4282D18,0x33221133>
+WRITE = <0xC0100044,0x00030A00> ;MC_Control_0
+WRITE = <0xC0100048,0x00000001> ;MC_excu_en
+WRITE = <0xC010004C,0x00000000>
+WRITE = <0xC0100064,0x0A040502>
+WRITE = <0xC0100050,0x0007E2FF>
+WRITE = <0xC0100054,0x00000480>
+WRITE = <0xC0100058,0x10356285>
+WRITE = <0xC010005C,0x000494E4>
+WRITE = <0xC0100180,0x00030200>
+WRITE = <0xC0100200,0x000B0001> ;Memory Address Map Register Low CS0
+WRITE = <0xC0100204,0x00000000> ;Memory Address Map Register high CS0
+WRITE = <0xC0100220,0x04000332> ;Configuration Register CS0
+WRITE = <0xC01002C0,0x0000E000>
+WRITE = <0xC01002C4,0x00000098> ;MC_Control_2
+WRITE = <0xC0100304,0x50800400> ;DRAM Config 2 FSP WR FSP OP FSP=01
+WRITE = <0xC0100300,0x00000008> ;DRAM Config 1
+WRITE = <0xC010030C,0x00000000> ;no pre and post amble
+WRITE = <0xC0100310,0x00020000> ;drive strength 60ohm
+WRITE = <0xC010038C,0x001B0216> ;ZQC timing 0
+WRITE = <0xC0100390,0x003000C0> ;ZQC timing 1
+WRITE = <0xC0100394,0x004600CB> ;Refresh timing
+WRITE = <0xC0100398,0x01000100> ;SelfRefresh timing 0
+WRITE = <0xC010039C,0x00200808> ;SelfRefresh timing 1
+WRITE = <0xC01003A0,0x01080404> ;Power down timing 0
+WRITE = <0xC01003A4,0x00000001> ;Power down timing 1
+WRITE = <0xC01003A8,0x00000205> ;MRS timing
+WRITE = <0xC01003AC,0x1B200A17> ;ACT timing
+WRITE = <0xC01003B0,0x0C0C040A> ;Pre-Charge timing
+WRITE = <0xC01003B4,0x02000400> ;CAS/RAS timing 0
+WRITE = <0xC01003B8,0x00010600> ;CAS/RAS timing 1
+WRITE = <0xC01003BC,0x02020404> ;Off-spec timing 0
+WRITE = <0xC01003C0,0x00000006> ;Off-spec timing 1
+WRITE = <0xC01003C4,0x00140A03> ;DRAM_read timing
+WRITE = <0xC01003D8,0x025A812D>
+WRITE = <0xC01003DC,0x41081239>
+WRITE = <0xC01003E0,0x00000605>
+WRITE = <0xC0100348,0x00000000>
+WRITE = <0xC010034C,0x00000000>
+WRITE = <0xC01013E4,0x05000300> ;MCK6 DFI phy ctrl register 1 (4to1)
+WRITE = <0xC01013EC,0x0000047E>
+WRITE = <0xC0100304,0x00800400> ;DRAM Config 2 FSP WR FSP OP FSP=00
+WRITE = <0xC0100300,0x00000004> ;DRAM Config 1
+WRITE = <0xC010030C,0x00000000>
+WRITE = <0xC0100310,0x00020000>
+WRITE = <0xC010038C,0x000A00C8> ;ZQC timing 0
+WRITE = <0xC0100390,0x00120048> ;ZQC timing 1
+WRITE = <0xC0100394,0x002300CB> ;Refresh timing
+WRITE = <0xC0100398,0x00260026> ;SelfRefresh timing 0
+WRITE = <0xC010039C,0x00200404> ;SelfRefresh timing 1
+WRITE = <0xC01003A0,0x01040202> ;Power down timing 0
+WRITE = <0xC01003A4,0x00000001> ;Power down timing 1
+WRITE = <0xC01003A8,0x00000205> ;MRS timing
+WRITE = <0xC01003AC,0x0E10050C> ;ACT timing
+WRITE = <0xC01003B0,0x06060205> ;Pre-Charge timing
+WRITE = <0xC01003B4,0x02000400> ;CAS/RAS timing 0
+WRITE = <0xC01003B8,0x00010200> ;CAS/RAS timing 1
+WRITE = <0xC01003BC,0x02020404> ;Off-spec timing 0
+WRITE = <0xC01003C0,0x00000006> ;Off-spec timing 1
+WRITE = <0xC01003C4,0x00140A01> ;DRAM_read timing
+WRITE = <0xC01003D8,0x025A812D>
+WRITE = <0xC01003DC,0x41081239>
+WRITE = <0xC01003E0,0x00000605>
+WRITE = <0xC0100348,0x00000000>
+WRITE = <0xC010034C,0x00000000>
+WRITE = <0xC01013E4,0x03000100> ;MCK6 DFI phy ctrl register 1 (1to1)
+WRITE = <0xC01013EC,0x0000047E>
+WRITE = <0xC0100304,0x00800400> ;CH0_DRAM_Config_2 select fp0
+WRITE = <0xC0100380,0x0001B207> ;DDR init timing Control 0
+WRITE = <0xC0100384,0x00000038> ;DDR init timing Control 1
+WRITE = <0xC0100388,0x000015B3> ;DDR init timing Control 2
+WRITE = <0xC01013E0,0x00000000> ;FSP_OP = 0
+WRITE = <0xC0143000,0x00000010> ;phy release and reset
+WRITE = <0xC0143000,0x00000011> ;phy release and reset
+WRITE = <0xC0150024,0x00000000>
+OR_VAL = <0xC0150024,0x00000032>
+WRITE = <0xC0140068,0x0000034A>
+WRITE = <0xC0144068,0x0000034A>
+WRITE = <0xC0140064,0x0000034A>
+WRITE = <0xC0144064,0x0000034A>
+WRITE = <0xC0143004,0x00000830>
+WRITE = <0xC0147004,0x00000830>
+WRITE = <0xC0143008,0x0024244B>
+WRITE = <0xC0147008,0x0024244B>
+WRITE = <0xC014300C,0x003636D4>
+WRITE = <0xC014700C,0x003636D4>
+WRITE = <0xC0143010,0x00020482>
+WRITE = <0xC0147010,0x00020482>
+WRITE = <0xC0143014,0x87000000>
+WRITE = <0xC0147014,0x87000000>
+WRITE = <0xC0143018,0x08454018>
+WRITE = <0xC0147018,0x08454018>
+WRITE = <0xC0143020,0x00001077>
+WRITE = <0xC015000C,0x0000010F>
+WRITE = <0xC0150010,0x0000010F>
+WRITE = <0xC0150014,0x0000010F>
+WRITE = <0xC0142028,0x0000000F>
+WRITE = <0xC014202C,0x0000000F>
+WRITE = <0xC0142030,0x0000000F>
+WRITE = <0xC0146028,0x0000000F>
+WRITE = <0xC014602C,0x0000000F>
+WRITE = <0xC0146030,0x0000000F>
+WRITE = <0xC0140060,0x000000FF>
+WRITE = <0xC0141060,0x000000FF>
+WRITE = <0xC0144060,0x000000FF>
+WRITE = <0xC0145060,0x000000FF>
+OR_VAL = <0xC0150000,0x00000001> ;HWDFC_EN
+WRITE = <0xC01013D0,0x11000001> ;MCK6 DFI phy user cmd
+WRITE = <0xD4050028,0x00001200>
+WRITE = <0xD4282CE8,0x00000053>
+WRITE = <0xD4282CE8,0x00000054>
+WRITE = <0xD4282CE8,0x00000053>
+WRITE = <0xD4282CE8,0x00000054>
+WRITE = <0xD4282CE8,0x00000053>
+WRITE = <0xD4282CE8,0x00000053>
+WRITE = <0xD4282CE8,0x00000063>
+WRITE = <0xD4282CE8,0x00000063>
+WRITE = <0xD4282CE8,0x00000064>
+WRITE = <0xD4282CE8,0x00000063>
+WRITE = <0xD4282CE8,0x00000064>
+WRITE = <0xD4282CE8,0x00000064>
+WRITE = <0xD4282CE8,0x00000073>
+WRITE = <0xD4282CE8,0x00000074>
+WRITE = <0xD4282CE8,0x00000074>
+WRITE = <0xD4282CE8,0x00000073>
+WRITE = <0xD4282CE8,0x00000080>
+WRITE = <0xD4282CE8,0x00000081>
+WRITE = <0xD4282CE8,0x00000082>
+WRITE = <0xD4282CE8,0x00000084>
+WRITE = <0xD4050028,0x00001300>
+WRITE = <0xC01013D0,0x11000100> ;MCK6 DFI phy user cmd
+WRITE = <0xC0100020,0x11000001>
+WAIT_FOR_BIT_SET = <0xC0100008,0x00000001,0x00001000>
+WRITE = <0xC0100020,0x11001000>
+WRITE = <0xC0100024,0x11020001>
+WRITE = <0xC0100024,0x11020002>
+WRITE = <0xC0100024,0x11020003>
+WRITE = <0xC01013D0,0x11100000> ;read gate training
+WAIT_FOR_BIT_SET = <0xC01013FC,0x00000006,0x00001000>
+WRITE = <0xC0100074,0x00030A03>
+WRITE = <0xC0100078,0x00000044>
+WRITE = <0xC0100070,0x00000000>
+WRITE = <0xC0100074,0x11000008>
+WRITE = <0xC0100078,0x00000020>
+WRITE = <0xC0100070,0x00000001>
+WRITE = <0xC0100074,0x00000004>
+WRITE = <0xC0100078,0x00002008>
+WRITE = <0xC0100070,0x00000002>
+WRITE = <0xC0100074,0x00000004>
+WRITE = <0xC0100078,0x00002008>
+WRITE = <0xC0100070,0x00000003>
+WRITE = <0xC0100074,0x11000001>
+WRITE = <0xC0100078,0x000013D0>
+WRITE = <0xC0100070,0x00000004>
+WRITE = <0xC0100074,0x00008000>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x00000005>
+WRITE = <0xC0100074,0x00000000>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x00000006>
+WRITE = <0xC0100074,0x00030A03>
+WRITE = <0xC0100078,0x00010044>
+WRITE = <0xC0100070,0x00000007>
+WRITE = <0xC0100074,0x11000100>
+WRITE = <0xC0100078,0x000013D0>
+WRITE = <0xC0100070,0x00000008>
+WRITE = <0xC0100074,0x00008000>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x00000009>
+WRITE = <0xC0100074,0x00008000>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x0000000A>
+WRITE = <0xC0100074,0x11000004>
+WRITE = <0xC0100078,0x00000020>
+WRITE = <0xC0100070,0x0000000B>
+WRITE = <0xC0100074,0x00030A02>
+WRITE = <0xC0100078,0x00010044>
+WRITE = <0xC0100070,0x0000000C>
+WRITE = <0xC0100074,0x11020001>
+WRITE = <0xC0100078,0x00000024>
+WRITE = <0xC0100070,0x0000000D>
+WRITE = <0xC0100074,0x11020002>
+WRITE = <0xC0100078,0x00000024>
+WRITE = <0xC0100070,0x0000000E>
+WRITE = <0xC0100074,0x11100000>
+WRITE = <0xC0100078,0x000013D0>
+WRITE = <0xC0100070,0x0000000F>
+WRITE = <0xC0100074,0x00000006>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x00000010>
+WRITE = <0xC0100074,0x00000006>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x00000011>
+WRITE = <0xC0100074,0x00030A00>
+WRITE = <0xC0100078,0x00020044>
+WRITE = <0xC0100070,0x00000012>
+AND_VAL = <0xD428295C,0xFFFFFFF0> ;hwdfc to 1066mbps
+OR_VAL = <0xD428295C,0x00000000>
+OR_VAL = <0xD42828B0,0x00000020>
+OR_VAL = <0xD42828B0,0x01000000>
+WAIT_FOR_BIT_CLEAR = <0xD42828B0,0x01000000,0x00001000>
+WRITE = <0xC01013D0,0x11100000> ;read gate training
+WAIT_FOR_BIT_SET = <0xC01013FC,0x00000002,0x00001000>
+WRITE = <0xC01013EC,0x00005070>
+WRITE = <0xC01013D0,0x11200000> ;read DQ training
+WAIT_FOR_BIT_SET = <0xC01013FC,0x00000006,0x00001000>
+WRITE = <0xC0143004,0x00000820>
+WRITE = <0xC0147004,0x00000820>
+PP_TABLEHEADER = <0xC0100074,0xC0100078,0xC0100070> ;DDR_TABLEHEADER FOR PRODUCT POINT
+PP_WRITE = <0x00030A03,0x00000044,0x00000060>
+PP_WRITE = <0x00000004,0x00002008,0x00000061>
+PP_WRITE = <0x00000004,0x00002008,0x00000062>
+PP_WRITE = <0x11000001,0x000013D0,0x00000063>
+PP_WRITE = <0x00008000,0x000033FC,0x00000064>
+PP_WRITE = <0x00000000,0x000033FC,0x00000065>
+PP_WRITE = <0x00030A03,0x00010044,0x00000066>
+PP_WRITE = <0x11000100,0x000013D0,0x00000067>
+PP_WRITE = <0x00008000,0x000033FC,0x00000068>
+PP_WRITE = <0x00008000,0x000033FC,0x00000069>
+PP_WRITE = <0x00030A02,0x00010044,0x0000006A>
+PP_WRITE = <0x00030A00,0x00020044,0x0000006B>
+AND_VAL = <0xD428295C,0xFFFFFFF0> ;hwdfc to 533mbps
+OR_VAL = <0xD428295C,0x00000004>
+AND_VAL = <0xD42828B0,0xFFFFFF9F>
+OR_VAL = <0xD42828B0,0x01000000>
+WAIT_FOR_BIT_CLEAR = <0xD42828B0,0x01000000,0x00001000>
+End_Instructions
+END_Vendor_DDR_Initialization
+Vendor_DDR_Initialization
+DDR_PID = 0x0808
+DDROperations
+DDR_INIT_ENABLE = 0x00000001
+DDR_MEMTEST_ENABLE = 0x00000000
+End_DDROperations
+Instructions
+WRITE = <0xD428285C,0x0000000B> ;pull down usb dp/dm
+WRITE = <0xD4207094,0x0000E504> ;pull down usb dp/dm
+WRITE = <0xD42070A4,0x00005888> ;pull down usb dp/dm
+WRITE = <0xD420702C,0x00000000> ;suspend usb
+WRITE = <0xD4207028,0x00003000> ;suspend usb
+WRITE = <0xD4282948,0x4A200063>
+WRITE = <0xD428294C,0x29006000> ;PLL 1066
+WRITE = <0xD4282950,0x50C5000C>
+WRITE = <0xD428295C,0x00C20000>
+WAIT_FOR_BIT_SET = <0xD428295C,0x00400000,0x00001000>
+DELAY = <0x00001000> ;WAITING FOR DDR_VREF
+AND_VAL = <0xD428295C,0xFFFFFFF0>
+OR_VAL = <0xD428295C,0x00000004> ;set div4 533mbps
+OR_VAL = <0xD42828B0,0x02000000>
+WAIT_FOR_BIT_CLEAR = <0xD42828B0,0x02000000,0x00001000>
+WRITE = <0xD42828F4,0xC0000000>
+WRITE = <0xD42828F4,0xC0000003>
+WRITE = <0xD4282D18,0x33221133>
+WRITE = <0xC0100044,0x00030A00> ;MC_Control_0
+WRITE = <0xC0100048,0x00000001> ;MC_excu_en
+WRITE = <0xC010004C,0x00000000>
+WRITE = <0xC0100064,0x0A040502>
+WRITE = <0xC0100050,0x0007E2FF>
+WRITE = <0xC0100054,0x00000480>
+WRITE = <0xC0100058,0x10356285>
+WRITE = <0xC010005C,0x000494E4>
+WRITE = <0xC0100180,0x00030200>
+WRITE = <0xC0100200,0x000B0001> ;Memory Address Map Register Low CS0
+WRITE = <0xC0100204,0x00000000> ;Memory Address Map Register high CS0
+WRITE = <0xC0100220,0x04000332> ;Configuration Register CS0
+WRITE = <0xC01002C0,0x0000E000>
+WRITE = <0xC01002C4,0x00000098> ;MC_Control_2
+WRITE = <0xC0100304,0x50800400> ;DRAM Config 2 FSP WR FSP OP FSP=01
+WRITE = <0xC0100300,0x00000008> ;DRAM Config 1
+WRITE = <0xC010030C,0x00000000> ;no pre and post amble
+WRITE = <0xC0100310,0x00020000> ;drive strength 60ohm
+WRITE = <0xC010038C,0x001B0216> ;ZQC timing 0
+WRITE = <0xC0100390,0x003000C0> ;ZQC timing 1
+WRITE = <0xC0100394,0x004600CB> ;Refresh timing
+WRITE = <0xC0100398,0x01000100> ;SelfRefresh timing 0
+WRITE = <0xC010039C,0x00200808> ;SelfRefresh timing 1
+WRITE = <0xC01003A0,0x01080404> ;Power down timing 0
+WRITE = <0xC01003A4,0x00000001> ;Power down timing 1
+WRITE = <0xC01003A8,0x00000205> ;MRS timing
+WRITE = <0xC01003AC,0x1B200A17> ;ACT timing
+WRITE = <0xC01003B0,0x0C08040A> ;Pre-Charge timing
+WRITE = <0xC01003B4,0x02000400> ;CAS/RAS timing 0
+WRITE = <0xC01003B8,0x00010600> ;CAS/RAS timing 1
+WRITE = <0xC01003BC,0x02020404> ;Off-spec timing 0
+WRITE = <0xC01003C0,0x00000006> ;Off-spec timing 1
+WRITE = <0xC01003C4,0x00140A03> ;DRAM_read timing
+WRITE = <0xC01003D8,0x025A812D>
+WRITE = <0xC01003DC,0x41081239>
+WRITE = <0xC01003E0,0x00000605>
+WRITE = <0xC0100348,0x00000000>
+WRITE = <0xC010034C,0x00000000>
+WRITE = <0xC01013E4,0x05000300> ;MCK6 DFI phy ctrl register 1 (4to1)
+WRITE = <0xC01013EC,0x0000047E>
+WRITE = <0xC0100304,0x00800400> ;DRAM Config 2 FSP WR FSP OP FSP=00
+WRITE = <0xC0100300,0x00000004> ;DRAM Config 1
+WRITE = <0xC010030C,0x00000000>
+WRITE = <0xC0100310,0x00020000>
+WRITE = <0xC010038C,0x000A00C8> ;ZQC timing 0
+WRITE = <0xC0100390,0x00120048> ;ZQC timing 1
+WRITE = <0xC0100394,0x002300CB> ;Refresh timing
+WRITE = <0xC0100398,0x00260026> ;SelfRefresh timing 0
+WRITE = <0xC010039C,0x00200404> ;SelfRefresh timing 1
+WRITE = <0xC01003A0,0x01040202> ;Power down timing 0
+WRITE = <0xC01003A4,0x00000001> ;Power down timing 1
+WRITE = <0xC01003A8,0x00000205> ;MRS timing
+WRITE = <0xC01003AC,0x0E10050C> ;ACT timing
+WRITE = <0xC01003B0,0x06040205> ;Pre-Charge timing
+WRITE = <0xC01003B4,0x02000400> ;CAS/RAS timing 0
+WRITE = <0xC01003B8,0x00010200> ;CAS/RAS timing 1
+WRITE = <0xC01003BC,0x02020404> ;Off-spec timing 0
+WRITE = <0xC01003C0,0x00000006> ;Off-spec timing 1
+WRITE = <0xC01003C4,0x00140A01> ;DRAM_read timing
+WRITE = <0xC01003D8,0x025A812D>
+WRITE = <0xC01003DC,0x41081239>
+WRITE = <0xC01003E0,0x00000605>
+WRITE = <0xC0100348,0x00000000>
+WRITE = <0xC010034C,0x00000000>
+WRITE = <0xC01013E4,0x03000100> ;MCK6 DFI phy ctrl register 1 (1to1)
+WRITE = <0xC01013EC,0x0000047E>
+WRITE = <0xC0100304,0x00800400> ;CH0_DRAM_Config_2 select fp0
+WRITE = <0xC0100380,0x0001B207> ;DDR init timing Control 0
+WRITE = <0xC0100384,0x00000038> ;DDR init timing Control 1
+WRITE = <0xC0100388,0x000015B3> ;DDR init timing Control 2
+WRITE = <0xC01013E0,0x00000000> ;FSP_OP = 0
+WRITE = <0xC0143000,0x00000010> ;phy release and reset
+WRITE = <0xC0143000,0x00000011> ;phy release and reset
+WRITE = <0xC0150024,0x00000000>
+OR_VAL = <0xC0150024,0x00000032>
+WRITE = <0xC0140068,0x0000034A>
+WRITE = <0xC0144068,0x0000034A>
+WRITE = <0xC0140064,0x0000034A>
+WRITE = <0xC0144064,0x0000034A>
+WRITE = <0xC0143004,0x00000830>
+WRITE = <0xC0147004,0x00000830>
+WRITE = <0xC0143008,0x0024244B>
+WRITE = <0xC0147008,0x0024244B>
+WRITE = <0xC014300C,0x003636D4>
+WRITE = <0xC014700C,0x003636D4>
+WRITE = <0xC0143010,0x00020482>
+WRITE = <0xC0147010,0x00020482>
+WRITE = <0xC0143014,0x87000000>
+WRITE = <0xC0147014,0x87000000>
+WRITE = <0xC0143018,0x08454018>
+WRITE = <0xC0147018,0x08454018>
+WRITE = <0xC0143020,0x00001077>
+WRITE = <0xC015000C,0x0000010F>
+WRITE = <0xC0150010,0x0000010F>
+WRITE = <0xC0150014,0x0000010F>
+WRITE = <0xC0142028,0x0000000F>
+WRITE = <0xC014202C,0x0000000F>
+WRITE = <0xC0142030,0x0000000F>
+WRITE = <0xC0146028,0x0000000F>
+WRITE = <0xC014602C,0x0000000F>
+WRITE = <0xC0146030,0x0000000F>
+WRITE = <0xC0140060,0x000000FF>
+WRITE = <0xC0141060,0x000000FF>
+WRITE = <0xC0144060,0x000000FF>
+WRITE = <0xC0145060,0x000000FF>
+OR_VAL = <0xC0150000,0x00000001> ;HWDFC_EN
+WRITE = <0xC01013D0,0x11000001> ;MCK6 DFI phy user cmd
+WRITE = <0xD4050028,0x00001200>
+WRITE = <0xD4282CE8,0x00000053>
+WRITE = <0xD4282CE8,0x00000054>
+WRITE = <0xD4282CE8,0x00000053>
+WRITE = <0xD4282CE8,0x00000054>
+WRITE = <0xD4282CE8,0x00000053>
+WRITE = <0xD4282CE8,0x00000053>
+WRITE = <0xD4282CE8,0x00000063>
+WRITE = <0xD4282CE8,0x00000063>
+WRITE = <0xD4282CE8,0x00000064>
+WRITE = <0xD4282CE8,0x00000063>
+WRITE = <0xD4282CE8,0x00000064>
+WRITE = <0xD4282CE8,0x00000064>
+WRITE = <0xD4282CE8,0x00000073>
+WRITE = <0xD4282CE8,0x00000074>
+WRITE = <0xD4282CE8,0x00000074>
+WRITE = <0xD4282CE8,0x00000073>
+WRITE = <0xD4282CE8,0x00000080>
+WRITE = <0xD4282CE8,0x00000081>
+WRITE = <0xD4282CE8,0x00000082>
+WRITE = <0xD4282CE8,0x00000084>
+WRITE = <0xD4050028,0x00001300>
+WRITE = <0xC01013D0,0x11000100> ;MCK6 DFI phy user cmd
+WRITE = <0xC0100020,0x11000001>
+WAIT_FOR_BIT_SET = <0xC0100008,0x00000001,0x00001000>
+WRITE = <0xC0100020,0x11001000>
+WRITE = <0xC0100024,0x11020001>
+WRITE = <0xC0100024,0x11020002>
+WRITE = <0xC0100024,0x11020003>
+WRITE = <0xC01013D0,0x11100000> ;read gate training
+WAIT_FOR_BIT_SET = <0xC01013FC,0x00000006,0x00001000>
+WRITE = <0xC0100074,0x00030A03>
+WRITE = <0xC0100078,0x00000044>
+WRITE = <0xC0100070,0x00000000>
+WRITE = <0xC0100074,0x11000008>
+WRITE = <0xC0100078,0x00000020>
+WRITE = <0xC0100070,0x00000001>
+WRITE = <0xC0100074,0x00000004>
+WRITE = <0xC0100078,0x00002008>
+WRITE = <0xC0100070,0x00000002>
+WRITE = <0xC0100074,0x00000004>
+WRITE = <0xC0100078,0x00002008>
+WRITE = <0xC0100070,0x00000003>
+WRITE = <0xC0100074,0x11000001>
+WRITE = <0xC0100078,0x000013D0>
+WRITE = <0xC0100070,0x00000004>
+WRITE = <0xC0100074,0x00008000>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x00000005>
+WRITE = <0xC0100074,0x00000000>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x00000006>
+WRITE = <0xC0100074,0x00030A03>
+WRITE = <0xC0100078,0x00010044>
+WRITE = <0xC0100070,0x00000007>
+WRITE = <0xC0100074,0x11000100>
+WRITE = <0xC0100078,0x000013D0>
+WRITE = <0xC0100070,0x00000008>
+WRITE = <0xC0100074,0x00008000>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x00000009>
+WRITE = <0xC0100074,0x00008000>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x0000000A>
+WRITE = <0xC0100074,0x11000004>
+WRITE = <0xC0100078,0x00000020>
+WRITE = <0xC0100070,0x0000000B>
+WRITE = <0xC0100074,0x00030A02>
+WRITE = <0xC0100078,0x00010044>
+WRITE = <0xC0100070,0x0000000C>
+WRITE = <0xC0100074,0x11020001>
+WRITE = <0xC0100078,0x00000024>
+WRITE = <0xC0100070,0x0000000D>
+WRITE = <0xC0100074,0x11020002>
+WRITE = <0xC0100078,0x00000024>
+WRITE = <0xC0100070,0x0000000E>
+WRITE = <0xC0100074,0x11100000>
+WRITE = <0xC0100078,0x000013D0>
+WRITE = <0xC0100070,0x0000000F>
+WRITE = <0xC0100074,0x00000006>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x00000010>
+WRITE = <0xC0100074,0x00000006>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x00000011>
+WRITE = <0xC0100074,0x00030A00>
+WRITE = <0xC0100078,0x00020044>
+WRITE = <0xC0100070,0x00000012>
+AND_VAL = <0xD428295C,0xFFFFFFF0> ;hwdfc to 1066mbps
+OR_VAL = <0xD428295C,0x00000000>
+OR_VAL = <0xD42828B0,0x00000020>
+OR_VAL = <0xD42828B0,0x01000000>
+WAIT_FOR_BIT_CLEAR = <0xD42828B0,0x01000000,0x00001000>
+WRITE = <0xC01013D0,0x11100000> ;read gate training
+WAIT_FOR_BIT_SET = <0xC01013FC,0x00000002,0x00001000>
+WRITE = <0xC01013EC,0x00005070>
+WRITE = <0xC01013D0,0x11200000> ;read DQ training
+WAIT_FOR_BIT_SET = <0xC01013FC,0x00000006,0x00001000>
+WRITE = <0xC0143004,0x00000820>
+WRITE = <0xC0147004,0x00000820>
+PP_TABLEHEADER = <0xC0100074,0xC0100078,0xC0100070> ;DDR_TABLEHEADER FOR PRODUCT POINT
+PP_WRITE = <0x00030A03,0x00000044,0x00000060>
+PP_WRITE = <0x00000004,0x00002008,0x00000061>
+PP_WRITE = <0x00000004,0x00002008,0x00000062>
+PP_WRITE = <0x11000001,0x000013D0,0x00000063>
+PP_WRITE = <0x00008000,0x000033FC,0x00000064>
+PP_WRITE = <0x00000000,0x000033FC,0x00000065>
+PP_WRITE = <0x00030A03,0x00010044,0x00000066>
+PP_WRITE = <0x11000100,0x000013D0,0x00000067>
+PP_WRITE = <0x00008000,0x000033FC,0x00000068>
+PP_WRITE = <0x00008000,0x000033FC,0x00000069>
+PP_WRITE = <0x00030A02,0x00010044,0x0000006A>
+PP_WRITE = <0x00030A00,0x00020044,0x0000006B>
+AND_VAL = <0xD428295C,0xFFFFFFF0> ;hwdfc to 533mbps
+OR_VAL = <0xD428295C,0x00000004>
+AND_VAL = <0xD42828B0,0xFFFFFF9F>
+OR_VAL = <0xD42828B0,0x01000000>
+WAIT_FOR_BIT_CLEAR = <0xD42828B0,0x01000000,0x00001000>
+End_Instructions
+END_Vendor_DDR_Initialization
+Vendor_DDR_Initialization
+DDR_PID = 0x0508
+DDROperations
+DDR_INIT_ENABLE = 0x00000001
+DDR_MEMTEST_ENABLE = 0x00000000
+End_DDROperations
+Instructions
+WRITE = <0xD428285C,0x0000000B> ;pull down usb dp/dm
+WRITE = <0xD4207094,0x0000E504> ;pull down usb dp/dm
+WRITE = <0xD42070A4,0x00005888> ;pull down usb dp/dm
+WRITE = <0xD420702C,0x00000000> ;suspend usb
+WRITE = <0xD4207028,0x00003000> ;suspend usb
+WRITE = <0xD4282948,0x4A200063>
+WRITE = <0xD428294C,0x29006000> ;PLL 1066
+WRITE = <0xD4282950,0x50C5000C>
+WRITE = <0xD428295C,0x00C20000>
+WAIT_FOR_BIT_SET = <0xD428295C,0x00400000,0x00001000>
+DELAY = <0x00001000> ;WAITING FOR DDR_VREF
+AND_VAL = <0xD428295C,0xFFFFFFF0>
+OR_VAL = <0xD428295C,0x00000004> ;set div4 533mbps
+OR_VAL = <0xD42828B0,0x02000000>
+WAIT_FOR_BIT_CLEAR = <0xD42828B0,0x02000000,0x00001000>
+WRITE = <0xD42828F4,0xC0000000>
+WRITE = <0xD42828F4,0xC0000003>
+WRITE = <0xD4282D18,0x33221133>
+WRITE = <0xC0100044,0x00030A00> ;MC_Control_0
+WRITE = <0xC0100048,0x00000001> ;MC_excu_en
+WRITE = <0xC010004C,0x00000000>
+WRITE = <0xC0100064,0x0A040502>
+WRITE = <0xC0100050,0x0007E2FF>
+WRITE = <0xC0100054,0x00000480>
+WRITE = <0xC0100058,0x10356285>
+WRITE = <0xC010005C,0x000494E4>
+WRITE = <0xC0100180,0x00030200>
+WRITE = <0xC0100200,0x000B0001> ;Memory Address Map Register Low CS0
+WRITE = <0xC0100204,0x00000000> ;Memory Address Map Register high CS0
+WRITE = <0xC0100220,0x04000332> ;Configuration Register CS0
+WRITE = <0xC01002C0,0x0000E000>
+WRITE = <0xC01002C4,0x00000098> ;MC_Control_2
+WRITE = <0xC0100304,0x50800400> ;DRAM Config 2 FSP WR FSP OP FSP=01
+WRITE = <0xC0100300,0x00000008> ;DRAM Config 1
+WRITE = <0xC010030C,0x00000000> ;no pre and post amble
+WRITE = <0xC0100310,0x00020000> ;drive strength 60ohm
+WRITE = <0xC010038C,0x001B0216> ;ZQC timing 0
+WRITE = <0xC0100390,0x003000C0> ;ZQC timing 1
+WRITE = <0xC0100394,0x004600CB> ;Refresh timing
+WRITE = <0xC0100398,0x01000100> ;SelfRefresh timing 0
+WRITE = <0xC010039C,0x00200808> ;SelfRefresh timing 1
+WRITE = <0xC01003A0,0x01080404> ;Power down timing 0
+WRITE = <0xC01003A4,0x00000001> ;Power down timing 1
+WRITE = <0xC01003A8,0x00000205> ;MRS timing
+WRITE = <0xC01003AC,0x1B200A17> ;ACT timing
+WRITE = <0xC01003B0,0x0C08040A> ;Pre-Charge timing
+WRITE = <0xC01003B4,0x02000400> ;CAS/RAS timing 0
+WRITE = <0xC01003B8,0x00010600> ;CAS/RAS timing 1
+WRITE = <0xC01003BC,0x02020404> ;Off-spec timing 0
+WRITE = <0xC01003C0,0x00000006> ;Off-spec timing 1
+WRITE = <0xC01003C4,0x00140A03> ;DRAM_read timing
+WRITE = <0xC01003D8,0x025A812D>
+WRITE = <0xC01003DC,0x41081239>
+WRITE = <0xC01003E0,0x00000605>
+WRITE = <0xC0100348,0x00000000>
+WRITE = <0xC010034C,0x00000000>
+WRITE = <0xC01013E4,0x05000300> ;MCK6 DFI phy ctrl register 1 (4to1)
+WRITE = <0xC01013EC,0x0000047E>
+WRITE = <0xC0100304,0x00800400> ;DRAM Config 2 FSP WR FSP OP FSP=00
+WRITE = <0xC0100300,0x00000004> ;DRAM Config 1
+WRITE = <0xC010030C,0x00000000>
+WRITE = <0xC0100310,0x00020000>
+WRITE = <0xC010038C,0x000A00C8> ;ZQC timing 0
+WRITE = <0xC0100390,0x00120048> ;ZQC timing 1
+WRITE = <0xC0100394,0x002300CB> ;Refresh timing
+WRITE = <0xC0100398,0x00260026> ;SelfRefresh timing 0
+WRITE = <0xC010039C,0x00200404> ;SelfRefresh timing 1
+WRITE = <0xC01003A0,0x01040202> ;Power down timing 0
+WRITE = <0xC01003A4,0x00000001> ;Power down timing 1
+WRITE = <0xC01003A8,0x00000205> ;MRS timing
+WRITE = <0xC01003AC,0x0E10050C> ;ACT timing
+WRITE = <0xC01003B0,0x06040205> ;Pre-Charge timing
+WRITE = <0xC01003B4,0x02000400> ;CAS/RAS timing 0
+WRITE = <0xC01003B8,0x00010200> ;CAS/RAS timing 1
+WRITE = <0xC01003BC,0x02020404> ;Off-spec timing 0
+WRITE = <0xC01003C0,0x00000006> ;Off-spec timing 1
+WRITE = <0xC01003C4,0x00140A01> ;DRAM_read timing
+WRITE = <0xC01003D8,0x025A812D>
+WRITE = <0xC01003DC,0x41081239>
+WRITE = <0xC01003E0,0x00000605>
+WRITE = <0xC0100348,0x00000000>
+WRITE = <0xC010034C,0x00000000>
+WRITE = <0xC01013E4,0x03000100> ;MCK6 DFI phy ctrl register 1 (1to1)
+WRITE = <0xC01013EC,0x0000047E>
+WRITE = <0xC0100304,0x00800400> ;CH0_DRAM_Config_2 select fp0
+WRITE = <0xC0100380,0x0001B207> ;DDR init timing Control 0
+WRITE = <0xC0100384,0x00000038> ;DDR init timing Control 1
+WRITE = <0xC0100388,0x000015B3> ;DDR init timing Control 2
+WRITE = <0xC01013E0,0x00000000> ;FSP_OP = 0
+WRITE = <0xC0143000,0x00000010> ;phy release and reset
+WRITE = <0xC0143000,0x00000011> ;phy release and reset
+WRITE = <0xC0150024,0x00000000>
+OR_VAL = <0xC0150024,0x00000032>
+WRITE = <0xC0140068,0x0000034A>
+WRITE = <0xC0144068,0x0000034A>
+WRITE = <0xC0140064,0x0000034A>
+WRITE = <0xC0144064,0x0000034A>
+WRITE = <0xC0143004,0x00000830>
+WRITE = <0xC0147004,0x00000830>
+WRITE = <0xC0143008,0x0024244B>
+WRITE = <0xC0147008,0x0024244B>
+WRITE = <0xC014300C,0x003636D4>
+WRITE = <0xC014700C,0x003636D4>
+WRITE = <0xC0143010,0x00020482>
+WRITE = <0xC0147010,0x00020482>
+WRITE = <0xC0143014,0x87000000>
+WRITE = <0xC0147014,0x87000000>
+WRITE = <0xC0143018,0x08454018>
+WRITE = <0xC0147018,0x08454018>
+WRITE = <0xC0143020,0x00001077>
+WRITE = <0xC015000C,0x0000010F>
+WRITE = <0xC0150010,0x0000010F>
+WRITE = <0xC0150014,0x0000010F>
+WRITE = <0xC0142028,0x0000000F>
+WRITE = <0xC014202C,0x0000000F>
+WRITE = <0xC0142030,0x0000000F>
+WRITE = <0xC0146028,0x0000000F>
+WRITE = <0xC014602C,0x0000000F>
+WRITE = <0xC0146030,0x0000000F>
+WRITE = <0xC0140060,0x000000FF>
+WRITE = <0xC0141060,0x000000FF>
+WRITE = <0xC0144060,0x000000FF>
+WRITE = <0xC0145060,0x000000FF>
+OR_VAL = <0xC0150000,0x00000001> ;HWDFC_EN
+WRITE = <0xC01013D0,0x11000001> ;MCK6 DFI phy user cmd
+WRITE = <0xD4050028,0x00001200>
+WRITE = <0xD4282CE8,0x00000053>
+WRITE = <0xD4282CE8,0x00000054>
+WRITE = <0xD4282CE8,0x00000053>
+WRITE = <0xD4282CE8,0x00000054>
+WRITE = <0xD4282CE8,0x00000053>
+WRITE = <0xD4282CE8,0x00000053>
+WRITE = <0xD4282CE8,0x00000063>
+WRITE = <0xD4282CE8,0x00000063>
+WRITE = <0xD4282CE8,0x00000064>
+WRITE = <0xD4282CE8,0x00000063>
+WRITE = <0xD4282CE8,0x00000064>
+WRITE = <0xD4282CE8,0x00000064>
+WRITE = <0xD4282CE8,0x00000073>
+WRITE = <0xD4282CE8,0x00000074>
+WRITE = <0xD4282CE8,0x00000074>
+WRITE = <0xD4282CE8,0x00000073>
+WRITE = <0xD4282CE8,0x00000080>
+WRITE = <0xD4282CE8,0x00000081>
+WRITE = <0xD4282CE8,0x00000082>
+WRITE = <0xD4282CE8,0x00000084>
+WRITE = <0xD4050028,0x00001300>
+WRITE = <0xC01013D0,0x11000100> ;MCK6 DFI phy user cmd
+WRITE = <0xC0100020,0x11000001>
+WAIT_FOR_BIT_SET = <0xC0100008,0x00000001,0x00001000>
+WRITE = <0xC0100020,0x11001000>
+WRITE = <0xC0100024,0x11020001>
+WRITE = <0xC0100024,0x11020002>
+WRITE = <0xC0100024,0x11020003>
+WRITE = <0xC01013D0,0x11100000> ;read gate training
+WAIT_FOR_BIT_SET = <0xC01013FC,0x00000006,0x00001000>
+WRITE = <0xC0100074,0x00030A03>
+WRITE = <0xC0100078,0x00000044>
+WRITE = <0xC0100070,0x00000000>
+WRITE = <0xC0100074,0x11000008>
+WRITE = <0xC0100078,0x00000020>
+WRITE = <0xC0100070,0x00000001>
+WRITE = <0xC0100074,0x00000004>
+WRITE = <0xC0100078,0x00002008>
+WRITE = <0xC0100070,0x00000002>
+WRITE = <0xC0100074,0x00000004>
+WRITE = <0xC0100078,0x00002008>
+WRITE = <0xC0100070,0x00000003>
+WRITE = <0xC0100074,0x11000001>
+WRITE = <0xC0100078,0x000013D0>
+WRITE = <0xC0100070,0x00000004>
+WRITE = <0xC0100074,0x00008000>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x00000005>
+WRITE = <0xC0100074,0x00000000>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x00000006>
+WRITE = <0xC0100074,0x00030A03>
+WRITE = <0xC0100078,0x00010044>
+WRITE = <0xC0100070,0x00000007>
+WRITE = <0xC0100074,0x11000100>
+WRITE = <0xC0100078,0x000013D0>
+WRITE = <0xC0100070,0x00000008>
+WRITE = <0xC0100074,0x00008000>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x00000009>
+WRITE = <0xC0100074,0x00008000>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x0000000A>
+WRITE = <0xC0100074,0x11000004>
+WRITE = <0xC0100078,0x00000020>
+WRITE = <0xC0100070,0x0000000B>
+WRITE = <0xC0100074,0x00030A02>
+WRITE = <0xC0100078,0x00010044>
+WRITE = <0xC0100070,0x0000000C>
+WRITE = <0xC0100074,0x11020001>
+WRITE = <0xC0100078,0x00000024>
+WRITE = <0xC0100070,0x0000000D>
+WRITE = <0xC0100074,0x11020002>
+WRITE = <0xC0100078,0x00000024>
+WRITE = <0xC0100070,0x0000000E>
+WRITE = <0xC0100074,0x11100000>
+WRITE = <0xC0100078,0x000013D0>
+WRITE = <0xC0100070,0x0000000F>
+WRITE = <0xC0100074,0x00000006>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x00000010>
+WRITE = <0xC0100074,0x00000006>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x00000011>
+WRITE = <0xC0100074,0x00030A00>
+WRITE = <0xC0100078,0x00020044>
+WRITE = <0xC0100070,0x00000012>
+AND_VAL = <0xD428295C,0xFFFFFFF0> ;hwdfc to 1066mbps
+OR_VAL = <0xD428295C,0x00000000>
+OR_VAL = <0xD42828B0,0x00000020>
+OR_VAL = <0xD42828B0,0x01000000>
+WAIT_FOR_BIT_CLEAR = <0xD42828B0,0x01000000,0x00001000>
+WRITE = <0xC01013D0,0x11100000> ;read gate training
+WAIT_FOR_BIT_SET = <0xC01013FC,0x00000002,0x00001000>
+WRITE = <0xC01013EC,0x00005070>
+WRITE = <0xC01013D0,0x11200000> ;read DQ training
+WAIT_FOR_BIT_SET = <0xC01013FC,0x00000006,0x00001000>
+WRITE = <0xC0143004,0x00000820>
+WRITE = <0xC0147004,0x00000820>
+PP_TABLEHEADER = <0xC0100074,0xC0100078,0xC0100070> ;DDR_TABLEHEADER FOR PRODUCT POINT
+PP_WRITE = <0x00030A03,0x00000044,0x00000060>
+PP_WRITE = <0x00000004,0x00002008,0x00000061>
+PP_WRITE = <0x00000004,0x00002008,0x00000062>
+PP_WRITE = <0x11000001,0x000013D0,0x00000063>
+PP_WRITE = <0x00008000,0x000033FC,0x00000064>
+PP_WRITE = <0x00000000,0x000033FC,0x00000065>
+PP_WRITE = <0x00030A03,0x00010044,0x00000066>
+PP_WRITE = <0x11000100,0x000013D0,0x00000067>
+PP_WRITE = <0x00008000,0x000033FC,0x00000068>
+PP_WRITE = <0x00008000,0x000033FC,0x00000069>
+PP_WRITE = <0x00030A02,0x00010044,0x0000006A>
+PP_WRITE = <0x00030A00,0x00020044,0x0000006B>
+AND_VAL = <0xD428295C,0xFFFFFFF0> ;hwdfc to 533mbps
+OR_VAL = <0xD428295C,0x00000004>
+AND_VAL = <0xD42828B0,0xFFFFFF9F>
+OR_VAL = <0xD42828B0,0x01000000>
+WAIT_FOR_BIT_CLEAR = <0xD42828B0,0x01000000,0x00001000>
+End_Instructions
+END_Vendor_DDR_Initialization
+Vendor_DDR_Initialization
+DDR_PID = 0x0510
+DDROperations
+DDR_INIT_ENABLE = 0x00000001
+DDR_MEMTEST_ENABLE = 0x00000000
+End_DDROperations
+Instructions
+WRITE = <0xD428285C,0x0000000B> ;pull down usb dp/dm
+WRITE = <0xD4207094,0x0000E504> ;pull down usb dp/dm
+WRITE = <0xD42070A4,0x00005888> ;pull down usb dp/dm
+WRITE = <0xD420702C,0x00000000> ;suspend usb
+WRITE = <0xD4207028,0x00003000> ;suspend usb
+WRITE = <0xD4282948,0x4A200063>
+WRITE = <0xD428294C,0x29006000> ;PLL 1066
+WRITE = <0xD4282950,0x50C5000C>
+WRITE = <0xD428295C,0x00C20000>
+WAIT_FOR_BIT_SET = <0xD428295C,0x00400000,0x00001000>
+DELAY = <0x00001000> ;WAITING FOR DDR_VREF
+AND_VAL = <0xD428295C,0xFFFFFFF0>
+OR_VAL = <0xD428295C,0x00000004> ;set div4 533mbps
+OR_VAL = <0xD42828B0,0x02000000>
+WAIT_FOR_BIT_CLEAR = <0xD42828B0,0x02000000,0x00001000>
+WRITE = <0xD42828F4,0xC0000000>
+WRITE = <0xD42828F4,0xC0000003>
+WRITE = <0xD4282D18,0x33221133>
+WRITE = <0xC0100044,0x00030A00> ;MC_Control_0
+WRITE = <0xC0100048,0x00000001> ;MC_excu_en
+WRITE = <0xC010004C,0x00000000>
+WRITE = <0xC0100064,0x0A040502>
+WRITE = <0xC0100050,0x0007E2FF>
+WRITE = <0xC0100054,0x00000480>
+WRITE = <0xC0100058,0x10356285>
+WRITE = <0xC010005C,0x000494E4>
+WRITE = <0xC0100180,0x00030200>
+WRITE = <0xC0100200,0x000C0001> ;Memory Address Map Register Low CS0
+WRITE = <0xC0100204,0x00000000> ;Memory Address Map Register high CS0
+WRITE = <0xC0100220,0x04000432> ;Configuration Register CS0
+WRITE = <0xC01002C0,0x0000E000>
+WRITE = <0xC01002C4,0x00000098> ;MC_Control_2
+WRITE = <0xC0100304,0x50800400> ;DRAM Config 2 FSP WR FSP OP FSP=01
+WRITE = <0xC0100300,0x00000008> ;DRAM Config 1
+WRITE = <0xC010030C,0x00000000> ;no pre and post amble
+WRITE = <0xC0100310,0x00020000> ;drive strength 60ohm
+WRITE = <0xC010038C,0x001B0216> ;ZQC timing 0
+WRITE = <0xC0100390,0x003000C0> ;ZQC timing 1
+WRITE = <0xC0100394,0x00460065> ;Refresh timing
+WRITE = <0xC0100398,0x01000100> ;SelfRefresh timing 0
+WRITE = <0xC010039C,0x00200808> ;SelfRefresh timing 1
+WRITE = <0xC01003A0,0x01080404> ;Power down timing 0
+WRITE = <0xC01003A4,0x00000001> ;Power down timing 1
+WRITE = <0xC01003A8,0x00000205> ;MRS timing
+WRITE = <0xC01003AC,0x1B200A17> ;ACT timing
+WRITE = <0xC01003B0,0x0C08040A> ;Pre-Charge timing
+WRITE = <0xC01003B4,0x02000400> ;CAS/RAS timing 0
+WRITE = <0xC01003B8,0x00010600> ;CAS/RAS timing 1
+WRITE = <0xC01003BC,0x02020404> ;Off-spec timing 0
+WRITE = <0xC01003C0,0x00000006> ;Off-spec timing 1
+WRITE = <0xC01003C4,0x00140A03> ;DRAM_read timing
+WRITE = <0xC01003D8,0x025A812D>
+WRITE = <0xC01003DC,0x41081239>
+WRITE = <0xC01003E0,0x00000605>
+WRITE = <0xC0100348,0x00000000>
+WRITE = <0xC010034C,0x00000000>
+WRITE = <0xC01013E4,0x05000300> ;MCK6 DFI phy ctrl register 1 (4to1)
+WRITE = <0xC01013EC,0x0000047E>
+WRITE = <0xC0100304,0x00800400> ;DRAM Config 2 FSP WR FSP OP FSP=00
+WRITE = <0xC0100300,0x00000004> ;DRAM Config 1
+WRITE = <0xC010030C,0x00000000>
+WRITE = <0xC0100310,0x00020000>
+WRITE = <0xC010038C,0x000A00C8> ;ZQC timing 0
+WRITE = <0xC0100390,0x00120048> ;ZQC timing 1
+WRITE = <0xC0100394,0x00230065> ;Refresh timing
+WRITE = <0xC0100398,0x00260026> ;SelfRefresh timing 0
+WRITE = <0xC010039C,0x00200404> ;SelfRefresh timing 1
+WRITE = <0xC01003A0,0x01040202> ;Power down timing 0
+WRITE = <0xC01003A4,0x00000001> ;Power down timing 1
+WRITE = <0xC01003A8,0x00000205> ;MRS timing
+WRITE = <0xC01003AC,0x0E10050C> ;ACT timing
+WRITE = <0xC01003B0,0x06040205> ;Pre-Charge timing
+WRITE = <0xC01003B4,0x02000400> ;CAS/RAS timing 0
+WRITE = <0xC01003B8,0x00010200> ;CAS/RAS timing 1
+WRITE = <0xC01003BC,0x02020404> ;Off-spec timing 0
+WRITE = <0xC01003C0,0x00000006> ;Off-spec timing 1
+WRITE = <0xC01003C4,0x00140A01> ;DRAM_read timing
+WRITE = <0xC01003D8,0x025A812D>
+WRITE = <0xC01003DC,0x41081239>
+WRITE = <0xC01003E0,0x00000605>
+WRITE = <0xC0100348,0x00000000>
+WRITE = <0xC010034C,0x00000000>
+WRITE = <0xC01013E4,0x03000100> ;MCK6 DFI phy ctrl register 1 (1to1)
+WRITE = <0xC01013EC,0x0000047E>
+WRITE = <0xC0100304,0x00800400> ;CH0_DRAM_Config_2 select fp0
+WRITE = <0xC0100380,0x0001B207> ;DDR init timing Control 0
+WRITE = <0xC0100384,0x00000038> ;DDR init timing Control 1
+WRITE = <0xC0100388,0x000015B3> ;DDR init timing Control 2
+WRITE = <0xC01013E0,0x00000000> ;FSP_OP = 0
+WRITE = <0xC0143000,0x00000010> ;phy release and reset
+WRITE = <0xC0143000,0x00000011> ;phy release and reset
+WRITE = <0xC0150024,0x00000000>
+OR_VAL = <0xC0150024,0x00000032>
+WRITE = <0xC0140068,0x0000034A>
+WRITE = <0xC0144068,0x0000034A>
+WRITE = <0xC0140064,0x0000034A>
+WRITE = <0xC0144064,0x0000034A>
+WRITE = <0xC0143004,0x00000830>
+WRITE = <0xC0147004,0x00000830>
+WRITE = <0xC0143008,0x0024244B>
+WRITE = <0xC0147008,0x0024244B>
+WRITE = <0xC014300C,0x003636D4>
+WRITE = <0xC014700C,0x003636D4>
+WRITE = <0xC0143010,0x00020482>
+WRITE = <0xC0147010,0x00020482>
+WRITE = <0xC0143014,0x87000000>
+WRITE = <0xC0147014,0x87000000>
+WRITE = <0xC0143018,0x08454018>
+WRITE = <0xC0147018,0x08454018>
+WRITE = <0xC0143020,0x00001077>
+WRITE = <0xC015000C,0x0000010F>
+WRITE = <0xC0150010,0x0000010F>
+WRITE = <0xC0150014,0x0000010F>
+WRITE = <0xC0142028,0x0000000F>
+WRITE = <0xC014202C,0x0000000F>
+WRITE = <0xC0142030,0x0000000F>
+WRITE = <0xC0146028,0x0000000F>
+WRITE = <0xC014602C,0x0000000F>
+WRITE = <0xC0146030,0x0000000F>
+WRITE = <0xC0140060,0x000000FF>
+WRITE = <0xC0141060,0x000000FF>
+WRITE = <0xC0144060,0x000000FF>
+WRITE = <0xC0145060,0x000000FF>
+OR_VAL = <0xC0150000,0x00000001> ;HWDFC_EN
+WRITE = <0xC01013D0,0x11000001> ;MCK6 DFI phy user cmd
+WRITE = <0xD4050028,0x00001200>
+WRITE = <0xD4282CE8,0x00000053>
+WRITE = <0xD4282CE8,0x00000054>
+WRITE = <0xD4282CE8,0x00000053>
+WRITE = <0xD4282CE8,0x00000054>
+WRITE = <0xD4282CE8,0x00000053>
+WRITE = <0xD4282CE8,0x00000053>
+WRITE = <0xD4282CE8,0x00000063>
+WRITE = <0xD4282CE8,0x00000063>
+WRITE = <0xD4282CE8,0x00000064>
+WRITE = <0xD4282CE8,0x00000063>
+WRITE = <0xD4282CE8,0x00000064>
+WRITE = <0xD4282CE8,0x00000064>
+WRITE = <0xD4282CE8,0x00000073>
+WRITE = <0xD4282CE8,0x00000074>
+WRITE = <0xD4282CE8,0x00000074>
+WRITE = <0xD4282CE8,0x00000073>
+WRITE = <0xD4282CE8,0x00000080>
+WRITE = <0xD4282CE8,0x00000081>
+WRITE = <0xD4282CE8,0x00000082>
+WRITE = <0xD4282CE8,0x00000084>
+WRITE = <0xD4050028,0x00001300>
+WRITE = <0xC01013D0,0x11000100> ;MCK6 DFI phy user cmd
+WRITE = <0xC0100020,0x11000001>
+WAIT_FOR_BIT_SET = <0xC0100008,0x00000001,0x00001000>
+WRITE = <0xC0100020,0x11001000>
+WRITE = <0xC0100024,0x11020001>
+WRITE = <0xC0100024,0x11020002>
+WRITE = <0xC0100024,0x11020003>
+WRITE = <0xC01013D0,0x11100000> ;read gate training
+WAIT_FOR_BIT_SET = <0xC01013FC,0x00000006,0x00001000>
+WRITE = <0xC0100074,0x00030A03>
+WRITE = <0xC0100078,0x00000044>
+WRITE = <0xC0100070,0x00000000>
+WRITE = <0xC0100074,0x11000008>
+WRITE = <0xC0100078,0x00000020>
+WRITE = <0xC0100070,0x00000001>
+WRITE = <0xC0100074,0x00000004>
+WRITE = <0xC0100078,0x00002008>
+WRITE = <0xC0100070,0x00000002>
+WRITE = <0xC0100074,0x00000004>
+WRITE = <0xC0100078,0x00002008>
+WRITE = <0xC0100070,0x00000003>
+WRITE = <0xC0100074,0x11000001>
+WRITE = <0xC0100078,0x000013D0>
+WRITE = <0xC0100070,0x00000004>
+WRITE = <0xC0100074,0x00008000>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x00000005>
+WRITE = <0xC0100074,0x00000000>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x00000006>
+WRITE = <0xC0100074,0x00030A03>
+WRITE = <0xC0100078,0x00010044>
+WRITE = <0xC0100070,0x00000007>
+WRITE = <0xC0100074,0x11000100>
+WRITE = <0xC0100078,0x000013D0>
+WRITE = <0xC0100070,0x00000008>
+WRITE = <0xC0100074,0x00008000>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x00000009>
+WRITE = <0xC0100074,0x00008000>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x0000000A>
+WRITE = <0xC0100074,0x11000004>
+WRITE = <0xC0100078,0x00000020>
+WRITE = <0xC0100070,0x0000000B>
+WRITE = <0xC0100074,0x00030A02>
+WRITE = <0xC0100078,0x00010044>
+WRITE = <0xC0100070,0x0000000C>
+WRITE = <0xC0100074,0x11020001>
+WRITE = <0xC0100078,0x00000024>
+WRITE = <0xC0100070,0x0000000D>
+WRITE = <0xC0100074,0x11020002>
+WRITE = <0xC0100078,0x00000024>
+WRITE = <0xC0100070,0x0000000E>
+WRITE = <0xC0100074,0x11100000>
+WRITE = <0xC0100078,0x000013D0>
+WRITE = <0xC0100070,0x0000000F>
+WRITE = <0xC0100074,0x00000006>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x00000010>
+WRITE = <0xC0100074,0x00000006>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x00000011>
+WRITE = <0xC0100074,0x00030A00>
+WRITE = <0xC0100078,0x00020044>
+WRITE = <0xC0100070,0x00000012>
+AND_VAL = <0xD428295C,0xFFFFFFF0> ;hwdfc to 1066mbps
+OR_VAL = <0xD428295C,0x00000000>
+OR_VAL = <0xD42828B0,0x00000020>
+OR_VAL = <0xD42828B0,0x01000000>
+WAIT_FOR_BIT_CLEAR = <0xD42828B0,0x01000000,0x00001000>
+WRITE = <0xC01013D0,0x11100000> ;read gate training
+WAIT_FOR_BIT_SET = <0xC01013FC,0x00000002,0x00001000>
+WRITE = <0xC01013EC,0x00005070>
+WRITE = <0xC01013D0,0x11200000> ;read DQ training
+WAIT_FOR_BIT_SET = <0xC01013FC,0x00000006,0x00001000>
+WRITE = <0xC0143004,0x00000820>
+WRITE = <0xC0147004,0x00000820>
+PP_TABLEHEADER = <0xC0100074,0xC0100078,0xC0100070> ;DDR_TABLEHEADER FOR PRODUCT POINT
+PP_WRITE = <0x00030A03,0x00000044,0x00000060>
+PP_WRITE = <0x00000004,0x00002008,0x00000061>
+PP_WRITE = <0x00000004,0x00002008,0x00000062>
+PP_WRITE = <0x11000001,0x000013D0,0x00000063>
+PP_WRITE = <0x00008000,0x000033FC,0x00000064>
+PP_WRITE = <0x00000000,0x000033FC,0x00000065>
+PP_WRITE = <0x00030A03,0x00010044,0x00000066>
+PP_WRITE = <0x11000100,0x000013D0,0x00000067>
+PP_WRITE = <0x00008000,0x000033FC,0x00000068>
+PP_WRITE = <0x00008000,0x000033FC,0x00000069>
+PP_WRITE = <0x00030A02,0x00010044,0x0000006A>
+PP_WRITE = <0x00030A00,0x00020044,0x0000006B>
+AND_VAL = <0xD428295C,0xFFFFFFF0> ;hwdfc to 533mbps
+OR_VAL = <0xD428295C,0x00000004>
+AND_VAL = <0xD42828B0,0xFFFFFF9F>
+OR_VAL = <0xD42828B0,0x01000000>
+WAIT_FOR_BIT_CLEAR = <0xD42828B0,0x01000000,0x00001000>
+End_Instructions
+END_Vendor_DDR_Initialization
+Vendor_DDR_Initialization
+DDR_PID = 0x0908
+DDROperations
+DDR_INIT_ENABLE = 0x00000001
+DDR_MEMTEST_ENABLE = 0x00000000
+End_DDROperations
+Instructions
+WRITE = <0xD428285C,0x0000000B> ;pull down usb dp/dm
+WRITE = <0xD4207094,0x0000E504> ;pull down usb dp/dm
+WRITE = <0xD42070A4,0x00005888> ;pull down usb dp/dm
+WRITE = <0xD420702C,0x00000000> ;suspend usb
+WRITE = <0xD4207028,0x00003000> ;suspend usb
+WRITE = <0xD4282948,0x4A200063>
+WRITE = <0xD428294C,0x29006000> ;PLL 1066
+WRITE = <0xD4282950,0x50C5000C>
+WRITE = <0xD428295C,0x00C20000>
+WAIT_FOR_BIT_SET = <0xD428295C,0x00400000,0x00001000>
+DELAY = <0x00001000> ;WAITING FOR DDR_VREF
+AND_VAL = <0xD428295C,0xFFFFFFF0>
+OR_VAL = <0xD428295C,0x00000004> ;set div4 533mbps
+OR_VAL = <0xD42828B0,0x02000000>
+WAIT_FOR_BIT_CLEAR = <0xD42828B0,0x02000000,0x00001000>
+WRITE = <0xD42828F4,0xC0000000>
+WRITE = <0xD42828F4,0xC0000003>
+WRITE = <0xD4282D18,0x33221133>
+WRITE = <0xC0100044,0x00030A00> ;MC_Control_0
+WRITE = <0xC0100048,0x00000001> ;MC_excu_en
+WRITE = <0xC010004C,0x00000000>
+WRITE = <0xC0100064,0x0A040502>
+WRITE = <0xC0100050,0x0007E2FF>
+WRITE = <0xC0100054,0x00000480>
+WRITE = <0xC0100058,0x10356285>
+WRITE = <0xC010005C,0x000494E4>
+WRITE = <0xC0100180,0x00030200>
+WRITE = <0xC0100200,0x000B0001> ;Memory Address Map Register Low CS0
+WRITE = <0xC0100204,0x00000000> ;Memory Address Map Register high CS0
+WRITE = <0xC0100220,0x04000332> ;Configuration Register CS0
+WRITE = <0xC01002C0,0x0000E000>
+WRITE = <0xC01002C4,0x00000098> ;MC_Control_2
+WRITE = <0xC0100304,0x50800400> ;DRAM Config 2 FSP WR FSP OP FSP=01
+WRITE = <0xC0100300,0x00000008> ;DRAM Config 1
+WRITE = <0xC010030C,0x00000000> ;no pre and post amble
+WRITE = <0xC0100310,0x00020000> ;drive strength 60ohm
+WRITE = <0xC010038C,0x001B0216> ;ZQC timing 0
+WRITE = <0xC0100390,0x003000C0> ;ZQC timing 1
+WRITE = <0xC0100394,0x004600CB> ;Refresh timing
+WRITE = <0xC0100398,0x01000100> ;SelfRefresh timing 0
+WRITE = <0xC010039C,0x00200808> ;SelfRefresh timing 1
+WRITE = <0xC01003A0,0x01080404> ;Power down timing 0
+WRITE = <0xC01003A4,0x00000001> ;Power down timing 1
+WRITE = <0xC01003A8,0x00000205> ;MRS timing
+WRITE = <0xC01003AC,0x1B200A17> ;ACT timing
+WRITE = <0xC01003B0,0x0C08040A> ;Pre-Charge timing
+WRITE = <0xC01003B4,0x02000400> ;CAS/RAS timing 0
+WRITE = <0xC01003B8,0x00010600> ;CAS/RAS timing 1
+WRITE = <0xC01003BC,0x02020404> ;Off-spec timing 0
+WRITE = <0xC01003C0,0x00000006> ;Off-spec timing 1
+WRITE = <0xC01003C4,0x00140A03> ;DRAM_read timing
+WRITE = <0xC01003D8,0x025A812D>
+WRITE = <0xC01003DC,0x41081239>
+WRITE = <0xC01003E0,0x00000605>
+WRITE = <0xC0100348,0x00000000>
+WRITE = <0xC010034C,0x00000000>
+WRITE = <0xC01013E4,0x05000300> ;MCK6 DFI phy ctrl register 1 (4to1)
+WRITE = <0xC01013EC,0x0000047E>
+WRITE = <0xC0100304,0x00800400> ;DRAM Config 2 FSP WR FSP OP FSP=00
+WRITE = <0xC0100300,0x00000004> ;DRAM Config 1
+WRITE = <0xC010030C,0x00000000>
+WRITE = <0xC0100310,0x00020000>
+WRITE = <0xC010038C,0x000A00C8> ;ZQC timing 0
+WRITE = <0xC0100390,0x00120048> ;ZQC timing 1
+WRITE = <0xC0100394,0x002300CB> ;Refresh timing
+WRITE = <0xC0100398,0x00260026> ;SelfRefresh timing 0
+WRITE = <0xC010039C,0x00200404> ;SelfRefresh timing 1
+WRITE = <0xC01003A0,0x01040202> ;Power down timing 0
+WRITE = <0xC01003A4,0x00000001> ;Power down timing 1
+WRITE = <0xC01003A8,0x00000205> ;MRS timing
+WRITE = <0xC01003AC,0x0E10050C> ;ACT timing
+WRITE = <0xC01003B0,0x06040205> ;Pre-Charge timing
+WRITE = <0xC01003B4,0x02000400> ;CAS/RAS timing 0
+WRITE = <0xC01003B8,0x00010200> ;CAS/RAS timing 1
+WRITE = <0xC01003BC,0x02020404> ;Off-spec timing 0
+WRITE = <0xC01003C0,0x00000006> ;Off-spec timing 1
+WRITE = <0xC01003C4,0x00140A01> ;DRAM_read timing
+WRITE = <0xC01003D8,0x025A812D>
+WRITE = <0xC01003DC,0x41081239>
+WRITE = <0xC01003E0,0x00000605>
+WRITE = <0xC0100348,0x00000000>
+WRITE = <0xC010034C,0x00000000>
+WRITE = <0xC01013E4,0x03000100> ;MCK6 DFI phy ctrl register 1 (1to1)
+WRITE = <0xC01013EC,0x0000047E>
+WRITE = <0xC0100304,0x00800400> ;CH0_DRAM_Config_2 select fp0
+WRITE = <0xC0100380,0x0001B207> ;DDR init timing Control 0
+WRITE = <0xC0100384,0x00000038> ;DDR init timing Control 1
+WRITE = <0xC0100388,0x000015B3> ;DDR init timing Control 2
+WRITE = <0xC01013E0,0x00000000> ;FSP_OP = 0
+WRITE = <0xC0143000,0x00000010> ;phy release and reset
+WRITE = <0xC0143000,0x00000011> ;phy release and reset
+WRITE = <0xC0150024,0x00000000>
+OR_VAL = <0xC0150024,0x00000032>
+WRITE = <0xC0140068,0x0000034A>
+WRITE = <0xC0144068,0x0000034A>
+WRITE = <0xC0140064,0x0000034A>
+WRITE = <0xC0144064,0x0000034A>
+WRITE = <0xC0143004,0x00000830>
+WRITE = <0xC0147004,0x00000830>
+WRITE = <0xC0143008,0x0024244B>
+WRITE = <0xC0147008,0x0024244B>
+WRITE = <0xC014300C,0x003636D4>
+WRITE = <0xC014700C,0x003636D4>
+WRITE = <0xC0143010,0x00020482>
+WRITE = <0xC0147010,0x00020482>
+WRITE = <0xC0143014,0x87000000>
+WRITE = <0xC0147014,0x87000000>
+WRITE = <0xC0143018,0x08454018>
+WRITE = <0xC0147018,0x08454018>
+WRITE = <0xC0143020,0x00001077>
+WRITE = <0xC015000C,0x0000010F>
+WRITE = <0xC0150010,0x0000010F>
+WRITE = <0xC0150014,0x0000010F>
+WRITE = <0xC0142028,0x0000000F>
+WRITE = <0xC014202C,0x0000000F>
+WRITE = <0xC0142030,0x0000000F>
+WRITE = <0xC0146028,0x0000000F>
+WRITE = <0xC014602C,0x0000000F>
+WRITE = <0xC0146030,0x0000000F>
+WRITE = <0xC0140060,0x000000FF>
+WRITE = <0xC0141060,0x000000FF>
+WRITE = <0xC0144060,0x000000FF>
+WRITE = <0xC0145060,0x000000FF>
+OR_VAL = <0xC0150000,0x00000001> ;HWDFC_EN
+WRITE = <0xC01013D0,0x11000001> ;MCK6 DFI phy user cmd
+WRITE = <0xD4050028,0x00001200>
+WRITE = <0xD4282CE8,0x00000053>
+WRITE = <0xD4282CE8,0x00000054>
+WRITE = <0xD4282CE8,0x00000053>
+WRITE = <0xD4282CE8,0x00000054>
+WRITE = <0xD4282CE8,0x00000053>
+WRITE = <0xD4282CE8,0x00000053>
+WRITE = <0xD4282CE8,0x00000063>
+WRITE = <0xD4282CE8,0x00000063>
+WRITE = <0xD4282CE8,0x00000064>
+WRITE = <0xD4282CE8,0x00000063>
+WRITE = <0xD4282CE8,0x00000064>
+WRITE = <0xD4282CE8,0x00000064>
+WRITE = <0xD4282CE8,0x00000073>
+WRITE = <0xD4282CE8,0x00000074>
+WRITE = <0xD4282CE8,0x00000074>
+WRITE = <0xD4282CE8,0x00000073>
+WRITE = <0xD4282CE8,0x00000080>
+WRITE = <0xD4282CE8,0x00000081>
+WRITE = <0xD4282CE8,0x00000082>
+WRITE = <0xD4282CE8,0x00000084>
+WRITE = <0xD4050028,0x00001300>
+WRITE = <0xC01013D0,0x11000100> ;MCK6 DFI phy user cmd
+WRITE = <0xC0100020,0x11000001>
+WAIT_FOR_BIT_SET = <0xC0100008,0x00000001,0x00001000>
+WRITE = <0xC0100020,0x11001000>
+WRITE = <0xC0100024,0x11020001>
+WRITE = <0xC0100024,0x11020002>
+WRITE = <0xC0100024,0x11020003>
+WRITE = <0xC01013D0,0x11100000> ;read gate training
+WAIT_FOR_BIT_SET = <0xC01013FC,0x00000006,0x00001000>
+WRITE = <0xC0100074,0x00030A03>
+WRITE = <0xC0100078,0x00000044>
+WRITE = <0xC0100070,0x00000000>
+WRITE = <0xC0100074,0x11000008>
+WRITE = <0xC0100078,0x00000020>
+WRITE = <0xC0100070,0x00000001>
+WRITE = <0xC0100074,0x00000004>
+WRITE = <0xC0100078,0x00002008>
+WRITE = <0xC0100070,0x00000002>
+WRITE = <0xC0100074,0x00000004>
+WRITE = <0xC0100078,0x00002008>
+WRITE = <0xC0100070,0x00000003>
+WRITE = <0xC0100074,0x11000001>
+WRITE = <0xC0100078,0x000013D0>
+WRITE = <0xC0100070,0x00000004>
+WRITE = <0xC0100074,0x00008000>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x00000005>
+WRITE = <0xC0100074,0x00000000>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x00000006>
+WRITE = <0xC0100074,0x00030A03>
+WRITE = <0xC0100078,0x00010044>
+WRITE = <0xC0100070,0x00000007>
+WRITE = <0xC0100074,0x11000100>
+WRITE = <0xC0100078,0x000013D0>
+WRITE = <0xC0100070,0x00000008>
+WRITE = <0xC0100074,0x00008000>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x00000009>
+WRITE = <0xC0100074,0x00008000>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x0000000A>
+WRITE = <0xC0100074,0x11000004>
+WRITE = <0xC0100078,0x00000020>
+WRITE = <0xC0100070,0x0000000B>
+WRITE = <0xC0100074,0x00030A02>
+WRITE = <0xC0100078,0x00010044>
+WRITE = <0xC0100070,0x0000000C>
+WRITE = <0xC0100074,0x11020001>
+WRITE = <0xC0100078,0x00000024>
+WRITE = <0xC0100070,0x0000000D>
+WRITE = <0xC0100074,0x11020002>
+WRITE = <0xC0100078,0x00000024>
+WRITE = <0xC0100070,0x0000000E>
+WRITE = <0xC0100074,0x11100000>
+WRITE = <0xC0100078,0x000013D0>
+WRITE = <0xC0100070,0x0000000F>
+WRITE = <0xC0100074,0x00000006>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x00000010>
+WRITE = <0xC0100074,0x00000006>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x00000011>
+WRITE = <0xC0100074,0x00030A00>
+WRITE = <0xC0100078,0x00020044>
+WRITE = <0xC0100070,0x00000012>
+AND_VAL = <0xD428295C,0xFFFFFFF0> ;hwdfc to 1066mbps
+OR_VAL = <0xD428295C,0x00000000>
+OR_VAL = <0xD42828B0,0x00000020>
+OR_VAL = <0xD42828B0,0x01000000>
+WAIT_FOR_BIT_CLEAR = <0xD42828B0,0x01000000,0x00001000>
+WRITE = <0xC01013D0,0x11100000> ;read gate training
+WAIT_FOR_BIT_SET = <0xC01013FC,0x00000002,0x00001000>
+WRITE = <0xC01013EC,0x00005070>
+WRITE = <0xC01013D0,0x11200000> ;read DQ training
+WAIT_FOR_BIT_SET = <0xC01013FC,0x00000006,0x00001000>
+WRITE = <0xC0143004,0x00000820>
+WRITE = <0xC0147004,0x00000820>
+PP_TABLEHEADER = <0xC0100074,0xC0100078,0xC0100070> ;DDR_TABLEHEADER FOR PRODUCT POINT
+PP_WRITE = <0x00030A03,0x00000044,0x00000060>
+PP_WRITE = <0x00000004,0x00002008,0x00000061>
+PP_WRITE = <0x00000004,0x00002008,0x00000062>
+PP_WRITE = <0x11000001,0x000013D0,0x00000063>
+PP_WRITE = <0x00008000,0x000033FC,0x00000064>
+PP_WRITE = <0x00000000,0x000033FC,0x00000065>
+PP_WRITE = <0x00030A03,0x00010044,0x00000066>
+PP_WRITE = <0x11000100,0x000013D0,0x00000067>
+PP_WRITE = <0x00008000,0x000033FC,0x00000068>
+PP_WRITE = <0x00008000,0x000033FC,0x00000069>
+PP_WRITE = <0x00030A02,0x00010044,0x0000006A>
+PP_WRITE = <0x00030A00,0x00020044,0x0000006B>
+AND_VAL = <0xD428295C,0xFFFFFFF0> ;hwdfc to 533mbps
+OR_VAL = <0xD428295C,0x00000004>
+AND_VAL = <0xD42828B0,0xFFFFFF9F>
+OR_VAL = <0xD42828B0,0x01000000>
+WAIT_FOR_BIT_CLEAR = <0xD42828B0,0x01000000,0x00001000>
+End_Instructions
+END_Vendor_DDR_Initialization
+Vendor_DDR_Initialization
+DDR_PID = 0x0920
+DDROperations
+DDR_INIT_ENABLE = 0x00000001
+DDR_MEMTEST_ENABLE = 0x00000000
+End_DDROperations
+Instructions
+WRITE = <0xD428285C,0x0000000B> ;pull down usb dp/dm
+WRITE = <0xD4207094,0x0000E504> ;pull down usb dp/dm
+WRITE = <0xD42070A4,0x00005888> ;pull down usb dp/dm
+WRITE = <0xD420702C,0x00000000> ;suspend usb
+WRITE = <0xD4207028,0x00003000> ;suspend usb
+WRITE = <0xD4282948,0x4A200063>
+WRITE = <0xD428294C,0x29006000> ;PLL 1066
+WRITE = <0xD4282950,0x50C5000C>
+WRITE = <0xD428295C,0x00C20000>
+WAIT_FOR_BIT_SET = <0xD428295C,0x00400000,0x00001000>
+DELAY = <0x00001000> ;WAITING FOR DDR_VREF
+AND_VAL = <0xD428295C,0xFFFFFFF0>
+OR_VAL = <0xD428295C,0x00000004> ;set div4 533mbps
+OR_VAL = <0xD42828B0,0x02000000>
+WAIT_FOR_BIT_CLEAR = <0xD42828B0,0x02000000,0x00001000>
+WRITE = <0xD42828F4,0xC0000000>
+WRITE = <0xD42828F4,0xC0000003>
+WRITE = <0xD4282D18,0x33221133>
+WRITE = <0xC0100044,0x00030A00> ;MC_Control_0
+WRITE = <0xC0100048,0x00000001> ;MC_excu_en
+WRITE = <0xC010004C,0x00000000>
+WRITE = <0xC0100064,0x0A040502>
+WRITE = <0xC0100050,0x0007E2FF>
+WRITE = <0xC0100054,0x00000480>
+WRITE = <0xC0100058,0x10356285>
+WRITE = <0xC010005C,0x000494E4>
+WRITE = <0xC0100180,0x00030200>
+WRITE = <0xC0100200,0x000C0001> ;Memory Address Map Register Low CS0
+WRITE = <0xC0100204,0x00000000> ;Memory Address Map Register high CS0
+WRITE = <0xC0100208,0x100C0001> ;Memory Address Map Register Low CS1
+WRITE = <0xC010020C,0x00000000> ;Memory Address Map Register High CS1
+WRITE = <0xC0100220,0x04000432> ;Configuration Register CS0
+WRITE = <0xC0100224,0x04000432> ;Configuration Register CS1
+WRITE = <0xC01002C0,0x0000E000>
+WRITE = <0xC01002C4,0x00000098> ;MC_Control_2
+WRITE = <0xC0100304,0x50800400> ;DRAM Config 2 FSP WR FSP OP FSP=01
+WRITE = <0xC0100300,0x00000008> ;DRAM Config 1
+WRITE = <0xC010030C,0x00000000> ;no pre and post amble
+WRITE = <0xC0100310,0x00020000> ;drive strength 40ohm
+WRITE = <0xC0100314,0x00020000> ;drive strength 40ohm
+WRITE = <0xC010038C,0x001B0216> ;ZQC timing 0
+WRITE = <0xC0100390,0x003000C0> ;ZQC timing 1
+WRITE = <0xC0100394,0x00460065> ;Refresh timing
+WRITE = <0xC0100398,0x01000100> ;SelfRefresh timing 0
+WRITE = <0xC010039C,0x00200808> ;SelfRefresh timing 1
+WRITE = <0xC01003A0,0x01080404> ;Power down timing 0
+WRITE = <0xC01003A4,0x00000001> ;Power down timing 1
+WRITE = <0xC01003A8,0x00000205> ;MRS timing
+WRITE = <0xC01003AC,0x1B200A17> ;ACT timing
+WRITE = <0xC01003B0,0x0C08040A> ;Pre-Charge timing
+WRITE = <0xC01003B4,0x02000400> ;CAS/RAS timing 0
+WRITE = <0xC01003B8,0x00010600> ;CAS/RAS timing 1
+WRITE = <0xC01003BC,0x02020404> ;Off-spec timing 0
+WRITE = <0xC01003C0,0x00000006> ;Off-spec timing 1
+WRITE = <0xC01003C4,0x00140A03> ;DRAM_read timing
+WRITE = <0xC01003D8,0x025A812D>
+WRITE = <0xC01003DC,0x41081239>
+WRITE = <0xC01003E0,0x00000605>
+WRITE = <0xC0100348,0x00000000>
+WRITE = <0xC010034C,0x00000000>
+WRITE = <0xC01013E4,0x05000300> ;MCK6 DFI phy ctrl register 1 (4to1)
+WRITE = <0xC01013EC,0x0000047E>
+WRITE = <0xC0100304,0x00800400> ;DRAM Config 2 FSP WR FSP OP FSP=00
+WRITE = <0xC0100300,0x00000004> ;DRAM Config 1
+WRITE = <0xC010030C,0x00000000>
+WRITE = <0xC0100310,0x00020000>
+WRITE = <0xC0100314,0x00020000>
+WRITE = <0xC010038C,0x000A00C8> ;ZQC timing 0
+WRITE = <0xC0100390,0x00120048> ;ZQC timing 1
+WRITE = <0xC0100394,0x00230065> ;Refresh timing
+WRITE = <0xC0100398,0x01000100> ;SelfRefresh timing 0
+WRITE = <0xC010039C,0x00200404> ;SelfRefresh timing 1
+WRITE = <0xC01003A0,0x01040202> ;Power down timing 0
+WRITE = <0xC01003A4,0x00000001> ;Power down timing 1
+WRITE = <0xC01003A8,0x00000205> ;MRS timing
+WRITE = <0xC01003AC,0x0E10050C> ;ACT timing
+WRITE = <0xC01003B0,0x06040205> ;Pre-Charge timing
+WRITE = <0xC01003B4,0x02000400> ;CAS/RAS timing 0
+WRITE = <0xC01003B8,0x00010200> ;CAS/RAS timing 1
+WRITE = <0xC01003BC,0x02020404> ;Off-spec timing 0
+WRITE = <0xC01003C0,0x00000006> ;Off-spec timing 1
+WRITE = <0xC01003C4,0x00140A01> ;DRAM_read timing
+WRITE = <0xC01003D8,0x025A812D>
+WRITE = <0xC01003DC,0x41081239>
+WRITE = <0xC01003E0,0x00000605>
+WRITE = <0xC0100348,0x00000000>
+WRITE = <0xC010034C,0x00000000>
+WRITE = <0xC01013E4,0x03000100> ;MCK6 DFI phy ctrl register 1 (1to1)
+WRITE = <0xC01013EC,0x0000047E>
+WRITE = <0xC0100304,0x00800400> ;CH0_DRAM_Config_2 select fp0
+WRITE = <0xC0100380,0x0001B207> ;DDR init timing Control 0
+WRITE = <0xC0100384,0x00000038> ;DDR init timing Control 1
+WRITE = <0xC0100388,0x000015B3> ;DDR init timing Control 2
+WRITE = <0xC01013E0,0x00000000> ;FSP_OP = 0
+WRITE = <0xC0143000,0x00000010> ;phy release and reset
+WRITE = <0xC0143000,0x00000011> ;phy release and reset
+WRITE = <0xC0150024,0x00000000>
+OR_VAL = <0xC0150024,0x00000032>
+WRITE = <0xC0140068,0x0000034A>
+WRITE = <0xC0144068,0x0000034A>
+WRITE = <0xC0140064,0x0000034A>
+WRITE = <0xC0144064,0x0000034A>
+WRITE = <0xC0143004,0x00000830>
+WRITE = <0xC0147004,0x00000830>
+WRITE = <0xC0143008,0x0024244B>
+WRITE = <0xC0147008,0x0024244B>
+WRITE = <0xC014300C,0x003636D4>
+WRITE = <0xC014700C,0x003636D4>
+WRITE = <0xC0143010,0x00020482>
+WRITE = <0xC0147010,0x00020482>
+WRITE = <0xC0143014,0x87000000>
+WRITE = <0xC0147014,0x87000000>
+WRITE = <0xC0143018,0x08454018>
+WRITE = <0xC0147018,0x08454018>
+WRITE = <0xC0143020,0x00001077>
+WRITE = <0xC015000C,0x0000010F>
+WRITE = <0xC0150010,0x0000010F>
+WRITE = <0xC0150014,0x0000010F>
+WRITE = <0xC0142028,0x0000000F>
+WRITE = <0xC014202C,0x0000000F>
+WRITE = <0xC0142128,0x0000000F>
+WRITE = <0xC014212C,0x0000000F>
+WRITE = <0xC0142030,0x0000000F>
+WRITE = <0xC0146028,0x0000000F>
+WRITE = <0xC014602C,0x0000000F>
+WRITE = <0xC0146128,0x0000000F>
+WRITE = <0xC014612C,0x0000000F>
+WRITE = <0xC0146030,0x0000000F>
+WRITE = <0xC0140060,0x000000FF>
+WRITE = <0xC0141060,0x000000FF>
+WRITE = <0xC0144060,0x000000FF>
+WRITE = <0xC0145060,0x000000FF>
+OR_VAL = <0xC0150000,0x00000001> ;HWDFC_EN
+WRITE = <0xC01013D0,0x13000001> ;MCK6 DFI phy user cmd
+WRITE = <0xD4050028,0x00001200>
+WRITE = <0xD4282CE8,0x00000053>
+WRITE = <0xD4282CE8,0x00000054>
+WRITE = <0xD4282CE8,0x00000053>
+WRITE = <0xD4282CE8,0x00000054>
+WRITE = <0xD4282CE8,0x00000053>
+WRITE = <0xD4282CE8,0x00000053>
+WRITE = <0xD4282CE8,0x00000063>
+WRITE = <0xD4282CE8,0x00000063>
+WRITE = <0xD4282CE8,0x00000064>
+WRITE = <0xD4282CE8,0x00000063>
+WRITE = <0xD4282CE8,0x00000064>
+WRITE = <0xD4282CE8,0x00000064>
+WRITE = <0xD4282CE8,0x00000073>
+WRITE = <0xD4282CE8,0x00000074>
+WRITE = <0xD4282CE8,0x00000074>
+WRITE = <0xD4282CE8,0x00000073>
+WRITE = <0xD4282CE8,0x00000080>
+WRITE = <0xD4282CE8,0x00000081>
+WRITE = <0xD4282CE8,0x00000082>
+WRITE = <0xD4282CE8,0x00000084>
+WRITE = <0xD4050028,0x00001300>
+WRITE = <0xC01013D0,0x13000100> ;MCK6 DFI phy user cmd
+WRITE = <0xC0100020,0x13000001>
+WAIT_FOR_BIT_SET = <0xC0100008,0x00000011,0x00001000>
+WRITE = <0xC0100020,0x11001000>
+WRITE = <0xC0100020,0x12001000>
+WRITE = <0xC0100024,0x13020001>
+WRITE = <0xC0100024,0x13020002>
+WRITE = <0xC0100024,0x13020003>
+WRITE = <0xC01013D0,0x11100000> ;read gate training
+WAIT_FOR_BIT_SET = <0xC01013FC,0x00000006,0x00001000>
+WRITE = <0xC01013D0,0x12100000> ;read gate training cs1
+WAIT_FOR_BIT_SET = <0xC01013FC,0x00000006,0x00001000>
+WRITE = <0xC0100074,0x00030A03>
+WRITE = <0xC0100078,0x00000044>
+WRITE = <0xC0100070,0x00000000>
+WRITE = <0xC0100074,0x13000008>
+WRITE = <0xC0100078,0x00000020>
+WRITE = <0xC0100070,0x00000001>
+WRITE = <0xC0100074,0x00000004>
+WRITE = <0xC0100078,0x00002008>
+WRITE = <0xC0100070,0x00000002>
+WRITE = <0xC0100074,0x00000004>
+WRITE = <0xC0100078,0x00002008>
+WRITE = <0xC0100070,0x00000003>
+WRITE = <0xC0100074,0x13000001>
+WRITE = <0xC0100078,0x000013D0>
+WRITE = <0xC0100070,0x00000004>
+WRITE = <0xC0100074,0x00008000>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x00000005>
+WRITE = <0xC0100074,0x00000000>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x00000006>
+WRITE = <0xC0100074,0x00030A03>
+WRITE = <0xC0100078,0x00010044>
+WRITE = <0xC0100070,0x00000007>
+WRITE = <0xC0100074,0x13000100>
+WRITE = <0xC0100078,0x000013D0>
+WRITE = <0xC0100070,0x00000008>
+WRITE = <0xC0100074,0x00008000>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x00000009>
+WRITE = <0xC0100074,0x00008000>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x0000000A>
+WRITE = <0xC0100074,0x13000004>
+WRITE = <0xC0100078,0x00000020>
+WRITE = <0xC0100070,0x0000000B>
+WRITE = <0xC0100074,0x00030A02>
+WRITE = <0xC0100078,0x00010044>
+WRITE = <0xC0100070,0x0000000C>
+WRITE = <0xC0100074,0x13020001>
+WRITE = <0xC0100078,0x00000024>
+WRITE = <0xC0100070,0x0000000D>
+WRITE = <0xC0100074,0x13020002>
+WRITE = <0xC0100078,0x00000024>
+WRITE = <0xC0100070,0x0000000E>
+WRITE = <0xC0100074,0x11100000>
+WRITE = <0xC0100078,0x000013D0>
+WRITE = <0xC0100070,0x0000000F>
+WRITE = <0xC0100074,0x00000006>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x00000010>
+WRITE = <0xC0100074,0x00000006>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x00000011>
+WRITE = <0xC0100074,0x12100000>
+WRITE = <0xC0100078,0x000013D0>
+WRITE = <0xC0100070,0x00000012>
+WRITE = <0xC0100074,0x00000006>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x00000013>
+WRITE = <0xC0100074,0x00000006>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x00000014>
+WRITE = <0xC0100074,0x00030A00>
+WRITE = <0xC0100078,0x00020044>
+WRITE = <0xC0100070,0x00000015>
+AND_VAL = <0xD428295C,0xFFFFFFF0> ;hwdfc to 1066mbps
+OR_VAL = <0xD428295C,0x00000000>
+OR_VAL = <0xD42828B0,0x00000020>
+OR_VAL = <0xD42828B0,0x01000000>
+WAIT_FOR_BIT_CLEAR = <0xD42828B0,0x01000000,0x00001000>
+WRITE = <0xC01013D0,0x11100000> ;read gate training
+WAIT_FOR_BIT_SET = <0xC01013FC,0x00000002,0x00001000>
+WRITE = <0xC01013D0,0x12100000> ;read gate training cs1
+WAIT_FOR_BIT_SET = <0xC01013FC,0x00000006,0x00001000>
+WRITE = <0xC01013EC,0x00005070>
+WRITE = <0xC01013D0,0x11200000> ;read DQ training CS0
+WAIT_FOR_BIT_SET = <0xC01013FC,0x00000006,0x00001000>
+WRITE = <0xC01013D0,0x12200000> ;read DQ training CS1
+WAIT_FOR_BIT_SET = <0xC01013FC,0x00000006,0x00001000>
+WRITE = <0xC0143004,0x00000820>
+WRITE = <0xC0147004,0x00000820>
+PP_TABLEHEADER = <0xC0100074,0xC0100078,0xC0100070> ;DDR_TABLEHEADER FOR PRODUCT POINT
+PP_WRITE = <0x00030A03,0x00000044,0x00000060>
+PP_WRITE = <0x00000004,0x00002008,0x00000061>
+PP_WRITE = <0x00000004,0x00002008,0x00000062>
+PP_WRITE = <0x13000001,0x000013D0,0x00000063>
+PP_WRITE = <0x00008000,0x000033FC,0x00000064>
+PP_WRITE = <0x00000000,0x000033FC,0x00000065>
+PP_WRITE = <0x00030A03,0x00010044,0x00000066>
+PP_WRITE = <0x13000100,0x000013D0,0x00000067>
+PP_WRITE = <0x00008000,0x000033FC,0x00000068>
+PP_WRITE = <0x00008000,0x000033FC,0x00000069>
+PP_WRITE = <0x00030A02,0x00010044,0x0000006A>
+PP_WRITE = <0x00030A00,0x00020044,0x0000006B>
+AND_VAL = <0xD428295C,0xFFFFFFF0> ;hwdfc to 533mbps
+OR_VAL = <0xD428295C,0x00000004>
+AND_VAL = <0xD42828B0,0xFFFFFF9F>
+OR_VAL = <0xD42828B0,0x01000000>
+WAIT_FOR_BIT_CLEAR = <0xD42828B0,0x01000000,0x00001000>
+End_Instructions
+END_Vendor_DDR_Initialization
+End_Extended_Reserved_Data
+[Digital_Signature_Data]
+Hash_Algorithm_ID = SHA-256
+DSA_Algorithm = PKCS1_v1_5_Ippcp
+Key_Size_in_bits = 2048
+RSA_Public_Exponent
+#1 = 0x00010001
+End_RSA_Public_Exponent
+RSA_System_Modulus
+#1 = 0x6FBF41D3
+#2 = 0xD44FB898
+#3 = 0x21DE078D
+#4 = 0xEFB78E8F
+#5 = 0xC5298E97
+#6 = 0x22ABE9A0
+#7 = 0x1C63458B
+#8 = 0x8AA1D6FC
+#9 = 0x318F685A
+#10 = 0x52A89FAF
+#11 = 0x81344866
+#12 = 0xC46573E0
+#13 = 0xA4B3D480
+#14 = 0xED99FF25
+#15 = 0x7AD034BE
+#16 = 0x73B0A519
+#17 = 0xA84248EF
+#18 = 0xB11B6453
+#19 = 0x6CCEFD52
+#20 = 0x0DC0822A
+#21 = 0xBA097020
+#22 = 0x44BD419A
+#23 = 0x541631FD
+#24 = 0xA416446A
+#25 = 0xD8EDF562
+#26 = 0x6A7D7908
+#27 = 0xB63082B3
+#28 = 0xABC1BB22
+#29 = 0x8ECD26A9
+#30 = 0x15B94D71
+#31 = 0x84DF5891
+#32 = 0x06030D4A
+#33 = 0x43463E36
+#34 = 0x164BD297
+#35 = 0x4709E5B0
+#36 = 0xCBB729A1
+#37 = 0x6D8BF791
+#38 = 0x15E7A39E
+#39 = 0xFA1117D0
+#40 = 0x37B38446
+#41 = 0xFE098FCF
+#42 = 0x84FF267E
+#43 = 0xAE18EAB7
+#44 = 0x61F99674
+#45 = 0x0889DD38
+#46 = 0x067A6900
+#47 = 0x7EAE4902
+#48 = 0xD55422D5
+#49 = 0x42802E82
+#50 = 0xD77F24B0
+#51 = 0x343A99A5
+#52 = 0xA3C07AE1
+#53 = 0xB86DFD10
+#54 = 0x5607BCE2
+#55 = 0x27DF1B5A
+#56 = 0xD51E44C1
+#57 = 0xC83A9377
+#58 = 0xCD020D24
+#59 = 0x6FA88487
+#60 = 0x198E2155
+#61 = 0x03B146C5
+#62 = 0xC235D791
+#63 = 0x71B9A0CB
+#64 = 0xCEBC88DC
+End_RSA_System_Modulus
+RSA_Private_Key
+#1 = 0x3D9556F1
+#2 = 0x2C27D30C
+#3 = 0x96DDFB2E
+#4 = 0xEE7E422C
+#5 = 0x94AF9CA4
+#6 = 0xE0BFD2EF
+#7 = 0x76EC12B1
+#8 = 0xB6230C1E
+#9 = 0xC987309E
+#10 = 0x0C0B98CB
+#11 = 0x17BCE9E1
+#12 = 0x81166311
+#13 = 0x9A5F8939
+#14 = 0xC3D763BB
+#15 = 0x4C17F7BC
+#16 = 0x18C52275
+#17 = 0x61481004
+#18 = 0x5C14BF73
+#19 = 0xD7CC938C
+#20 = 0xCE3FBE11
+#21 = 0x0582DD24
+#22 = 0x79D41648
+#23 = 0x33F9BFA7
+#24 = 0x9787518F
+#25 = 0xB5CC4112
+#26 = 0xA2DEB689
+#27 = 0x2A8DF640
+#28 = 0x4155C95C
+#29 = 0x82A0BE6A
+#30 = 0x48EEF12A
+#31 = 0xC3353096
+#32 = 0x8FAD2FE4
+#33 = 0x37B58155
+#34 = 0xDB9BE52B
+#35 = 0x51A13735
+#36 = 0xA0124F54
+#37 = 0xAC969F2E
+#38 = 0xD7DE2BA5
+#39 = 0xB4F69258
+#40 = 0x3DCD0C3B
+#41 = 0x79E67328
+#42 = 0x118B7F74
+#43 = 0x62CB129C
+#44 = 0xCDB75F7C
+#45 = 0xE495E995
+#46 = 0xE1C03125
+#47 = 0xDD2A41D9
+#48 = 0xED1BFD48
+#49 = 0xDE4876D7
+#50 = 0x9BC9FE92
+#51 = 0xE3FB477A
+#52 = 0xCE5AE170
+#53 = 0x84E5A9D5
+#54 = 0xBA04DC21
+#55 = 0x633581F2
+#56 = 0x99048745
+#57 = 0x13A86A34
+#58 = 0x1EB982EA
+#59 = 0x8AB25907
+#60 = 0xF42F7525
+#61 = 0xE5CB44CB
+#62 = 0x1BE9E44A
+#63 = 0xEE0A3107
+#64 = 0xBB3EABBE
+End_RSA_Private_Key
+End_Digital_Signature_Data
+[DTIM_Keys_Data]
+Hash_Algorithm_ID = SHA-256
+DSA_Algorithm = PKCS1_v1_5_Ippcp
+Key_Size_in_bits = 2048
+RSA_Public_Exponent
+#1 = 0x00010001
+End_RSA_Public_Exponent
+RSA_System_Modulus
+#1 = 0x6FBF41D3
+#2 = 0xD44FB898
+#3 = 0x21DE078D
+#4 = 0xEFB78E8F
+#5 = 0xC5298E97
+#6 = 0x22ABE9A0
+#7 = 0x1C63458B
+#8 = 0x8AA1D6FC
+#9 = 0x318F685A
+#10 = 0x52A89FAF
+#11 = 0x81344866
+#12 = 0xC46573E0
+#13 = 0xA4B3D480
+#14 = 0xED99FF25
+#15 = 0x7AD034BE
+#16 = 0x73B0A519
+#17 = 0xA84248EF
+#18 = 0xB11B6453
+#19 = 0x6CCEFD52
+#20 = 0x0DC0822A
+#21 = 0xBA097020
+#22 = 0x44BD419A
+#23 = 0x541631FD
+#24 = 0xA416446A
+#25 = 0xD8EDF562
+#26 = 0x6A7D7908
+#27 = 0xB63082B3
+#28 = 0xABC1BB22
+#29 = 0x8ECD26A9
+#30 = 0x15B94D71
+#31 = 0x84DF5891
+#32 = 0x06030D4A
+#33 = 0x43463E36
+#34 = 0x164BD297
+#35 = 0x4709E5B0
+#36 = 0xCBB729A1
+#37 = 0x6D8BF791
+#38 = 0x15E7A39E
+#39 = 0xFA1117D0
+#40 = 0x37B38446
+#41 = 0xFE098FCF
+#42 = 0x84FF267E
+#43 = 0xAE18EAB7
+#44 = 0x61F99674
+#45 = 0x0889DD38
+#46 = 0x067A6900
+#47 = 0x7EAE4902
+#48 = 0xD55422D5
+#49 = 0x42802E82
+#50 = 0xD77F24B0
+#51 = 0x343A99A5
+#52 = 0xA3C07AE1
+#53 = 0xB86DFD10
+#54 = 0x5607BCE2
+#55 = 0x27DF1B5A
+#56 = 0xD51E44C1
+#57 = 0xC83A9377
+#58 = 0xCD020D24
+#59 = 0x6FA88487
+#60 = 0x198E2155
+#61 = 0x03B146C5
+#62 = 0xC235D791
+#63 = 0x71B9A0CB
+#64 = 0xCEBC88DC
+End_RSA_System_Modulus
+RSA_Private_Key
+#1 = 0x3D9556F1
+#2 = 0x2C27D30C
+#3 = 0x96DDFB2E
+#4 = 0xEE7E422C
+#5 = 0x94AF9CA4
+#6 = 0xE0BFD2EF
+#7 = 0x76EC12B1
+#8 = 0xB6230C1E
+#9 = 0xC987309E
+#10 = 0x0C0B98CB
+#11 = 0x17BCE9E1
+#12 = 0x81166311
+#13 = 0x9A5F8939
+#14 = 0xC3D763BB
+#15 = 0x4C17F7BC
+#16 = 0x18C52275
+#17 = 0x61481004
+#18 = 0x5C14BF73
+#19 = 0xD7CC938C
+#20 = 0xCE3FBE11
+#21 = 0x0582DD24
+#22 = 0x79D41648
+#23 = 0x33F9BFA7
+#24 = 0x9787518F
+#25 = 0xB5CC4112
+#26 = 0xA2DEB689
+#27 = 0x2A8DF640
+#28 = 0x4155C95C
+#29 = 0x82A0BE6A
+#30 = 0x48EEF12A
+#31 = 0xC3353096
+#32 = 0x8FAD2FE4
+#33 = 0x37B58155
+#34 = 0xDB9BE52B
+#35 = 0x51A13735
+#36 = 0xA0124F54
+#37 = 0xAC969F2E
+#38 = 0xD7DE2BA5
+#39 = 0xB4F69258
+#40 = 0x3DCD0C3B
+#41 = 0x79E67328
+#42 = 0x118B7F74
+#43 = 0x62CB129C
+#44 = 0xCDB75F7C
+#45 = 0xE495E995
+#46 = 0xE1C03125
+#47 = 0xDD2A41D9
+#48 = 0xED1BFD48
+#49 = 0xDE4876D7
+#50 = 0x9BC9FE92
+#51 = 0xE3FB477A
+#52 = 0xCE5AE170
+#53 = 0x84E5A9D5
+#54 = 0xBA04DC21
+#55 = 0x633581F2
+#56 = 0x99048745
+#57 = 0x13A86A34
+#58 = 0x1EB982EA
+#59 = 0x8AB25907
+#60 = 0xF42F7525
+#61 = 0xE5CB44CB
+#62 = 0x1BE9E44A
+#63 = 0xEE0A3107
+#64 = 0xBB3EABBE
+End_RSA_Private_Key
+End_DTIM_Keys_Data
+[Image_List]
+1_Image_Enable = 1
+1_Image_Tim_Included = 1
+1_Image_Image_ID = 0x54494D48
+1_Image_Next_Image_ID = 0x54494D48
+1_Image_Path = tim_fact_qspinand.bin
+1_Image_Flash_Entry_Address = 0x00000000
+1_Image_Load_Address = 0xD1000000
+1_Image_Type = RAW
+1_Image_ID_Name = TIMH
+1_Image_Erase_Size =
+1_Image_Partition_Number = 0
+1_Image_Hash_Algorithm_ID = SHA-256
+1_Image_Image_Size_To_Hash_in_bytes = 0xFFFFFFFF
+2_Image_Enable = 1
+2_Image_Tim_Included = 5
+2_Image_Image_ID = 0x54494D48
+2_Image_Next_Image_ID = 0x4F424D49
+2_Image_Path = tim_fact_qspinand2.bin
+2_Image_Flash_Entry_Address = 0x00040000
+2_Image_Load_Address = 0xD1000000
+2_Image_Type = RAW
+2_Image_ID_Name = TIMH
+2_Image_Erase_Size =
+2_Image_Partition_Number = 0
+2_Image_Hash_Algorithm_ID = SHA-256
+2_Image_Image_Size_To_Hash_in_bytes = 0xFFFFFFFF
+3_Image_Enable = 1
+3_Image_Tim_Included = 1
+3_Image_Image_ID = 0x4F424D49
+3_Image_Next_Image_ID = 0x4F424D49
+3_Image_Path = asr1806_TLoader_QSPINAND.bin
+3_Image_Flash_Entry_Address = 0x00080000
+3_Image_Load_Address = 0x003C8000
+3_Image_Type = RAW
+3_Image_ID_Name = OBMI
+3_Image_Erase_Size =
+3_Image_Partition_Number = 0
+3_Image_Hash_Algorithm_ID = SHA-256
+3_Image_Image_Size_To_Hash_in_bytes = 0xFFFFFFFF
+4_Image_Enable = 1
+4_Image_Tim_Included = 5
+4_Image_Image_ID = 0x4F424D49
+4_Image_Next_Image_ID = 0x4350524C
+4_Image_Path = asr1806_TLoader_QSPINAND.bin
+4_Image_Flash_Entry_Address = 0x000C0000
+4_Image_Load_Address = 0x003C8000
+4_Image_Type = RAW
+4_Image_ID_Name = OBMI
+4_Image_Erase_Size =
+4_Image_Partition_Number = 0
+4_Image_Hash_Algorithm_ID = SHA-256
+4_Image_Image_Size_To_Hash_in_bytes = 0xFFFFFFFF
+5_Image_Enable = 0
+5_Image_Tim_Included = 0
+5_Image_Image_ID = 0x4350524C
+5_Image_Next_Image_ID = 0x4150524C
+5_Image_Path = asr1806_CP_ReliableData_CMCC.bin
+5_Image_Flash_Entry_Address = 0x00140000
+5_Image_Load_Address = 0xFFFFFFFF
+5_Image_Type = RAW
+5_Image_ID_Name = CPRL
+5_Image_Erase_Size =
+5_Image_Partition_Number = 0
+5_Image_Hash_Algorithm_ID =
+5_Image_Image_Size_To_Hash_in_bytes =
+6_Image_Enable = 1
+6_Image_Tim_Included = 0
+6_Image_Image_ID = 0x4150524C
+6_Image_Next_Image_ID = 0x4342524C
+6_Image_Path = asr1806_AP_ReliableData.bin
+6_Image_Flash_Entry_Address = 0x00180000
+6_Image_Load_Address = 0xFFFFFFFF
+6_Image_Type = RAW
+6_Image_ID_Name = APRL
+6_Image_Erase_Size =
+6_Image_Partition_Number = 0
+6_Image_Hash_Algorithm_ID =
+6_Image_Image_Size_To_Hash_in_bytes =
+7_Image_Enable = 0
+7_Image_Tim_Included = 0
+7_Image_Image_ID = 0x4342524C
+7_Image_Next_Image_ID = 0x4142524C
+7_Image_Path = asr1806_CP_ReliableData_CMCC.bin
+7_Image_Flash_Entry_Address = 0x001C0000
+7_Image_Load_Address = 0xFFFFFFFF
+7_Image_Type = RAW
+7_Image_ID_Name = CBRL
+7_Image_Erase_Size =
+7_Image_Partition_Number = 0
+7_Image_Hash_Algorithm_ID =
+7_Image_Image_Size_To_Hash_in_bytes =
+8_Image_Enable = 1
+8_Image_Tim_Included = 0
+8_Image_Image_ID = 0x4142524C
+8_Image_Next_Image_ID = 0x52464249
+8_Image_Path = asr1806_AP_ReliableData.bin
+8_Image_Flash_Entry_Address = 0x00200000
+8_Image_Load_Address = 0xFFFFFFFF
+8_Image_Type = RAW
+8_Image_ID_Name = ABRL
+8_Image_Erase_Size =
+8_Image_Partition_Number = 0
+8_Image_Hash_Algorithm_ID =
+8_Image_Image_Size_To_Hash_in_bytes =
+9_Image_Enable = 1
+9_Image_Tim_Included = 2
+9_Image_Image_ID = 0x52464249
+9_Image_Next_Image_ID = 0x47524249
+9_Image_Path = asr1806_RFPLUGIN.bin
+9_Image_Flash_Entry_Address = 0x005C0000
+9_Image_Load_Address = 0xFFFFFFFF
+9_Image_Type = RAW
+9_Image_ID_Name = RFBI
+9_Image_Erase_Size =
+9_Image_Partition_Number = 0
+9_Image_Hash_Algorithm_ID = SHA-256
+9_Image_Image_Size_To_Hash_in_bytes = 0xFFFFFFFF
+9_Image_Stim_Size = 0x1000
+10_Image_Enable = 1
+10_Image_Tim_Included = 2
+10_Image_Image_ID = 0x47524249
+10_Image_Next_Image_ID = 0x41524249
+10_Image_Path = asr1806_MSA.bin
+10_Image_Flash_Entry_Address = 0x00640000
+10_Image_Load_Address = 0xFFFFFFFF
+10_Image_Type = RAW
+10_Image_ID_Name = GRBI
+10_Image_Erase_Size =
+10_Image_Partition_Number = 0
+10_Image_Hash_Algorithm_ID = SHA-256
+10_Image_Image_Size_To_Hash_in_bytes = 0xFFFFFFFF
+10_Image_Stim_Size = 0x1000
+11_Image_Enable = 1
+11_Image_Tim_Included = 2
+11_Image_Image_ID = 0x41524249
+11_Image_Next_Image_ID = 0x52464249
+11_Image_Path = asr1806_ARBEL.bin
+11_Image_Flash_Entry_Address = 0x00C40000
+11_Image_Load_Address = 0xFFFFFFFF
+11_Image_Type = RAW
+11_Image_ID_Name = ARBI
+11_Image_Erase_Size =
+11_Image_Partition_Number = 0
+11_Image_Hash_Algorithm_ID = SHA-256
+11_Image_Image_Size_To_Hash_in_bytes = 0xFFFFFFFF
+11_Image_Stim_Size = 0x1000
+12_Image_Enable = 1
+12_Image_Tim_Included = 3
+12_Image_Image_ID = 0x52464249
+12_Image_Next_Image_ID = 0x47524249
+12_Image_Path = asr1806_RFPLUGIN.bin
+12_Image_Flash_Entry_Address = 0x02180000
+12_Image_Load_Address = 0xFFFFFFFF
+12_Image_Type = RAW
+12_Image_ID_Name = RFBI
+12_Image_Erase_Size =
+12_Image_Partition_Number = 0
+12_Image_Hash_Algorithm_ID = SHA-256
+12_Image_Image_Size_To_Hash_in_bytes = 0xFFFFFFFF
+12_Image_Stim_Size = 0x1000
+13_Image_Enable = 1
+13_Image_Tim_Included = 3
+13_Image_Image_ID = 0x47524249
+13_Image_Next_Image_ID = 0x41524249
+13_Image_Path = asr1806_MSA.bin
+13_Image_Flash_Entry_Address = 0x02200000
+13_Image_Load_Address = 0xFFFFFFFF
+13_Image_Type = RAW
+13_Image_ID_Name = GRBI
+13_Image_Erase_Size =
+13_Image_Partition_Number = 0
+13_Image_Hash_Algorithm_ID = SHA-256
+13_Image_Image_Size_To_Hash_in_bytes = 0xFFFFFFFF
+13_Image_Stim_Size = 0x1000
+14_Image_Enable = 1
+14_Image_Tim_Included = 3
+14_Image_Image_ID = 0x41524249
+14_Image_Next_Image_ID = 0x4F534C4F
+14_Image_Path = asr1806_ARBEL.bin
+14_Image_Flash_Entry_Address = 0x02800000
+14_Image_Load_Address = 0xFFFFFFFF
+14_Image_Type = RAW
+14_Image_ID_Name = ARBI
+14_Image_Erase_Size =
+14_Image_Partition_Number = 0
+14_Image_Hash_Algorithm_ID = SHA-256
+14_Image_Image_Size_To_Hash_in_bytes = 0xFFFFFFFF
+14_Image_Stim_Size = 0x1000
+15_Image_Enable = 1
+15_Image_Tim_Included = 2
+15_Image_Image_ID = 0x4F534C4F
+15_Image_Next_Image_ID = 0x4F534C4F
+15_Image_Path = openwrt-mmp-asr1806-u-boot.bin
+15_Image_Flash_Entry_Address = 0x03D40000
+15_Image_Load_Address = 0x00308000
+15_Image_Type = RAW
+15_Image_ID_Name = OSLO
+15_Image_Erase_Size =
+15_Image_Partition_Number = 0
+15_Image_Hash_Algorithm_ID = SHA-256
+15_Image_Image_Size_To_Hash_in_bytes = 0xFFFFFFFF
+15_Image_Stim_Size = 0x1000
+16_Image_Enable = 1
+16_Image_Tim_Included = 3
+16_Image_Image_ID = 0x4F534C4F
+16_Image_Next_Image_ID = 0x5A494D47
+16_Image_Path = openwrt-mmp-asr1806-u-boot.bin
+16_Image_Flash_Entry_Address = 0x03EC0000
+16_Image_Load_Address = 0x00308000
+16_Image_Type = RAW
+16_Image_ID_Name = OSLO
+16_Image_Erase_Size =
+16_Image_Partition_Number = 0
+16_Image_Hash_Algorithm_ID = SHA-256
+16_Image_Image_Size_To_Hash_in_bytes = 0xFFFFFFFF
+16_Image_Stim_Size = 0x1000
+17_Image_Enable = 1
+17_Image_Tim_Included = 2
+17_Image_Image_ID = 0x5A494D47
+17_Image_Next_Image_ID = 0x5A494D47
+17_Image_Path = openwrt-mmp-asr1806-zImage
+17_Image_Flash_Entry_Address = 0x04040000
+17_Image_Load_Address = 0xFFFFFFFF
+17_Image_Type = RAW
+17_Image_ID_Name = ZIMG
+17_Image_Erase_Size =
+17_Image_Partition_Number = 0
+17_Image_Hash_Algorithm_ID = SHA-256
+17_Image_Image_Size_To_Hash_in_bytes = 0xFFFFFFFF
+17_Image_Stim_Size = 0x1000
+18_Image_Enable = 1
+18_Image_Tim_Included = 3
+18_Image_Image_ID = 0x5A494D47
+18_Image_Next_Image_ID = 0x5359534A
+18_Image_Path = openwrt-mmp-asr1806-zImage
+18_Image_Flash_Entry_Address = 0x04A40000
+18_Image_Load_Address = 0xFFFFFFFF
+18_Image_Type = RAW
+18_Image_ID_Name = ZIMG
+18_Image_Erase_Size =
+18_Image_Partition_Number = 0
+18_Image_Hash_Algorithm_ID = SHA-256
+18_Image_Image_Size_To_Hash_in_bytes = 0xFFFFFFFF
+18_Image_Stim_Size = 0x1000
+19_Image_Enable = 1
+19_Image_Tim_Included = 2
+19_Image_Image_ID = 0x5359534A
+19_Image_Next_Image_ID = 0x5359534A
+19_Image_Path = openwrt-mmp-asr1806-root.squashfs
+19_Image_Flash_Entry_Address = 0x7CC0000
+19_Image_Load_Address = 0xFFFFFFFF
+19_Image_Type = RAW
+19_Image_ID_Name = SYSJ
+19_Image_Erase_Size = 0x02800000
+19_Image_Partition_Number = 0
+19_Image_Hash_Algorithm_ID = SHA-256
+19_Image_Image_Size_To_Hash_in_bytes = 0xFFFFFFFF
+19_Image_Stim_Size = 0x40000
+20_Image_Enable = 1
+20_Image_Tim_Included = 3
+20_Image_Image_ID = 0x5359534A
+20_Image_Next_Image_ID = 0x4F454D44
+20_Image_Path = openwrt-mmp-asr1806-root.squashfs
+20_Image_Flash_Entry_Address = 0xA4C0000
+20_Image_Load_Address = 0xFFFFFFFF
+20_Image_Type = RAW
+20_Image_ID_Name = SYSJ
+20_Image_Erase_Size = 0x02800000
+20_Image_Partition_Number = 0
+20_Image_Hash_Algorithm_ID = SHA-256
+20_Image_Image_Size_To_Hash_in_bytes = 0xFFFFFFFF
+20_Image_Stim_Size = 0x40000
+21_Image_Enable = 1
+21_Image_Tim_Included = 2
+21_Image_Image_ID = 0x4F454D44
+21_Image_Next_Image_ID = 0x4F454D44
+21_Image_Path = openwrt-mmp-asr1806-oem_data.ubi
+21_Image_Flash_Entry_Address = 0xCCC0000
+21_Image_Load_Address = 0xFFFFFFFF
+21_Image_Type = RAW
+21_Image_ID_Name = OEMD
+21_Image_Erase_Size = 0x00700000
+21_Image_Partition_Number = 0
+21_Image_Hash_Algorithm_ID = SHA-256
+21_Image_Image_Size_To_Hash_in_bytes = 0xFFFFFFFF
+21_Image_Stim_Size = 0x40000
+22_Image_Enable = 1
+22_Image_Tim_Included = 3
+22_Image_Image_ID = 0x4F454D44
+22_Image_Next_Image_ID = 0x4F454D55
+22_Image_Path = openwrt-mmp-asr1806-oem_data.ubi
+22_Image_Flash_Entry_Address = 0xD3C0000
+22_Image_Load_Address = 0xFFFFFFFF
+22_Image_Type = RAW
+22_Image_ID_Name = OEMD
+22_Image_Erase_Size = 0x00700000
+22_Image_Partition_Number = 0
+22_Image_Hash_Algorithm_ID = SHA-256
+22_Image_Image_Size_To_Hash_in_bytes = 0xFFFFFFFF
+22_Image_Stim_Size = 0x40000
+23_Image_Enable = 1
+23_Image_Tim_Included = 0
+23_Image_Image_ID = 0x4F454D55
+23_Image_Next_Image_ID = 0xFFFFFFFF
+23_Image_Path = dev_info.bin
+23_Image_Flash_Entry_Address = 0x5440000
+23_Image_Load_Address = 0xFFFFFFFF
+23_Image_Type = RAW
+23_Image_ID_Name = DEV
+23_Image_Erase_Size =
+23_Image_Partition_Number = 0
+23_Image_Hash_Algorithm_ID =
+23_Image_Image_Size_To_Hash_in_bytes = 0xFFFFFFFF
+[Nand_Images_list_Property]
+1_NandSign_Value = 0x5350491A
+1_NandSign_NandIdNumber = 1
+1_NandSign_1_NandId = 0xFFFF
+1_NandSign_1_NandSize = 0x20000000
+1_NandSign_1_NandId_ImageNumber = 0
diff --git a/marvell/swd/FACT/asr1806_p301_QSPINAND_Trusted_TOS_SDTIM_LPDDR2_AB_DEV_INFO.blf b/marvell/swd/FACT/asr1806_p301_QSPINAND_Trusted_TOS_SDTIM_LPDDR2_AB_DEV_INFO.blf
new file mode 100755
index 0000000..0125408
--- /dev/null
+++ b/marvell/swd/FACT/asr1806_p301_QSPINAND_Trusted_TOS_SDTIM_LPDDR2_AB_DEV_INFO.blf
@@ -0,0 +1,2513 @@
+[BLF_Version]
+Blf_Version_Number = V3.0.0
+[UE_Options]
+UE_Boot_Option = 1
+[Flash_Properties]
+Flash_Block_Size = 0x40000
+Flash_NandID = 0xffff
+Nand_Signature_Number = 1
+Max_Upload_Split_Size = 0x4200000
+Max_FBF_Split_Size = 0x4200000
+Max_OTA_Image_Size = 0x3000000
+OTA_Image_Split_Size =
+Flash_Family = SPI-NAND
+Spare_Area_Size = 64
+Data_Area_Size = 2048
+FBF_Sector_Size = 4096
+[Flash_Options]
+ProductionMode = 0
+Skip_Blocks_Number =
+Erase_All_Flash = 0
+Reset_BBT = 0
+AB_System = 2
+[TIM_Configuration]
+Number_of_Images = 25
+Number_of_Keys = 0
+WTM_Save_State_Flash_Signature = 0x4D4D4308
+WTM_Save_State_Flash_Entry_Address = 0x00000000
+WTM_Save_State_BackUp_Entry_Address = 0x00000000
+Boot_Flash_Signature = 0x5350491C
+Processor_Type = ASR1806
+FFOS_Type = OWRT
+OEM_UniqueID = 0x4E5A4133
+Issue_Date = 0x20140601
+Version = 0x00030400
+Trusted = 1
+SDTIM = 1
+[Reserved_Data]
+DTYP
+DDR_Type = 0x00000001
+End_DTYP
+DDR_Flash_Mcp_Map
+DDR_Flash_Map_Number = 0x00000006
+Vendor_DDR_PID#1 = 0x0D08;DDR: UNIC
+Nand_Id#1 = 0xFFFF;NAND: Reserved
+Vendor_DDR_PID#2 = 0x0808;DDR: WINBOND
+Nand_Id#2 = 0xFFFF;NAND: Reserved
+Vendor_DDR_PID#3 = 0x0508;DDR: NANYA
+Nand_Id#3 = 0xFFFF;NAND: Reserved
+Vendor_DDR_PID#4 = 0x0510;DDR: NANYA
+Nand_Id#4 = 0xFFFF;NAND: Reserved
+Vendor_DDR_PID#5 = 0x0908;DDR: ESMT
+Nand_Id#5 = 0xFFFF;NAND: Reserved
+Vendor_DDR_PID#6 = 0x0920;DDR: ESMT
+Nand_Id#6 = 0xFFFF;NAND: Reserved
+End_DDR_Flash_Mcp_Map
+OTAI
+Enabled = 0x00000001
+Flash_Address = 0x2C0000
+Magic = 0x464F5441
+End_OTAI
+BBMT
+Version = 0x00000001
+End_BBMT
+HTFX
+Load_Address = 0xD1004000
+HTFX_PATH = ./FACT/hotfix.bin
+Patch_Size = 0x36C
+End_HTFX
+CITA_CUMIZED_INFO_TRANSFER_TOAP_ID
+Number_cfg_ID_Value_Pairs_below = 0x00000020
+eehP = 0x50686565
+eehP_Cfg_Value = 0x00000000
+CPSR = 0x52535043
+CPSR_Cfg_Value = 0x00000000
+HAWK = 0x4B574148
+HAWK_Cfg_Value = 0x00000000
+IMSD = 0x44534D49
+IMSD_Cfg_Value = 0x00000000
+PROD = 0x444F5250
+PROD_Cfg_Value = 0x00000000
+PIPE = 0x45504950
+PIPE_Cfg_Value = 0x00000000
+FAST = 0x54534146
+FAST_Cfg_Value = 0x47574C33
+APMF = 0x464D5041
+APMF_Cfg_Value = 0x00000001
+CPBT = 0x54425043
+CPBT_Cfg_Value = 0x00000000
+XXXX = 0x00000000
+XXXX_Cfg_Value = 0x00000000
+XXXX = 0x00000000
+XXXX_Cfg_Value = 0x00000000
+XXXX = 0x00000000
+XXXX_Cfg_Value = 0x00000000
+XXXX = 0x00000000
+XXXX_Cfg_Value = 0x00000000
+XXXX = 0x00000000
+XXXX_Cfg_Value = 0x00000000
+XXXX = 0x00000000
+XXXX_Cfg_Value = 0x00000000
+XXXX = 0x00000000
+XXXX_Cfg_Value = 0x00000000
+XXXX = 0x00000000
+XXXX_Cfg_Value = 0x00000000
+XXXX = 0x00000000
+XXXX_Cfg_Value = 0x00000000
+XXXX = 0x00000000
+XXXX_Cfg_Value = 0x00000000
+XXXX = 0x00000000
+XXXX_Cfg_Value = 0x00000000
+XXXX = 0x00000000
+XXXX_Cfg_Value = 0x00000000
+XXXX = 0x00000000
+XXXX_Cfg_Value = 0x00000000
+XXXX = 0x00000000
+XXXX_Cfg_Value = 0x00000000
+XXXX = 0x00000000
+XXXX_Cfg_Value = 0x00000000
+XXXX = 0x00000000
+XXXX_Cfg_Value = 0x00000000
+XXXX = 0x00000000
+XXXX_Cfg_Value = 0x00000000
+XXXX = 0x00000000
+XXXX_Cfg_Value = 0x00000000
+XXXX = 0x00000000
+XXXX_Cfg_Value = 0x00000000
+XXXX = 0x00000000
+XXXX_Cfg_Value = 0x00000000
+XXXX = 0x00000000
+XXXX_Cfg_Value = 0x00000000
+XXXX = 0x00000000
+XXXX_Cfg_Value = 0x00000000
+XXXX = 0x00000000
+XXXX_Cfg_Value = 0x00000000
+End_CITA_CUMIZED_INFO_TRANSFER_TOAP_ID
+End_Reserved_Data
+[EraseOnly_Option]
+Total_Eraseonly_Areas = 2
+; rootfs_data
+1_Eraseonly_Area_Size = 0x01E00000
+1_Eraseonly_Area_FlashStartAddress = 0x0DAC0000
+1_Eraseonly_Area_Partition = 0
+1_Eraseonly_Area_Enable = 1
+; user_data (0x1e5c0000 - FlashStartAddress)
+2_Eraseonly_Area_Size = 0x0ED00000
+2_Eraseonly_Area_FlashStartAddress = 0x0F8C0000
+2_Eraseonly_Area_Partition = 0
+2_Eraseonly_Area_Enable = 0
+[Extended_Reserved_Data]
+Consumer_ID
+CID = TBRI
+PID = DDR1
+End_Consumer_ID
+Custom_Model
+Model = T108-2_AB
+End_Custom_Model
+DDR_Initialization
+DDR_PID = DDR1
+DDROperations
+DDR_INIT_ENABLE = 0x00000001
+DDR_MEMTEST_ENABLE = 0x00000000
+End_DDROperations
+Instructions
+WRITE = <0xD4282948,0x4A200063>
+WRITE = <0xD428294C,0x29006000> ;PLL 1066
+WRITE = <0xD4282950,0x50C5000C>
+WRITE = <0xD428295C,0x00C20000>
+WAIT_FOR_BIT_SET = <0xD428295C,0x00400000,0x00001000>
+DELAY = <0x00001000> ;WAITING FOR DDR_VREF
+AND_VAL = <0xD428295C,0xFFFFFFF0>
+OR_VAL = <0xD428295C,0x00000004> ;set div4 533mbps
+OR_VAL = <0xD42828B0,0x02000000>
+WAIT_FOR_BIT_CLEAR = <0xD42828B0,0x02000000,0x00001000>
+WRITE = <0xD42828F4,0xC0000000>
+WRITE = <0xD42828F4,0xC0000003>
+WRITE = <0xD4282D18,0x33221133>
+WRITE = <0xC0100044,0x00030A00> ;MC_Control_0
+WRITE = <0xC0100048,0x00000001> ;MC_excu_en
+WRITE = <0xC010004C,0x00000000>
+WRITE = <0xC0100064,0x0A040502>
+WRITE = <0xC0100050,0x0007E2FF>
+WRITE = <0xC0100054,0x00000480>
+WRITE = <0xC0100058,0x10356285>
+WRITE = <0xC010005C,0x000494E4>
+WRITE = <0xC0100180,0x00030200>
+WRITE = <0xC0100200,0x000B0001> ;Memory Address Map Register Low CS0
+WRITE = <0xC0100204,0x00000000> ;Memory Address Map Register high CS0
+WRITE = <0xC0100208,0x080B0001> ;Memory Address Map Register Low CS1
+WRITE = <0xC010020C,0x00000000> ;Memory Address Map Register High CS1
+WRITE = <0xC0100220,0x04000332> ;Configuration Register CS0
+WRITE = <0xC0100224,0x04000332> ;Configuration Register CS1
+WRITE = <0xC01002C0,0x0000E000>
+WRITE = <0xC01002C4,0x00000098> ;MC_Control_2
+WRITE = <0xC0100304,0x50800400> ;DRAM Config 2 FSP WR FSP OP FSP=01
+WRITE = <0xC0100300,0x00000008> ;DRAM Config 1
+WRITE = <0xC010030C,0x00000000> ;no pre and post amble
+WRITE = <0xC0100310,0x00020000> ;drive strength 60ohm
+WRITE = <0xC0100314,0x00020000> ;drive strength 60ohm
+WRITE = <0xC010038C,0x001B0216> ;ZQC timing 0
+WRITE = <0xC0100390,0x003000C0> ;ZQC timing 1
+WRITE = <0xC0100394,0x00460065> ;Refresh timing
+WRITE = <0xC0100398,0x01000100> ;SelfRefresh timing 0
+WRITE = <0xC010039C,0x00200808> ;SelfRefresh timing 1
+WRITE = <0xC01003A0,0x01080404> ;Power down timing 0
+WRITE = <0xC01003A4,0x00000001> ;Power down timing 1
+WRITE = <0xC01003A8,0x00000205> ;MRS timing
+WRITE = <0xC01003AC,0x1B200A17> ;ACT timing
+WRITE = <0xC01003B0,0x0C0C040A> ;Pre-Charge timing
+WRITE = <0xC01003B4,0x02000400> ;CAS/RAS timing 0
+WRITE = <0xC01003B8,0x00010600> ;CAS/RAS timing 1
+WRITE = <0xC01003BC,0x02020404> ;Off-spec timing 0
+WRITE = <0xC01003C0,0x00000006> ;Off-spec timing 1
+WRITE = <0xC01003C4,0x00140A03> ;DRAM_read timing
+WRITE = <0xC01003D8,0x025A812D>
+WRITE = <0xC01003DC,0x41081239>
+WRITE = <0xC01003E0,0x00000605>
+WRITE = <0xC0100348,0x00000000>
+WRITE = <0xC010034C,0x00000000>
+WRITE = <0xC01013E4,0x05000300> ;MCK6 DFI phy ctrl register 1 (4to1)
+WRITE = <0xC01013EC,0x0000047E>
+WRITE = <0xC0100304,0x00800400> ;DRAM Config 2 FSP WR FSP OP FSP=00
+WRITE = <0xC0100300,0x00000004> ;DRAM Config 1
+WRITE = <0xC010030C,0x00000000>
+WRITE = <0xC0100310,0x00020000>
+WRITE = <0xC0100314,0x00020000>
+WRITE = <0xC010038C,0x000A00C8> ;ZQC timing 0
+WRITE = <0xC0100390,0x00120048> ;ZQC timing 1
+WRITE = <0xC0100394,0x00230065> ;Refresh timing
+WRITE = <0xC0100398,0x00260026> ;SelfRefresh timing 0
+WRITE = <0xC010039C,0x00200404> ;SelfRefresh timing 1
+WRITE = <0xC01003A0,0x01040202> ;Power down timing 0
+WRITE = <0xC01003A4,0x00000001> ;Power down timing 1
+WRITE = <0xC01003A8,0x00000205> ;MRS timing
+WRITE = <0xC01003AC,0x0E10050C> ;ACT timing
+WRITE = <0xC01003B0,0x06060205> ;Pre-Charge timing
+WRITE = <0xC01003B4,0x02000400> ;CAS/RAS timing 0
+WRITE = <0xC01003B8,0x00010200> ;CAS/RAS timing 1
+WRITE = <0xC01003BC,0x02020404> ;Off-spec timing 0
+WRITE = <0xC01003C0,0x00000006> ;Off-spec timing 1
+WRITE = <0xC01003C4,0x00140A01> ;DRAM_read timing
+WRITE = <0xC01003D8,0x025A812D>
+WRITE = <0xC01003DC,0x41081239>
+WRITE = <0xC01003E0,0x00000605>
+WRITE = <0xC0100348,0x00000000>
+WRITE = <0xC010034C,0x00000000>
+WRITE = <0xC01013E4,0x03000100> ;MCK6 DFI phy ctrl register 1 (1to1)
+WRITE = <0xC01013EC,0x0000047E>
+WRITE = <0xC0100304,0x00800400> ;CH0_DRAM_Config_2 select fp0
+WRITE = <0xC0100380,0x0001B207> ;DDR init timing Control 0
+WRITE = <0xC0100384,0x00000038> ;DDR init timing Control 1
+WRITE = <0xC0100388,0x000015B3> ;DDR init timing Control 2
+WRITE = <0xC01013E0,0x00000000> ;FSP_OP = 0
+WRITE = <0xC0143000,0x00000010> ;phy release and reset
+WRITE = <0xC0143000,0x00000011> ;phy release and reset
+WRITE = <0xC0150024,0x00000000>
+OR_VAL = <0xC0150024,0x00000032>
+WRITE = <0xC0140068,0x0000034A>
+WRITE = <0xC0144068,0x0000034A>
+WRITE = <0xC0140064,0x0000034A>
+WRITE = <0xC0144064,0x0000034A>
+WRITE = <0xC0143004,0x00000830>
+WRITE = <0xC0147004,0x00000830>
+WRITE = <0xC0143008,0x0024244B>
+WRITE = <0xC0147008,0x0024244B>
+WRITE = <0xC014300C,0x00363654>
+WRITE = <0xC014700C,0x00363654>
+WRITE = <0xC0143010,0x00020482>
+WRITE = <0xC0147010,0x00020482>
+WRITE = <0xC0143014,0x87000000>
+WRITE = <0xC0147014,0x87000000>
+WRITE = <0xC0143018,0x08454018>
+WRITE = <0xC0147018,0x08454018>
+WRITE = <0xC0143020,0x00001077>
+OR_VAL = <0xC0150000,0x00000001> ;HWDFC_EN
+WRITE = <0xC01013D0,0x13000001> ;MCK6 DFI phy user cmd
+WRITE = <0xD4050028,0x00001200>
+WRITE = <0xD4282CE8,0x00000053>
+WRITE = <0xD4282CE8,0x00000054>
+WRITE = <0xD4282CE8,0x00000053>
+WRITE = <0xD4282CE8,0x00000054>
+WRITE = <0xD4282CE8,0x00000053>
+WRITE = <0xD4282CE8,0x00000053>
+WRITE = <0xD4282CE8,0x00000063>
+WRITE = <0xD4282CE8,0x00000063>
+WRITE = <0xD4282CE8,0x00000064>
+WRITE = <0xD4282CE8,0x00000063>
+WRITE = <0xD4282CE8,0x00000064>
+WRITE = <0xD4282CE8,0x00000064>
+WRITE = <0xD4282CE8,0x00000073>
+WRITE = <0xD4282CE8,0x00000074>
+WRITE = <0xD4282CE8,0x00000074>
+WRITE = <0xD4282CE8,0x00000073>
+WRITE = <0xD4282CE8,0x00000080>
+WRITE = <0xD4282CE8,0x00000081>
+WRITE = <0xD4282CE8,0x00000082>
+WRITE = <0xD4282CE8,0x00000084>
+WRITE = <0xD4050028,0x00001300>
+WRITE = <0xC01013D0,0x13000100> ;MCK6 DFI phy user cmd
+WRITE = <0xC0100020,0x13000001>
+WAIT_FOR_BIT_SET = <0xC0100008,0x00000011,0x00001000>
+WRITE = <0xC0100020,0x11001000>
+WRITE = <0xC0100020,0x12001000>
+WRITE = <0xC0100024,0x13020001>
+WRITE = <0xC0100024,0x13020002>
+WRITE = <0xC0100024,0x13020003>
+WRITE = <0xC01013D0,0x11100000> ;read gate training
+WAIT_FOR_BIT_SET = <0xC01013FC,0x00000006,0x00001000>
+WRITE = <0xC0143004,0x00000820>
+WRITE = <0xC0147004,0x00000820>
+WRITE = <0xC010012C,0xABCD1234> ;BROM FLAG
+End_Instructions
+End_DDR_Initialization
+Image_Maps
+NUM_MAPS = 4
+1_Image_Map_Info
+1_Image_ID = 0x54494D31
+1_Image_Type = PRIMARYIMAGE
+1_Flash_Address_Lo = 0x004C0000
+1_Flash_Address_Hi = 0x00000000
+1_Partition = 0x00000000
+1_Enable = 1
+1_End_Image_Map_Info
+2_Image_Map_Info
+2_Image_ID = 0x54494D34
+2_Image_Type = PPSETINGIMAG
+2_Flash_Address_Lo = 0x00500000
+2_Flash_Address_Hi = 0x00000000
+2_Partition = 0x00000000
+2_Enable = 1
+2_End_Image_Map_Info
+3_Image_Map_Info
+3_Image_ID = 0x54494D32
+3_Image_Type = RECOVERYIMAGE
+3_Flash_Address_Lo = 0x00540000
+3_Flash_Address_Hi = 0x00000000
+3_Partition = 0x00000000
+3_Enable = 1
+3_End_Image_Map_Info
+4_Image_Map_Info
+4_Image_ID = 0x54494D35
+4_Image_Type = PPSETINGIMAG_2
+4_Flash_Address_Lo = 0x00580000
+4_Flash_Address_Hi = 0x00000000
+4_Partition = 0x00000000
+4_Enable = 1
+4_End_Image_Map_Info
+End_Image_Maps
+Vendor_DDR_Initialization
+DDR_PID = 0x0D08
+DDROperations
+DDR_INIT_ENABLE = 0x00000001
+DDR_MEMTEST_ENABLE = 0x00000000
+End_DDROperations
+Instructions
+WRITE = <0xD428285C,0x0000000B> ;pull down usb dp/dm
+WRITE = <0xD4207094,0x0000E504> ;pull down usb dp/dm
+WRITE = <0xD42070A4,0x00005888> ;pull down usb dp/dm
+WRITE = <0xD420702C,0x00000000> ;suspend usb
+WRITE = <0xD4207028,0x00003000> ;suspend usb
+WRITE = <0xD4282948,0x4A200063>
+WRITE = <0xD428294C,0x29006000> ;PLL 1066
+WRITE = <0xD4282950,0x50C5000C>
+WRITE = <0xD428295C,0x00C20000>
+WAIT_FOR_BIT_SET = <0xD428295C,0x00400000,0x00001000>
+DELAY = <0x00001000> ;WAITING FOR DDR_VREF
+AND_VAL = <0xD428295C,0xFFFFFFF0>
+OR_VAL = <0xD428295C,0x00000004> ;set div4 533mbps
+OR_VAL = <0xD42828B0,0x02000000>
+WAIT_FOR_BIT_CLEAR = <0xD42828B0,0x02000000,0x00001000>
+WRITE = <0xD42828F4,0xC0000000>
+WRITE = <0xD42828F4,0xC0000003>
+WRITE = <0xD4282D18,0x33221133>
+WRITE = <0xC0100044,0x00030A00> ;MC_Control_0
+WRITE = <0xC0100048,0x00000001> ;MC_excu_en
+WRITE = <0xC010004C,0x00000000>
+WRITE = <0xC0100064,0x0A040502>
+WRITE = <0xC0100050,0x0007E2FF>
+WRITE = <0xC0100054,0x00000480>
+WRITE = <0xC0100058,0x10356285>
+WRITE = <0xC010005C,0x000494E4>
+WRITE = <0xC0100180,0x00030200>
+WRITE = <0xC0100200,0x000B0001> ;Memory Address Map Register Low CS0
+WRITE = <0xC0100204,0x00000000> ;Memory Address Map Register high CS0
+WRITE = <0xC0100220,0x04000332> ;Configuration Register CS0
+WRITE = <0xC01002C0,0x0000E000>
+WRITE = <0xC01002C4,0x00000098> ;MC_Control_2
+WRITE = <0xC0100304,0x50800400> ;DRAM Config 2 FSP WR FSP OP FSP=01
+WRITE = <0xC0100300,0x00000008> ;DRAM Config 1
+WRITE = <0xC010030C,0x00000000> ;no pre and post amble
+WRITE = <0xC0100310,0x00020000> ;drive strength 60ohm
+WRITE = <0xC010038C,0x001B0216> ;ZQC timing 0
+WRITE = <0xC0100390,0x003000C0> ;ZQC timing 1
+WRITE = <0xC0100394,0x004600CB> ;Refresh timing
+WRITE = <0xC0100398,0x01000100> ;SelfRefresh timing 0
+WRITE = <0xC010039C,0x00200808> ;SelfRefresh timing 1
+WRITE = <0xC01003A0,0x01080404> ;Power down timing 0
+WRITE = <0xC01003A4,0x00000001> ;Power down timing 1
+WRITE = <0xC01003A8,0x00000205> ;MRS timing
+WRITE = <0xC01003AC,0x1B200A17> ;ACT timing
+WRITE = <0xC01003B0,0x0C0C040A> ;Pre-Charge timing
+WRITE = <0xC01003B4,0x02000400> ;CAS/RAS timing 0
+WRITE = <0xC01003B8,0x00010600> ;CAS/RAS timing 1
+WRITE = <0xC01003BC,0x02020404> ;Off-spec timing 0
+WRITE = <0xC01003C0,0x00000006> ;Off-spec timing 1
+WRITE = <0xC01003C4,0x00140A03> ;DRAM_read timing
+WRITE = <0xC01003D8,0x025A812D>
+WRITE = <0xC01003DC,0x41081239>
+WRITE = <0xC01003E0,0x00000605>
+WRITE = <0xC0100348,0x00000000>
+WRITE = <0xC010034C,0x00000000>
+WRITE = <0xC01013E4,0x05000300> ;MCK6 DFI phy ctrl register 1 (4to1)
+WRITE = <0xC01013EC,0x0000047E>
+WRITE = <0xC0100304,0x00800400> ;DRAM Config 2 FSP WR FSP OP FSP=00
+WRITE = <0xC0100300,0x00000004> ;DRAM Config 1
+WRITE = <0xC010030C,0x00000000>
+WRITE = <0xC0100310,0x00020000>
+WRITE = <0xC010038C,0x000A00C8> ;ZQC timing 0
+WRITE = <0xC0100390,0x00120048> ;ZQC timing 1
+WRITE = <0xC0100394,0x002300CB> ;Refresh timing
+WRITE = <0xC0100398,0x00260026> ;SelfRefresh timing 0
+WRITE = <0xC010039C,0x00200404> ;SelfRefresh timing 1
+WRITE = <0xC01003A0,0x01040202> ;Power down timing 0
+WRITE = <0xC01003A4,0x00000001> ;Power down timing 1
+WRITE = <0xC01003A8,0x00000205> ;MRS timing
+WRITE = <0xC01003AC,0x0E10050C> ;ACT timing
+WRITE = <0xC01003B0,0x06060205> ;Pre-Charge timing
+WRITE = <0xC01003B4,0x02000400> ;CAS/RAS timing 0
+WRITE = <0xC01003B8,0x00010200> ;CAS/RAS timing 1
+WRITE = <0xC01003BC,0x02020404> ;Off-spec timing 0
+WRITE = <0xC01003C0,0x00000006> ;Off-spec timing 1
+WRITE = <0xC01003C4,0x00140A01> ;DRAM_read timing
+WRITE = <0xC01003D8,0x025A812D>
+WRITE = <0xC01003DC,0x41081239>
+WRITE = <0xC01003E0,0x00000605>
+WRITE = <0xC0100348,0x00000000>
+WRITE = <0xC010034C,0x00000000>
+WRITE = <0xC01013E4,0x03000100> ;MCK6 DFI phy ctrl register 1 (1to1)
+WRITE = <0xC01013EC,0x0000047E>
+WRITE = <0xC0100304,0x00800400> ;CH0_DRAM_Config_2 select fp0
+WRITE = <0xC0100380,0x0001B207> ;DDR init timing Control 0
+WRITE = <0xC0100384,0x00000038> ;DDR init timing Control 1
+WRITE = <0xC0100388,0x000015B3> ;DDR init timing Control 2
+WRITE = <0xC01013E0,0x00000000> ;FSP_OP = 0
+WRITE = <0xC0143000,0x00000010> ;phy release and reset
+WRITE = <0xC0143000,0x00000011> ;phy release and reset
+WRITE = <0xC0150024,0x00000000>
+OR_VAL = <0xC0150024,0x00000032>
+WRITE = <0xC0140068,0x0000034A>
+WRITE = <0xC0144068,0x0000034A>
+WRITE = <0xC0140064,0x0000034A>
+WRITE = <0xC0144064,0x0000034A>
+WRITE = <0xC0143004,0x00000830>
+WRITE = <0xC0147004,0x00000830>
+WRITE = <0xC0143008,0x0024244B>
+WRITE = <0xC0147008,0x0024244B>
+WRITE = <0xC014300C,0x003636D4>
+WRITE = <0xC014700C,0x003636D4>
+WRITE = <0xC0143010,0x00020482>
+WRITE = <0xC0147010,0x00020482>
+WRITE = <0xC0143014,0x87000000>
+WRITE = <0xC0147014,0x87000000>
+WRITE = <0xC0143018,0x08454018>
+WRITE = <0xC0147018,0x08454018>
+WRITE = <0xC0143020,0x00001077>
+WRITE = <0xC015000C,0x0000010F>
+WRITE = <0xC0150010,0x0000010F>
+WRITE = <0xC0150014,0x0000010F>
+WRITE = <0xC0142028,0x0000000F>
+WRITE = <0xC014202C,0x0000000F>
+WRITE = <0xC0142030,0x0000000F>
+WRITE = <0xC0146028,0x0000000F>
+WRITE = <0xC014602C,0x0000000F>
+WRITE = <0xC0146030,0x0000000F>
+WRITE = <0xC0140060,0x000000FF>
+WRITE = <0xC0141060,0x000000FF>
+WRITE = <0xC0144060,0x000000FF>
+WRITE = <0xC0145060,0x000000FF>
+OR_VAL = <0xC0150000,0x00000001> ;HWDFC_EN
+WRITE = <0xC01013D0,0x11000001> ;MCK6 DFI phy user cmd
+WRITE = <0xD4050028,0x00001200>
+WRITE = <0xD4282CE8,0x00000053>
+WRITE = <0xD4282CE8,0x00000054>
+WRITE = <0xD4282CE8,0x00000053>
+WRITE = <0xD4282CE8,0x00000054>
+WRITE = <0xD4282CE8,0x00000053>
+WRITE = <0xD4282CE8,0x00000053>
+WRITE = <0xD4282CE8,0x00000063>
+WRITE = <0xD4282CE8,0x00000063>
+WRITE = <0xD4282CE8,0x00000064>
+WRITE = <0xD4282CE8,0x00000063>
+WRITE = <0xD4282CE8,0x00000064>
+WRITE = <0xD4282CE8,0x00000064>
+WRITE = <0xD4282CE8,0x00000073>
+WRITE = <0xD4282CE8,0x00000074>
+WRITE = <0xD4282CE8,0x00000074>
+WRITE = <0xD4282CE8,0x00000073>
+WRITE = <0xD4282CE8,0x00000080>
+WRITE = <0xD4282CE8,0x00000081>
+WRITE = <0xD4282CE8,0x00000082>
+WRITE = <0xD4282CE8,0x00000084>
+WRITE = <0xD4050028,0x00001300>
+WRITE = <0xC01013D0,0x11000100> ;MCK6 DFI phy user cmd
+WRITE = <0xC0100020,0x11000001>
+WAIT_FOR_BIT_SET = <0xC0100008,0x00000001,0x00001000>
+WRITE = <0xC0100020,0x11001000>
+WRITE = <0xC0100024,0x11020001>
+WRITE = <0xC0100024,0x11020002>
+WRITE = <0xC0100024,0x11020003>
+WRITE = <0xC01013D0,0x11100000> ;read gate training
+WAIT_FOR_BIT_SET = <0xC01013FC,0x00000006,0x00001000>
+WRITE = <0xC0100074,0x00030A03>
+WRITE = <0xC0100078,0x00000044>
+WRITE = <0xC0100070,0x00000000>
+WRITE = <0xC0100074,0x11000008>
+WRITE = <0xC0100078,0x00000020>
+WRITE = <0xC0100070,0x00000001>
+WRITE = <0xC0100074,0x00000004>
+WRITE = <0xC0100078,0x00002008>
+WRITE = <0xC0100070,0x00000002>
+WRITE = <0xC0100074,0x00000004>
+WRITE = <0xC0100078,0x00002008>
+WRITE = <0xC0100070,0x00000003>
+WRITE = <0xC0100074,0x11000001>
+WRITE = <0xC0100078,0x000013D0>
+WRITE = <0xC0100070,0x00000004>
+WRITE = <0xC0100074,0x00008000>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x00000005>
+WRITE = <0xC0100074,0x00000000>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x00000006>
+WRITE = <0xC0100074,0x00030A03>
+WRITE = <0xC0100078,0x00010044>
+WRITE = <0xC0100070,0x00000007>
+WRITE = <0xC0100074,0x11000100>
+WRITE = <0xC0100078,0x000013D0>
+WRITE = <0xC0100070,0x00000008>
+WRITE = <0xC0100074,0x00008000>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x00000009>
+WRITE = <0xC0100074,0x00008000>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x0000000A>
+WRITE = <0xC0100074,0x11000004>
+WRITE = <0xC0100078,0x00000020>
+WRITE = <0xC0100070,0x0000000B>
+WRITE = <0xC0100074,0x00030A02>
+WRITE = <0xC0100078,0x00010044>
+WRITE = <0xC0100070,0x0000000C>
+WRITE = <0xC0100074,0x11020001>
+WRITE = <0xC0100078,0x00000024>
+WRITE = <0xC0100070,0x0000000D>
+WRITE = <0xC0100074,0x11020002>
+WRITE = <0xC0100078,0x00000024>
+WRITE = <0xC0100070,0x0000000E>
+WRITE = <0xC0100074,0x11100000>
+WRITE = <0xC0100078,0x000013D0>
+WRITE = <0xC0100070,0x0000000F>
+WRITE = <0xC0100074,0x00000006>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x00000010>
+WRITE = <0xC0100074,0x00000006>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x00000011>
+WRITE = <0xC0100074,0x00030A00>
+WRITE = <0xC0100078,0x00020044>
+WRITE = <0xC0100070,0x00000012>
+AND_VAL = <0xD428295C,0xFFFFFFF0> ;hwdfc to 1066mbps
+OR_VAL = <0xD428295C,0x00000000>
+OR_VAL = <0xD42828B0,0x00000020>
+OR_VAL = <0xD42828B0,0x01000000>
+WAIT_FOR_BIT_CLEAR = <0xD42828B0,0x01000000,0x00001000>
+WRITE = <0xC01013D0,0x11100000> ;read gate training
+WAIT_FOR_BIT_SET = <0xC01013FC,0x00000002,0x00001000>
+WRITE = <0xC01013EC,0x00005070>
+WRITE = <0xC01013D0,0x11200000> ;read DQ training
+WAIT_FOR_BIT_SET = <0xC01013FC,0x00000006,0x00001000>
+WRITE = <0xC0143004,0x00000820>
+WRITE = <0xC0147004,0x00000820>
+PP_TABLEHEADER = <0xC0100074,0xC0100078,0xC0100070> ;DDR_TABLEHEADER FOR PRODUCT POINT
+PP_WRITE = <0x00030A03,0x00000044,0x00000060>
+PP_WRITE = <0x00000004,0x00002008,0x00000061>
+PP_WRITE = <0x00000004,0x00002008,0x00000062>
+PP_WRITE = <0x11000001,0x000013D0,0x00000063>
+PP_WRITE = <0x00008000,0x000033FC,0x00000064>
+PP_WRITE = <0x00000000,0x000033FC,0x00000065>
+PP_WRITE = <0x00030A03,0x00010044,0x00000066>
+PP_WRITE = <0x11000100,0x000013D0,0x00000067>
+PP_WRITE = <0x00008000,0x000033FC,0x00000068>
+PP_WRITE = <0x00008000,0x000033FC,0x00000069>
+PP_WRITE = <0x00030A02,0x00010044,0x0000006A>
+PP_WRITE = <0x00030A00,0x00020044,0x0000006B>
+AND_VAL = <0xD428295C,0xFFFFFFF0> ;hwdfc to 533mbps
+OR_VAL = <0xD428295C,0x00000004>
+AND_VAL = <0xD42828B0,0xFFFFFF9F>
+OR_VAL = <0xD42828B0,0x01000000>
+WAIT_FOR_BIT_CLEAR = <0xD42828B0,0x01000000,0x00001000>
+End_Instructions
+END_Vendor_DDR_Initialization
+Vendor_DDR_Initialization
+DDR_PID = 0x0808
+DDROperations
+DDR_INIT_ENABLE = 0x00000001
+DDR_MEMTEST_ENABLE = 0x00000000
+End_DDROperations
+Instructions
+WRITE = <0xD428285C,0x0000000B> ;pull down usb dp/dm
+WRITE = <0xD4207094,0x0000E504> ;pull down usb dp/dm
+WRITE = <0xD42070A4,0x00005888> ;pull down usb dp/dm
+WRITE = <0xD420702C,0x00000000> ;suspend usb
+WRITE = <0xD4207028,0x00003000> ;suspend usb
+WRITE = <0xD4282948,0x4A200063>
+WRITE = <0xD428294C,0x29006000> ;PLL 1066
+WRITE = <0xD4282950,0x50C5000C>
+WRITE = <0xD428295C,0x00C20000>
+WAIT_FOR_BIT_SET = <0xD428295C,0x00400000,0x00001000>
+DELAY = <0x00001000> ;WAITING FOR DDR_VREF
+AND_VAL = <0xD428295C,0xFFFFFFF0>
+OR_VAL = <0xD428295C,0x00000004> ;set div4 533mbps
+OR_VAL = <0xD42828B0,0x02000000>
+WAIT_FOR_BIT_CLEAR = <0xD42828B0,0x02000000,0x00001000>
+WRITE = <0xD42828F4,0xC0000000>
+WRITE = <0xD42828F4,0xC0000003>
+WRITE = <0xD4282D18,0x33221133>
+WRITE = <0xC0100044,0x00030A00> ;MC_Control_0
+WRITE = <0xC0100048,0x00000001> ;MC_excu_en
+WRITE = <0xC010004C,0x00000000>
+WRITE = <0xC0100064,0x0A040502>
+WRITE = <0xC0100050,0x0007E2FF>
+WRITE = <0xC0100054,0x00000480>
+WRITE = <0xC0100058,0x10356285>
+WRITE = <0xC010005C,0x000494E4>
+WRITE = <0xC0100180,0x00030200>
+WRITE = <0xC0100200,0x000B0001> ;Memory Address Map Register Low CS0
+WRITE = <0xC0100204,0x00000000> ;Memory Address Map Register high CS0
+WRITE = <0xC0100220,0x04000332> ;Configuration Register CS0
+WRITE = <0xC01002C0,0x0000E000>
+WRITE = <0xC01002C4,0x00000098> ;MC_Control_2
+WRITE = <0xC0100304,0x50800400> ;DRAM Config 2 FSP WR FSP OP FSP=01
+WRITE = <0xC0100300,0x00000008> ;DRAM Config 1
+WRITE = <0xC010030C,0x00000000> ;no pre and post amble
+WRITE = <0xC0100310,0x00020000> ;drive strength 60ohm
+WRITE = <0xC010038C,0x001B0216> ;ZQC timing 0
+WRITE = <0xC0100390,0x003000C0> ;ZQC timing 1
+WRITE = <0xC0100394,0x004600CB> ;Refresh timing
+WRITE = <0xC0100398,0x01000100> ;SelfRefresh timing 0
+WRITE = <0xC010039C,0x00200808> ;SelfRefresh timing 1
+WRITE = <0xC01003A0,0x01080404> ;Power down timing 0
+WRITE = <0xC01003A4,0x00000001> ;Power down timing 1
+WRITE = <0xC01003A8,0x00000205> ;MRS timing
+WRITE = <0xC01003AC,0x1B200A17> ;ACT timing
+WRITE = <0xC01003B0,0x0C08040A> ;Pre-Charge timing
+WRITE = <0xC01003B4,0x02000400> ;CAS/RAS timing 0
+WRITE = <0xC01003B8,0x00010600> ;CAS/RAS timing 1
+WRITE = <0xC01003BC,0x02020404> ;Off-spec timing 0
+WRITE = <0xC01003C0,0x00000006> ;Off-spec timing 1
+WRITE = <0xC01003C4,0x00140A03> ;DRAM_read timing
+WRITE = <0xC01003D8,0x025A812D>
+WRITE = <0xC01003DC,0x41081239>
+WRITE = <0xC01003E0,0x00000605>
+WRITE = <0xC0100348,0x00000000>
+WRITE = <0xC010034C,0x00000000>
+WRITE = <0xC01013E4,0x05000300> ;MCK6 DFI phy ctrl register 1 (4to1)
+WRITE = <0xC01013EC,0x0000047E>
+WRITE = <0xC0100304,0x00800400> ;DRAM Config 2 FSP WR FSP OP FSP=00
+WRITE = <0xC0100300,0x00000004> ;DRAM Config 1
+WRITE = <0xC010030C,0x00000000>
+WRITE = <0xC0100310,0x00020000>
+WRITE = <0xC010038C,0x000A00C8> ;ZQC timing 0
+WRITE = <0xC0100390,0x00120048> ;ZQC timing 1
+WRITE = <0xC0100394,0x002300CB> ;Refresh timing
+WRITE = <0xC0100398,0x00260026> ;SelfRefresh timing 0
+WRITE = <0xC010039C,0x00200404> ;SelfRefresh timing 1
+WRITE = <0xC01003A0,0x01040202> ;Power down timing 0
+WRITE = <0xC01003A4,0x00000001> ;Power down timing 1
+WRITE = <0xC01003A8,0x00000205> ;MRS timing
+WRITE = <0xC01003AC,0x0E10050C> ;ACT timing
+WRITE = <0xC01003B0,0x06040205> ;Pre-Charge timing
+WRITE = <0xC01003B4,0x02000400> ;CAS/RAS timing 0
+WRITE = <0xC01003B8,0x00010200> ;CAS/RAS timing 1
+WRITE = <0xC01003BC,0x02020404> ;Off-spec timing 0
+WRITE = <0xC01003C0,0x00000006> ;Off-spec timing 1
+WRITE = <0xC01003C4,0x00140A01> ;DRAM_read timing
+WRITE = <0xC01003D8,0x025A812D>
+WRITE = <0xC01003DC,0x41081239>
+WRITE = <0xC01003E0,0x00000605>
+WRITE = <0xC0100348,0x00000000>
+WRITE = <0xC010034C,0x00000000>
+WRITE = <0xC01013E4,0x03000100> ;MCK6 DFI phy ctrl register 1 (1to1)
+WRITE = <0xC01013EC,0x0000047E>
+WRITE = <0xC0100304,0x00800400> ;CH0_DRAM_Config_2 select fp0
+WRITE = <0xC0100380,0x0001B207> ;DDR init timing Control 0
+WRITE = <0xC0100384,0x00000038> ;DDR init timing Control 1
+WRITE = <0xC0100388,0x000015B3> ;DDR init timing Control 2
+WRITE = <0xC01013E0,0x00000000> ;FSP_OP = 0
+WRITE = <0xC0143000,0x00000010> ;phy release and reset
+WRITE = <0xC0143000,0x00000011> ;phy release and reset
+WRITE = <0xC0150024,0x00000000>
+OR_VAL = <0xC0150024,0x00000032>
+WRITE = <0xC0140068,0x0000034A>
+WRITE = <0xC0144068,0x0000034A>
+WRITE = <0xC0140064,0x0000034A>
+WRITE = <0xC0144064,0x0000034A>
+WRITE = <0xC0143004,0x00000830>
+WRITE = <0xC0147004,0x00000830>
+WRITE = <0xC0143008,0x0024244B>
+WRITE = <0xC0147008,0x0024244B>
+WRITE = <0xC014300C,0x003636D4>
+WRITE = <0xC014700C,0x003636D4>
+WRITE = <0xC0143010,0x00020482>
+WRITE = <0xC0147010,0x00020482>
+WRITE = <0xC0143014,0x87000000>
+WRITE = <0xC0147014,0x87000000>
+WRITE = <0xC0143018,0x08454018>
+WRITE = <0xC0147018,0x08454018>
+WRITE = <0xC0143020,0x00001077>
+WRITE = <0xC015000C,0x0000010F>
+WRITE = <0xC0150010,0x0000010F>
+WRITE = <0xC0150014,0x0000010F>
+WRITE = <0xC0142028,0x0000000F>
+WRITE = <0xC014202C,0x0000000F>
+WRITE = <0xC0142030,0x0000000F>
+WRITE = <0xC0146028,0x0000000F>
+WRITE = <0xC014602C,0x0000000F>
+WRITE = <0xC0146030,0x0000000F>
+WRITE = <0xC0140060,0x000000FF>
+WRITE = <0xC0141060,0x000000FF>
+WRITE = <0xC0144060,0x000000FF>
+WRITE = <0xC0145060,0x000000FF>
+OR_VAL = <0xC0150000,0x00000001> ;HWDFC_EN
+WRITE = <0xC01013D0,0x11000001> ;MCK6 DFI phy user cmd
+WRITE = <0xD4050028,0x00001200>
+WRITE = <0xD4282CE8,0x00000053>
+WRITE = <0xD4282CE8,0x00000054>
+WRITE = <0xD4282CE8,0x00000053>
+WRITE = <0xD4282CE8,0x00000054>
+WRITE = <0xD4282CE8,0x00000053>
+WRITE = <0xD4282CE8,0x00000053>
+WRITE = <0xD4282CE8,0x00000063>
+WRITE = <0xD4282CE8,0x00000063>
+WRITE = <0xD4282CE8,0x00000064>
+WRITE = <0xD4282CE8,0x00000063>
+WRITE = <0xD4282CE8,0x00000064>
+WRITE = <0xD4282CE8,0x00000064>
+WRITE = <0xD4282CE8,0x00000073>
+WRITE = <0xD4282CE8,0x00000074>
+WRITE = <0xD4282CE8,0x00000074>
+WRITE = <0xD4282CE8,0x00000073>
+WRITE = <0xD4282CE8,0x00000080>
+WRITE = <0xD4282CE8,0x00000081>
+WRITE = <0xD4282CE8,0x00000082>
+WRITE = <0xD4282CE8,0x00000084>
+WRITE = <0xD4050028,0x00001300>
+WRITE = <0xC01013D0,0x11000100> ;MCK6 DFI phy user cmd
+WRITE = <0xC0100020,0x11000001>
+WAIT_FOR_BIT_SET = <0xC0100008,0x00000001,0x00001000>
+WRITE = <0xC0100020,0x11001000>
+WRITE = <0xC0100024,0x11020001>
+WRITE = <0xC0100024,0x11020002>
+WRITE = <0xC0100024,0x11020003>
+WRITE = <0xC01013D0,0x11100000> ;read gate training
+WAIT_FOR_BIT_SET = <0xC01013FC,0x00000006,0x00001000>
+WRITE = <0xC0100074,0x00030A03>
+WRITE = <0xC0100078,0x00000044>
+WRITE = <0xC0100070,0x00000000>
+WRITE = <0xC0100074,0x11000008>
+WRITE = <0xC0100078,0x00000020>
+WRITE = <0xC0100070,0x00000001>
+WRITE = <0xC0100074,0x00000004>
+WRITE = <0xC0100078,0x00002008>
+WRITE = <0xC0100070,0x00000002>
+WRITE = <0xC0100074,0x00000004>
+WRITE = <0xC0100078,0x00002008>
+WRITE = <0xC0100070,0x00000003>
+WRITE = <0xC0100074,0x11000001>
+WRITE = <0xC0100078,0x000013D0>
+WRITE = <0xC0100070,0x00000004>
+WRITE = <0xC0100074,0x00008000>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x00000005>
+WRITE = <0xC0100074,0x00000000>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x00000006>
+WRITE = <0xC0100074,0x00030A03>
+WRITE = <0xC0100078,0x00010044>
+WRITE = <0xC0100070,0x00000007>
+WRITE = <0xC0100074,0x11000100>
+WRITE = <0xC0100078,0x000013D0>
+WRITE = <0xC0100070,0x00000008>
+WRITE = <0xC0100074,0x00008000>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x00000009>
+WRITE = <0xC0100074,0x00008000>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x0000000A>
+WRITE = <0xC0100074,0x11000004>
+WRITE = <0xC0100078,0x00000020>
+WRITE = <0xC0100070,0x0000000B>
+WRITE = <0xC0100074,0x00030A02>
+WRITE = <0xC0100078,0x00010044>
+WRITE = <0xC0100070,0x0000000C>
+WRITE = <0xC0100074,0x11020001>
+WRITE = <0xC0100078,0x00000024>
+WRITE = <0xC0100070,0x0000000D>
+WRITE = <0xC0100074,0x11020002>
+WRITE = <0xC0100078,0x00000024>
+WRITE = <0xC0100070,0x0000000E>
+WRITE = <0xC0100074,0x11100000>
+WRITE = <0xC0100078,0x000013D0>
+WRITE = <0xC0100070,0x0000000F>
+WRITE = <0xC0100074,0x00000006>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x00000010>
+WRITE = <0xC0100074,0x00000006>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x00000011>
+WRITE = <0xC0100074,0x00030A00>
+WRITE = <0xC0100078,0x00020044>
+WRITE = <0xC0100070,0x00000012>
+AND_VAL = <0xD428295C,0xFFFFFFF0> ;hwdfc to 1066mbps
+OR_VAL = <0xD428295C,0x00000000>
+OR_VAL = <0xD42828B0,0x00000020>
+OR_VAL = <0xD42828B0,0x01000000>
+WAIT_FOR_BIT_CLEAR = <0xD42828B0,0x01000000,0x00001000>
+WRITE = <0xC01013D0,0x11100000> ;read gate training
+WAIT_FOR_BIT_SET = <0xC01013FC,0x00000002,0x00001000>
+WRITE = <0xC01013EC,0x00005070>
+WRITE = <0xC01013D0,0x11200000> ;read DQ training
+WAIT_FOR_BIT_SET = <0xC01013FC,0x00000006,0x00001000>
+WRITE = <0xC0143004,0x00000820>
+WRITE = <0xC0147004,0x00000820>
+PP_TABLEHEADER = <0xC0100074,0xC0100078,0xC0100070> ;DDR_TABLEHEADER FOR PRODUCT POINT
+PP_WRITE = <0x00030A03,0x00000044,0x00000060>
+PP_WRITE = <0x00000004,0x00002008,0x00000061>
+PP_WRITE = <0x00000004,0x00002008,0x00000062>
+PP_WRITE = <0x11000001,0x000013D0,0x00000063>
+PP_WRITE = <0x00008000,0x000033FC,0x00000064>
+PP_WRITE = <0x00000000,0x000033FC,0x00000065>
+PP_WRITE = <0x00030A03,0x00010044,0x00000066>
+PP_WRITE = <0x11000100,0x000013D0,0x00000067>
+PP_WRITE = <0x00008000,0x000033FC,0x00000068>
+PP_WRITE = <0x00008000,0x000033FC,0x00000069>
+PP_WRITE = <0x00030A02,0x00010044,0x0000006A>
+PP_WRITE = <0x00030A00,0x00020044,0x0000006B>
+AND_VAL = <0xD428295C,0xFFFFFFF0> ;hwdfc to 533mbps
+OR_VAL = <0xD428295C,0x00000004>
+AND_VAL = <0xD42828B0,0xFFFFFF9F>
+OR_VAL = <0xD42828B0,0x01000000>
+WAIT_FOR_BIT_CLEAR = <0xD42828B0,0x01000000,0x00001000>
+End_Instructions
+END_Vendor_DDR_Initialization
+Vendor_DDR_Initialization
+DDR_PID = 0x0508
+DDROperations
+DDR_INIT_ENABLE = 0x00000001
+DDR_MEMTEST_ENABLE = 0x00000000
+End_DDROperations
+Instructions
+WRITE = <0xD428285C,0x0000000B> ;pull down usb dp/dm
+WRITE = <0xD4207094,0x0000E504> ;pull down usb dp/dm
+WRITE = <0xD42070A4,0x00005888> ;pull down usb dp/dm
+WRITE = <0xD420702C,0x00000000> ;suspend usb
+WRITE = <0xD4207028,0x00003000> ;suspend usb
+WRITE = <0xD4282948,0x4A200063>
+WRITE = <0xD428294C,0x29006000> ;PLL 1066
+WRITE = <0xD4282950,0x50C5000C>
+WRITE = <0xD428295C,0x00C20000>
+WAIT_FOR_BIT_SET = <0xD428295C,0x00400000,0x00001000>
+DELAY = <0x00001000> ;WAITING FOR DDR_VREF
+AND_VAL = <0xD428295C,0xFFFFFFF0>
+OR_VAL = <0xD428295C,0x00000004> ;set div4 533mbps
+OR_VAL = <0xD42828B0,0x02000000>
+WAIT_FOR_BIT_CLEAR = <0xD42828B0,0x02000000,0x00001000>
+WRITE = <0xD42828F4,0xC0000000>
+WRITE = <0xD42828F4,0xC0000003>
+WRITE = <0xD4282D18,0x33221133>
+WRITE = <0xC0100044,0x00030A00> ;MC_Control_0
+WRITE = <0xC0100048,0x00000001> ;MC_excu_en
+WRITE = <0xC010004C,0x00000000>
+WRITE = <0xC0100064,0x0A040502>
+WRITE = <0xC0100050,0x0007E2FF>
+WRITE = <0xC0100054,0x00000480>
+WRITE = <0xC0100058,0x10356285>
+WRITE = <0xC010005C,0x000494E4>
+WRITE = <0xC0100180,0x00030200>
+WRITE = <0xC0100200,0x000B0001> ;Memory Address Map Register Low CS0
+WRITE = <0xC0100204,0x00000000> ;Memory Address Map Register high CS0
+WRITE = <0xC0100220,0x04000332> ;Configuration Register CS0
+WRITE = <0xC01002C0,0x0000E000>
+WRITE = <0xC01002C4,0x00000098> ;MC_Control_2
+WRITE = <0xC0100304,0x50800400> ;DRAM Config 2 FSP WR FSP OP FSP=01
+WRITE = <0xC0100300,0x00000008> ;DRAM Config 1
+WRITE = <0xC010030C,0x00000000> ;no pre and post amble
+WRITE = <0xC0100310,0x00020000> ;drive strength 60ohm
+WRITE = <0xC010038C,0x001B0216> ;ZQC timing 0
+WRITE = <0xC0100390,0x003000C0> ;ZQC timing 1
+WRITE = <0xC0100394,0x004600CB> ;Refresh timing
+WRITE = <0xC0100398,0x01000100> ;SelfRefresh timing 0
+WRITE = <0xC010039C,0x00200808> ;SelfRefresh timing 1
+WRITE = <0xC01003A0,0x01080404> ;Power down timing 0
+WRITE = <0xC01003A4,0x00000001> ;Power down timing 1
+WRITE = <0xC01003A8,0x00000205> ;MRS timing
+WRITE = <0xC01003AC,0x1B200A17> ;ACT timing
+WRITE = <0xC01003B0,0x0C08040A> ;Pre-Charge timing
+WRITE = <0xC01003B4,0x02000400> ;CAS/RAS timing 0
+WRITE = <0xC01003B8,0x00010600> ;CAS/RAS timing 1
+WRITE = <0xC01003BC,0x02020404> ;Off-spec timing 0
+WRITE = <0xC01003C0,0x00000006> ;Off-spec timing 1
+WRITE = <0xC01003C4,0x00140A03> ;DRAM_read timing
+WRITE = <0xC01003D8,0x025A812D>
+WRITE = <0xC01003DC,0x41081239>
+WRITE = <0xC01003E0,0x00000605>
+WRITE = <0xC0100348,0x00000000>
+WRITE = <0xC010034C,0x00000000>
+WRITE = <0xC01013E4,0x05000300> ;MCK6 DFI phy ctrl register 1 (4to1)
+WRITE = <0xC01013EC,0x0000047E>
+WRITE = <0xC0100304,0x00800400> ;DRAM Config 2 FSP WR FSP OP FSP=00
+WRITE = <0xC0100300,0x00000004> ;DRAM Config 1
+WRITE = <0xC010030C,0x00000000>
+WRITE = <0xC0100310,0x00020000>
+WRITE = <0xC010038C,0x000A00C8> ;ZQC timing 0
+WRITE = <0xC0100390,0x00120048> ;ZQC timing 1
+WRITE = <0xC0100394,0x002300CB> ;Refresh timing
+WRITE = <0xC0100398,0x00260026> ;SelfRefresh timing 0
+WRITE = <0xC010039C,0x00200404> ;SelfRefresh timing 1
+WRITE = <0xC01003A0,0x01040202> ;Power down timing 0
+WRITE = <0xC01003A4,0x00000001> ;Power down timing 1
+WRITE = <0xC01003A8,0x00000205> ;MRS timing
+WRITE = <0xC01003AC,0x0E10050C> ;ACT timing
+WRITE = <0xC01003B0,0x06040205> ;Pre-Charge timing
+WRITE = <0xC01003B4,0x02000400> ;CAS/RAS timing 0
+WRITE = <0xC01003B8,0x00010200> ;CAS/RAS timing 1
+WRITE = <0xC01003BC,0x02020404> ;Off-spec timing 0
+WRITE = <0xC01003C0,0x00000006> ;Off-spec timing 1
+WRITE = <0xC01003C4,0x00140A01> ;DRAM_read timing
+WRITE = <0xC01003D8,0x025A812D>
+WRITE = <0xC01003DC,0x41081239>
+WRITE = <0xC01003E0,0x00000605>
+WRITE = <0xC0100348,0x00000000>
+WRITE = <0xC010034C,0x00000000>
+WRITE = <0xC01013E4,0x03000100> ;MCK6 DFI phy ctrl register 1 (1to1)
+WRITE = <0xC01013EC,0x0000047E>
+WRITE = <0xC0100304,0x00800400> ;CH0_DRAM_Config_2 select fp0
+WRITE = <0xC0100380,0x0001B207> ;DDR init timing Control 0
+WRITE = <0xC0100384,0x00000038> ;DDR init timing Control 1
+WRITE = <0xC0100388,0x000015B3> ;DDR init timing Control 2
+WRITE = <0xC01013E0,0x00000000> ;FSP_OP = 0
+WRITE = <0xC0143000,0x00000010> ;phy release and reset
+WRITE = <0xC0143000,0x00000011> ;phy release and reset
+WRITE = <0xC0150024,0x00000000>
+OR_VAL = <0xC0150024,0x00000032>
+WRITE = <0xC0140068,0x0000034A>
+WRITE = <0xC0144068,0x0000034A>
+WRITE = <0xC0140064,0x0000034A>
+WRITE = <0xC0144064,0x0000034A>
+WRITE = <0xC0143004,0x00000830>
+WRITE = <0xC0147004,0x00000830>
+WRITE = <0xC0143008,0x0024244B>
+WRITE = <0xC0147008,0x0024244B>
+WRITE = <0xC014300C,0x003636D4>
+WRITE = <0xC014700C,0x003636D4>
+WRITE = <0xC0143010,0x00020482>
+WRITE = <0xC0147010,0x00020482>
+WRITE = <0xC0143014,0x87000000>
+WRITE = <0xC0147014,0x87000000>
+WRITE = <0xC0143018,0x08454018>
+WRITE = <0xC0147018,0x08454018>
+WRITE = <0xC0143020,0x00001077>
+WRITE = <0xC015000C,0x0000010F>
+WRITE = <0xC0150010,0x0000010F>
+WRITE = <0xC0150014,0x0000010F>
+WRITE = <0xC0142028,0x0000000F>
+WRITE = <0xC014202C,0x0000000F>
+WRITE = <0xC0142030,0x0000000F>
+WRITE = <0xC0146028,0x0000000F>
+WRITE = <0xC014602C,0x0000000F>
+WRITE = <0xC0146030,0x0000000F>
+WRITE = <0xC0140060,0x000000FF>
+WRITE = <0xC0141060,0x000000FF>
+WRITE = <0xC0144060,0x000000FF>
+WRITE = <0xC0145060,0x000000FF>
+OR_VAL = <0xC0150000,0x00000001> ;HWDFC_EN
+WRITE = <0xC01013D0,0x11000001> ;MCK6 DFI phy user cmd
+WRITE = <0xD4050028,0x00001200>
+WRITE = <0xD4282CE8,0x00000053>
+WRITE = <0xD4282CE8,0x00000054>
+WRITE = <0xD4282CE8,0x00000053>
+WRITE = <0xD4282CE8,0x00000054>
+WRITE = <0xD4282CE8,0x00000053>
+WRITE = <0xD4282CE8,0x00000053>
+WRITE = <0xD4282CE8,0x00000063>
+WRITE = <0xD4282CE8,0x00000063>
+WRITE = <0xD4282CE8,0x00000064>
+WRITE = <0xD4282CE8,0x00000063>
+WRITE = <0xD4282CE8,0x00000064>
+WRITE = <0xD4282CE8,0x00000064>
+WRITE = <0xD4282CE8,0x00000073>
+WRITE = <0xD4282CE8,0x00000074>
+WRITE = <0xD4282CE8,0x00000074>
+WRITE = <0xD4282CE8,0x00000073>
+WRITE = <0xD4282CE8,0x00000080>
+WRITE = <0xD4282CE8,0x00000081>
+WRITE = <0xD4282CE8,0x00000082>
+WRITE = <0xD4282CE8,0x00000084>
+WRITE = <0xD4050028,0x00001300>
+WRITE = <0xC01013D0,0x11000100> ;MCK6 DFI phy user cmd
+WRITE = <0xC0100020,0x11000001>
+WAIT_FOR_BIT_SET = <0xC0100008,0x00000001,0x00001000>
+WRITE = <0xC0100020,0x11001000>
+WRITE = <0xC0100024,0x11020001>
+WRITE = <0xC0100024,0x11020002>
+WRITE = <0xC0100024,0x11020003>
+WRITE = <0xC01013D0,0x11100000> ;read gate training
+WAIT_FOR_BIT_SET = <0xC01013FC,0x00000006,0x00001000>
+WRITE = <0xC0100074,0x00030A03>
+WRITE = <0xC0100078,0x00000044>
+WRITE = <0xC0100070,0x00000000>
+WRITE = <0xC0100074,0x11000008>
+WRITE = <0xC0100078,0x00000020>
+WRITE = <0xC0100070,0x00000001>
+WRITE = <0xC0100074,0x00000004>
+WRITE = <0xC0100078,0x00002008>
+WRITE = <0xC0100070,0x00000002>
+WRITE = <0xC0100074,0x00000004>
+WRITE = <0xC0100078,0x00002008>
+WRITE = <0xC0100070,0x00000003>
+WRITE = <0xC0100074,0x11000001>
+WRITE = <0xC0100078,0x000013D0>
+WRITE = <0xC0100070,0x00000004>
+WRITE = <0xC0100074,0x00008000>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x00000005>
+WRITE = <0xC0100074,0x00000000>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x00000006>
+WRITE = <0xC0100074,0x00030A03>
+WRITE = <0xC0100078,0x00010044>
+WRITE = <0xC0100070,0x00000007>
+WRITE = <0xC0100074,0x11000100>
+WRITE = <0xC0100078,0x000013D0>
+WRITE = <0xC0100070,0x00000008>
+WRITE = <0xC0100074,0x00008000>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x00000009>
+WRITE = <0xC0100074,0x00008000>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x0000000A>
+WRITE = <0xC0100074,0x11000004>
+WRITE = <0xC0100078,0x00000020>
+WRITE = <0xC0100070,0x0000000B>
+WRITE = <0xC0100074,0x00030A02>
+WRITE = <0xC0100078,0x00010044>
+WRITE = <0xC0100070,0x0000000C>
+WRITE = <0xC0100074,0x11020001>
+WRITE = <0xC0100078,0x00000024>
+WRITE = <0xC0100070,0x0000000D>
+WRITE = <0xC0100074,0x11020002>
+WRITE = <0xC0100078,0x00000024>
+WRITE = <0xC0100070,0x0000000E>
+WRITE = <0xC0100074,0x11100000>
+WRITE = <0xC0100078,0x000013D0>
+WRITE = <0xC0100070,0x0000000F>
+WRITE = <0xC0100074,0x00000006>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x00000010>
+WRITE = <0xC0100074,0x00000006>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x00000011>
+WRITE = <0xC0100074,0x00030A00>
+WRITE = <0xC0100078,0x00020044>
+WRITE = <0xC0100070,0x00000012>
+AND_VAL = <0xD428295C,0xFFFFFFF0> ;hwdfc to 1066mbps
+OR_VAL = <0xD428295C,0x00000000>
+OR_VAL = <0xD42828B0,0x00000020>
+OR_VAL = <0xD42828B0,0x01000000>
+WAIT_FOR_BIT_CLEAR = <0xD42828B0,0x01000000,0x00001000>
+WRITE = <0xC01013D0,0x11100000> ;read gate training
+WAIT_FOR_BIT_SET = <0xC01013FC,0x00000002,0x00001000>
+WRITE = <0xC01013EC,0x00005070>
+WRITE = <0xC01013D0,0x11200000> ;read DQ training
+WAIT_FOR_BIT_SET = <0xC01013FC,0x00000006,0x00001000>
+WRITE = <0xC0143004,0x00000820>
+WRITE = <0xC0147004,0x00000820>
+PP_TABLEHEADER = <0xC0100074,0xC0100078,0xC0100070> ;DDR_TABLEHEADER FOR PRODUCT POINT
+PP_WRITE = <0x00030A03,0x00000044,0x00000060>
+PP_WRITE = <0x00000004,0x00002008,0x00000061>
+PP_WRITE = <0x00000004,0x00002008,0x00000062>
+PP_WRITE = <0x11000001,0x000013D0,0x00000063>
+PP_WRITE = <0x00008000,0x000033FC,0x00000064>
+PP_WRITE = <0x00000000,0x000033FC,0x00000065>
+PP_WRITE = <0x00030A03,0x00010044,0x00000066>
+PP_WRITE = <0x11000100,0x000013D0,0x00000067>
+PP_WRITE = <0x00008000,0x000033FC,0x00000068>
+PP_WRITE = <0x00008000,0x000033FC,0x00000069>
+PP_WRITE = <0x00030A02,0x00010044,0x0000006A>
+PP_WRITE = <0x00030A00,0x00020044,0x0000006B>
+AND_VAL = <0xD428295C,0xFFFFFFF0> ;hwdfc to 533mbps
+OR_VAL = <0xD428295C,0x00000004>
+AND_VAL = <0xD42828B0,0xFFFFFF9F>
+OR_VAL = <0xD42828B0,0x01000000>
+WAIT_FOR_BIT_CLEAR = <0xD42828B0,0x01000000,0x00001000>
+End_Instructions
+END_Vendor_DDR_Initialization
+Vendor_DDR_Initialization
+DDR_PID = 0x0510
+DDROperations
+DDR_INIT_ENABLE = 0x00000001
+DDR_MEMTEST_ENABLE = 0x00000000
+End_DDROperations
+Instructions
+WRITE = <0xD428285C,0x0000000B> ;pull down usb dp/dm
+WRITE = <0xD4207094,0x0000E504> ;pull down usb dp/dm
+WRITE = <0xD42070A4,0x00005888> ;pull down usb dp/dm
+WRITE = <0xD420702C,0x00000000> ;suspend usb
+WRITE = <0xD4207028,0x00003000> ;suspend usb
+WRITE = <0xD4282948,0x4A200063>
+WRITE = <0xD428294C,0x29006000> ;PLL 1066
+WRITE = <0xD4282950,0x50C5000C>
+WRITE = <0xD428295C,0x00C20000>
+WAIT_FOR_BIT_SET = <0xD428295C,0x00400000,0x00001000>
+DELAY = <0x00001000> ;WAITING FOR DDR_VREF
+AND_VAL = <0xD428295C,0xFFFFFFF0>
+OR_VAL = <0xD428295C,0x00000004> ;set div4 533mbps
+OR_VAL = <0xD42828B0,0x02000000>
+WAIT_FOR_BIT_CLEAR = <0xD42828B0,0x02000000,0x00001000>
+WRITE = <0xD42828F4,0xC0000000>
+WRITE = <0xD42828F4,0xC0000003>
+WRITE = <0xD4282D18,0x33221133>
+WRITE = <0xC0100044,0x00030A00> ;MC_Control_0
+WRITE = <0xC0100048,0x00000001> ;MC_excu_en
+WRITE = <0xC010004C,0x00000000>
+WRITE = <0xC0100064,0x0A040502>
+WRITE = <0xC0100050,0x0007E2FF>
+WRITE = <0xC0100054,0x00000480>
+WRITE = <0xC0100058,0x10356285>
+WRITE = <0xC010005C,0x000494E4>
+WRITE = <0xC0100180,0x00030200>
+WRITE = <0xC0100200,0x000C0001> ;Memory Address Map Register Low CS0
+WRITE = <0xC0100204,0x00000000> ;Memory Address Map Register high CS0
+WRITE = <0xC0100220,0x04000432> ;Configuration Register CS0
+WRITE = <0xC01002C0,0x0000E000>
+WRITE = <0xC01002C4,0x00000098> ;MC_Control_2
+WRITE = <0xC0100304,0x50800400> ;DRAM Config 2 FSP WR FSP OP FSP=01
+WRITE = <0xC0100300,0x00000008> ;DRAM Config 1
+WRITE = <0xC010030C,0x00000000> ;no pre and post amble
+WRITE = <0xC0100310,0x00020000> ;drive strength 60ohm
+WRITE = <0xC010038C,0x001B0216> ;ZQC timing 0
+WRITE = <0xC0100390,0x003000C0> ;ZQC timing 1
+WRITE = <0xC0100394,0x00460065> ;Refresh timing
+WRITE = <0xC0100398,0x01000100> ;SelfRefresh timing 0
+WRITE = <0xC010039C,0x00200808> ;SelfRefresh timing 1
+WRITE = <0xC01003A0,0x01080404> ;Power down timing 0
+WRITE = <0xC01003A4,0x00000001> ;Power down timing 1
+WRITE = <0xC01003A8,0x00000205> ;MRS timing
+WRITE = <0xC01003AC,0x1B200A17> ;ACT timing
+WRITE = <0xC01003B0,0x0C08040A> ;Pre-Charge timing
+WRITE = <0xC01003B4,0x02000400> ;CAS/RAS timing 0
+WRITE = <0xC01003B8,0x00010600> ;CAS/RAS timing 1
+WRITE = <0xC01003BC,0x02020404> ;Off-spec timing 0
+WRITE = <0xC01003C0,0x00000006> ;Off-spec timing 1
+WRITE = <0xC01003C4,0x00140A03> ;DRAM_read timing
+WRITE = <0xC01003D8,0x025A812D>
+WRITE = <0xC01003DC,0x41081239>
+WRITE = <0xC01003E0,0x00000605>
+WRITE = <0xC0100348,0x00000000>
+WRITE = <0xC010034C,0x00000000>
+WRITE = <0xC01013E4,0x05000300> ;MCK6 DFI phy ctrl register 1 (4to1)
+WRITE = <0xC01013EC,0x0000047E>
+WRITE = <0xC0100304,0x00800400> ;DRAM Config 2 FSP WR FSP OP FSP=00
+WRITE = <0xC0100300,0x00000004> ;DRAM Config 1
+WRITE = <0xC010030C,0x00000000>
+WRITE = <0xC0100310,0x00020000>
+WRITE = <0xC010038C,0x000A00C8> ;ZQC timing 0
+WRITE = <0xC0100390,0x00120048> ;ZQC timing 1
+WRITE = <0xC0100394,0x00230065> ;Refresh timing
+WRITE = <0xC0100398,0x00260026> ;SelfRefresh timing 0
+WRITE = <0xC010039C,0x00200404> ;SelfRefresh timing 1
+WRITE = <0xC01003A0,0x01040202> ;Power down timing 0
+WRITE = <0xC01003A4,0x00000001> ;Power down timing 1
+WRITE = <0xC01003A8,0x00000205> ;MRS timing
+WRITE = <0xC01003AC,0x0E10050C> ;ACT timing
+WRITE = <0xC01003B0,0x06040205> ;Pre-Charge timing
+WRITE = <0xC01003B4,0x02000400> ;CAS/RAS timing 0
+WRITE = <0xC01003B8,0x00010200> ;CAS/RAS timing 1
+WRITE = <0xC01003BC,0x02020404> ;Off-spec timing 0
+WRITE = <0xC01003C0,0x00000006> ;Off-spec timing 1
+WRITE = <0xC01003C4,0x00140A01> ;DRAM_read timing
+WRITE = <0xC01003D8,0x025A812D>
+WRITE = <0xC01003DC,0x41081239>
+WRITE = <0xC01003E0,0x00000605>
+WRITE = <0xC0100348,0x00000000>
+WRITE = <0xC010034C,0x00000000>
+WRITE = <0xC01013E4,0x03000100> ;MCK6 DFI phy ctrl register 1 (1to1)
+WRITE = <0xC01013EC,0x0000047E>
+WRITE = <0xC0100304,0x00800400> ;CH0_DRAM_Config_2 select fp0
+WRITE = <0xC0100380,0x0001B207> ;DDR init timing Control 0
+WRITE = <0xC0100384,0x00000038> ;DDR init timing Control 1
+WRITE = <0xC0100388,0x000015B3> ;DDR init timing Control 2
+WRITE = <0xC01013E0,0x00000000> ;FSP_OP = 0
+WRITE = <0xC0143000,0x00000010> ;phy release and reset
+WRITE = <0xC0143000,0x00000011> ;phy release and reset
+WRITE = <0xC0150024,0x00000000>
+OR_VAL = <0xC0150024,0x00000032>
+WRITE = <0xC0140068,0x0000034A>
+WRITE = <0xC0144068,0x0000034A>
+WRITE = <0xC0140064,0x0000034A>
+WRITE = <0xC0144064,0x0000034A>
+WRITE = <0xC0143004,0x00000830>
+WRITE = <0xC0147004,0x00000830>
+WRITE = <0xC0143008,0x0024244B>
+WRITE = <0xC0147008,0x0024244B>
+WRITE = <0xC014300C,0x003636D4>
+WRITE = <0xC014700C,0x003636D4>
+WRITE = <0xC0143010,0x00020482>
+WRITE = <0xC0147010,0x00020482>
+WRITE = <0xC0143014,0x87000000>
+WRITE = <0xC0147014,0x87000000>
+WRITE = <0xC0143018,0x08454018>
+WRITE = <0xC0147018,0x08454018>
+WRITE = <0xC0143020,0x00001077>
+WRITE = <0xC015000C,0x0000010F>
+WRITE = <0xC0150010,0x0000010F>
+WRITE = <0xC0150014,0x0000010F>
+WRITE = <0xC0142028,0x0000000F>
+WRITE = <0xC014202C,0x0000000F>
+WRITE = <0xC0142030,0x0000000F>
+WRITE = <0xC0146028,0x0000000F>
+WRITE = <0xC014602C,0x0000000F>
+WRITE = <0xC0146030,0x0000000F>
+WRITE = <0xC0140060,0x000000FF>
+WRITE = <0xC0141060,0x000000FF>
+WRITE = <0xC0144060,0x000000FF>
+WRITE = <0xC0145060,0x000000FF>
+OR_VAL = <0xC0150000,0x00000001> ;HWDFC_EN
+WRITE = <0xC01013D0,0x11000001> ;MCK6 DFI phy user cmd
+WRITE = <0xD4050028,0x00001200>
+WRITE = <0xD4282CE8,0x00000053>
+WRITE = <0xD4282CE8,0x00000054>
+WRITE = <0xD4282CE8,0x00000053>
+WRITE = <0xD4282CE8,0x00000054>
+WRITE = <0xD4282CE8,0x00000053>
+WRITE = <0xD4282CE8,0x00000053>
+WRITE = <0xD4282CE8,0x00000063>
+WRITE = <0xD4282CE8,0x00000063>
+WRITE = <0xD4282CE8,0x00000064>
+WRITE = <0xD4282CE8,0x00000063>
+WRITE = <0xD4282CE8,0x00000064>
+WRITE = <0xD4282CE8,0x00000064>
+WRITE = <0xD4282CE8,0x00000073>
+WRITE = <0xD4282CE8,0x00000074>
+WRITE = <0xD4282CE8,0x00000074>
+WRITE = <0xD4282CE8,0x00000073>
+WRITE = <0xD4282CE8,0x00000080>
+WRITE = <0xD4282CE8,0x00000081>
+WRITE = <0xD4282CE8,0x00000082>
+WRITE = <0xD4282CE8,0x00000084>
+WRITE = <0xD4050028,0x00001300>
+WRITE = <0xC01013D0,0x11000100> ;MCK6 DFI phy user cmd
+WRITE = <0xC0100020,0x11000001>
+WAIT_FOR_BIT_SET = <0xC0100008,0x00000001,0x00001000>
+WRITE = <0xC0100020,0x11001000>
+WRITE = <0xC0100024,0x11020001>
+WRITE = <0xC0100024,0x11020002>
+WRITE = <0xC0100024,0x11020003>
+WRITE = <0xC01013D0,0x11100000> ;read gate training
+WAIT_FOR_BIT_SET = <0xC01013FC,0x00000006,0x00001000>
+WRITE = <0xC0100074,0x00030A03>
+WRITE = <0xC0100078,0x00000044>
+WRITE = <0xC0100070,0x00000000>
+WRITE = <0xC0100074,0x11000008>
+WRITE = <0xC0100078,0x00000020>
+WRITE = <0xC0100070,0x00000001>
+WRITE = <0xC0100074,0x00000004>
+WRITE = <0xC0100078,0x00002008>
+WRITE = <0xC0100070,0x00000002>
+WRITE = <0xC0100074,0x00000004>
+WRITE = <0xC0100078,0x00002008>
+WRITE = <0xC0100070,0x00000003>
+WRITE = <0xC0100074,0x11000001>
+WRITE = <0xC0100078,0x000013D0>
+WRITE = <0xC0100070,0x00000004>
+WRITE = <0xC0100074,0x00008000>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x00000005>
+WRITE = <0xC0100074,0x00000000>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x00000006>
+WRITE = <0xC0100074,0x00030A03>
+WRITE = <0xC0100078,0x00010044>
+WRITE = <0xC0100070,0x00000007>
+WRITE = <0xC0100074,0x11000100>
+WRITE = <0xC0100078,0x000013D0>
+WRITE = <0xC0100070,0x00000008>
+WRITE = <0xC0100074,0x00008000>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x00000009>
+WRITE = <0xC0100074,0x00008000>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x0000000A>
+WRITE = <0xC0100074,0x11000004>
+WRITE = <0xC0100078,0x00000020>
+WRITE = <0xC0100070,0x0000000B>
+WRITE = <0xC0100074,0x00030A02>
+WRITE = <0xC0100078,0x00010044>
+WRITE = <0xC0100070,0x0000000C>
+WRITE = <0xC0100074,0x11020001>
+WRITE = <0xC0100078,0x00000024>
+WRITE = <0xC0100070,0x0000000D>
+WRITE = <0xC0100074,0x11020002>
+WRITE = <0xC0100078,0x00000024>
+WRITE = <0xC0100070,0x0000000E>
+WRITE = <0xC0100074,0x11100000>
+WRITE = <0xC0100078,0x000013D0>
+WRITE = <0xC0100070,0x0000000F>
+WRITE = <0xC0100074,0x00000006>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x00000010>
+WRITE = <0xC0100074,0x00000006>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x00000011>
+WRITE = <0xC0100074,0x00030A00>
+WRITE = <0xC0100078,0x00020044>
+WRITE = <0xC0100070,0x00000012>
+AND_VAL = <0xD428295C,0xFFFFFFF0> ;hwdfc to 1066mbps
+OR_VAL = <0xD428295C,0x00000000>
+OR_VAL = <0xD42828B0,0x00000020>
+OR_VAL = <0xD42828B0,0x01000000>
+WAIT_FOR_BIT_CLEAR = <0xD42828B0,0x01000000,0x00001000>
+WRITE = <0xC01013D0,0x11100000> ;read gate training
+WAIT_FOR_BIT_SET = <0xC01013FC,0x00000002,0x00001000>
+WRITE = <0xC01013EC,0x00005070>
+WRITE = <0xC01013D0,0x11200000> ;read DQ training
+WAIT_FOR_BIT_SET = <0xC01013FC,0x00000006,0x00001000>
+WRITE = <0xC0143004,0x00000820>
+WRITE = <0xC0147004,0x00000820>
+PP_TABLEHEADER = <0xC0100074,0xC0100078,0xC0100070> ;DDR_TABLEHEADER FOR PRODUCT POINT
+PP_WRITE = <0x00030A03,0x00000044,0x00000060>
+PP_WRITE = <0x00000004,0x00002008,0x00000061>
+PP_WRITE = <0x00000004,0x00002008,0x00000062>
+PP_WRITE = <0x11000001,0x000013D0,0x00000063>
+PP_WRITE = <0x00008000,0x000033FC,0x00000064>
+PP_WRITE = <0x00000000,0x000033FC,0x00000065>
+PP_WRITE = <0x00030A03,0x00010044,0x00000066>
+PP_WRITE = <0x11000100,0x000013D0,0x00000067>
+PP_WRITE = <0x00008000,0x000033FC,0x00000068>
+PP_WRITE = <0x00008000,0x000033FC,0x00000069>
+PP_WRITE = <0x00030A02,0x00010044,0x0000006A>
+PP_WRITE = <0x00030A00,0x00020044,0x0000006B>
+AND_VAL = <0xD428295C,0xFFFFFFF0> ;hwdfc to 533mbps
+OR_VAL = <0xD428295C,0x00000004>
+AND_VAL = <0xD42828B0,0xFFFFFF9F>
+OR_VAL = <0xD42828B0,0x01000000>
+WAIT_FOR_BIT_CLEAR = <0xD42828B0,0x01000000,0x00001000>
+End_Instructions
+END_Vendor_DDR_Initialization
+Vendor_DDR_Initialization
+DDR_PID = 0x0908
+DDROperations
+DDR_INIT_ENABLE = 0x00000001
+DDR_MEMTEST_ENABLE = 0x00000000
+End_DDROperations
+Instructions
+WRITE = <0xD428285C,0x0000000B> ;pull down usb dp/dm
+WRITE = <0xD4207094,0x0000E504> ;pull down usb dp/dm
+WRITE = <0xD42070A4,0x00005888> ;pull down usb dp/dm
+WRITE = <0xD420702C,0x00000000> ;suspend usb
+WRITE = <0xD4207028,0x00003000> ;suspend usb
+WRITE = <0xD4282948,0x4A200063>
+WRITE = <0xD428294C,0x29006000> ;PLL 1066
+WRITE = <0xD4282950,0x50C5000C>
+WRITE = <0xD428295C,0x00C20000>
+WAIT_FOR_BIT_SET = <0xD428295C,0x00400000,0x00001000>
+DELAY = <0x00001000> ;WAITING FOR DDR_VREF
+AND_VAL = <0xD428295C,0xFFFFFFF0>
+OR_VAL = <0xD428295C,0x00000004> ;set div4 533mbps
+OR_VAL = <0xD42828B0,0x02000000>
+WAIT_FOR_BIT_CLEAR = <0xD42828B0,0x02000000,0x00001000>
+WRITE = <0xD42828F4,0xC0000000>
+WRITE = <0xD42828F4,0xC0000003>
+WRITE = <0xD4282D18,0x33221133>
+WRITE = <0xC0100044,0x00030A00> ;MC_Control_0
+WRITE = <0xC0100048,0x00000001> ;MC_excu_en
+WRITE = <0xC010004C,0x00000000>
+WRITE = <0xC0100064,0x0A040502>
+WRITE = <0xC0100050,0x0007E2FF>
+WRITE = <0xC0100054,0x00000480>
+WRITE = <0xC0100058,0x10356285>
+WRITE = <0xC010005C,0x000494E4>
+WRITE = <0xC0100180,0x00030200>
+WRITE = <0xC0100200,0x000B0001> ;Memory Address Map Register Low CS0
+WRITE = <0xC0100204,0x00000000> ;Memory Address Map Register high CS0
+WRITE = <0xC0100220,0x04000332> ;Configuration Register CS0
+WRITE = <0xC01002C0,0x0000E000>
+WRITE = <0xC01002C4,0x00000098> ;MC_Control_2
+WRITE = <0xC0100304,0x50800400> ;DRAM Config 2 FSP WR FSP OP FSP=01
+WRITE = <0xC0100300,0x00000008> ;DRAM Config 1
+WRITE = <0xC010030C,0x00000000> ;no pre and post amble
+WRITE = <0xC0100310,0x00020000> ;drive strength 60ohm
+WRITE = <0xC010038C,0x001B0216> ;ZQC timing 0
+WRITE = <0xC0100390,0x003000C0> ;ZQC timing 1
+WRITE = <0xC0100394,0x004600CB> ;Refresh timing
+WRITE = <0xC0100398,0x01000100> ;SelfRefresh timing 0
+WRITE = <0xC010039C,0x00200808> ;SelfRefresh timing 1
+WRITE = <0xC01003A0,0x01080404> ;Power down timing 0
+WRITE = <0xC01003A4,0x00000001> ;Power down timing 1
+WRITE = <0xC01003A8,0x00000205> ;MRS timing
+WRITE = <0xC01003AC,0x1B200A17> ;ACT timing
+WRITE = <0xC01003B0,0x0C08040A> ;Pre-Charge timing
+WRITE = <0xC01003B4,0x02000400> ;CAS/RAS timing 0
+WRITE = <0xC01003B8,0x00010600> ;CAS/RAS timing 1
+WRITE = <0xC01003BC,0x02020404> ;Off-spec timing 0
+WRITE = <0xC01003C0,0x00000006> ;Off-spec timing 1
+WRITE = <0xC01003C4,0x00140A03> ;DRAM_read timing
+WRITE = <0xC01003D8,0x025A812D>
+WRITE = <0xC01003DC,0x41081239>
+WRITE = <0xC01003E0,0x00000605>
+WRITE = <0xC0100348,0x00000000>
+WRITE = <0xC010034C,0x00000000>
+WRITE = <0xC01013E4,0x05000300> ;MCK6 DFI phy ctrl register 1 (4to1)
+WRITE = <0xC01013EC,0x0000047E>
+WRITE = <0xC0100304,0x00800400> ;DRAM Config 2 FSP WR FSP OP FSP=00
+WRITE = <0xC0100300,0x00000004> ;DRAM Config 1
+WRITE = <0xC010030C,0x00000000>
+WRITE = <0xC0100310,0x00020000>
+WRITE = <0xC010038C,0x000A00C8> ;ZQC timing 0
+WRITE = <0xC0100390,0x00120048> ;ZQC timing 1
+WRITE = <0xC0100394,0x002300CB> ;Refresh timing
+WRITE = <0xC0100398,0x00260026> ;SelfRefresh timing 0
+WRITE = <0xC010039C,0x00200404> ;SelfRefresh timing 1
+WRITE = <0xC01003A0,0x01040202> ;Power down timing 0
+WRITE = <0xC01003A4,0x00000001> ;Power down timing 1
+WRITE = <0xC01003A8,0x00000205> ;MRS timing
+WRITE = <0xC01003AC,0x0E10050C> ;ACT timing
+WRITE = <0xC01003B0,0x06040205> ;Pre-Charge timing
+WRITE = <0xC01003B4,0x02000400> ;CAS/RAS timing 0
+WRITE = <0xC01003B8,0x00010200> ;CAS/RAS timing 1
+WRITE = <0xC01003BC,0x02020404> ;Off-spec timing 0
+WRITE = <0xC01003C0,0x00000006> ;Off-spec timing 1
+WRITE = <0xC01003C4,0x00140A01> ;DRAM_read timing
+WRITE = <0xC01003D8,0x025A812D>
+WRITE = <0xC01003DC,0x41081239>
+WRITE = <0xC01003E0,0x00000605>
+WRITE = <0xC0100348,0x00000000>
+WRITE = <0xC010034C,0x00000000>
+WRITE = <0xC01013E4,0x03000100> ;MCK6 DFI phy ctrl register 1 (1to1)
+WRITE = <0xC01013EC,0x0000047E>
+WRITE = <0xC0100304,0x00800400> ;CH0_DRAM_Config_2 select fp0
+WRITE = <0xC0100380,0x0001B207> ;DDR init timing Control 0
+WRITE = <0xC0100384,0x00000038> ;DDR init timing Control 1
+WRITE = <0xC0100388,0x000015B3> ;DDR init timing Control 2
+WRITE = <0xC01013E0,0x00000000> ;FSP_OP = 0
+WRITE = <0xC0143000,0x00000010> ;phy release and reset
+WRITE = <0xC0143000,0x00000011> ;phy release and reset
+WRITE = <0xC0150024,0x00000000>
+OR_VAL = <0xC0150024,0x00000032>
+WRITE = <0xC0140068,0x0000034A>
+WRITE = <0xC0144068,0x0000034A>
+WRITE = <0xC0140064,0x0000034A>
+WRITE = <0xC0144064,0x0000034A>
+WRITE = <0xC0143004,0x00000830>
+WRITE = <0xC0147004,0x00000830>
+WRITE = <0xC0143008,0x0024244B>
+WRITE = <0xC0147008,0x0024244B>
+WRITE = <0xC014300C,0x003636D4>
+WRITE = <0xC014700C,0x003636D4>
+WRITE = <0xC0143010,0x00020482>
+WRITE = <0xC0147010,0x00020482>
+WRITE = <0xC0143014,0x87000000>
+WRITE = <0xC0147014,0x87000000>
+WRITE = <0xC0143018,0x08454018>
+WRITE = <0xC0147018,0x08454018>
+WRITE = <0xC0143020,0x00001077>
+WRITE = <0xC015000C,0x0000010F>
+WRITE = <0xC0150010,0x0000010F>
+WRITE = <0xC0150014,0x0000010F>
+WRITE = <0xC0142028,0x0000000F>
+WRITE = <0xC014202C,0x0000000F>
+WRITE = <0xC0142030,0x0000000F>
+WRITE = <0xC0146028,0x0000000F>
+WRITE = <0xC014602C,0x0000000F>
+WRITE = <0xC0146030,0x0000000F>
+WRITE = <0xC0140060,0x000000FF>
+WRITE = <0xC0141060,0x000000FF>
+WRITE = <0xC0144060,0x000000FF>
+WRITE = <0xC0145060,0x000000FF>
+OR_VAL = <0xC0150000,0x00000001> ;HWDFC_EN
+WRITE = <0xC01013D0,0x11000001> ;MCK6 DFI phy user cmd
+WRITE = <0xD4050028,0x00001200>
+WRITE = <0xD4282CE8,0x00000053>
+WRITE = <0xD4282CE8,0x00000054>
+WRITE = <0xD4282CE8,0x00000053>
+WRITE = <0xD4282CE8,0x00000054>
+WRITE = <0xD4282CE8,0x00000053>
+WRITE = <0xD4282CE8,0x00000053>
+WRITE = <0xD4282CE8,0x00000063>
+WRITE = <0xD4282CE8,0x00000063>
+WRITE = <0xD4282CE8,0x00000064>
+WRITE = <0xD4282CE8,0x00000063>
+WRITE = <0xD4282CE8,0x00000064>
+WRITE = <0xD4282CE8,0x00000064>
+WRITE = <0xD4282CE8,0x00000073>
+WRITE = <0xD4282CE8,0x00000074>
+WRITE = <0xD4282CE8,0x00000074>
+WRITE = <0xD4282CE8,0x00000073>
+WRITE = <0xD4282CE8,0x00000080>
+WRITE = <0xD4282CE8,0x00000081>
+WRITE = <0xD4282CE8,0x00000082>
+WRITE = <0xD4282CE8,0x00000084>
+WRITE = <0xD4050028,0x00001300>
+WRITE = <0xC01013D0,0x11000100> ;MCK6 DFI phy user cmd
+WRITE = <0xC0100020,0x11000001>
+WAIT_FOR_BIT_SET = <0xC0100008,0x00000001,0x00001000>
+WRITE = <0xC0100020,0x11001000>
+WRITE = <0xC0100024,0x11020001>
+WRITE = <0xC0100024,0x11020002>
+WRITE = <0xC0100024,0x11020003>
+WRITE = <0xC01013D0,0x11100000> ;read gate training
+WAIT_FOR_BIT_SET = <0xC01013FC,0x00000006,0x00001000>
+WRITE = <0xC0100074,0x00030A03>
+WRITE = <0xC0100078,0x00000044>
+WRITE = <0xC0100070,0x00000000>
+WRITE = <0xC0100074,0x11000008>
+WRITE = <0xC0100078,0x00000020>
+WRITE = <0xC0100070,0x00000001>
+WRITE = <0xC0100074,0x00000004>
+WRITE = <0xC0100078,0x00002008>
+WRITE = <0xC0100070,0x00000002>
+WRITE = <0xC0100074,0x00000004>
+WRITE = <0xC0100078,0x00002008>
+WRITE = <0xC0100070,0x00000003>
+WRITE = <0xC0100074,0x11000001>
+WRITE = <0xC0100078,0x000013D0>
+WRITE = <0xC0100070,0x00000004>
+WRITE = <0xC0100074,0x00008000>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x00000005>
+WRITE = <0xC0100074,0x00000000>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x00000006>
+WRITE = <0xC0100074,0x00030A03>
+WRITE = <0xC0100078,0x00010044>
+WRITE = <0xC0100070,0x00000007>
+WRITE = <0xC0100074,0x11000100>
+WRITE = <0xC0100078,0x000013D0>
+WRITE = <0xC0100070,0x00000008>
+WRITE = <0xC0100074,0x00008000>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x00000009>
+WRITE = <0xC0100074,0x00008000>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x0000000A>
+WRITE = <0xC0100074,0x11000004>
+WRITE = <0xC0100078,0x00000020>
+WRITE = <0xC0100070,0x0000000B>
+WRITE = <0xC0100074,0x00030A02>
+WRITE = <0xC0100078,0x00010044>
+WRITE = <0xC0100070,0x0000000C>
+WRITE = <0xC0100074,0x11020001>
+WRITE = <0xC0100078,0x00000024>
+WRITE = <0xC0100070,0x0000000D>
+WRITE = <0xC0100074,0x11020002>
+WRITE = <0xC0100078,0x00000024>
+WRITE = <0xC0100070,0x0000000E>
+WRITE = <0xC0100074,0x11100000>
+WRITE = <0xC0100078,0x000013D0>
+WRITE = <0xC0100070,0x0000000F>
+WRITE = <0xC0100074,0x00000006>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x00000010>
+WRITE = <0xC0100074,0x00000006>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x00000011>
+WRITE = <0xC0100074,0x00030A00>
+WRITE = <0xC0100078,0x00020044>
+WRITE = <0xC0100070,0x00000012>
+AND_VAL = <0xD428295C,0xFFFFFFF0> ;hwdfc to 1066mbps
+OR_VAL = <0xD428295C,0x00000000>
+OR_VAL = <0xD42828B0,0x00000020>
+OR_VAL = <0xD42828B0,0x01000000>
+WAIT_FOR_BIT_CLEAR = <0xD42828B0,0x01000000,0x00001000>
+WRITE = <0xC01013D0,0x11100000> ;read gate training
+WAIT_FOR_BIT_SET = <0xC01013FC,0x00000002,0x00001000>
+WRITE = <0xC01013EC,0x00005070>
+WRITE = <0xC01013D0,0x11200000> ;read DQ training
+WAIT_FOR_BIT_SET = <0xC01013FC,0x00000006,0x00001000>
+WRITE = <0xC0143004,0x00000820>
+WRITE = <0xC0147004,0x00000820>
+PP_TABLEHEADER = <0xC0100074,0xC0100078,0xC0100070> ;DDR_TABLEHEADER FOR PRODUCT POINT
+PP_WRITE = <0x00030A03,0x00000044,0x00000060>
+PP_WRITE = <0x00000004,0x00002008,0x00000061>
+PP_WRITE = <0x00000004,0x00002008,0x00000062>
+PP_WRITE = <0x11000001,0x000013D0,0x00000063>
+PP_WRITE = <0x00008000,0x000033FC,0x00000064>
+PP_WRITE = <0x00000000,0x000033FC,0x00000065>
+PP_WRITE = <0x00030A03,0x00010044,0x00000066>
+PP_WRITE = <0x11000100,0x000013D0,0x00000067>
+PP_WRITE = <0x00008000,0x000033FC,0x00000068>
+PP_WRITE = <0x00008000,0x000033FC,0x00000069>
+PP_WRITE = <0x00030A02,0x00010044,0x0000006A>
+PP_WRITE = <0x00030A00,0x00020044,0x0000006B>
+AND_VAL = <0xD428295C,0xFFFFFFF0> ;hwdfc to 533mbps
+OR_VAL = <0xD428295C,0x00000004>
+AND_VAL = <0xD42828B0,0xFFFFFF9F>
+OR_VAL = <0xD42828B0,0x01000000>
+WAIT_FOR_BIT_CLEAR = <0xD42828B0,0x01000000,0x00001000>
+End_Instructions
+END_Vendor_DDR_Initialization
+Vendor_DDR_Initialization
+DDR_PID = 0x0920
+DDROperations
+DDR_INIT_ENABLE = 0x00000001
+DDR_MEMTEST_ENABLE = 0x00000000
+End_DDROperations
+Instructions
+WRITE = <0xD428285C,0x0000000B> ;pull down usb dp/dm
+WRITE = <0xD4207094,0x0000E504> ;pull down usb dp/dm
+WRITE = <0xD42070A4,0x00005888> ;pull down usb dp/dm
+WRITE = <0xD420702C,0x00000000> ;suspend usb
+WRITE = <0xD4207028,0x00003000> ;suspend usb
+WRITE = <0xD4282948,0x4A200063>
+WRITE = <0xD428294C,0x29006000> ;PLL 1066
+WRITE = <0xD4282950,0x50C5000C>
+WRITE = <0xD428295C,0x00C20000>
+WAIT_FOR_BIT_SET = <0xD428295C,0x00400000,0x00001000>
+DELAY = <0x00001000> ;WAITING FOR DDR_VREF
+AND_VAL = <0xD428295C,0xFFFFFFF0>
+OR_VAL = <0xD428295C,0x00000004> ;set div4 533mbps
+OR_VAL = <0xD42828B0,0x02000000>
+WAIT_FOR_BIT_CLEAR = <0xD42828B0,0x02000000,0x00001000>
+WRITE = <0xD42828F4,0xC0000000>
+WRITE = <0xD42828F4,0xC0000003>
+WRITE = <0xD4282D18,0x33221133>
+WRITE = <0xC0100044,0x00030A00> ;MC_Control_0
+WRITE = <0xC0100048,0x00000001> ;MC_excu_en
+WRITE = <0xC010004C,0x00000000>
+WRITE = <0xC0100064,0x0A040502>
+WRITE = <0xC0100050,0x0007E2FF>
+WRITE = <0xC0100054,0x00000480>
+WRITE = <0xC0100058,0x10356285>
+WRITE = <0xC010005C,0x000494E4>
+WRITE = <0xC0100180,0x00030200>
+WRITE = <0xC0100200,0x000C0001> ;Memory Address Map Register Low CS0
+WRITE = <0xC0100204,0x00000000> ;Memory Address Map Register high CS0
+WRITE = <0xC0100208,0x100C0001> ;Memory Address Map Register Low CS1
+WRITE = <0xC010020C,0x00000000> ;Memory Address Map Register High CS1
+WRITE = <0xC0100220,0x04000432> ;Configuration Register CS0
+WRITE = <0xC0100224,0x04000432> ;Configuration Register CS1
+WRITE = <0xC01002C0,0x0000E000>
+WRITE = <0xC01002C4,0x00000098> ;MC_Control_2
+WRITE = <0xC0100304,0x50800400> ;DRAM Config 2 FSP WR FSP OP FSP=01
+WRITE = <0xC0100300,0x00000008> ;DRAM Config 1
+WRITE = <0xC010030C,0x00000000> ;no pre and post amble
+WRITE = <0xC0100310,0x00020000> ;drive strength 40ohm
+WRITE = <0xC0100314,0x00020000> ;drive strength 40ohm
+WRITE = <0xC010038C,0x001B0216> ;ZQC timing 0
+WRITE = <0xC0100390,0x003000C0> ;ZQC timing 1
+WRITE = <0xC0100394,0x00460065> ;Refresh timing
+WRITE = <0xC0100398,0x01000100> ;SelfRefresh timing 0
+WRITE = <0xC010039C,0x00200808> ;SelfRefresh timing 1
+WRITE = <0xC01003A0,0x01080404> ;Power down timing 0
+WRITE = <0xC01003A4,0x00000001> ;Power down timing 1
+WRITE = <0xC01003A8,0x00000205> ;MRS timing
+WRITE = <0xC01003AC,0x1B200A17> ;ACT timing
+WRITE = <0xC01003B0,0x0C08040A> ;Pre-Charge timing
+WRITE = <0xC01003B4,0x02000400> ;CAS/RAS timing 0
+WRITE = <0xC01003B8,0x00010600> ;CAS/RAS timing 1
+WRITE = <0xC01003BC,0x02020404> ;Off-spec timing 0
+WRITE = <0xC01003C0,0x00000006> ;Off-spec timing 1
+WRITE = <0xC01003C4,0x00140A03> ;DRAM_read timing
+WRITE = <0xC01003D8,0x025A812D>
+WRITE = <0xC01003DC,0x41081239>
+WRITE = <0xC01003E0,0x00000605>
+WRITE = <0xC0100348,0x00000000>
+WRITE = <0xC010034C,0x00000000>
+WRITE = <0xC01013E4,0x05000300> ;MCK6 DFI phy ctrl register 1 (4to1)
+WRITE = <0xC01013EC,0x0000047E>
+WRITE = <0xC0100304,0x00800400> ;DRAM Config 2 FSP WR FSP OP FSP=00
+WRITE = <0xC0100300,0x00000004> ;DRAM Config 1
+WRITE = <0xC010030C,0x00000000>
+WRITE = <0xC0100310,0x00020000>
+WRITE = <0xC0100314,0x00020000>
+WRITE = <0xC010038C,0x000A00C8> ;ZQC timing 0
+WRITE = <0xC0100390,0x00120048> ;ZQC timing 1
+WRITE = <0xC0100394,0x00230065> ;Refresh timing
+WRITE = <0xC0100398,0x01000100> ;SelfRefresh timing 0
+WRITE = <0xC010039C,0x00200404> ;SelfRefresh timing 1
+WRITE = <0xC01003A0,0x01040202> ;Power down timing 0
+WRITE = <0xC01003A4,0x00000001> ;Power down timing 1
+WRITE = <0xC01003A8,0x00000205> ;MRS timing
+WRITE = <0xC01003AC,0x0E10050C> ;ACT timing
+WRITE = <0xC01003B0,0x06040205> ;Pre-Charge timing
+WRITE = <0xC01003B4,0x02000400> ;CAS/RAS timing 0
+WRITE = <0xC01003B8,0x00010200> ;CAS/RAS timing 1
+WRITE = <0xC01003BC,0x02020404> ;Off-spec timing 0
+WRITE = <0xC01003C0,0x00000006> ;Off-spec timing 1
+WRITE = <0xC01003C4,0x00140A01> ;DRAM_read timing
+WRITE = <0xC01003D8,0x025A812D>
+WRITE = <0xC01003DC,0x41081239>
+WRITE = <0xC01003E0,0x00000605>
+WRITE = <0xC0100348,0x00000000>
+WRITE = <0xC010034C,0x00000000>
+WRITE = <0xC01013E4,0x03000100> ;MCK6 DFI phy ctrl register 1 (1to1)
+WRITE = <0xC01013EC,0x0000047E>
+WRITE = <0xC0100304,0x00800400> ;CH0_DRAM_Config_2 select fp0
+WRITE = <0xC0100380,0x0001B207> ;DDR init timing Control 0
+WRITE = <0xC0100384,0x00000038> ;DDR init timing Control 1
+WRITE = <0xC0100388,0x000015B3> ;DDR init timing Control 2
+WRITE = <0xC01013E0,0x00000000> ;FSP_OP = 0
+WRITE = <0xC0143000,0x00000010> ;phy release and reset
+WRITE = <0xC0143000,0x00000011> ;phy release and reset
+WRITE = <0xC0150024,0x00000000>
+OR_VAL = <0xC0150024,0x00000032>
+WRITE = <0xC0140068,0x0000034A>
+WRITE = <0xC0144068,0x0000034A>
+WRITE = <0xC0140064,0x0000034A>
+WRITE = <0xC0144064,0x0000034A>
+WRITE = <0xC0143004,0x00000830>
+WRITE = <0xC0147004,0x00000830>
+WRITE = <0xC0143008,0x0024244B>
+WRITE = <0xC0147008,0x0024244B>
+WRITE = <0xC014300C,0x003636D4>
+WRITE = <0xC014700C,0x003636D4>
+WRITE = <0xC0143010,0x00020482>
+WRITE = <0xC0147010,0x00020482>
+WRITE = <0xC0143014,0x87000000>
+WRITE = <0xC0147014,0x87000000>
+WRITE = <0xC0143018,0x08454018>
+WRITE = <0xC0147018,0x08454018>
+WRITE = <0xC0143020,0x00001077>
+WRITE = <0xC015000C,0x0000010F>
+WRITE = <0xC0150010,0x0000010F>
+WRITE = <0xC0150014,0x0000010F>
+WRITE = <0xC0142028,0x0000000F>
+WRITE = <0xC014202C,0x0000000F>
+WRITE = <0xC0142128,0x0000000F>
+WRITE = <0xC014212C,0x0000000F>
+WRITE = <0xC0142030,0x0000000F>
+WRITE = <0xC0146028,0x0000000F>
+WRITE = <0xC014602C,0x0000000F>
+WRITE = <0xC0146128,0x0000000F>
+WRITE = <0xC014612C,0x0000000F>
+WRITE = <0xC0146030,0x0000000F>
+WRITE = <0xC0140060,0x000000FF>
+WRITE = <0xC0141060,0x000000FF>
+WRITE = <0xC0144060,0x000000FF>
+WRITE = <0xC0145060,0x000000FF>
+OR_VAL = <0xC0150000,0x00000001> ;HWDFC_EN
+WRITE = <0xC01013D0,0x13000001> ;MCK6 DFI phy user cmd
+WRITE = <0xD4050028,0x00001200>
+WRITE = <0xD4282CE8,0x00000053>
+WRITE = <0xD4282CE8,0x00000054>
+WRITE = <0xD4282CE8,0x00000053>
+WRITE = <0xD4282CE8,0x00000054>
+WRITE = <0xD4282CE8,0x00000053>
+WRITE = <0xD4282CE8,0x00000053>
+WRITE = <0xD4282CE8,0x00000063>
+WRITE = <0xD4282CE8,0x00000063>
+WRITE = <0xD4282CE8,0x00000064>
+WRITE = <0xD4282CE8,0x00000063>
+WRITE = <0xD4282CE8,0x00000064>
+WRITE = <0xD4282CE8,0x00000064>
+WRITE = <0xD4282CE8,0x00000073>
+WRITE = <0xD4282CE8,0x00000074>
+WRITE = <0xD4282CE8,0x00000074>
+WRITE = <0xD4282CE8,0x00000073>
+WRITE = <0xD4282CE8,0x00000080>
+WRITE = <0xD4282CE8,0x00000081>
+WRITE = <0xD4282CE8,0x00000082>
+WRITE = <0xD4282CE8,0x00000084>
+WRITE = <0xD4050028,0x00001300>
+WRITE = <0xC01013D0,0x13000100> ;MCK6 DFI phy user cmd
+WRITE = <0xC0100020,0x13000001>
+WAIT_FOR_BIT_SET = <0xC0100008,0x00000011,0x00001000>
+WRITE = <0xC0100020,0x11001000>
+WRITE = <0xC0100020,0x12001000>
+WRITE = <0xC0100024,0x13020001>
+WRITE = <0xC0100024,0x13020002>
+WRITE = <0xC0100024,0x13020003>
+WRITE = <0xC01013D0,0x11100000> ;read gate training
+WAIT_FOR_BIT_SET = <0xC01013FC,0x00000006,0x00001000>
+WRITE = <0xC01013D0,0x12100000> ;read gate training cs1
+WAIT_FOR_BIT_SET = <0xC01013FC,0x00000006,0x00001000>
+WRITE = <0xC0100074,0x00030A03>
+WRITE = <0xC0100078,0x00000044>
+WRITE = <0xC0100070,0x00000000>
+WRITE = <0xC0100074,0x13000008>
+WRITE = <0xC0100078,0x00000020>
+WRITE = <0xC0100070,0x00000001>
+WRITE = <0xC0100074,0x00000004>
+WRITE = <0xC0100078,0x00002008>
+WRITE = <0xC0100070,0x00000002>
+WRITE = <0xC0100074,0x00000004>
+WRITE = <0xC0100078,0x00002008>
+WRITE = <0xC0100070,0x00000003>
+WRITE = <0xC0100074,0x13000001>
+WRITE = <0xC0100078,0x000013D0>
+WRITE = <0xC0100070,0x00000004>
+WRITE = <0xC0100074,0x00008000>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x00000005>
+WRITE = <0xC0100074,0x00000000>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x00000006>
+WRITE = <0xC0100074,0x00030A03>
+WRITE = <0xC0100078,0x00010044>
+WRITE = <0xC0100070,0x00000007>
+WRITE = <0xC0100074,0x13000100>
+WRITE = <0xC0100078,0x000013D0>
+WRITE = <0xC0100070,0x00000008>
+WRITE = <0xC0100074,0x00008000>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x00000009>
+WRITE = <0xC0100074,0x00008000>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x0000000A>
+WRITE = <0xC0100074,0x13000004>
+WRITE = <0xC0100078,0x00000020>
+WRITE = <0xC0100070,0x0000000B>
+WRITE = <0xC0100074,0x00030A02>
+WRITE = <0xC0100078,0x00010044>
+WRITE = <0xC0100070,0x0000000C>
+WRITE = <0xC0100074,0x13020001>
+WRITE = <0xC0100078,0x00000024>
+WRITE = <0xC0100070,0x0000000D>
+WRITE = <0xC0100074,0x13020002>
+WRITE = <0xC0100078,0x00000024>
+WRITE = <0xC0100070,0x0000000E>
+WRITE = <0xC0100074,0x11100000>
+WRITE = <0xC0100078,0x000013D0>
+WRITE = <0xC0100070,0x0000000F>
+WRITE = <0xC0100074,0x00000006>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x00000010>
+WRITE = <0xC0100074,0x00000006>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x00000011>
+WRITE = <0xC0100074,0x12100000>
+WRITE = <0xC0100078,0x000013D0>
+WRITE = <0xC0100070,0x00000012>
+WRITE = <0xC0100074,0x00000006>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x00000013>
+WRITE = <0xC0100074,0x00000006>
+WRITE = <0xC0100078,0x000033FC>
+WRITE = <0xC0100070,0x00000014>
+WRITE = <0xC0100074,0x00030A00>
+WRITE = <0xC0100078,0x00020044>
+WRITE = <0xC0100070,0x00000015>
+AND_VAL = <0xD428295C,0xFFFFFFF0> ;hwdfc to 1066mbps
+OR_VAL = <0xD428295C,0x00000000>
+OR_VAL = <0xD42828B0,0x00000020>
+OR_VAL = <0xD42828B0,0x01000000>
+WAIT_FOR_BIT_CLEAR = <0xD42828B0,0x01000000,0x00001000>
+WRITE = <0xC01013D0,0x11100000> ;read gate training
+WAIT_FOR_BIT_SET = <0xC01013FC,0x00000002,0x00001000>
+WRITE = <0xC01013D0,0x12100000> ;read gate training cs1
+WAIT_FOR_BIT_SET = <0xC01013FC,0x00000006,0x00001000>
+WRITE = <0xC01013EC,0x00005070>
+WRITE = <0xC01013D0,0x11200000> ;read DQ training CS0
+WAIT_FOR_BIT_SET = <0xC01013FC,0x00000006,0x00001000>
+WRITE = <0xC01013D0,0x12200000> ;read DQ training CS1
+WAIT_FOR_BIT_SET = <0xC01013FC,0x00000006,0x00001000>
+WRITE = <0xC0143004,0x00000820>
+WRITE = <0xC0147004,0x00000820>
+PP_TABLEHEADER = <0xC0100074,0xC0100078,0xC0100070> ;DDR_TABLEHEADER FOR PRODUCT POINT
+PP_WRITE = <0x00030A03,0x00000044,0x00000060>
+PP_WRITE = <0x00000004,0x00002008,0x00000061>
+PP_WRITE = <0x00000004,0x00002008,0x00000062>
+PP_WRITE = <0x13000001,0x000013D0,0x00000063>
+PP_WRITE = <0x00008000,0x000033FC,0x00000064>
+PP_WRITE = <0x00000000,0x000033FC,0x00000065>
+PP_WRITE = <0x00030A03,0x00010044,0x00000066>
+PP_WRITE = <0x13000100,0x000013D0,0x00000067>
+PP_WRITE = <0x00008000,0x000033FC,0x00000068>
+PP_WRITE = <0x00008000,0x000033FC,0x00000069>
+PP_WRITE = <0x00030A02,0x00010044,0x0000006A>
+PP_WRITE = <0x00030A00,0x00020044,0x0000006B>
+AND_VAL = <0xD428295C,0xFFFFFFF0> ;hwdfc to 533mbps
+OR_VAL = <0xD428295C,0x00000004>
+AND_VAL = <0xD42828B0,0xFFFFFF9F>
+OR_VAL = <0xD42828B0,0x01000000>
+WAIT_FOR_BIT_CLEAR = <0xD42828B0,0x01000000,0x00001000>
+End_Instructions
+END_Vendor_DDR_Initialization
+End_Extended_Reserved_Data
+[Digital_Signature_Data]
+Hash_Algorithm_ID = SHA-256
+DSA_Algorithm = PKCS1_v1_5_Ippcp
+Key_Size_in_bits = 2048
+RSA_Public_Exponent
+#1 = 0x00010001
+End_RSA_Public_Exponent
+RSA_System_Modulus
+#1 = 0x6FBF41D3
+#2 = 0xD44FB898
+#3 = 0x21DE078D
+#4 = 0xEFB78E8F
+#5 = 0xC5298E97
+#6 = 0x22ABE9A0
+#7 = 0x1C63458B
+#8 = 0x8AA1D6FC
+#9 = 0x318F685A
+#10 = 0x52A89FAF
+#11 = 0x81344866
+#12 = 0xC46573E0
+#13 = 0xA4B3D480
+#14 = 0xED99FF25
+#15 = 0x7AD034BE
+#16 = 0x73B0A519
+#17 = 0xA84248EF
+#18 = 0xB11B6453
+#19 = 0x6CCEFD52
+#20 = 0x0DC0822A
+#21 = 0xBA097020
+#22 = 0x44BD419A
+#23 = 0x541631FD
+#24 = 0xA416446A
+#25 = 0xD8EDF562
+#26 = 0x6A7D7908
+#27 = 0xB63082B3
+#28 = 0xABC1BB22
+#29 = 0x8ECD26A9
+#30 = 0x15B94D71
+#31 = 0x84DF5891
+#32 = 0x06030D4A
+#33 = 0x43463E36
+#34 = 0x164BD297
+#35 = 0x4709E5B0
+#36 = 0xCBB729A1
+#37 = 0x6D8BF791
+#38 = 0x15E7A39E
+#39 = 0xFA1117D0
+#40 = 0x37B38446
+#41 = 0xFE098FCF
+#42 = 0x84FF267E
+#43 = 0xAE18EAB7
+#44 = 0x61F99674
+#45 = 0x0889DD38
+#46 = 0x067A6900
+#47 = 0x7EAE4902
+#48 = 0xD55422D5
+#49 = 0x42802E82
+#50 = 0xD77F24B0
+#51 = 0x343A99A5
+#52 = 0xA3C07AE1
+#53 = 0xB86DFD10
+#54 = 0x5607BCE2
+#55 = 0x27DF1B5A
+#56 = 0xD51E44C1
+#57 = 0xC83A9377
+#58 = 0xCD020D24
+#59 = 0x6FA88487
+#60 = 0x198E2155
+#61 = 0x03B146C5
+#62 = 0xC235D791
+#63 = 0x71B9A0CB
+#64 = 0xCEBC88DC
+End_RSA_System_Modulus
+RSA_Private_Key
+#1 = 0x3D9556F1
+#2 = 0x2C27D30C
+#3 = 0x96DDFB2E
+#4 = 0xEE7E422C
+#5 = 0x94AF9CA4
+#6 = 0xE0BFD2EF
+#7 = 0x76EC12B1
+#8 = 0xB6230C1E
+#9 = 0xC987309E
+#10 = 0x0C0B98CB
+#11 = 0x17BCE9E1
+#12 = 0x81166311
+#13 = 0x9A5F8939
+#14 = 0xC3D763BB
+#15 = 0x4C17F7BC
+#16 = 0x18C52275
+#17 = 0x61481004
+#18 = 0x5C14BF73
+#19 = 0xD7CC938C
+#20 = 0xCE3FBE11
+#21 = 0x0582DD24
+#22 = 0x79D41648
+#23 = 0x33F9BFA7
+#24 = 0x9787518F
+#25 = 0xB5CC4112
+#26 = 0xA2DEB689
+#27 = 0x2A8DF640
+#28 = 0x4155C95C
+#29 = 0x82A0BE6A
+#30 = 0x48EEF12A
+#31 = 0xC3353096
+#32 = 0x8FAD2FE4
+#33 = 0x37B58155
+#34 = 0xDB9BE52B
+#35 = 0x51A13735
+#36 = 0xA0124F54
+#37 = 0xAC969F2E
+#38 = 0xD7DE2BA5
+#39 = 0xB4F69258
+#40 = 0x3DCD0C3B
+#41 = 0x79E67328
+#42 = 0x118B7F74
+#43 = 0x62CB129C
+#44 = 0xCDB75F7C
+#45 = 0xE495E995
+#46 = 0xE1C03125
+#47 = 0xDD2A41D9
+#48 = 0xED1BFD48
+#49 = 0xDE4876D7
+#50 = 0x9BC9FE92
+#51 = 0xE3FB477A
+#52 = 0xCE5AE170
+#53 = 0x84E5A9D5
+#54 = 0xBA04DC21
+#55 = 0x633581F2
+#56 = 0x99048745
+#57 = 0x13A86A34
+#58 = 0x1EB982EA
+#59 = 0x8AB25907
+#60 = 0xF42F7525
+#61 = 0xE5CB44CB
+#62 = 0x1BE9E44A
+#63 = 0xEE0A3107
+#64 = 0xBB3EABBE
+End_RSA_Private_Key
+End_Digital_Signature_Data
+[DTIM_Keys_Data]
+Hash_Algorithm_ID = SHA-256
+DSA_Algorithm = PKCS1_v1_5_Ippcp
+Key_Size_in_bits = 2048
+RSA_Public_Exponent
+#1 = 0x00010001
+End_RSA_Public_Exponent
+RSA_System_Modulus
+#1 = 0x6FBF41D3
+#2 = 0xD44FB898
+#3 = 0x21DE078D
+#4 = 0xEFB78E8F
+#5 = 0xC5298E97
+#6 = 0x22ABE9A0
+#7 = 0x1C63458B
+#8 = 0x8AA1D6FC
+#9 = 0x318F685A
+#10 = 0x52A89FAF
+#11 = 0x81344866
+#12 = 0xC46573E0
+#13 = 0xA4B3D480
+#14 = 0xED99FF25
+#15 = 0x7AD034BE
+#16 = 0x73B0A519
+#17 = 0xA84248EF
+#18 = 0xB11B6453
+#19 = 0x6CCEFD52
+#20 = 0x0DC0822A
+#21 = 0xBA097020
+#22 = 0x44BD419A
+#23 = 0x541631FD
+#24 = 0xA416446A
+#25 = 0xD8EDF562
+#26 = 0x6A7D7908
+#27 = 0xB63082B3
+#28 = 0xABC1BB22
+#29 = 0x8ECD26A9
+#30 = 0x15B94D71
+#31 = 0x84DF5891
+#32 = 0x06030D4A
+#33 = 0x43463E36
+#34 = 0x164BD297
+#35 = 0x4709E5B0
+#36 = 0xCBB729A1
+#37 = 0x6D8BF791
+#38 = 0x15E7A39E
+#39 = 0xFA1117D0
+#40 = 0x37B38446
+#41 = 0xFE098FCF
+#42 = 0x84FF267E
+#43 = 0xAE18EAB7
+#44 = 0x61F99674
+#45 = 0x0889DD38
+#46 = 0x067A6900
+#47 = 0x7EAE4902
+#48 = 0xD55422D5
+#49 = 0x42802E82
+#50 = 0xD77F24B0
+#51 = 0x343A99A5
+#52 = 0xA3C07AE1
+#53 = 0xB86DFD10
+#54 = 0x5607BCE2
+#55 = 0x27DF1B5A
+#56 = 0xD51E44C1
+#57 = 0xC83A9377
+#58 = 0xCD020D24
+#59 = 0x6FA88487
+#60 = 0x198E2155
+#61 = 0x03B146C5
+#62 = 0xC235D791
+#63 = 0x71B9A0CB
+#64 = 0xCEBC88DC
+End_RSA_System_Modulus
+RSA_Private_Key
+#1 = 0x3D9556F1
+#2 = 0x2C27D30C
+#3 = 0x96DDFB2E
+#4 = 0xEE7E422C
+#5 = 0x94AF9CA4
+#6 = 0xE0BFD2EF
+#7 = 0x76EC12B1
+#8 = 0xB6230C1E
+#9 = 0xC987309E
+#10 = 0x0C0B98CB
+#11 = 0x17BCE9E1
+#12 = 0x81166311
+#13 = 0x9A5F8939
+#14 = 0xC3D763BB
+#15 = 0x4C17F7BC
+#16 = 0x18C52275
+#17 = 0x61481004
+#18 = 0x5C14BF73
+#19 = 0xD7CC938C
+#20 = 0xCE3FBE11
+#21 = 0x0582DD24
+#22 = 0x79D41648
+#23 = 0x33F9BFA7
+#24 = 0x9787518F
+#25 = 0xB5CC4112
+#26 = 0xA2DEB689
+#27 = 0x2A8DF640
+#28 = 0x4155C95C
+#29 = 0x82A0BE6A
+#30 = 0x48EEF12A
+#31 = 0xC3353096
+#32 = 0x8FAD2FE4
+#33 = 0x37B58155
+#34 = 0xDB9BE52B
+#35 = 0x51A13735
+#36 = 0xA0124F54
+#37 = 0xAC969F2E
+#38 = 0xD7DE2BA5
+#39 = 0xB4F69258
+#40 = 0x3DCD0C3B
+#41 = 0x79E67328
+#42 = 0x118B7F74
+#43 = 0x62CB129C
+#44 = 0xCDB75F7C
+#45 = 0xE495E995
+#46 = 0xE1C03125
+#47 = 0xDD2A41D9
+#48 = 0xED1BFD48
+#49 = 0xDE4876D7
+#50 = 0x9BC9FE92
+#51 = 0xE3FB477A
+#52 = 0xCE5AE170
+#53 = 0x84E5A9D5
+#54 = 0xBA04DC21
+#55 = 0x633581F2
+#56 = 0x99048745
+#57 = 0x13A86A34
+#58 = 0x1EB982EA
+#59 = 0x8AB25907
+#60 = 0xF42F7525
+#61 = 0xE5CB44CB
+#62 = 0x1BE9E44A
+#63 = 0xEE0A3107
+#64 = 0xBB3EABBE
+End_RSA_Private_Key
+End_DTIM_Keys_Data
+[Image_List]
+1_Image_Enable = 1
+1_Image_Tim_Included = 1
+1_Image_Image_ID = 0x54494D48
+1_Image_Next_Image_ID = 0x54494D48
+1_Image_Path = tim_fact_qspinand.bin
+1_Image_Flash_Entry_Address = 0x00000000
+1_Image_Load_Address = 0xD1000000
+1_Image_Type = RAW
+1_Image_ID_Name = TIMH
+1_Image_Erase_Size =
+1_Image_Partition_Number = 0
+1_Image_Hash_Algorithm_ID = SHA-256
+1_Image_Image_Size_To_Hash_in_bytes = 0xFFFFFFFF
+2_Image_Enable = 1
+2_Image_Tim_Included = 5
+2_Image_Image_ID = 0x54494D48
+2_Image_Next_Image_ID = 0x4F424D49
+2_Image_Path = tim_fact_qspinand2.bin
+2_Image_Flash_Entry_Address = 0x00040000
+2_Image_Load_Address = 0xD1000000
+2_Image_Type = RAW
+2_Image_ID_Name = TIMH
+2_Image_Erase_Size =
+2_Image_Partition_Number = 0
+2_Image_Hash_Algorithm_ID = SHA-256
+2_Image_Image_Size_To_Hash_in_bytes = 0xFFFFFFFF
+3_Image_Enable = 1
+3_Image_Tim_Included = 1
+3_Image_Image_ID = 0x4F424D49
+3_Image_Next_Image_ID = 0x4F424D49
+3_Image_Path = asr1806_TLoader_QSPINAND_ProductBuild.bin
+3_Image_Flash_Entry_Address = 0x00080000
+3_Image_Load_Address = 0x003C8000
+3_Image_Type = RAW
+3_Image_ID_Name = OBMI
+3_Image_Erase_Size =
+3_Image_Partition_Number = 0
+3_Image_Hash_Algorithm_ID = SHA-256
+3_Image_Image_Size_To_Hash_in_bytes = 0xFFFFFFFF
+4_Image_Enable = 1
+4_Image_Tim_Included = 5
+4_Image_Image_ID = 0x4F424D49
+4_Image_Next_Image_ID = 0x4350524C
+4_Image_Path = asr1806_TLoader_QSPINAND_ProductBuild.bin
+4_Image_Flash_Entry_Address = 0x000C0000
+4_Image_Load_Address = 0x003C8000
+4_Image_Type = RAW
+4_Image_ID_Name = OBMI
+4_Image_Erase_Size =
+4_Image_Partition_Number = 0
+4_Image_Hash_Algorithm_ID = SHA-256
+4_Image_Image_Size_To_Hash_in_bytes = 0xFFFFFFFF
+5_Image_Enable = 0
+5_Image_Tim_Included = 0
+5_Image_Image_ID = 0x4350524C
+5_Image_Next_Image_ID = 0x4150524C
+5_Image_Path = asr1806_CP_ReliableData_CMCC.bin
+5_Image_Flash_Entry_Address = 0x00140000
+5_Image_Load_Address = 0xFFFFFFFF
+5_Image_Type = RAW
+5_Image_ID_Name = CPRL
+5_Image_Erase_Size =
+5_Image_Partition_Number = 0
+5_Image_Hash_Algorithm_ID =
+5_Image_Image_Size_To_Hash_in_bytes =
+6_Image_Enable = 1
+6_Image_Tim_Included = 0
+6_Image_Image_ID = 0x4150524C
+6_Image_Next_Image_ID = 0x4342524C
+6_Image_Path = asr1806_AP_ReliableData.bin
+6_Image_Flash_Entry_Address = 0x00180000
+6_Image_Load_Address = 0xFFFFFFFF
+6_Image_Type = RAW
+6_Image_ID_Name = APRL
+6_Image_Erase_Size =
+6_Image_Partition_Number = 0
+6_Image_Hash_Algorithm_ID =
+6_Image_Image_Size_To_Hash_in_bytes =
+7_Image_Enable = 0
+7_Image_Tim_Included = 0
+7_Image_Image_ID = 0x4342524C
+7_Image_Next_Image_ID = 0x4142524C
+7_Image_Path = asr1806_CP_ReliableData_CMCC.bin
+7_Image_Flash_Entry_Address = 0x001C0000
+7_Image_Load_Address = 0xFFFFFFFF
+7_Image_Type = RAW
+7_Image_ID_Name = CBRL
+7_Image_Erase_Size =
+7_Image_Partition_Number = 0
+7_Image_Hash_Algorithm_ID =
+7_Image_Image_Size_To_Hash_in_bytes =
+8_Image_Enable = 1
+8_Image_Tim_Included = 0
+8_Image_Image_ID = 0x4142524C
+8_Image_Next_Image_ID = 0x52464249
+8_Image_Path = asr1806_AP_ReliableData.bin
+8_Image_Flash_Entry_Address = 0x00200000
+8_Image_Load_Address = 0xFFFFFFFF
+8_Image_Type = RAW
+8_Image_ID_Name = ABRL
+8_Image_Erase_Size =
+8_Image_Partition_Number = 0
+8_Image_Hash_Algorithm_ID =
+8_Image_Image_Size_To_Hash_in_bytes =
+9_Image_Enable = 1
+9_Image_Tim_Included = 2
+9_Image_Image_ID = 0x52464249
+9_Image_Next_Image_ID = 0x47524249
+9_Image_Path = asr1806_RFPLUGIN.bin
+9_Image_Flash_Entry_Address = 0x005C0000
+9_Image_Load_Address = 0xFFFFFFFF
+9_Image_Type = RAW
+9_Image_ID_Name = RFBI
+9_Image_Erase_Size =
+9_Image_Partition_Number = 0
+9_Image_Hash_Algorithm_ID = SHA-256
+9_Image_Image_Size_To_Hash_in_bytes = 0xFFFFFFFF
+9_Image_Stim_Size = 0x1000
+10_Image_Enable = 1
+10_Image_Tim_Included = 2
+10_Image_Image_ID = 0x47524249
+10_Image_Next_Image_ID = 0x41524249
+10_Image_Path = asr1806_MSA.bin
+10_Image_Flash_Entry_Address = 0x00640000
+10_Image_Load_Address = 0xFFFFFFFF
+10_Image_Type = RAW
+10_Image_ID_Name = GRBI
+10_Image_Erase_Size =
+10_Image_Partition_Number = 0
+10_Image_Hash_Algorithm_ID = SHA-256
+10_Image_Image_Size_To_Hash_in_bytes = 0xFFFFFFFF
+10_Image_Stim_Size = 0x1000
+11_Image_Enable = 1
+11_Image_Tim_Included = 2
+11_Image_Image_ID = 0x41524249
+11_Image_Next_Image_ID = 0x545A5349
+11_Image_Path = asr1806_ARBEL.bin
+11_Image_Flash_Entry_Address = 0x00C40000
+11_Image_Load_Address = 0xFFFFFFFF
+11_Image_Type = RAW
+11_Image_ID_Name = ARBI
+11_Image_Erase_Size =
+11_Image_Partition_Number = 0
+11_Image_Hash_Algorithm_ID = SHA-256
+11_Image_Image_Size_To_Hash_in_bytes = 0xFFFFFFFF
+11_Image_Stim_Size = 0x1000
+12_Image_Enable = 1
+12_Image_Tim_Included = 2
+12_Image_Image_ID = 0x545A5349
+12_Image_Next_Image_ID = 0x52464249
+12_Image_Path = asr1806_tos.bin
+12_Image_Flash_Entry_Address = 0x01F80000
+12_Image_Load_Address = 0x02000000
+12_Image_Type = RAW
+12_Image_ID_Name = TZSI
+12_Image_Erase_Size =
+12_Image_Partition_Number = 0
+12_Image_Hash_Algorithm_ID = SHA-256
+12_Image_Image_Size_To_Hash_in_bytes = 0xFFFFFFFF
+12_Image_Stim_Size = 0x1000
+13_Image_Enable = 1
+13_Image_Tim_Included = 3
+13_Image_Image_ID = 0x52464249
+13_Image_Next_Image_ID = 0x47524249
+13_Image_Path = asr1806_RFPLUGIN.bin
+13_Image_Flash_Entry_Address = 0x02180000
+13_Image_Load_Address = 0xFFFFFFFF
+13_Image_Type = RAW
+13_Image_ID_Name = RFBI
+13_Image_Erase_Size =
+13_Image_Partition_Number = 0
+13_Image_Hash_Algorithm_ID = SHA-256
+13_Image_Image_Size_To_Hash_in_bytes = 0xFFFFFFFF
+13_Image_Stim_Size = 0x1000
+14_Image_Enable = 1
+14_Image_Tim_Included = 3
+14_Image_Image_ID = 0x47524249
+14_Image_Next_Image_ID = 0x41524249
+14_Image_Path = asr1806_MSA.bin
+14_Image_Flash_Entry_Address = 0x02200000
+14_Image_Load_Address = 0xFFFFFFFF
+14_Image_Type = RAW
+14_Image_ID_Name = GRBI
+14_Image_Erase_Size =
+14_Image_Partition_Number = 0
+14_Image_Hash_Algorithm_ID = SHA-256
+14_Image_Image_Size_To_Hash_in_bytes = 0xFFFFFFFF
+14_Image_Stim_Size = 0x1000
+15_Image_Enable = 1
+15_Image_Tim_Included = 3
+15_Image_Image_ID = 0x41524249
+15_Image_Next_Image_ID = 0x545A5349
+15_Image_Path = asr1806_ARBEL.bin
+15_Image_Flash_Entry_Address = 0x02800000
+15_Image_Load_Address = 0xFFFFFFFF
+15_Image_Type = RAW
+15_Image_ID_Name = ARBI
+15_Image_Erase_Size =
+15_Image_Partition_Number = 0
+15_Image_Hash_Algorithm_ID = SHA-256
+15_Image_Image_Size_To_Hash_in_bytes = 0xFFFFFFFF
+15_Image_Stim_Size = 0x1000
+16_Image_Enable = 1
+16_Image_Tim_Included = 3
+16_Image_Image_ID = 0x545A5349
+16_Image_Next_Image_ID = 0x4F534C4F
+16_Image_Path = asr1806_tos.bin
+16_Image_Flash_Entry_Address = 0x03B40000
+16_Image_Load_Address = 0x02000000
+16_Image_Type = RAW
+16_Image_ID_Name = TZSI
+16_Image_Erase_Size =
+16_Image_Partition_Number = 0
+16_Image_Hash_Algorithm_ID = SHA-256
+16_Image_Image_Size_To_Hash_in_bytes = 0xFFFFFFFF
+16_Image_Stim_Size = 0x1000
+17_Image_Enable = 1
+17_Image_Tim_Included = 2
+17_Image_Image_ID = 0x4F534C4F
+17_Image_Next_Image_ID = 0x4F534C4F
+17_Image_Path = openwrt-mmp-asr1806-u-boot.bin
+17_Image_Flash_Entry_Address = 0x03D40000
+17_Image_Load_Address = 0x00308000
+17_Image_Type = RAW
+17_Image_ID_Name = OSLO
+17_Image_Erase_Size =
+17_Image_Partition_Number = 0
+17_Image_Hash_Algorithm_ID = SHA-256
+17_Image_Image_Size_To_Hash_in_bytes = 0xFFFFFFFF
+17_Image_Stim_Size = 0x1000
+18_Image_Enable = 1
+18_Image_Tim_Included = 3
+18_Image_Image_ID = 0x4F534C4F
+18_Image_Next_Image_ID = 0x5A494D47
+18_Image_Path = openwrt-mmp-asr1806-u-boot.bin
+18_Image_Flash_Entry_Address = 0x03EC0000
+18_Image_Load_Address = 0x00308000
+18_Image_Type = RAW
+18_Image_ID_Name = OSLO
+18_Image_Erase_Size =
+18_Image_Partition_Number = 0
+18_Image_Hash_Algorithm_ID = SHA-256
+18_Image_Image_Size_To_Hash_in_bytes = 0xFFFFFFFF
+18_Image_Stim_Size = 0x1000
+19_Image_Enable = 1
+19_Image_Tim_Included = 2
+19_Image_Image_ID = 0x5A494D47
+19_Image_Next_Image_ID = 0x5A494D47
+19_Image_Path = openwrt-mmp-asr1806-zImage
+19_Image_Flash_Entry_Address = 0x04040000
+19_Image_Load_Address = 0xFFFFFFFF
+19_Image_Type = RAW
+19_Image_ID_Name = ZIMG
+19_Image_Erase_Size =
+19_Image_Partition_Number = 0
+19_Image_Hash_Algorithm_ID = SHA-256
+19_Image_Image_Size_To_Hash_in_bytes = 0xFFFFFFFF
+19_Image_Stim_Size = 0x1000
+20_Image_Enable = 1
+20_Image_Tim_Included = 3
+20_Image_Image_ID = 0x5A494D47
+20_Image_Next_Image_ID = 0x5359534A
+20_Image_Path = openwrt-mmp-asr1806-zImage
+20_Image_Flash_Entry_Address = 0x04A40000
+20_Image_Load_Address = 0xFFFFFFFF
+20_Image_Type = RAW
+20_Image_ID_Name = ZIMG
+20_Image_Erase_Size =
+20_Image_Partition_Number = 0
+20_Image_Hash_Algorithm_ID = SHA-256
+20_Image_Image_Size_To_Hash_in_bytes = 0xFFFFFFFF
+20_Image_Stim_Size = 0x1000
+21_Image_Enable = 1
+21_Image_Tim_Included = 2
+21_Image_Image_ID = 0x5359534A
+21_Image_Next_Image_ID = 0x5359534A
+21_Image_Path = openwrt-mmp-asr1806-root.squashfs
+21_Image_Flash_Entry_Address = 0x7CC0000
+21_Image_Load_Address = 0xFFFFFFFF
+21_Image_Type = RAW
+21_Image_ID_Name = SYSJ
+21_Image_Erase_Size = 0x02800000
+21_Image_Partition_Number = 0
+21_Image_Hash_Algorithm_ID = SHA-256
+21_Image_Image_Size_To_Hash_in_bytes = 0xFFFFFFFF
+21_Image_Stim_Size = 0x40000
+22_Image_Enable = 1
+22_Image_Tim_Included = 3
+22_Image_Image_ID = 0x5359534A
+22_Image_Next_Image_ID = 0x4F454D44
+22_Image_Path = openwrt-mmp-asr1806-root.squashfs
+22_Image_Flash_Entry_Address = 0xA4C0000
+22_Image_Load_Address = 0xFFFFFFFF
+22_Image_Type = RAW
+22_Image_ID_Name = SYSJ
+22_Image_Erase_Size = 0x02800000
+22_Image_Partition_Number = 0
+22_Image_Hash_Algorithm_ID = SHA-256
+22_Image_Image_Size_To_Hash_in_bytes = 0xFFFFFFFF
+22_Image_Stim_Size = 0x40000
+23_Image_Enable = 1
+23_Image_Tim_Included = 2
+23_Image_Image_ID = 0x4F454D44
+23_Image_Next_Image_ID = 0x4F454D44
+23_Image_Path = openwrt-mmp-asr1806-oem_data.ubi
+23_Image_Flash_Entry_Address = 0xCCC0000
+23_Image_Load_Address = 0xFFFFFFFF
+23_Image_Type = RAW
+23_Image_ID_Name = OEMD
+23_Image_Erase_Size = 0x00700000
+23_Image_Partition_Number = 0
+23_Image_Hash_Algorithm_ID = SHA-256
+23_Image_Image_Size_To_Hash_in_bytes = 0xFFFFFFFF
+23_Image_Stim_Size = 0x40000
+24_Image_Enable = 1
+24_Image_Tim_Included = 3
+24_Image_Image_ID = 0x4F454D44
+24_Image_Next_Image_ID = 0x4F454D55
+24_Image_Path = openwrt-mmp-asr1806-oem_data.ubi
+24_Image_Flash_Entry_Address = 0xD3C0000
+24_Image_Load_Address = 0xFFFFFFFF
+24_Image_Type = RAW
+24_Image_ID_Name = OEMD
+24_Image_Erase_Size = 0x00700000
+24_Image_Partition_Number = 0
+24_Image_Hash_Algorithm_ID = SHA-256
+24_Image_Image_Size_To_Hash_in_bytes = 0xFFFFFFFF
+24_Image_Stim_Size = 0x40000
+25_Image_Enable = 1
+25_Image_Tim_Included = 0
+25_Image_Image_ID = 0x4F454D55
+25_Image_Next_Image_ID = 0xFFFFFFFF
+25_Image_Path = dev_info.bin
+25_Image_Flash_Entry_Address = 0x5440000
+25_Image_Load_Address = 0xFFFFFFFF
+25_Image_Type = RAW
+25_Image_ID_Name = DEV
+25_Image_Erase_Size =
+25_Image_Partition_Number = 0
+25_Image_Hash_Algorithm_ID =
+25_Image_Image_Size_To_Hash_in_bytes = 0xFFFFFFFF
+[Nand_Images_list_Property]
+1_NandSign_Value = 0x5350491A
+1_NandSign_NandIdNumber = 1
+1_NandSign_1_NandId = 0xFFFF
+1_NandSign_1_NandSize = 0x20000000
+1_NandSign_1_NandId_ImageNumber = 0
diff --git a/pack.sh b/pack.sh
index dd6e5b8..f028b93 100755
--- a/pack.sh
+++ b/pack.sh
@@ -8,6 +8,7 @@
BUILD_PARTITION=`cat build_version | grep PARTITION | cut -d '=' -f 2`
BUILD_CUSTOM=`cat build_version | grep CUSTOM | cut -d '=' -f 2`
SEC_SUPPORT=`cat build_version | grep SEC_SUPPORT | cut -d '=' -f 2`
+DEV_INFO_RESET=`cat build_version | grep DEV_INFO_RESET | cut -d '=' -f 2`
if [ -f mbtk/mbtk_version ];then
PATCH_INDEX=`cat mbtk/mbtk_version | grep PATCH_INDEX | cut -d '=' -f 2`
@@ -98,6 +99,10 @@
BIN_OTA_BLF="$BUILD_TARGAT"_"$BUILD_FLAG"_QSPINAND_Trusted_SDTIM_LPDDR2_OTA_BLF
fi
fi
+
+ if [ "$DEV_INFO_RESET" == "Y" ];then
+ BIN_BLF="$BIN_BLF"_DEV_INFO
+ fi
else
BUILD_TARGAT=asr1803
BUILD_FLAG=p401
@@ -278,6 +283,16 @@
fi
copy "$BUILD_TARGAT"_CP_ReliableData_CMCC.bin
+ else
+ if [ "$DEV_INFO_RESET" == "Y" ];then
+ date_str=`date "+%Y/%m/%d %H:%M:%S"`
+ asr_baseline=`cat $OUT_DIR/mversion`
+ echo $date_str
+
+ [ -f mbtk/device_info_generate ] && mbtk/device_info_generate -a ab -b $VERSION_STR_CN -d $BUILD_PROJECT -e $CUSTOM_MODEL -f cn -g "$date_str" -h 15 -i 7 -j $asr_baseline -o $MBTK_M1901_VERSION_DIR/dev_info_cn.bin
+ [ -f mbtk/device_info_generate ] && mbtk/device_info_generate -a ab -b $VERSION_STR_EU -d $BUILD_PROJECT -e $CUSTOM_MODEL -f eu -g "$date_str" -h 15 -i 7 -j $asr_baseline -o $MBTK_M1901_VERSION_DIR/dev_info_eu.bin
+ [ -f mbtk/device_info_generate ] && mbtk/device_info_generate -a ab -b $VERSION_STR_LA -d $BUILD_PROJECT -e $CUSTOM_MODEL -f sa -g "$date_str" -h 15 -i 7 -j $asr_baseline -o $MBTK_M1901_VERSION_DIR/dev_info_la.bin
+ fi
fi
copy "$BUILD_TARGAT"_AP_ReliableData.bin
@@ -315,8 +330,8 @@
copy swdl_linux
if [ "$SEC_SUPPORT" == "Y" ];then
copy "$BUILD_TARGAT"_tos.bin
- copy DDR_*
- copy DKB_timheader.bin
+# copy DDR_*
+# copy DKB_timheader.bin
fi
if [ -f marvell/swd/FALCON/logo.img ];then
cp marvell/swd/FALCON/logo.img $MBTK_M1901_VERSION_DIR
@@ -332,6 +347,19 @@
# 生成各地区的固件
if [ -n "$1" -a "$1" == "mobiletek" ] ;then
generate_version_bin
+ else
+ if [ "$DEV_INFO_RESET" == "Y" ];then
+ cp $MBTK_M1901_VERSION/$BIN_BLF.blf $MBTK_M1901_VERSION/"$BIN_BLF"_CN.blf
+ sed -i "s/dev_info.bin/dev_info_cn.bin/" $MBTK_M1901_VERSION/"$BIN_BLF"_CN.blf
+
+ cp $MBTK_M1901_VERSION/$BIN_BLF.blf $MBTK_M1901_VERSION/"$BIN_BLF"_EU.blf
+ sed -i "s/dev_info.bin/dev_info_eu.bin/" $MBTK_M1901_VERSION/"$BIN_BLF"_EU.blf
+
+ cp $MBTK_M1901_VERSION/$BIN_BLF.blf $MBTK_M1901_VERSION/"$BIN_BLF"_LA.blf
+ sed -i "s/dev_info.bin/dev_info_la.bin/" $MBTK_M1901_VERSION/"$BIN_BLF"_LA.blf
+
+ rm -f $MBTK_M1901_VERSION/$BIN_BLF.blf
+ fi
fi
zip -q -r $MBTK_M1901_VERSION.zip $MBTK_M1901_VERSION