commit 5faa4c57eabd1f303b2e51008244eb5cc04b7c68
author zw.wang <zw.wang@mobiletek.cn> Fri Aug 01 18:34:54 2025 +0800
committer zw.wang <zw.wang@mobiletek.cn> Thu Aug 14 13:50:21 2025 +0800
tree cbe97588054f87c0087493f45a79813b721e7c25
parent aad2b6f658b5df6ff43a319832fce4046a207a38

[Feature][T108][EMMC][task-view-1464]The emmc is fixed at 104M

Only Configure: No
Affected branch: GSW_V1453
Affected module: EMMC
Is it affected on IC: only ASR
Self-test: yes
Doc Update: no

Change-Id: Idf8a13d5187db80796ffbd2b5ea5f70c7c9253fd

marvell/linux/arch/arm/boot/dts/asr1806-p301.dts

diff --git a/marvell/linux/arch/arm/boot/dts/asr1806-p301.dts b/marvell/linux/arch/arm/boot/dts/asr1806-p301.dts
index ccb82f7..5063131 100755
--- a/marvell/linux/arch/arm/boot/dts/asr1806-p301.dts
+++ b/marvell/linux/arch/arm/boot/dts/asr1806-p301.dts
@@ -244,7 +244,7 @@
                 cap-mmc-highspeed;
                 mmc-ddr-1_8v;
                 asr,sdh-host-caps-disable = <(MMC_CAP_1_2V_DDR)>;
-                asr,sdh-host-caps2-disable = <(MMC_CAP2_HSX00_1_2V | MMC_CAP2_HS400 |MMC_CAP2_HS200)>;
+                asr,sdh-host-caps2-disable = <(MMC_CAP2_HSX00_1_2V | MMC_CAP2_HS400 )>;
                 asr,sdh-host-caps2 = <(
                     MMC_CAP2_ONLY_1_8V
                     )>;
@@ -262,7 +262,7 @@
                     <PXA_MMC_TIMING_LEGACY PXA_SDH_DTR_26M PXA_SDH_DTR_104M 0 0 0 0>,
                     <PXA_MMC_TIMING_MMC_HS PXA_SDH_DTR_52M PXA_SDH_DTR_104M 0 0 0 0>,
                     <PXA_MMC_TIMING_MMC_DDR52 PXA_SDH_DTR_52M PXA_SDH_DTR_104M 0 0 0 3>,
-                    <PXA_MMC_TIMING_MMC_HS200 PXA_SDH_DTR_208M PXA_SDH_DTR_208M 53 0 0 0>,
+                    <PXA_MMC_TIMING_MMC_HS200 PXA_SDH_DTR_104M PXA_SDH_DTR_208M 53 0 0 0>,
                     <PXA_MMC_TIMING_MAX PXA_SDH_DTR_PS_NONE PXA_SDH_DTR_89M 0 0 0 0>;
                 status = "okay";
             };