Baseline update from LYNQ_SDK_ASR_T108_V05.03.01.00(kernel build error.)
Change-Id: I56fc72cd096e82c589920026553170e5cb9692eb
diff --git a/marvell/uboot/board/Marvell/fact_p301/fact_p301.c b/marvell/uboot/board/Marvell/fact_p301/fact_p301.c
old mode 100644
new mode 100755
index 3f03e93..41ddb74
--- a/marvell/uboot/board/Marvell/fact_p301/fact_p301.c
+++ b/marvell/uboot/board/Marvell/fact_p301/fact_p301.c
@@ -306,7 +306,16 @@
#if defined(CONFIG_FG_PM803) || defined(CONFIG_PM803_GPADC)
if (!ramdump_boot)
+ // Change by mbtk
+ {
+
+ /*mbtk_tanggaoyo 20240726 add for reading ADC calibrated nvm again because the first read is failed too early
+ *while MODEM_LWG_ARBEL_IMG_FLASH_OFFSET(get_arbel_offset()) is 0 for AB system.*/
+ pm803_gpadc_calibration_init();
+ /*mbtk_tanggaoyo 20240726 add end*/
+
pass_adcvbat_pair_to_kernel();
+ }
#endif
#ifdef CONFIG_ASR_QSPI
@@ -752,7 +761,24 @@
/* Set PM802 LDO6 as 3.3V for SD Card IO voltage */
//marvell88pm_set_ldo_vol(p_power, 6, 3300000);
-#if defined(CONFIG_SPI_LCD) || defined (CONFIG_FB_ASR)
+ #ifdef CONFIG_MBTK_BUILD_PROJECT_T108
+
+ /* Set external 3.3V LDO via GPIO12 for SD Card */
+ gpio_direction_output(45, 1);
+
+ /* Set PM802 LDO6 as 3.3V for SD Card IO voltage */
+ marvell88pm_set_ldo_vol(p_power, 6, 1800000);
+
+ // Delete by mbtk
+ /* ldo4 works as LDO4_3V0_USIM2 shouldn't be configed in uboot/linux. It is only controled in CP */
+ // marvell88pm_set_ldo_vol(p_power, 4, 1800000);
+
+ marvell88pm_set_ldo_vol(p_power, 1, 1800000);
+
+ marvell88pm_set_ldo_vol(p_power, 5, 0000000);
+ #endif
+
+#if defined(CONFIG_SPI_LCD) || defined (CONFIG_FB_ASR)
#ifdef CONFIG_FB_ASR_MIPI
/* power off the VDD28_LCD first */
pmic_reg_read(p_power, 0x9, &val);
diff --git a/marvell/uboot/drivers/mtd/spi-flash/spi_nand.c b/marvell/uboot/drivers/mtd/spi-flash/spi_nand.c
old mode 100644
new mode 100755
index f1af3d9..6bd5aa9
--- a/marvell/uboot/drivers/mtd/spi-flash/spi_nand.c
+++ b/marvell/uboot/drivers/mtd/spi-flash/spi_nand.c
@@ -108,6 +108,57 @@
.length = 64}, }
};
+// Add by mbtk
+static struct nand_ecclayout xtx_ecc_layout_256 = {
+ .eccbytes = 52,
+ .eccpos = {
+ 6, 7, 8, 9, 10, 11, 12, 13,
+ 14, 15, 16, 17, 18, 21, 22, 23,
+ 24, 25, 26, 27, 28, 29, 30, 31,
+ 32, 33, 36, 37, 38, 39, 40, 41,
+ 42, 43, 44, 45, 46, 47, 48, 51,
+ 52, 53, 54, 55, 56, 57, 58, 59,
+ 60, 61, 62, 63},
+ .oobavail = 74,
+ .oobfree = {
+ {.offset = 2,
+ .length = 4},
+ {.offset = 19,
+ .length = 2},
+ {.offset = 34,
+ .length = 2},
+ {.offset = 49,
+ .length = 2},
+ {.offset = 64,
+ .length = 64}, }
+};
+
+static struct nand_ecclayout esmt_ecc_layout_256 = {
+ .eccbytes = 128,
+ .eccpos = {
+ 128, 129, 130, 131, 132, 133, 134, 135,
+ 136, 137, 138, 139, 140, 141, 142, 143,
+ 144, 145, 146, 147, 148, 149, 150, 151,
+ 152, 153, 154, 155, 156, 157, 158, 159,
+ 160, 161, 162, 163, 164, 165, 166, 167,
+ 168, 169, 170, 171, 172, 173, 174, 175,
+ 176, 177, 178, 179, 180, 181, 182, 183,
+ 184, 185, 186, 187, 188, 189, 190, 191,
+ 192, 193, 194, 195, 196, 197, 198, 199,
+ 200, 201, 202, 203, 204, 205, 206, 207,
+ 208, 209, 210, 211, 212, 213, 214, 215,
+ 216, 217, 218, 219, 220, 221, 222, 223,
+ 224, 225, 226, 227, 228, 229, 230, 231,
+ 232, 233, 234, 235, 236, 237, 238, 239,
+ 240, 241, 242, 243, 244, 245, 246, 247,
+ 248, 249, 250, 251, 252, 253, 254, 255},
+ .oobavail = 124,
+ .oobfree = {
+ {.offset = 4,
+ .length = 124},
+ }
+};
+
enum {
GET_FEATURE,
SET_FEATURE,
@@ -188,7 +239,10 @@
SPI_NAND_INFO("GD5F4GM8RExxG", 0xC8, 0x85, 2048, 128, 64, 4096,
1, 8, 0, 6, 0, READ_FROM_CACHE_QUAD,
&ecc_layout_128, gd_spi_nand_ecc_status),
-
+ /*add by mbtk_tanggaoyou for GD5F4GM8RExxG:DID=0x85,pgsz=2k,blksz=64*pgsz,lun=1,ecc_strength=8*/
+ SPI_NAND_INFO_TIMING("GD5F4GM8RExxG", 0xC8, 0x85, 2048, 128, 64, 4096,
+ 1, 8, 0, 6, 9, 2, 2, 0,READ_FROM_CACHE_X4,
+ &ecc_layout_128,gd_spi_nand_ecc_status),
/* GigaDeivce 3.3V */
SPI_NAND_INFO("GD5F1GQ4UExxG", 0xC8, 0xD1, 2048, 128, 64, 1024,
1, 8, 0, 6, 0, READ_FROM_CACHE_QUAD_GD,
@@ -266,6 +320,11 @@
1, 7, 0, 4, 52, READ_FROM_CACHE_X4,
&ecc_layout_64, generic_spi_nand_ecc_status),
+ /* ESMT 4Gb : Add by mbtk */
+ SPI_NAND_INFO("F50D4G41XB", 0x2C, 0x35, 4096, 256, 64, 2048,
+ 1, 8, 0, 4, 52, READ_FROM_CACHE_X4,
+ &esmt_ecc_layout_256, micron_spi_nand_ecc_status),
+
/* Fudan Microelectronics */
SPI_NAND_INFO("FM25LS01", 0xA1, 0xA5, 2048, 128, 64, 1024,
1, 4, 0, 4, 0, READ_FROM_CACHE_X4,
diff --git a/marvell/uboot/drivers/power/pmic/pmic_mrvl_common.c b/marvell/uboot/drivers/power/pmic/pmic_mrvl_common.c
old mode 100644
new mode 100755
index ecd7847..78513ad
--- a/marvell/uboot/drivers/power/pmic/pmic_mrvl_common.c
+++ b/marvell/uboot/drivers/power/pmic/pmic_mrvl_common.c
@@ -48,6 +48,106 @@
u16 vbat; /* vbat value */
};
+// Add by MBTK
+#if defined(CONFIG_FG_PM803) || defined(CONFIG_PM803_GPADC)
+
+#define ERROR_VBAT_COEF 900
+/*Çë¸ù¾Ý¿Í»§µÄ°å×ÓÍâΧ·Öѹµç·ÉèÖÃCUSTOMER_VBAT_COEFFICIENTΪ·ÖѹϵÊýX1000,Èç¹ûĬÈÏÖµ900Ϊ´òÓ¡±¨¾¯log*/
+#define CUSTOMER_VBAT_COEFFICIENT ERROR_VBAT_COEF
+
+extern int asr1803_adc_caldata_init(struct adc_vbat *adcvbat_data0,
+ struct adc_vbat *adcvbat_data1);
+
+static u32 rtp_adc_code1, rtp_adc_code2;
+
+// Change by mbtk for ADC calibration
+#if defined(CONFIG_MBTK_BUILD_PROJECT_L508)
+static struct adc_vbat adc0_vbat_def_pair[MAX_ADC_GROUP_CNT] =
+{
+ {251, 154},
+ {364, 551},
+ {420, 752},
+ {445, 842},
+ {486, 992},
+ {540, 1189},
+ {596, 1391},
+ {624, 1492},
+ {657, 1615},
+ {712, 1815}
+};
+
+static struct adc_vbat adc1_vbat_def_pair[MAX_ADC_GROUP_CNT] =
+{
+ {251, 154},
+ {364, 551},
+ {420, 752},
+ {445, 842},
+ {486, 992},
+ {540, 1189},
+ {596, 1391},
+ {624, 1492},
+ {657, 1615},
+ {712, 1815}
+};
+
+#elif defined(CONFIG_MBTK_BUILD_PROJECT_PN1803)
+static struct adc_vbat adc0_vbat_def_pair[MAX_ADC_GROUP_CNT] =
+{
+ {262, 200},
+ {289, 300},
+ {342, 500},
+ {398, 700},
+ {454, 900},
+ {535, 1200},
+ {587, 1400},
+ {643, 1600},
+ {698, 1800},
+ {700, 1805},
+};
+static struct adc_vbat adc1_vbat_def_pair[MAX_ADC_GROUP_CNT] =
+{
+ {512, 3200},
+ {531, 3400},
+ {541, 3500},
+ {550, 3600},
+ {560, 3700},
+ {569, 3800},
+ {578, 3900},
+ {588, 4000},
+ {597, 4100},
+ {607, 4200}
+};
+#else
+static struct adc_vbat adc0_vbat_def_pair[MAX_ADC_GROUP_CNT] =
+{
+ {355, 3217},
+ {362, 3323},
+ {367, 3404},
+ {373, 3505},
+ {379, 3605},
+ {387, 3732},
+ {393, 3835},
+ {399, 3941},
+ {405, 4020},
+ {413, 4170}
+};
+
+static struct adc_vbat adc1_vbat_def_pair[MAX_ADC_GROUP_CNT] =
+{
+ {355, 3217},
+ {362, 3323},
+ {367, 3404},
+ {373, 3505},
+ {379, 3605},
+ {387, 3732},
+ {393, 3835},
+ {399, 3941},
+ {405, 4020},
+ {413, 4170}
+};
+#endif
+
+#endif // defined(CONFIG_FG_PM803) || defined(CONFIG_PM803_GPADC)
#ifdef CONFIG_AUXADC
#define APBS_REG_12 (0x12c)
#define APBS_REG_2 (0x104)
@@ -487,37 +587,6 @@
#endif
-#if defined(CONFIG_FG_PM803) || defined(CONFIG_PM803_GPADC)
-extern int asr1803_adc_caldata_init(struct adc_vbat *adcvbat_data0,
- struct adc_vbat *adcvbat_data1);
-static struct adc_vbat adc0_vbat_def_pair[MAX_ADC_GROUP_CNT] =
-{
- {355, 3217},
- {362, 3323},
- {367, 3404},
- {373, 3505},
- {379, 3605},
- {387, 3732},
- {393, 3835},
- {399, 3941},
- {405, 4020},
- {413, 4170}
-};
-static struct adc_vbat adc1_vbat_def_pair[MAX_ADC_GROUP_CNT] =
-{
- {355, 3217},
- {362, 3323},
- {367, 3404},
- {373, 3505},
- {379, 3605},
- {387, 3732},
- {393, 3835},
- {399, 3941},
- {405, 4020},
- {413, 4170}
-};
-static u32 rtp_adc_code1, rtp_adc_code2;
-#endif
#ifdef CONFIG_ASR1901
u8 pmic_reg_raw_read(u8 addr, u8 reg)
@@ -1485,6 +1554,10 @@
{
int i, index = 0;
short y2, y1, x2, x1;
+ // Add by MBTK
+ int delta_x = 0;
+ int delta_y = 0;
+ int vbat_value = 0;
for (i = 1; i < MAX_ADC_GROUP_CNT; i++) {
if (adc_value < adc_vbat_def_pair[i].adc) {
@@ -1500,9 +1573,27 @@
y1 = adc_vbat_def_pair[index].vbat;
x2 = adc_vbat_def_pair[index+1].adc;
x1 = adc_vbat_def_pair[index].adc;
+#if 1 //changed by mbtk_tanggaoyou, Integer operation division must be done at last
+ delta_x = x2-x1;
+
+ if(!delta_x)
+ return 1;
+
+ delta_y = y2-y1;
+
+ /*must divide at the last*/
+ vbat_value = (delta_y*(adc_value-x1)+delta_x*y1)/delta_x;
+
+ if(vbat_value <= 0)
+ vbat_value = 1;
+
+ return vbat_value;
+
+#else
return (((y2-y1)/(x2-x1)) * adc_value)
+ y1 - (short)(((y2-y1)/(x2-x1))*x1);
+#endif
}
int convert_adc_to_vbat(int adc_value)
@@ -1859,6 +1950,28 @@
pmic_reg_write(p_fg, gp_bias_en, data);
return volt;
}
+// Add by MBTK
+#if defined(CONFIG_FG_PM803) || defined(CONFIG_PM803_GPADC)
+/*
+
+ this function is try convert adc value to customer's board voltage of batterry
+ input parameter: adc_ch is adc channel 0 or 1
+ coefficient is Conversion coefficient x 1000 to battery based the customer hardware board.
+ output/return : the real battery voltage mV
+*/
+int mbtk_customer_vbat_function(int adc_ch, int coefficient)
+{
+ if(coefficient == ERROR_VBAT_COEF)
+ {
+ printf("[ERR]Please customize ADC for vbat,FIX vbat=4V !\n");
+ return 4000;
+ }
+ else
+ {
+ return (coefficient*pm803_get_convert_adc_value(adc_ch))/1000;
+ }
+}
+#endif
int pmic_get_gpadc_bias_volt(struct pmic *p_fg, int gpadc_id, int bias)
{
@@ -1869,7 +1982,15 @@
#if defined(CONFIG_FG_PM803) || defined(CONFIG_PM803_GPADC)
if (pmic_is_pm803())
+ // Add by MBTK
+ {
+ #if 1
+ //TODO: based on board design to get bat voltage
+ return mbtk_customer_vbat_function(gpadc_id,CUSTOMER_VBAT_COEFFICIENT);
+ #else
return pm803_get_convert_adc_value(gpadc_id);
+ #endif
+ }
#endif
if (pmic_is_pm802())
return pmic_pm802_gpadc_bias_volt(p_fg, gpadc_id, bias);
@@ -1893,8 +2014,8 @@
#else
//TODO: based on board design to get bat voltage
if (pmic_is_pm803()) {
- printf("%s, !!!!!!!!PLS implement BAT volt func based on board design\n", __func__);
- return 4000;
+ // Change by MBTK
+ return mbtk_customer_vbat_function(0,CUSTOMER_VBAT_COEFFICIENT);
}
#endif
diff --git a/marvell/uboot/include/configs/fact_p301.h b/marvell/uboot/include/configs/fact_p301.h
index ed03c5d..72cbb2c 100755
--- a/marvell/uboot/include/configs/fact_p301.h
+++ b/marvell/uboot/include/configs/fact_p301.h
@@ -157,7 +157,8 @@
#define CONFIG_SHA256 1
#define CONFIG_SHA1 1
-#define DTIM_PRI_FLASH_OFFSET 0x260000
+// Change by mbtk
+#define DTIM_PRI_FLASH_OFFSET 0x4C0000
#define DTIM_PRI_FLASH_LEN 0x2000
#endif /* End TRUSTED_BOOT */
@@ -214,7 +215,8 @@
#define KERNEL_FLASH_OFFSET 0x1140000
#endif
-#define LARGE_ROOTFS_SIZE 0x1E00000
+// Change by mbtk
+#define LARGE_ROOTFS_SIZE 0x2800000
#define SMALL_ROOTFS_SIZE 0xB00000
#undef CONFIG_LOADADDR
@@ -291,9 +293,10 @@
//#define CONFIG_USE_MEP_IN_CODE
#define USE_MEP_PARTITION
#ifdef USE_MEP_PARTITION
-#define MEP_OTA_FLASH_ADDRESS 0x00120000
-#define MEP_OTA_FLASH_ADDRESS_BACKUP 0x00140000
-#define MEP_OTA_FLASH_LEN (0x20000*2)
+// Change by mbtk
+#define MEP_OTA_FLASH_ADDRESS 0x00240000
+#define MEP_OTA_FLASH_ADDRESS_BACKUP 0x00280000
+#define MEP_OTA_FLASH_LEN (0x40000*2)
#endif
#define OEM_NVM_MTD_PART "oem_data"