Baseline update from LYNQ_SDK_ASR_T108_V05.03.01.00(kernel build error.)
Change-Id: I56fc72cd096e82c589920026553170e5cb9692eb
diff --git a/marvell/uboot/drivers/mtd/spi-flash/spi_nand.c b/marvell/uboot/drivers/mtd/spi-flash/spi_nand.c
old mode 100644
new mode 100755
index f1af3d9..6bd5aa9
--- a/marvell/uboot/drivers/mtd/spi-flash/spi_nand.c
+++ b/marvell/uboot/drivers/mtd/spi-flash/spi_nand.c
@@ -108,6 +108,57 @@
.length = 64}, }
};
+// Add by mbtk
+static struct nand_ecclayout xtx_ecc_layout_256 = {
+ .eccbytes = 52,
+ .eccpos = {
+ 6, 7, 8, 9, 10, 11, 12, 13,
+ 14, 15, 16, 17, 18, 21, 22, 23,
+ 24, 25, 26, 27, 28, 29, 30, 31,
+ 32, 33, 36, 37, 38, 39, 40, 41,
+ 42, 43, 44, 45, 46, 47, 48, 51,
+ 52, 53, 54, 55, 56, 57, 58, 59,
+ 60, 61, 62, 63},
+ .oobavail = 74,
+ .oobfree = {
+ {.offset = 2,
+ .length = 4},
+ {.offset = 19,
+ .length = 2},
+ {.offset = 34,
+ .length = 2},
+ {.offset = 49,
+ .length = 2},
+ {.offset = 64,
+ .length = 64}, }
+};
+
+static struct nand_ecclayout esmt_ecc_layout_256 = {
+ .eccbytes = 128,
+ .eccpos = {
+ 128, 129, 130, 131, 132, 133, 134, 135,
+ 136, 137, 138, 139, 140, 141, 142, 143,
+ 144, 145, 146, 147, 148, 149, 150, 151,
+ 152, 153, 154, 155, 156, 157, 158, 159,
+ 160, 161, 162, 163, 164, 165, 166, 167,
+ 168, 169, 170, 171, 172, 173, 174, 175,
+ 176, 177, 178, 179, 180, 181, 182, 183,
+ 184, 185, 186, 187, 188, 189, 190, 191,
+ 192, 193, 194, 195, 196, 197, 198, 199,
+ 200, 201, 202, 203, 204, 205, 206, 207,
+ 208, 209, 210, 211, 212, 213, 214, 215,
+ 216, 217, 218, 219, 220, 221, 222, 223,
+ 224, 225, 226, 227, 228, 229, 230, 231,
+ 232, 233, 234, 235, 236, 237, 238, 239,
+ 240, 241, 242, 243, 244, 245, 246, 247,
+ 248, 249, 250, 251, 252, 253, 254, 255},
+ .oobavail = 124,
+ .oobfree = {
+ {.offset = 4,
+ .length = 124},
+ }
+};
+
enum {
GET_FEATURE,
SET_FEATURE,
@@ -188,7 +239,10 @@
SPI_NAND_INFO("GD5F4GM8RExxG", 0xC8, 0x85, 2048, 128, 64, 4096,
1, 8, 0, 6, 0, READ_FROM_CACHE_QUAD,
&ecc_layout_128, gd_spi_nand_ecc_status),
-
+ /*add by mbtk_tanggaoyou for GD5F4GM8RExxG:DID=0x85,pgsz=2k,blksz=64*pgsz,lun=1,ecc_strength=8*/
+ SPI_NAND_INFO_TIMING("GD5F4GM8RExxG", 0xC8, 0x85, 2048, 128, 64, 4096,
+ 1, 8, 0, 6, 9, 2, 2, 0,READ_FROM_CACHE_X4,
+ &ecc_layout_128,gd_spi_nand_ecc_status),
/* GigaDeivce 3.3V */
SPI_NAND_INFO("GD5F1GQ4UExxG", 0xC8, 0xD1, 2048, 128, 64, 1024,
1, 8, 0, 6, 0, READ_FROM_CACHE_QUAD_GD,
@@ -266,6 +320,11 @@
1, 7, 0, 4, 52, READ_FROM_CACHE_X4,
&ecc_layout_64, generic_spi_nand_ecc_status),
+ /* ESMT 4Gb : Add by mbtk */
+ SPI_NAND_INFO("F50D4G41XB", 0x2C, 0x35, 4096, 256, 64, 2048,
+ 1, 8, 0, 4, 52, READ_FROM_CACHE_X4,
+ &esmt_ecc_layout_256, micron_spi_nand_ecc_status),
+
/* Fudan Microelectronics */
SPI_NAND_INFO("FM25LS01", 0xA1, 0xA5, 2048, 128, 64, 1024,
1, 4, 0, 4, 0, READ_FROM_CACHE_X4,