| /* |
| * Copyright (C) 2020 ASR Microelectronics Co., Ltd. |
| * |
| * This program is free software; you can redistribute it and/or modify |
| * it under the terms of the GNU General Public License version 2 as |
| * publishhed by the Free Software Foundation. |
| */ |
| |
| #include "asr1901.dtsi" |
| |
| #ifdef CONFIG_FB_ASR |
| #ifdef CONFIG_FB_ASR_SPI |
| #define CONFIG_FB_ASR_SPI_DCX_GPIO |
| #endif |
| #endif |
| |
| / { |
| model = "ASR 1901(Kestrel) Board EVB"; |
| compatible = "asr,1901-evb", "asr,1901"; |
| |
| chosen { |
| bootargs = "root=/dev/mtdblock5 rootfstype=squashfs init=/etc/preinit noinitrd console=ttyS1,115200 mem=128M"; |
| }; |
| |
| memory { |
| reg = <0x04000000 0x08000000>; |
| }; |
| |
| soc { |
| axi@d4200000 { /* AXI */ |
| #ifdef CONFIG_FB_ASR |
| lcd: lcd@d4203000 { |
| compatible = "asr,fb"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&lcd_pmx_func>; |
| interrupts = <0 75 0x4>; |
| reg = <0xd4203000 0x800>; |
| #ifdef CONFIG_FB_ASR_SPI_DCX_GPIO |
| rs_gpio = <&gpio 82 0>; /* must config rs pin when line = 4 */ |
| #endif |
| //avdd-supply = <&ldo1>; |
| status = "okay"; |
| }; |
| #endif |
| |
| usb3phy: usb3phy@c0230000 { |
| status = "okay"; |
| }; |
| #ifdef CONFIG_USB_DWC3_ASR_OTG |
| usb3_1_otg: usb3-1-otg { |
| pinctrl-names = "default","sleep"; |
| pinctrl-0 = <&usb_id_pinmux &usb_host_pinmux>; |
| pinctrl-1 = <&usb_id_pinmux_slp &usb_host_pinmux>; |
| usbid_gpio = <121>; |
| edge_detect_gpio = <121>; |
| otg,use-gpio-vbus; |
| gpio-num = <122>; |
| status = "okay"; |
| }; |
| #else |
| usb3_1: usb3-1 { |
| status = "okay"; |
| }; |
| #endif |
| xgmac: ethernet@d4270000 { |
| pinctrl-names = "default", "rgmii"; |
| pinctrl-0 = <&xgmac_pmx_func0 &xgmac_pmx_func1 &xgmac_pmx_func3>; |
| pinctrl-1 = <&xgmac_pmx_func0 &xgmac_pmx_func1 &xgmac_pmx_func2 &xgmac_pmx_func3>; |
| |
| xgmac,no-phy-intterrupt; |
| /* |
| * 2.5G sgmii is different with 2500base-x |
| * (auto-negotiation, preambles, etc), if one |
| * mode can't work, try another. |
| */ |
| phy-mode = "sgmii"; /* "2500base-x" */ |
| phy-handle = <&phy0>; |
| status = "okay"; |
| |
| reset-gpio = <&gpio 42 0>; |
| reset-active-low; |
| reset-delays-us = <0 100000 100000>; |
| |
| 3v3-ldo-gpio = <&gpio 41 0>; |
| 0v95-ldo-gpio = <&gpio 103 0>; |
| |
| mdio: mdio-bus { |
| compatible = "snps,dwmac-mdio"; |
| #address-cells = <0x1>; |
| #size-cells = <0x0>; |
| |
| phy0: phy@0 { |
| compatible = "ethernet-phy-ieee802.3-c22"; |
| device_type = "ethernet-phy"; |
| reg = <0x1>; /* set phy address*/ |
| interrupts = <0 112 0x4>; |
| }; |
| }; |
| }; |
| |
| ssp1: spi@d42a0c00 { |
| status = "okay"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&ssp1_pmx_func>; |
| |
| /*cs-gpios = <&gpio 84 0>;*//* DXS101 Use the config of Cs-gpios */ |
| slic: spidev@0{ |
| #address-cells = <1>; |
| #size-cells = <1>; |
| compatible = "asr,slic"; |
| reg = <0>; |
| spi-cpol; |
| spi-cpha; |
| spi-max-frequency = <6500000>; |
| }; |
| }; |
| |
| qspi: spi@0xd420b000 { |
| asr,qspi-freq = <78000000>; |
| status = "okay"; |
| }; |
| /* SD card */ |
| sdh0: sdh@d4280000 { |
| pinctrl-names = "default", "fast"; |
| pinctrl-0 = <&sdh0_pmx_func1 &sdh0_pmx_func2 &sdh0_pmx_func3>; |
| pinctrl-1 = <&sdh0_pmx_func1_fast &sdh0_pmx_func2_fast &sdh0_pmx_func3>; |
| vmmc-supply = <&pm813ldo4>; |
| vqmmc-supply = <&pm802ldo4>; |
| bus-width = <4>; |
| no-mmc; |
| no-sdio; |
| cd-gpios = <&gpio 40 1>; |
| /*non-removable; |
| broken-cd;*/ |
| wp-inverted; |
| sdhci,auto-cmd12; |
| asr,sdh-pm-runtime-en; |
| asr,sdh-host-caps-disable = <(MMC_CAP_UHS_SDR104)>; |
| asr,sdh-quirks = <( |
| /*SDHCI_QUIRK_BROKEN_CARD_DETECTION | */ |
| SDHCI_QUIRK_BROKEN_TIMEOUT_VAL |
| )>; |
| asr,sdh-quirks2 = <( |
| SDHCI_QUIRK2_SET_AIB_MMC | |
| SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
| )>; |
| /* prop "sdh-dtr-data": |
| <timing preset_rate src_rate tx_delay rx_delay tx_dline_reg rx_dline_reg> */ |
| asr,sdh-dtr-data = <PXA_MMC_TIMING_LEGACY PXA_SDH_DTR_26M PXA_SDH_DTR_104M 0 0 0 0>, |
| <PXA_MMC_TIMING_SD_HS PXA_SDH_DTR_52M PXA_SDH_DTR_104M 0 0 0 0>, |
| <PXA_MMC_TIMING_UHS_DDR50 PXA_SDH_DTR_52M PXA_SDH_DTR_104M 0 0 0 3>, |
| <PXA_MMC_TIMING_UHS_SDR50 PXA_SDH_DTR_104M PXA_SDH_DTR_208M 0 0 0 0>, |
| <PXA_MMC_TIMING_UHS_SDR104 PXA_SDH_DTR_208M PXA_SDH_DTR_208M 0 0 0 0>, |
| <PXA_MMC_TIMING_MAX PXA_SDH_DTR_PS_NONE PXA_SDH_DTR_104M 0 0 0 0>; |
| status = "okay"; |
| }; |
| |
| /* eMMC */ |
| sdh1: sdh@d4280800 { |
| pinctrl-names = "default", "fast"; |
| pinctrl-0 = <&sdh1_pmx_func1 &sdh1_pmx_func2>; |
| pinctrl-1 = <&sdh1_pmx_func1_fast &sdh1_pmx_func2_fast>; |
| vmmc-supply = <&pm813ldo2>; |
| bus-width = <8>; |
| no-sd; |
| no-sdio; |
| non-removable; |
| asr,sdh-pm-runtime-en; |
| asr,sdh-host-caps2-disable = <((1 << 6))>; |
| asr,sdh-quirks = <( |
| SDHCI_QUIRK_BROKEN_CARD_DETECTION | |
| SDHCI_QUIRK_BROKEN_TIMEOUT_VAL |
| )>; |
| asr,sdh-quirks2 = <( |
| SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
| )>; |
| |
| /* prop "sdh-dtr-data": |
| <timing preset_rate src_rate tx_delay rx_delay tx_dline_reg rx_dline_reg> */ |
| asr,sdh-dtr-data = <PXA_MMC_TIMING_LEGACY PXA_SDH_DTR_26M PXA_SDH_DTR_104M 0 0 0 0>, |
| <PXA_MMC_TIMING_MMC_HS PXA_SDH_DTR_52M PXA_SDH_DTR_104M 0 0 0 0>, |
| <PXA_MMC_TIMING_UHS_DDR50 PXA_SDH_DTR_52M PXA_SDH_DTR_104M 0 0 0 3>, |
| <PXA_MMC_TIMING_MMC_HS200 PXA_SDH_DTR_208M PXA_SDH_DTR_208M 0 0 0 0>, |
| <PXA_MMC_TIMING_MAX PXA_SDH_DTR_PS_NONE PXA_SDH_DTR_89M 0 0 0 0>; |
| status = "disabled"; |
| }; |
| pcie0: pcie@d4c00000 { |
| reset-gpios = <&gpio 16 0>; |
| status = "okay"; |
| }; |
| pcie1: pcie@0xd4800000{ |
| reset-gpios = <&gpio 66 0>; |
| status = "okay"; |
| }; |
| }; |
| |
| apb@d4000000 { |
| ssp2: spi@d401c000 { |
| status = "disabled"; |
| }; |
| ssp0: spi@d401b000 { |
| status = "disabled"; |
| }; |
| ssp_dai1: pxa-ssp-dai@1 { |
| compatible = "asr,pxa-ssp-dai"; |
| reg = <0x1 0x0>; |
| |
| platform_driver_name = "tdma_platform"; |
| burst_size = <4>; |
| playback_period_bytes = <2048>; |
| playback_buffer_bytes = <4096>; |
| capture_period_bytes = <2048>; |
| capture_buffer_bytes = <4096>; |
| }; |
| |
| mfpr: mfpr@d401e000 { |
| /* pinctrl-names = "default"; */ |
| /* pinctrl-0 = <&mfp_pins_group_0 &mfp_pins_group_1 &mfp_pins_group_2 >;*/ |
| status = "okay"; |
| /* intend to replace lpm-board-cfg |
| no-apbsd-in-d1pp = <0x1>; //"wakeup-state-d1pp" |
| pin1:pin1@d401e01B0 { |
| offset = <0x1B0>; |
| udr-cfg = <0xA040>; |
| }; |
| pin2:pin2@d401e01B4 { |
| offset = <0x1B4>; |
| udr-cfg = <0xA040>; |
| }; |
| */ |
| }; |
| edgewakeup: edgewakeup@d4019800 { |
| status = "okay"; |
| }; |
| rtc: rtc@d4010000 { |
| status = "okay"; |
| }; |
| timer0: timer@d4014000 { |
| status = "okay"; |
| }; |
| /* disable uart1 as cp is printing log thru uart1 */ |
| uart1: uart@d4017000 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&uart1_rxd &uart1_txd>; |
| status = "disabled"; |
| }; |
| uart2: uart@d4018000 { /* kestrel evb use ap uart */ |
| pinctrl-names = "default","sleep"; |
| pinctrl-0 = <&uart2_pmx_func1 &uart2_pmx_func2>; |
| pinctrl-1 = <&uart2_pmx_func1 &uart2_pmx_func2_sleep>; |
| edge-wakeup-gpio = <&gpio 64 0>; /* GPIO64: AP UART rx pin */ |
| status = "okay"; |
| }; |
| uart3: uart@d4017800 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&uart3_pmx_func>; |
| status = "disabled"; |
| }; |
| pmx: pinmux@d401e000 { |
| /* pin base = base_addr / 4, nr pins & gpio function */ |
| pinctrl-single,gpio-range = < |
| /* |
| * GPIO number is hardcoded for range at here. |
| * In gpio chip, GPIO number is not hardcoded for range. |
| * Since one gpio pin may be routed to multiple pins, |
| * define these gpio range in pxa910-dkb.dts not pxa910.dtsi. |
| */ |
| &range 1 26 0 /* GPIO0 ~ GPIO25 */ |
| &range 131 66 0 /* GPIO26 ~ GPIO91 */ |
| &range 78 20 2 /* GPIO92 ~ GPIO111 */ |
| >; |
| |
| #ifdef CONFIG_FB_ASR |
| lcd_pmx_func: lcd_pmx_func { |
| pinctrl-single,pins = < |
| GPIO57 AF5 // LCD_CS0 |
| GPIO58 AF5 // LCD_RSTB |
| GPIO59 AF5 // LCD_VSYNC |
| #ifdef CONFIG_FB_ASR_MCU |
| GPIO60 AF5 // LCD_WRB |
| GPIO61 AF5 // LCD_RDB |
| GPIO62 AF5 // LCD_A0 |
| GPIO67 AF5 // LCD_DB0 |
| GPIO68 AF5 // LCD_DB1 |
| GPIO69 AF5 // LCD_DB2 |
| GPIO70 AF5 // LCD_DB3 |
| GPIO71 AF5 // LCD_DB4 |
| GPIO72 AF5 // LCD_DB5 |
| GPIO73 AF5 // LCD_DB6 |
| GPIO74 AF5 // LCD_DB7 |
| #ifdef CONFIG_FB_ASR_MCU16 |
| GPIO75 AF5 // LCD_DB8 |
| GPIO76 AF5 // LCD_DB9 |
| GPIO77 AF5 // LCD_DB10 |
| #endif |
| #endif |
| GPIO78 AF5 // LCD_SPI_DOUT/LCD_DB11 |
| GPIO79 AF5 // LCD_SPI_DIN/LCD_DB12 |
| GPIO80 AF5 // LCD_SPI_CLK/LCD_DB13 |
| GPIO81 AF5 // LCD_SPI_DC_RS/LCD_DB14 |
| #ifdef CONFIG_FB_ASR_SPI_DCX_GPIO |
| GPIO82 AF0 // LCD_SPI_DOUT2/LCD_DB15 |
| #else |
| GPIO82 AF5 // LCD_SPI_DOUT2/LCD_DB15 |
| #endif |
| >; |
| /* NOTE: need to PULL_UP here */ |
| DS_MEDIUM;PULL_UP;EDGE_NONE;LPM_NONE; |
| }; |
| #endif |
| |
| ssp0_pmx_func: ssp0_pmx_func { |
| pinctrl-single,pins = < |
| GPIO89 AF1 /* TXD */ |
| GPIO90 AF1 /* RXD */ |
| GPIO88 AF1 /* FRM */ |
| GPIO87 AF1 /* SCLK */ |
| >; |
| DS_MEDIUM;PULL_NONE;EDGE_NONE;LPM_NONE; |
| }; |
| ssp1_pmx_func: ssp1_pmx_func { |
| pinctrl-single,pins = < |
| GPIO85 AF1 /* TXD */ |
| GPIO86 AF1 /* RXD */ |
| GPIO84 AF1 /* FRM */ |
| /*GPIO84 AF0*/ /* FRM *//* DXS101 Use the config of Cs-gpios */ |
| GPIO83 AF1 /* SCLK */ |
| >; |
| DS_MEDIUM;PULL_NONE;EDGE_NONE;LPM_NONE; |
| }; |
| lcd_bl_func: lcd_bl_func { |
| pinctrl-single,pins = < |
| GPIO49 AF0 /* reset */ |
| GPIO50 AF0 /* reset */ |
| GPIO51 AF0 /* reset */ |
| GPIO52 AF0 /* lcd d/c */ |
| >; |
| MFP_DEFAULT; |
| }; |
| |
| twsi0_pmx_func: twsi0_pmx_func { |
| pinctrl-single,pins = < |
| GPIO18 AF1 |
| GPIO19 AF1 |
| >; |
| MFP_LPM_FLOAT; |
| }; |
| twsi0_pmx_gpio: twsi0_pmx_gpio { |
| pinctrl-single,pins = < |
| GPIO18 AF0 |
| GPIO19 AF0 |
| >; |
| MFP_LPM_FLOAT; |
| }; |
| twsi1_pmx_func: twsi1_pmx_func { |
| pinctrl-single,pins = < |
| GPIO20 AF1 |
| GPIO21 AF1 |
| >; |
| MFP_LPM_FLOAT; |
| }; |
| twsi1_pmx_gpio: twsi1_pmx_gpio { |
| pinctrl-single,pins = < |
| GPIO20 AF0 |
| GPIO21 AF0 |
| >; |
| MFP_LPM_FLOAT; |
| }; |
| twsi2_pmx_func: twsi2_pmx_func { |
| pinctrl-single,pins = < |
| GPIO22 AF1 |
| GPIO23 AF1 |
| >; |
| MFP_LPM_FLOAT; |
| }; |
| twsi2_pmx_gpio: twsi2_pmx_gpio { |
| pinctrl-single,pins = < |
| GPIO22 AF0 |
| GPIO23 AF0 |
| >; |
| MFP_LPM_FLOAT; |
| }; |
| twsi4_pmx_func: twsi4_pmx_func { |
| pinctrl-single,pins = < |
| GPIO35 AF1 |
| GPIO36 AF1 |
| >; |
| MFP_LPM_FLOAT; |
| }; |
| twsi4_pmx_gpio: twsi4_pmx_gpio { |
| pinctrl-single,pins = < |
| GPIO35 AF0 |
| GPIO36 AF0 |
| >; |
| MFP_LPM_FLOAT; |
| }; |
| /* no pull, no LPM */ |
| dvc_pmx_func: dvc_pmx_func { |
| /* hw-dvc */ |
| pinctrl-single,pins = < |
| GPIO28 AF1 |
| GPIO27 AF1 |
| >; |
| DS_MEDIUM;PULL_FLOAT;EDGE_NONE;LPM_NONE; |
| }; |
| #if 0 |
| i2s_func: i2s_func { |
| pinctrl-single,pins = < |
| GPIO25 AF1 |
| GPIO26 AF1 |
| >; |
| MFP_DEFAULT; |
| }; |
| i2s_gpio: i2s_gpio { |
| pinctrl-single,pins = < |
| GPIO25 AF0 |
| GPIO26 AF0 |
| >; |
| MFP_LPM_FLOAT; |
| }; |
| #endif |
| uart1_rxd: uart1_rxd { |
| /* gps dedicated uart */ |
| pinctrl-single,pins = < |
| GPIO54 AF2 |
| >; |
| MFP_DEFAULT; |
| }; |
| uart1_txd: uart1_txd { |
| /* gps dedicated uart */ |
| pinctrl-single,pins = < |
| GPIO53 AF2 |
| >; |
| MFP_DEFAULT; |
| }; |
| uart2_pmx_func1: uart2_pmx_func1 { |
| pinctrl-single,pins = < |
| GPIO63 AF1 |
| >; |
| MFP_DEFAULT; |
| }; |
| uart2_pmx_func2: uart2_pmx_func2 { |
| pinctrl-single,pins = < |
| GPIO64 AF1 |
| >; |
| MFP_DEFAULT; |
| }; |
| uart2_pmx_func2_sleep: uart2_pmx_func2_sleep { |
| pinctrl-single,pins = < |
| GPIO64 AF1 |
| >; |
| DS_MEDIUM;PULL_NONE;EDGE_BOTH;SL_NORMAL; |
| }; |
| uart3_pmx_func: uart3_pmx_func { |
| pinctrl-single,pins = < |
| GPIO49 AF1 |
| GPIO50 AF1 |
| >; |
| MFP_DEFAULT; |
| }; |
| |
| panel_rst_func: panel_rst_func { |
| pinctrl-single,pins = < |
| /*GPIO87 AF0*/ |
| >; |
| DS_MEDIUM;PULL_FLOAT;EDGE_NONE;LPM_NONE; |
| }; |
| |
| sd_ldo_en: sd_ldo_en { |
| pinctrl-single,pins = < |
| GPIO91 AF0 |
| >; |
| MFP_LPM_PULL_DW; |
| }; |
| |
| sdh0_pmx_func1: sdh0_pmx_func1 { |
| pinctrl-single,pins = < |
| MMC1_DAT3 AF0 |
| MMC1_DAT2 AF0 |
| MMC1_DAT1 AF0 |
| MMC1_DAT0 AF0 |
| MMC1_CMD AF0 |
| >; |
| DS_MEDIUM;PULL_NONE;EDGE_NONE;LPM_NONE; |
| }; |
| sdh0_pmx_func2: sdh0_pmx_func2 { |
| pinctrl-single,pins = < |
| MMC1_CLK AF0 |
| >; |
| DS_MEDIUM;PULL_NONE;EDGE_NONE;LPM_DRIVE_LOW; |
| }; |
| sdh0_pmx_func3: sdh0_pmx_func3 { |
| pinctrl-single,pins = < |
| GPIO40 AF0 |
| >; |
| MFP_PULL_UP; |
| }; |
| sdh0_pmx_func1_fast: sdh0_pmx_func1_fast { |
| pinctrl-single,pins = < |
| MMC1_DAT3 AF0 |
| MMC1_DAT2 AF0 |
| MMC1_DAT1 AF0 |
| MMC1_DAT0 AF0 |
| MMC1_CMD AF0 |
| >; |
| DS_FAST0;PULL_NONE;EDGE_NONE;LPM_NONE; |
| }; |
| sdh0_pmx_func2_fast: sdh0_pmx_func2_fast { |
| pinctrl-single,pins = < |
| MMC1_CLK AF0 |
| >; |
| DS_FAST0;PULL_NONE;EDGE_NONE;LPM_DRIVE_LOW; |
| }; |
| sdh1_pmx_func1_fast: sdh1_pmx_func1_fast { |
| pinctrl-single,pins = < |
| GPIO73 AF0 /* MMC2_DAT7 */ |
| GPIO74 AF0 /* MMC2_DAT6 */ |
| GPIO75 AF0 /* MMC2_DAT5 */ |
| GPIO76 AF0 /* MMC2_DAT4 */ |
| GPIO77 AF0 /* MMC2_DAT3 */ |
| GPIO78 AF0 /* MMC2_DAT2 */ |
| GPIO79 AF0 /* MMC2_DAT1 */ |
| GPIO80 AF0 /* MMC2_DAT0 */ |
| GPIO81 AF0 /* MMC2_CMD */ |
| >; |
| DS_FAST;PULL_NONE;EDGE_NONE;LPM_NONE; |
| }; |
| sdh1_pmx_func2_fast: sdh1_pmx_func2_fast { |
| pinctrl-single,pins = < |
| GPIO82 AF0 /* MMC2_CLK */ |
| >; |
| DS_FAST;PULL_NONE;EDGE_NONE;LPM_DRIVE_LOW; |
| }; |
| sdh1_pmx_func1: sdh1_pmx_func1 { |
| pinctrl-single,pins = < |
| GPIO73 AF0 /* MMC2_DAT7 */ |
| GPIO74 AF0 /* MMC2_DAT6 */ |
| GPIO75 AF0 /* MMC2_DAT5 */ |
| GPIO76 AF0 /* MMC2_DAT4 */ |
| GPIO77 AF0 /* MMC2_DAT3 */ |
| GPIO78 AF0 /* MMC2_DAT2 */ |
| GPIO79 AF0 /* MMC2_DAT1 */ |
| GPIO80 AF0 /* MMC2_DAT0 */ |
| GPIO81 AF0 /* MMC2_CMD */ |
| >; |
| MFP_DEFAULT; |
| }; |
| sdh1_pmx_func2: sdh1_pmx_func2 { |
| pinctrl-single,pins = < |
| GPIO82 AF0 /* MMC2_CLK */ |
| >; |
| MFP_LPM_DRIVE_LOW; |
| }; |
| |
| alc5616_pmx_func1: alc5616_pmx_func1 { |
| pinctrl-single,pins = < |
| CP_GPO_10 AF2 /* Headset detection IRQ */ |
| GPIO26 AF2 /* MCLK */ |
| >; |
| MFP_DEFAULT; |
| }; |
| alc5616_pmx_func2: alc5616_pmx_func2 { |
| pinctrl-single,pins = < |
| CP_GPO_10 AF2 /* Headset detection IRQ */ |
| GPIO26 AF2 /* MCLK */ |
| >; |
| MFP_DEFAULT; |
| }; |
| slic_pmx_func1: slic_pmx_func1 { |
| pinctrl-single,pins = < |
| GPIO69 AF0 /* SLIC_INT */ |
| GPIO71 AF0 /* SLIC_LDO_EN GPIO71 */ |
| >; |
| MFP_DEFAULT; |
| }; |
| slic_pmx_func2: slic_pmx_func2 { |
| pinctrl-single,pins = < |
| GPIO70 AF0 /* SLIC_RESET GPIO70 */ |
| >; |
| MFP_DEFAULT; |
| }; |
| slic_pmx_func1_sleep: slic_pmx_func1_sleep { |
| pinctrl-single,pins = < |
| GPIO69 AF0 /* SLIC_INT */ |
| >; |
| DS_MEDIUM;PULL_UP;EDGE_BOTH;LPM_NONE; |
| }; |
| otg_vbus_func: otg_vbus_func { |
| pinctrl-single,pins = < |
| VBUS_DRV AF1 /* GPIO[122] */ |
| >; |
| DS_MEDIUM;PULL_DOWN;EDGE_NONE;LPM_DRIVE_LOW; |
| }; |
| |
| xgmac_pmx_func0: xgmac_pmx_func0 { |
| pinctrl-single,pins = < |
| GPIO12 AF1 /* GMAC1_TX_MDC */ |
| GPIO14 AF1 /* GMAC1_INT_N */ |
| >; |
| DS_MEDIUM;PULL_DOWN;EDGE_NONE;LPM_NONE; |
| }; |
| xgmac_pmx_func1: emac_pmx_func1 { |
| pinctrl-single,pins = < |
| GPIO13 AF1 /* GMAC1_TX_MDIO */ |
| >; |
| DS_MEDIUM;PULL_UP;EDGE_NONE;LPM_NONE; |
| }; |
| xgmac_pmx_func2: xgmac_pmx_func2 { |
| pinctrl-single,pins = < |
| GPIO00 AF1 /* GMAC1_RX_DV */ |
| GPIO01 AF1 /* GMAC1_RX_D0 */ |
| GPIO02 AF1 /* GMAC1_RX_D1 */ |
| GPIO03 AF1 /* GMAC1_RX_CLK */ |
| GPIO04 AF1 /* GMAC1_RX_D2 */ |
| GPIO05 AF1 /* GMAC1_RX_D3 */ |
| GPIO06 AF1 /* GMAC1_TX_D0 */ |
| GPIO07 AF1 /* GMAC1_TX_D1 */ |
| GPIO08 AF1 /* GMAC1_TX_CLK */ |
| GPIO09 AF1 /* GMAC1_TX_D2 */ |
| GPIO10 AF1 /* GMAC1_TX_D3 */ |
| GPIO11 AF1 /* GMAC1_TX_EN */ |
| >; |
| DS_MEDIUM;PULL_DOWN;EDGE_NONE;LPM_NONE; |
| }; |
| xgmac_pmx_func3: xgmac_pmx_func3 { |
| pinctrl-single,pins = < |
| GPIO42 AF0 /* RESET */ |
| GPIO41 AF0 /* 3.3v LDO_EN */ |
| CP_GPO_11 AF2 /* 0.95v LDO_EN */ |
| >; |
| MFP_LPM_DRIVE_HIGH; |
| }; |
| usb_vbus_pinmux: usb_vbus_pinmux { |
| pinctrl-single,pins = < |
| GPIO24 AF1 /* vbus */ |
| >; |
| DS_MEDIUM;PULL_DOWN;EDGE_NONE;LPM_NONE; |
| }; |
| |
| usb_typec_pinmux: usb_typec_pinmux { |
| pinctrl-single,pins = < |
| GPIO17 AF1 /* typec direction */ |
| >; |
| DS_MEDIUM;PULL_FLOAT;EDGE_NONE;LPM_NONE; |
| }; |
| pcie_pmx_pd_rst_off: pcie_pmx_pd_rst_off { |
| pinctrl-single,pins = < |
| GPIO16 AF0 /* PERST_N */ |
| CP_GPO_4 AF2 /* DC_EN */ |
| GPIO66 AF0 /* PERST2_N */ |
| CP_GPO_5 AF2 /* DC2_EN */ |
| >; |
| MFP_LPM_DRIVE_LOW; |
| }; |
| pcie_pmx_pd_rst_on: pcie_pmx_pd_rst_on { |
| pinctrl-single,pins = < |
| GPIO16 AF0 /* PERST_N */ |
| CP_GPO_4 AF2 /* DC_EN */ |
| GPIO66 AF0 /* PERST2_N */ |
| CP_GPO_5 AF2 /* DC2_EN */ |
| >; |
| MFP_LPM_DRIVE_HIGH; |
| }; |
| usim1_pmx_func: usim1_pmx_func { |
| pinctrl-single,pins = < |
| GPIO43 AF0 |
| >; |
| DS_MEDIUM;PULL_UP;EDGE_NONE;SL_NORMAL; |
| }; |
| usim1_pmx_func_sleep: usim1_pmx_func_sleep { |
| pinctrl-single,pins = < |
| GPIO43 AF0 |
| >; |
| DS_MEDIUM;PULL_UP;EDGE_BOTH;SL_NORMAL; |
| }; |
| usb_id_pinmux: usb_id_pinmux { |
| pinctrl-single,pins = < |
| USB_ID AF1 /* usbid-gpio121 */ |
| >; |
| DS_MEDIUM;PULL_UP;EDGE_NONE;LPM_NONE; |
| }; |
| usb_id_pinmux_slp: usb_id_pinmux_slp { |
| pinctrl-single,pins = < |
| USB_ID AF1 /* usbid-gpio121 */ |
| >; |
| DS_MEDIUM;PULL_UP;EDGE_BOTH;LPM_NONE; |
| }; |
| usb_host_pinmux: usb_host_pinmux { |
| pinctrl-single,pins = < |
| VBUS_DRV AF1 /* gpio-122 */ |
| >; |
| DS_MEDIUM;PULL_FLOAT;EDGE_NONE;LPM_NONE; |
| }; |
| }; |
| #ifdef CONFIG_ASR_SULOG |
| sulog: ripc1@d40b0100 { |
| status= "okay"; |
| }; |
| #endif |
| twsi0: i2c@d4011000 { |
| status= "okay"; |
| |
| pmic7: pm813@30 { |
| compatible = "asr,pm813"; |
| reg = <0x30>; |
| interrupts = <0 43 0x4>; |
| interrupt-parent = <&gic>; |
| interrupt-controller; |
| #interrupt-cells = <1>; |
| chg_irq_from_exton; |
| regulators { |
| pm813ldo1: LDO1 { |
| regulator-compatible = "PM813-LDO1"; |
| regulator-min-microvolt = <1200000>; |
| regulator-max-microvolt = <3300000>; |
| regulator-boot-on; |
| regulator-always-on; |
| }; |
| }; |
| usb { |
| status = "disabled"; |
| vbus-gpio = <0xff>; /* set_vbus */ |
| id-gpadc = <0xff>; /* usb-id */ |
| vchg-from-exton = <1>; |
| vbus-detect = <1>; /* vbus-irq */ |
| get-vbus = <1>; /* get-vbus */ |
| }; |
| }; |
| /* |
| pmic4: 88pm805@38 { |
| compatible = "marvell,88pm805"; |
| reg = <0x38>; |
| }; |
| */ |
| }; |
| twsi1: i2c@d4010800{ |
| status= "okay"; |
| |
| alc5616@1b { |
| compatible = "asrmicro,alc5616"; |
| reg = <0x1b>; |
| pinctrl-names = "default", "sleep"; |
| pinctrl-0 = <&alc5616_pmx_func1>; |
| pinctrl-1 = <&alc5616_pmx_func2>; |
| irq-gpio = <&gpio 102 0>;/* CODEC_IRQ for headset detection */ |
| vdd18-supply = <&pm813ldo6>; |
| vdd33-supply = <&pm813ldo10>; |
| status= "okay"; |
| }; |
| /* |
| nau8810@1a { |
| compatible = "marvell,nau8810"; |
| reg = <0x1a>; |
| }; |
| */ |
| }; |
| twsi2: i2c@d4013800 { |
| status= "okay"; |
| fusb301@21 { |
| compatible = "asr,fusb301-typec"; |
| reg = <0x21>; |
| }; |
| }; |
| twsi3: i2c@d4018800 { |
| status = "okay"; |
| |
| pmic4: 88pm805@38 { |
| compatible = "marvell,88pm805"; |
| reg = <0x38>; |
| }; |
| |
| pmic5: pm802@00 { |
| compatible = "asr,pm802"; |
| status = "okay"; |
| reg = <0x00>; |
| interrupts = <0 43 0x4>; |
| interrupt-parent = <&gic>; |
| interrupt-controller; |
| #interrupt-cells = <1>; |
| chg_irq_from_exton; |
| }; |
| |
| pmic826: pm826@20 { |
| status = "okay"; |
| compatible = "asr,pm826"; |
| reg = <0x20>; |
| dvc { |
| status = "okay"; |
| compatible = "marvell,88pm8xx-dvc"; |
| dvc-affected-buckbits = <1>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&dvc_pmx_func>; |
| }; |
| }; |
| }; |
| }; |
| }; |
| |
| vcc_sdh1: sd-regulator { |
| compatible = "regulator-fixed"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&sd_ldo_en>; |
| regulator-name = "SDH1 VCC"; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| gpio = <&gpio 12 0>; |
| enable-active-high; |
| }; |
| |
| pcie-rfkill { |
| compatible = "mrvl,pcie-rfkill"; |
| pinctrl-names = "off", "on"; |
| pinctrl-0 = <&pcie_pmx_pd_rst_off>; |
| pinctrl-1 = <&pcie_pmx_pd_rst_on>; |
| rst-gpio = <&gpio 16 0>; |
| rst-gpio2 = <&gpio 66 0>; |
| 3v3-ldo-gpio = <&gpio 97 0>; |
| 3v3-ldo-gpio2 = <&gpio 96 0>; |
| wib_3v3-supply = <&pm813ldo13>; |
| status = "okay"; |
| }; |
| |
| usim1: usim { |
| compatible = "asr,usim1"; |
| pinctrl-names = "default", "sleep"; |
| pinctrl-0 = <&usim1_pmx_func>; |
| pinctrl-1 = <&usim1_pmx_func_sleep>; |
| edge_detect_gpio = <43>; /* GPIO43: SIM detect pin */ |
| status = "okay"; |
| }; |
| |
| sound { |
| compatible = "ASRMICRO,asrmicro-snd-card"; |
| ssp-controllers = <&ssp_dai1>; |
| }; |
| |
| audio_regs { |
| compatible = "ASRMICRO,audio-registers"; |
| reg = <0xd680004c 0x8>; |
| status = "okay"; |
| }; |
| |
| nz3-slic { |
| compatible = "asr,nz3-slic"; |
| pinctrl-names = "default", "sleep"; |
| pinctrl-0 = <&slic_pmx_func1 &slic_pmx_func2>; |
| pinctrl-1 = <&slic_pmx_func1_sleep &slic_pmx_func2>; |
| rst-gpio = <&gpio 70 0>; |
| edge-wakeup-gpio = <&gpio 69 0>; |
| vdd-3v3-gpio = <&gpio 71 0>; |
| status = "disabled"; |
| }; |
| |
| microsemi-slic { |
| compatible = "asr,microsemi-slic"; |
| pinctrl-names = "default", "sleep"; |
| pinctrl-0 = <&slic_pmx_func1>; |
| pinctrl-1 = <&slic_pmx_func1_sleep>; |
| edge-wakeup-gpio = <&gpio 69 0>; |
| vdd-3v3-gpio = <&gpio 71 0>; |
| status = "disabled"; |
| }; |
| |
| maxlinear-slic { |
| compatible = "asr,maxlinear-slic"; |
| pinctrl-names = "default", "sleep"; |
| pinctrl-0 = <&slic_pmx_func1 &slic_pmx_func2>; |
| pinctrl-1 = <&slic_pmx_func1_sleep &slic_pmx_func2>; |
| rst-gpio = <&gpio 70 0>; |
| edge-wakeup-gpio = <&gpio 69 0>; |
| vdd-3v3-gpio = <&gpio 71 0>; |
| status = "disabled"; |
| }; |
| /* deprecated, move to mfpr@d401e000 |
| lpm-board-cfg { |
| compatible = "asr,lpm-board-cfg"; |
| udr-mfpr-config = <0x1B0 0xA040 0x0 |
| 0x1B4 0xA040 0x0>; |
| }; |
| */ |
| }; |
| |
| #include "asr_pm813_190x.dtsi" |
| #include "asr_pm802_190x.dtsi" |
| |
| #ifdef CONFIG_AB_SYSTEM |
| #include "asr1901_ab_flash_layout.dtsi" |
| #else |
| #include "asr1901_flash_layout.dtsi" |
| #endif |