marvell/linux/drivers/mfd/88pm801.c

/*
 * Base driver for Marvell 88PM801
 *
 * Copyright (C) 2012 Marvell International Ltd.
 * Haojian Zhuang <haojian.zhuang@marvell.com>
 * Joseph(Yossi) Hanin <yhanin@marvell.com>
 * Qiao Zhou <zhouqiao@marvell.com>
 *
 * This file is subject to the terms and conditions of the GNU General
 * Public License. See the file "COPYING" in the main directory of this
 * archive for more details.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 */

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/i2c.h>
#include <linux/mfd/core.h>
#include <linux/mfd/88pm80x.h>
#include <linux/mfd/88pm801.h>
#include <linux/slab.h>
#include <linux/of_device.h>
#include <linux/reboot.h>

/* Interrupt Registers */
#define PM801_INT_STATUS1		(0x05)
#define PM801_ONKEY_INT_STS1		(1 << 0)
#define PM801_EXTON1_INT_STS1		(1 << 1)
#define PM801_CHG_INT_STS1		(1 << 2)
#define PM801_BAT_INT_STS1		(1 << 3)
#define PM801_RTC_INT_STS1		(1 << 4)

#define PM801_INT_STATUS2		(0x06)
#define PM801_VSYS_INT_STS2		(1 << 1)
#define PM801_TINT_INT_STS2		(1 << 3)

#define PM801_INT_STATUS3		(0x07)
#define PM801_GPADC0_INT		(1 << 0)
#define PM801_GPADC1_INT		(1 << 1)

#define PM801_INT_STATUS4		(0x08)
#define PM801_GPIO0_INT_STS4		(1 << 0)
#define PM801_GPIO1_INT_STS4		(1 << 1)
#define PM801_GPIO2_INT_STS4		(1 << 2)
#define PM801_GPIO3_INT_STS4		(1 << 3)

#define PM801_INT_ENA_1			(0x09)
#define PM801_ONKEY_INT_ENA1		(1 << 0)
#define PM801_EXTON_INT_ENA1		(1 << 1)
#define PM801_VCHG_INT_ENA1		(1 << 2)
#define PM801_BAT_INT_ENA1		(1 << 3)
#define PM801_RTC_INT_ENA1		(1 << 4)

#define PM801_INT_ENA_2			(0x0A)
#define PM801_VSYS_INT_ENA2		(1 << 1)
#define PM801_TINT_INT_ENA2		(1 << 3)

#define PM801_INT_ENA_3			(0x0B)
#define PM801_GPADC0_INT_ENA3		(1 << 0)
#define PM801_GPADC1_INT_ENA3		(1 << 1)

#define PM801_INT_ENA_4			(0x0C)
#define PM801_GPIO0_INT_ENA4		(1 << 0)
#define PM801_GPIO1_INT_ENA4		(1 << 1)
#define PM801_GPIO2_INT_ENA4		(1 << 2)
#define PM801_GPIO3_INT_ENA4		(1 << 3)

/* number of INT_ENA & INT_STATUS regs */
#define PM801_INT_REG_NUM			(4)

/* page 2 GPADC: slave adder 0x02 */
#define PM801_GPADC_MEAS_EN1		(0x01)
#define PM801_MEAS_EN1_VBAT         	(1 << 2)
#define PM801_GPADC_MEAS_EN2		(0x02)
#define PM801_MEAS_EN2_RFTMP        	(1 << 0)
#define PM801_MEAS_GP0_EN		(1 << 2)
#define PM801_MEAS_GP1_EN		(1 << 3)
#define PM801_MEAS_GP2_EN		(1 << 4)
#define PM801_MEAS_GP3_EN		(1 << 5)
#define PM801_MEAS_GP4_EN		(1 << 6)

#define PM801_GPADC_MISC_CONFIG1	(0x05)
#define PM801_GPADC_MISC_CONFIG2	(0x06)
#define PM801_GPADC_MISC_GPFSM_EN	(1 << 0)
#define PM801_GPADC_SLOW_MODE(x)	(x << 3)

#define PM801_GPADC_MISC_CONFIG3		(0x09)
#define PM801_GPADC_MISC_CONFIG4		(0x0A)

#define PM801_GPADC_PREBIAS1			(0x0F)
#define PM801_GPADC0_GP_PREBIAS_TIME(x)		(x << 0)
#define PM801_GPADC_PREBIAS2			(0x10)

#define PM801_GP_BIAS_ENA1			(0x14)
#define PM801_GPADC_GP_BIAS_EN0			(1 << 0)
#define PM801_GPADC_GP_BIAS_EN1			(1 << 1)

/* Wakeup Registers */
#define PM801_WAKEUP1				(0x0D)
#define PM801_WAKEUP2				(0x0E)
#define PM801_WAKEUP2_INV_INT			(1 << 0)
#define PM801_WAKEUP2_INT_CLEAR			(1 << 1)
#define PM801_WAKEUP2_INT_MASK			(1 << 2)

#define PM801_RTC_CONTROL			(0xD0)
#define PM801_ALARM_WAKEUP			(1 << 4)

/* Interrupt Number in 88PM801 */
enum {
	PM801_IRQ_ONKEY,	/*EN1b0 *//*0 */
	PM801_IRQ_EXTON1,	/*EN1b1 */
	PM801_IRQ_EXTON2,		/*EN1b2 */
	PM801_IRQ_BAT,		/*EN1b3 */
	PM801_IRQ_RTC,		/*EN1b4 */	
	PM801_IRQ_VSYS,		/*EN2b1 */ /*5 */
	PM801_IRQ_TINT,		/*EN2b3 */
	PM801_IRQ_GPADC0,	/*EN3b0 *//*7 */
	PM801_IRQ_GPADC1,	/*EN3b1 */
	PM801_IRQ_GPIO0,	/*EN4b0 *//*9 */
	PM801_IRQ_GPIO1,	/*EN4b1 */
	PM801_IRQ_GPIO2,	/*EN4b2 */
	PM801_IRQ_GPIO3,	/*EN4b3 */

	PM801_MAX_IRQ,
};

/* PM801: generation identification number */
#define PM801_CHIP_GEN_ID_NUM	0x3
extern struct pm80x_chip *pm80x_chip_g;

static const struct i2c_device_id pm80x_id_table[] = {
	{"88pm801", 0},
	{} /* NULL terminated */
};
MODULE_DEVICE_TABLE(i2c, pm80x_id_table);

static const struct of_device_id pm80x_dt_ids[] = {
	{ .compatible = "marvell,88pm801", },
	{},
};
MODULE_DEVICE_TABLE(of, pm80x_dt_ids);

static struct resource rtc_resources[] = {
	{
	 .name = "88pm80x-rtc",
	 .start = PM801_IRQ_RTC,
	 .end = PM801_IRQ_RTC,
	 .flags = IORESOURCE_IRQ,
	 },
};

static struct mfd_cell rtc_devs[] = {
	{
	 .name = "88pm80x-rtc",
	 .of_compatible = "marvell,88pm80x-rtc",
	 .num_resources = ARRAY_SIZE(rtc_resources),
	 .resources = &rtc_resources[0],
	 .id = -1,
	 },
};

static struct resource onkey_resources[] = {
	{
	 .name = "88pm80x-onkey",
	 .start = PM801_IRQ_ONKEY,
	 .end = PM801_IRQ_ONKEY,
	 .flags = IORESOURCE_IRQ,
	 },
};

static struct mfd_cell onkey_devs[] = {
	{
	 .name = "88pm80x-onkey",
	 .of_compatible = "marvell,88pm80x-onkey",
	 .num_resources = 1,
	 .resources = &onkey_resources[0],
	 .id = -1,
	 },
};

static struct mfd_cell regulator_devs[] = {
	{
	 .name = "88pm801-regulator",
	 .of_compatible = "marvell,88pm801-regulator",
	 .id = -1,
	},
};

static struct resource bat_resources[] = {
	{
	 .name = "88pm80x-bat",
	 .start = PM801_IRQ_VSYS,
	 .end = PM801_IRQ_VSYS,
	 .flags = IORESOURCE_IRQ,
	 },
};

static struct mfd_cell bat_devs[] = {
	{
	.name = "88pm80x-bat",
	.of_compatible = "marvell,88pm80x-bat",
	.num_resources = 1,
	.resources = &bat_resources[0],
	.id = -1,
    },
};

#ifdef CONFIG_PAPI_88PM80X
static struct mfd_cell papi_devs[] = {
	{
	.name = "88pm80x-papi",
	.of_compatible = "marvell,88pm80x-papi",
	.id = -1,
	},
};
#endif

static struct resource usb_resources[] = {
	{
	.name = "88pm80x-usb",
	.start = PM801_IRQ_EXTON1,
	.end = PM801_IRQ_EXTON1,
	.flags = IORESOURCE_IRQ,
	},
	{
	.name = "88pm80x-gp0-id",
	.start = PM801_IRQ_GPADC0,
	.end = PM801_IRQ_GPADC0,
	.flags = IORESOURCE_IRQ,
	},
	{
	.name = "88pm80x-gp1-id",
	.start = PM801_IRQ_GPADC1,
	.end = PM801_IRQ_GPADC1,
	.flags = IORESOURCE_IRQ,
	},
};

static struct mfd_cell usb_devs[] = {
	{
	.name = "88pm80x-usb",
	.of_compatible = "marvell,88pm80x-usb",
	.num_resources = 1,
	.resources = &usb_resources[0],
	.id = -1,
	},
};

static struct mfd_cell dvc_devs[] = {
	{
	 .name = "88pm8xx-dvc",
	 .of_compatible = "marvell,88pm8xx-dvc",
	 .id = -1,
	},
};

static struct mfd_cell debug_devs[] = {
	{
		.name = "88pm80x-debug",
		.of_compatible = "marvell,88pm80x-debug",
		.id = -1,
	},
};

static struct mfd_cell wdt_devs[] = {
	{
		.name = "88pm80x-wdt",
		.of_compatible = "marvell,88pm80x-wdt",
		.id = -1,
	},
};

static const struct regmap_irq pm801_irqs[] = {
	/* INT0 */
	[PM801_IRQ_ONKEY] = {
		.mask = PM801_ONKEY_INT_ENA1,
	},
	[PM801_IRQ_EXTON1] = {
		.mask = PM801_EXTON_INT_ENA1,
	},
	[PM801_IRQ_EXTON2] = {
		.mask = PM801_VCHG_INT_ENA1,
	},
	[PM801_IRQ_BAT] = {
		.mask = PM801_BAT_INT_ENA1,
	},
	[PM801_IRQ_RTC] = {
		.mask = PM801_RTC_INT_ENA1,
	},
	/* INT1 */
	[PM801_IRQ_VSYS] = {
		.reg_offset = 1,
		.mask = PM801_VSYS_INT_ENA2,
	},
	[PM801_IRQ_TINT] = {
		.reg_offset = 1,
		.mask = PM801_TINT_INT_ENA2,
	},
	/* INT2 */
	[PM801_IRQ_GPADC0] = {
		.reg_offset = 2,
		.mask = PM801_GPADC0_INT_ENA3,
	},
	[PM801_IRQ_GPADC1] = {
		.reg_offset = 2,
		.mask = PM801_GPADC1_INT_ENA3,
	},
	/* INT3 */
	[PM801_IRQ_GPIO0] = {
		.reg_offset = 3,
		.mask = PM801_GPIO0_INT_ENA4,
	},
	[PM801_IRQ_GPIO1] = {
		.reg_offset = 3,
		.mask = PM801_GPIO1_INT_ENA4,
	},
	[PM801_IRQ_GPIO2] = {
		.reg_offset = 3,
		.mask = PM801_GPIO2_INT_ENA4,
	},
};


int pm801_extern_read(int page, int reg)
{
	int ret;
	unsigned int val;
	struct pm80x_chip *chip = pm80x_chip_g;
	if (!chip) {
		pr_err("%s: chip is NULL\n", __func__);
		return -EINVAL;
	}
	switch (page) {
	case PM800_BASE_PAGE:
		ret = regmap_read(chip->regmap, reg, &val);
		break;
	case PM800_POWER_PAGE:
		ret = regmap_read(chip->subchip->regmap_power,
				  reg, &val);
		break;
	case PM800_GPADC_PAGE:
		ret = regmap_read(chip->subchip->regmap_gpadc,
				  reg, &val);
		break;
	default:
		ret = -1;
		break;
	}

	if (ret < 0) {
		pr_err("fail to read reg 0x%x\n", reg);
		return ret;
	}

	return val;
}
EXPORT_SYMBOL(pm801_extern_read);

int pm801_extern_write(int page, int reg, unsigned char val)
{
	int ret;
	struct pm80x_chip *chip = pm80x_chip_g;
	if (!chip) {
		pr_err("%s: chip is NULL\n", __func__);
		return -EINVAL;
	}
	switch (page) {
	case PM800_BASE_PAGE:
		ret = regmap_write(chip->regmap, reg, val);
		break;
	case PM800_POWER_PAGE:
		ret = regmap_write(chip->subchip->regmap_power,
				  reg, val);
		break;
	case PM800_GPADC_PAGE:
		ret = regmap_write(chip->subchip->regmap_gpadc,
				  reg, val);
		break;
	default:
		ret = -1;
		break;
	}
	return ret;
}
EXPORT_SYMBOL(pm801_extern_write);

int pm801_extern_setbits(int page, int reg,
			 unsigned char mask, unsigned char val)
{
	int ret;
	struct pm80x_chip *chip = pm80x_chip_g;
	if (!chip) {
		pr_err("%s: chip is NULL\n", __func__);
		return -EINVAL;
	}
	switch (page) {
	case PM800_BASE_PAGE:
		ret = regmap_update_bits(chip->regmap, reg, mask, val);
		break;
	case PM800_POWER_PAGE:
		ret = regmap_update_bits(chip->subchip->regmap_power,
					 reg, mask, val);
		break;
	case PM800_GPADC_PAGE:
		ret = regmap_update_bits(chip->subchip->regmap_gpadc,
					 reg, mask, val);
		break;
	default:
		ret = -1;
		break;
	}
	return ret;
}
EXPORT_SYMBOL(pm801_extern_setbits);

static void pm801_sw_poweroff(void)
{
	int ret;

	/* try 3 times to reduce the fail rate */
	pr_info("turning off power....\n");
	ret = pmic_rw_reg(PM801_WAKEUP1, PM801_SW_PDOWN, PM801_SW_PDOWN);
	if (ret < 0)
		ret = pmic_rw_reg(PM801_WAKEUP1, PM801_SW_PDOWN, PM801_SW_PDOWN);
	if (ret < 0)
		ret = pmic_rw_reg(PM801_WAKEUP1, PM801_SW_PDOWN, PM801_SW_PDOWN);
	if (ret < 0)
		pr_err("%s, turn off power fail", __func__);
}

#if 0
static int reboot_notifier_func(struct notifier_block *this,
		unsigned long code, void *cmd)
{
	int data;
	struct pm80x_chip *chip;
	unsigned int val;

	pr_info("reboot notifier...\n");

	chip = container_of(this, struct pm80x_chip, reboot_notifier);

        regmap_read(chip->regmap, PM800_POWER_DOWN_LOG1, &val);
        pr_info("pm801_onkey power down log1 = 0x%x", val);

        regmap_read(chip->regmap, PM800_POWER_DOWN_LOG2, &val);
        pr_info("pm801_onkey power down log2 = 0x%x", val);


	if (cmd && (0 == strcmp(cmd, "recovery"))) {
		pr_info("Enter recovery mode\n");
		regmap_read(chip->regmap, 0xef, &data);
		regmap_write(chip->regmap, 0xef, data | 0x1);

	} else {
		regmap_read(chip->regmap, 0xef, &data);
		regmap_write(chip->regmap, 0xef, data & 0xfe);
	}

	if (code != SYS_POWER_OFF) {
		regmap_read(chip->regmap, 0xef, &data);
		/* this bit is for charger server */
		regmap_write(chip->regmap, 0xef, data | 0x2);
	}

	return 0;
}
#endif

static int device_gpadc_init(struct pm80x_chip *chip,
				       struct pm80x_platform_data *pdata)
{
	struct pm80x_subchip *subchip = chip->subchip;
	struct regmap *map = subchip->regmap_gpadc;
	int ret = 0;

	if (!map) {
		dev_warn(chip->dev,
			 "Warning: gpadc regmap is not available!\n");
		return -EINVAL;
	}
	/*
	 * initialize GPADC without activating it turn on GPADC
	 * measurments
	 */
	ret = regmap_update_bits(map,
				 PM801_GPADC_MISC_CONFIG2,
				 PM801_GPADC_MISC_GPFSM_EN,
				 PM801_GPADC_MISC_GPFSM_EN);
	if (ret < 0)
		goto out;
	/*
	 * This function configures the ADC as requires for
	 * CP implementation.CP does not "own" the ADC configuration
	 * registers and relies on AP.
	 * Reason: enable automatic ADC measurements needed
	 * for CP to get VBAT and RF temperature readings.
	 */
	ret = regmap_update_bits(map, PM801_GPADC_MEAS_EN1,
				(PM801_MEAS_EN1_VBBAT|PM801_MEAS_EN1_VLDOIN),
				(PM801_MEAS_EN1_VBBAT|PM801_MEAS_EN1_VLDOIN));
	if (ret < 0)
		goto out;
	ret = regmap_update_bits(map, PM801_GPADC_MEAS_EN2,
				(PM801_MEAS_GP0_EN | PM801_MEAS_GP1_EN),
				(PM801_MEAS_GP0_EN | PM801_MEAS_GP1_EN));
	if (ret < 0)
		goto out;

	/*
	 * the defult of PM801 is GPADC operates at 100Ks/s rate
	 * and Number of GPADC slots with active current bias prior
	 * to GPADC sampling = 1 slot for all GPADCs set for
	 * Temprature mesurmants
	 *
	 * disable all the BIAS by default, other drivers will enable
	 * BIAS on demand
	 */
	ret = regmap_update_bits(map, PM801_GP_BIAS_ENA1, 0x33, 0x00);
	if (ret < 0)
		goto out;

	dev_info(chip->dev, "PM801 device_gpadc_init: Done\n");
	return 0;

out:
	dev_info(chip->dev, "PM801 device_gpadc_init: Failed!\n");
	return ret;
}

static int device_onkey_init(struct pm80x_chip *chip,
				struct pm80x_platform_data *pdata)
{
	int ret;

	ret = mfd_add_devices(chip->dev, 0, &onkey_devs[0],
			      ARRAY_SIZE(onkey_devs), &onkey_resources[0],
			      regmap_irq_chip_get_base(chip->irq_data), NULL);

	if (ret) {
		dev_err(chip->dev, "Failed to add onkey subdev\n");
		return ret;
	}

	return 0;
}

static int device_rtc_init(struct pm80x_chip *chip,
				struct pm80x_platform_data *pdata)
{
	int ret;

	rtc_devs[0].platform_data = pdata->rtc;
	rtc_devs[0].pdata_size =
			pdata->rtc ? sizeof(struct pm80x_rtc_pdata) : 0;
	ret = mfd_add_devices(chip->dev, 0, &rtc_devs[0],
			      ARRAY_SIZE(rtc_devs), NULL,
			      regmap_irq_chip_get_base(chip->irq_data), NULL);
	if (ret) {
		dev_err(chip->dev, "Failed to add rtc subdev\n");
		return ret;
	}

	return 0;
}

static int device_regulator_init(struct pm80x_chip *chip,
					   struct pm80x_platform_data *pdata)
{
	int ret;

	ret = mfd_add_devices(chip->dev, 0, &regulator_devs[0],
			      ARRAY_SIZE(regulator_devs), NULL, 0, NULL);
	if (ret) {
		dev_err(chip->dev, "Failed to add regulator subdev\n");
		return ret;
	}

	return 0;
}

static int device_bat_init(struct pm80x_chip *chip,
					   struct pm80x_platform_data *pdata)
{
	int ret;

	ret = mfd_add_devices(chip->dev, 0, &bat_devs[0],
			      ARRAY_SIZE(bat_devs), NULL,
			      regmap_irq_chip_get_base(chip->irq_data), NULL);
	if (ret) {
		dev_err(chip->dev, "Failed to add battery subdev\n");
		return ret;
	}

	return 0;
}

#ifdef CONFIG_PAPI_88PM80X
static int device_papi_init(struct pm80x_chip *chip)
{
	int ret;

	ret = mfd_add_devices(chip->dev, 0, &papi_devs[0],
			      ARRAY_SIZE(papi_devs), NULL, 0, NULL);
	if (ret) {
		dev_err(chip->dev, "Failed to add papi subdev\n");
		return ret;
	}

	return 0;
}
#endif

static int device_usb_init(struct pm80x_chip *chip,
					   struct pm80x_platform_data *pdata)
{
	int ret;

	usb_devs[0].platform_data = pdata->usb;
	usb_devs[0].pdata_size = sizeof(struct pm80x_usb_pdata);
	ret = mfd_add_devices(chip->dev, 0, &usb_devs[0],
			      ARRAY_SIZE(usb_devs), NULL,
			      regmap_irq_chip_get_base(chip->irq_data), NULL);
	if (ret < 0) {
		dev_err(chip->dev, "Failed to add usb subdev\n");
		return ret;
	}

	return 0;
}

static int device_dvc_init(struct pm80x_chip *chip,
					   struct pm80x_platform_data *pdata)
{
	int ret;

#ifdef CONFIG_CPU_ASR1901
	return 0;
#endif

	ret = mfd_add_devices(chip->dev, 0, &dvc_devs[0],
			      ARRAY_SIZE(dvc_devs), NULL, 0, NULL);
	if (ret) {
		dev_err(chip->dev, "Failed to add dvc subdev\n");
		return ret;
	}
	return 0;
}

static int device_debug_init(struct pm80x_chip *chip)
{
	return mfd_add_devices(chip->dev, 0, &debug_devs[0],
			       ARRAY_SIZE(debug_devs), NULL, 0, NULL);
}

static int device_wdt_init(struct pm80x_chip *chip)
{
	return mfd_add_devices(chip->dev, 0, &wdt_devs[0],
			       ARRAY_SIZE(wdt_devs), NULL, 0, NULL);
}

static int device_irq_init_800(struct pm80x_chip *chip)
{
	struct regmap *map = chip->regmap;
	unsigned long flags = IRQF_ONESHOT;
	int data, mask, ret = -EINVAL;

	if (!map || !chip->irq) {
		if (!map)
			pr_info("%s: map == NULL\n", __func__);
		else
			pr_info("%s: chip.irq == 0\n", __func__);
		dev_err(chip->dev, "incorrect parameters\n");
		return -EINVAL;
	}

	/*
	 * irq_mode defines the way of clearing interrupt. it's read-clear by
	 * default.
	 */
	mask =
	    PM801_WAKEUP2_INV_INT | PM801_WAKEUP2_INT_CLEAR |
	    PM801_WAKEUP2_INT_MASK;

	data = PM801_WAKEUP2_INT_CLEAR;
	ret = regmap_update_bits(map, PM801_WAKEUP2, mask, data);

	if (ret < 0)
		goto out;

	ret =
	    regmap_add_irq_chip(chip->regmap, chip->irq, flags, -1,
				chip->regmap_irq_chip, &chip->irq_data);

out:
	return ret;
}

static void device_irq_exit_800(struct pm80x_chip *chip)
{
	regmap_del_irq_chip(chip->irq, chip->irq_data);
}

static struct regmap_irq_chip pm801_irq_chip = {
	.name = "88PM801",
	.irqs = pm801_irqs,
	.num_irqs = ARRAY_SIZE(pm801_irqs),

	.num_regs = 4,
	.status_base = PM801_INT_STATUS1,
	.mask_base = PM801_INT_ENA_1,
	.ack_base = PM801_INT_STATUS1,
	.mask_invert = 1,
};

static int pm801_pages_init(struct pm80x_chip *chip)
{
	struct pm80x_subchip *subchip;
	struct i2c_client *client = chip->client;

	int ret = 0;

	subchip = chip->subchip;
	if (!subchip || !subchip->power_page_addr || !subchip->gpadc_page_addr)
		return -ENODEV;

	/* PM801 block power page */
	subchip->power_page = i2c_new_dummy(client->adapter,
					    subchip->power_page_addr);
	if (subchip->power_page == NULL) {
		ret = -ENODEV;
		goto out;
	}

	subchip->regmap_power = devm_regmap_init_i2c(subchip->power_page,
						     &pm80x_regmap_config);
	if (IS_ERR(subchip->regmap_power)) {
		ret = PTR_ERR(subchip->regmap_power);
		dev_err(chip->dev,
			"Failed to allocate regmap_power: %d\n", ret);
		goto out;
	}

	i2c_set_clientdata(subchip->power_page, chip);

	/* PM801 block GPADC */
	subchip->gpadc_page = i2c_new_dummy(client->adapter,
					    subchip->gpadc_page_addr);
	if (subchip->gpadc_page == NULL) {
		ret = -ENODEV;
		goto out;
	}

	subchip->regmap_gpadc = devm_regmap_init_i2c(subchip->gpadc_page,
						     &pm80x_regmap_config);
	if (IS_ERR(subchip->regmap_gpadc)) {
		ret = PTR_ERR(subchip->regmap_gpadc);
		dev_err(chip->dev,
			"Failed to allocate regmap_gpadc: %d\n", ret);
		goto out;
	}
	i2c_set_clientdata(subchip->gpadc_page, chip);

out:
	return ret;
}

static void pm801_pages_exit(struct pm80x_chip *chip)
{
	struct pm80x_subchip *subchip;

	subchip = chip->subchip;

	if (subchip && subchip->power_page)
		i2c_unregister_device(subchip->power_page);

	if (subchip && subchip->gpadc_page)
		i2c_unregister_device(subchip->gpadc_page);
}

static int device_800_init(struct pm80x_chip *chip,
				     struct pm80x_platform_data *pdata)
{
	int ret;
	unsigned int val;

	/*
	 * alarm wake up bit will be clear in device_irq_init(),
	 * read before that
	 */
	ret = regmap_read(chip->regmap, PM801_RTC_CONTROL, &val);
	if (ret < 0) {
		dev_err(chip->dev, "Failed to read RTC register: %d\n", ret);
		goto out;
	}
	if (val & PM801_ALARM_WAKEUP) {
		if (pdata && pdata->rtc)
			pdata->rtc->rtc_wakeup = 1;
	}
	
	/*
	 * set xo internal cap to 22pf
	 */
	ret = regmap_read(chip->regmap, PM801_RTC_MISC6, &val);
	if (ret < 0) {
		dev_err(chip->dev, "Failed to read PM801_RTC_MISC6: %d\n", ret);
		goto out;
	}
	val &= 0x8F;
	val |= 0x70;
	ret = regmap_write(chip->regmap, PM801_RTC_MISC6, val);
	if (ret < 0) {
		dev_err(chip->dev, "Failed to write PM801_RTC_MISC6: %d\n", ret);
		goto out;
	}
		
	ret = device_gpadc_init(chip, pdata);
	if (ret < 0) {
		dev_err(chip->dev, "[%s]Failed to init gpadc\n", __func__);
		goto out;
	}

	chip->regmap_irq_chip = &pm801_irq_chip;

	ret = device_irq_init_800(chip);
	if (ret < 0) {
		dev_err(chip->dev, "[%s]Failed to init PM801 irq\n", __func__);
		goto out;
	}

	ret = device_onkey_init(chip, pdata);
	if (ret) {
		dev_err(chip->dev, "Failed to add onkey subdev\n");
		goto out_dev;
	}

	ret = device_rtc_init(chip, pdata);
	if (ret) {
		dev_err(chip->dev, "Failed to add rtc subdev\n");
		goto out;
	}

	ret = device_regulator_init(chip, pdata);
	if (ret) {
		dev_err(chip->dev, "Failed to add regulators subdev\n");
		goto out;
	}
	
	ret = device_bat_init(chip, pdata);
	if (ret) {
		dev_err(chip->dev, "Failed to add bat subdev\n");
		goto out;
	}

	ret = device_dvc_init(chip, pdata);
	if (ret)
		dev_warn(chip->dev, "Failed to add dvc subdev\n");

	ret = device_usb_init(chip, pdata);
	if (ret)
		dev_warn(chip->dev, "Failed to add usb subdev\n");

	ret = device_debug_init(chip);
	if (ret) {
		dev_err(chip->dev, "failed to add debug subdev\n");
		goto out_dev;
	}

	ret = device_wdt_init(chip);
	if (ret) {
		dev_err(chip->dev, "failed to add wdt subdev\n");
		goto out_dev;
	}

#ifdef CONFIG_PAPI_88PM80X
	ret = device_papi_init(chip);
	if (ret) {
		dev_err(chip->dev, "Failed to add papi subdev\n");
		goto out;
	}
#endif
	return 0;
out_dev:
	mfd_remove_devices(chip->dev);
	device_irq_exit_800(chip);
out:
	return ret;
}

static void parse_powerup_log(struct pm80x_chip *chip)
{
	int powerup, bit;
	char *powerup_name[7] = {
		"ONKEY_WAKEUP    ",
		"EXTON1_WAKEUP      ",
		"EXTON2_WAKEUP    ",
		"RSVD            ",
		"RTC_ALARM_WAKEUP",
		"FAULT_WAKEUP    ",
		"BAT_WAKEUP      "
	};

	/*power up log*/
	regmap_read(chip->regmap, PM800_POWER_UP_LOG, &powerup);
	dev_info(chip->dev, "Powerup log 0x%x: 0x%x\n",
		PM800_POWER_UP_LOG, powerup);
	dev_info(chip->dev, " -------------------------------\n");
	dev_info(chip->dev, "|     name(power up) |  status  |\n");
	dev_info(chip->dev, "|--------------------|----------|\n");
	for (bit = 0; bit < 7; bit++)
		dev_info(chip->dev, "|  %s  |    %x     |\n",
			powerup_name[bit], (powerup >> bit) & 1);
	dev_info(chip->dev, " -------------------------------\n");

	/* keep globals for external usage */
	chip->powerup = powerup;
}

static void parse_powerdown_log(struct pm80x_chip *chip)
{
	int powerdown1, powerdown2, bit;

	char *powerdown1_name[8] = {
		"OVER_TEMP ",
		"UV_VSYS1  ",
		"SW_PDOWN  ",
		"SYSEN_EVENT  ",
		"WD        ",
		"LONG_ONKEY",
		"OV_VSYS   ",
		"RTC_RESET "
	};
	char *powerdown2_name[5] = {
		"HYB_DONE   ",
		"UV_VSYS2   ",
		"HW_RESET   ",
		"PGOOD_PDOWN",
		"LONKEY_RTC "
	};

	/*power down log1*/
	regmap_read(chip->regmap, PM800_POWER_DOWN_LOG1, &powerdown1);
	dev_info(chip->dev, "PowerDW Log1 0x%x: 0x%x\n",
		PM800_POWER_DOWN_LOG1, powerdown1);
	dev_info(chip->dev, " -------------------------------\n");
	dev_info(chip->dev, "| name(power down1)  |  status  |\n");
	dev_info(chip->dev, "|--------------------|----------|\n");
	for (bit = 0; bit < 8; bit++)
		dev_info(chip->dev, "|    %s      |    %x     |\n",
			powerdown1_name[bit], (powerdown1 >> bit) & 1);
	dev_info(chip->dev, " -------------------------------\n");
	/*power down log2*/
	regmap_read(chip->regmap, PM800_POWER_DOWN_LOG2, &powerdown2);
	dev_info(chip->dev, "PowerDW Log2 0x%x: 0x%x\n",
		PM800_POWER_DOWN_LOG2, powerdown2);
	dev_info(chip->dev, " -------------------------------\n");
	dev_info(chip->dev, "|  name(power down2) |  status  |\n");
	dev_info(chip->dev, "|--------------------|----------|\n");
	for (bit = 0; bit < 5; bit++)
		dev_info(chip->dev, "|    %s     |    %x     |\n",
			powerdown2_name[bit], (powerdown2 >> bit) & 1);
	dev_info(chip->dev, " -------------------------------\n");

	/* write to clear */
	regmap_write(chip->regmap, PM800_POWER_DOWN_LOG1, 0xFF);
	regmap_write(chip->regmap, PM800_POWER_DOWN_LOG2, 0xFF);

	/* mask reserved bits and sleep indication */
	powerdown2 &= 0x1E;

	/* keep globals for external usage */
	chip->powerdown1 = powerdown1;
	chip->powerdown2 = powerdown2;
}

static int pm801_init_config(struct pm80x_chip *chip, struct device_node *np)
{
	int data;
	if (!chip || !chip->regmap || !chip->subchip
	    || !chip->subchip->regmap_power) {
		pr_err("%s:chip is not availiable!\n", __func__);
		return -EINVAL;
	}

	/* below registers are shared between pm80x in 88pm80x.h */
	/*base page:reg 0xd0.7 = 1 32kHZ generated from XO */
	regmap_read(chip->regmap, PM800_RTC_CONTROL, &data);
	data |= (1 << 7);
	regmap_write(chip->regmap, PM800_RTC_CONTROL, data);

	/* Set internal digital sleep voltage as 1.2V */
	regmap_read(chip->regmap, PM800_LOW_POWER1, &data);
	data &= ~(0xf << 4);
	regmap_write(chip->regmap, PM800_LOW_POWER1, data);
	/* Enable 32Khz-out-3 low jitter XO_LJ = 1 in pm800
	 * Enable 32Khz-out-2 low jitter XO_LJ = 1 in pm822
	 * they are the same bit
	 */
	regmap_read(chip->regmap, PM800_LOW_POWER2, &data);
	data |= (1 << 5);
	regmap_write(chip->regmap, PM800_LOW_POWER2, data);

	regmap_write(chip->regmap, PM800_RTC_MISC2, 0x2a);

	/*
	 * Block wakeup attempts when VSYS rises above
	 * VSYS_UNDER_RISE_TH1, or power off may fail.
	 * it is set to prevent contimuous attempt to power up
	 * incase the VSYS is above the VSYS_LOW_TH threshold.
	 */
	regmap_read(chip->regmap, PM800_RTC_MISC5, &data);
	data |= 0x1;
	regmap_write(chip->regmap, PM800_RTC_MISC5, data);

	/* Enabele LDO and BUCK clock gating in lpm */
	regmap_read(chip->regmap, PM800_LOW_POWER_CONFIG3, &data);
	data |= (1 << 7);
	regmap_write(chip->regmap, PM800_LOW_POWER_CONFIG3, data);
	/*
	 * Disable reference group sleep mode
	 * - to reduce power fluctuation in suspend
	 */
	regmap_read(chip->regmap, PM800_LOW_POWER_CONFIG4, &data);
	data &= ~(1 << 7);
	regmap_write(chip->regmap, PM800_LOW_POWER_CONFIG4, data);

	/* Enable voltage change in pmic, POWER_HOLD = 1 */
	regmap_read(chip->regmap, PM800_WAKEUP1, &data);
	data |= (1 << 7);
	regmap_write(chip->regmap, PM800_WAKEUP1, data);

	/*
	 * Enable buck sleep mode.
	 * But disable buck2 sleep mode here since it's for ddr/emmc, which
	 * is sensitive to the voltage and the chip may have latency before
	 * enter power save mode.
	 */
	regmap_write(chip->subchip->regmap_power, PM800_BUCK_SLP1, 0xae);
	regmap_write(chip->subchip->regmap_power, PM800_BUCK_SLP2, 0x2);

	/*set buck2 and buck3 driver selection to be full.
	* this bit is now reserved and default value is 0, if want full
	* drive possibility it should be set to 1.
	* In A1 version it will be set to 1 by default.
	*/
	regmap_read(chip->subchip->regmap_power, 0x7D, &data);
	data |= (1 << 4);
	regmap_write(chip->subchip->regmap_power, 0x7D, data);

	regmap_read(chip->subchip->regmap_power, 0x80, &data);
	data |= (1 << 4);
	regmap_write(chip->subchip->regmap_power, 0x80, data);

	/* dump power up log */
	parse_powerup_log(chip);
	parse_powerdown_log(chip);
	return 0;
}

static int pm801_dt_init(struct device_node *np,
			 struct device *dev,
			 struct pm80x_platform_data *pdata)
{
	pdata->irq_mode =
		!of_property_read_bool(np, "marvell,88PM801-irq-write-clear");
	pdata->batt_det =
		of_property_read_bool(np, "marvell,88PM801-battery-detection");

	return 0;
}


static int pm801_probe(struct i2c_client *client,
				 const struct i2c_device_id *id)
{
	int ret = 0;
	struct pm80x_chip *chip;
	struct pm80x_platform_data *pdata = client->dev.platform_data;
	struct device_node *node = client->dev.of_node;
	struct pm80x_subchip *subchip;

	if (IS_ENABLED(CONFIG_OF)) {
		if (!pdata) {
			pdata = devm_kzalloc(&client->dev,
					     sizeof(*pdata), GFP_KERNEL);
			if (!pdata)
				return -ENOMEM;
		}
		ret = pm801_dt_init(node, &client->dev, pdata);
		if (ret)
			return ret;
	} else if (!pdata) {
		return -EINVAL;
	}

	/*
	 * RTC in pmic can run even the core is powered off, and user can set
	 * alarm in RTC. When the alarm is time out, the PMIC will power up
	 * the core, and the whole system will boot up. When PMIC driver is
	 * probed, it will read out some register to find out whether this
	 * boot is caused by RTC timeout or not, and it need pass this
	 * information to RTC driver.
	 * So we need rtc platform data to be existed to pass this information.
	 */
	if (!pdata->rtc) {
		pdata->rtc = devm_kzalloc(&client->dev,
					  sizeof(*(pdata->rtc)), GFP_KERNEL);
		if (!pdata->rtc)
			return -ENOMEM;
	}

	ret = pm80x_init(client);
	if (ret) {
		dev_err(&client->dev, "PM801_init fail\n");
		goto out_init;
	}

	chip = i2c_get_clientdata(client);

#if defined(CONFIG_CPU_ASR18XX) || defined(CONFIG_CPU_ASR1901)
	if (chip->type != CHIP_PM801) {
		dev_err(&client->dev, "PM801 not present\n");
		ret = -ENODEV;
		goto out_init;
	}
#endif

	/* init subchip for PM801 */
	subchip =
	    devm_kzalloc(&client->dev, sizeof(struct pm80x_subchip),
			 GFP_KERNEL);
	if (!subchip) {
		ret = -ENOMEM;
		goto err_subchip_alloc;
	}

	/* PM801 has 2 addtional pages to support power and gpadc. */
	subchip->power_page_addr = client->addr + 1;
	subchip->gpadc_page_addr = client->addr + 2;
	chip->subchip = subchip;

	ret = pm801_pages_init(chip);
	if (ret) {
		dev_err(&client->dev, "PM801_pages_init failed!\n");
		goto err_page_init;
	}

	ret = device_800_init(chip, pdata);
	if (ret) {
		dev_err(chip->dev, "Failed to initialize 88PM801 devices\n");
		goto err_device_init;
	}

	if (pdata && pdata->plat_config)
		pdata->plat_config(chip, pdata);

	pm801_init_config(chip, NULL);

	if (!pm80x_chip_g)
		pm80x_chip_g = chip;
	pm_power_off = pm801_sw_poweroff;
#if 0
	chip->reboot_notifier.notifier_call = reboot_notifier_func;
	register_reboot_notifier(&(chip->reboot_notifier));
#endif
	return 0;

err_device_init:
	pm801_pages_exit(chip);
err_page_init:
err_subchip_alloc:
	pm80x_deinit();
out_init:
	return ret;
}

static int pm801_remove(struct i2c_client *client)
{
	struct pm80x_chip *chip = i2c_get_clientdata(client);

	mfd_remove_devices(chip->dev);
	device_irq_exit_800(chip);

	pm801_pages_exit(chip);
	pm80x_deinit();
	pm80x_chip_g = NULL;

	return 0;
}

#if 0
void buck2_sleepmode_control_for_wifi(int on)
{
	int data;

	if (on) {
		/*
		 * Disable VBUCK2's sleep mode, allow big current output
		 * even system enter to suspend
		 * As SD8787 use it as 1.8V supply, it would still work
		 * druing suspend and need much current
		 *
		 */
		data = regmap_read(pm80x_chip_g->subchip->regmap_power,
				PM800_BUCK_SLP1, &data);
		data = (data & ~PM800_BUCK2_SLP1_MASK) |
			(PM800_BUCK_SLP_PWR_ACT2 << PM800_BUCK2_SLP1_SHIFT);
		regmap_write(pm80x_chip_g->subchip->regmap_power,
			     PM800_BUCK_SLP1,
			     data);
	} else {
		/*
		 * Enable VBUCK2's sleep mode again (Only 5mA ability)
		 * If SD8787 is power off, VBUCK2 sleep mode has not side
		 * impact to Sd8787, but has benifit to whole power consumption
		 */
		data = regmap_read(pm80x_chip_g->subchip->regmap_power,
				PM800_BUCK_SLP1, &data);
		data = (data & ~PM800_BUCK2_SLP1_MASK) |
			(PM800_BUCK_SLP_PWR_LOW << PM800_BUCK2_SLP1_SHIFT);
		regmap_write(pm80x_chip_g->subchip->regmap_power,
			     PM800_BUCK_SLP1,
			     data);
	}

}
EXPORT_SYMBOL(buck2_sleepmode_control_for_wifi);

/* return gpadc voltage */
int get_gpadc_volt(struct pm80x_chip *chip, int gpadc_id)
{
	int ret, volt;
	unsigned char buf[2];
	int gp_meas;

	switch (gpadc_id) {
	case PM801_GPADC0:
		gp_meas = PM801_GPADC0_MEAS1;
		break;
	case PM801_GPADC1:
		gp_meas = PM801_GPADC1_MEAS1;
		break;
	default:
		dev_err(chip->dev, "get GPADC failed!\n");
		return -EINVAL;

	}
	ret = regmap_bulk_read(chip->subchip->regmap_gpadc,
			       gp_meas, buf, 2);
	if (ret < 0) {
		dev_err(chip->dev, "Attention: failed to get volt!\n");
		return -EINVAL;
	}

	volt = ((buf[0] & 0xff) << 4) | (buf[1] & 0x0f);
	dev_dbg(chip->dev, "%s: volt value = 0x%x\n", __func__, volt);
	/* volt = value * 1.4 * 1000 / (2^12) */
	volt = ((volt & 0xfff) * 7 * 100) >> 11;
	dev_dbg(chip->dev, "%s: voltage = %dmV\n", __func__, volt);

	return volt;
}

/* return voltage via bias current from GPADC */
int get_gpadc_bias_volt(struct pm80x_chip *chip, int gpadc_id, int bias)
{
	int volt, data, gp_bias;

	switch (gpadc_id) {
	case PM801_GPADC0:
		gp_bias = PM801_GPADC_BIAS1;
		break;
	case PM801_GPADC1:
		gp_bias = PM801_GPADC_BIAS2;
		break;
	default:
		dev_err(chip->dev, "get GPADC %d failed!\n", gpadc_id);
		dump_stack();
		return -EINVAL;
	}

	/* get the register value */
	if (bias > 76)
		bias = 76;
	if (bias < 1)
		bias = 1;
	bias = (bias - 1) / 5;

	regmap_read(chip->subchip->regmap_gpadc, gp_bias, &data);
	data &= 0xf0;
	data |= bias;
	regmap_write(chip->subchip->regmap_gpadc, gp_bias, data);

	volt = get_gpadc_volt(chip, gpadc_id);
	if ((volt < 0) || (volt > 1400)) {
		dev_err(chip->dev, "%s return %dmV\n", __func__, volt);
		return -EINVAL;
	}

	return volt;
}

/*
 * used by non-pmic driver
 * TODO: remove later
 */
int extern_get_gpadc_bias_volt(int gpadc_id, int bias)
{
	return get_gpadc_bias_volt(pm80x_chip_g, gpadc_id, bias);
}
EXPORT_SYMBOL(extern_get_gpadc_bias_volt);
#endif

static struct i2c_driver pm801_driver = {
	.driver = {
		.name = "88PM801",
		.owner = THIS_MODULE,
		.pm = &pm80x_pm_ops,
		.of_match_table	= of_match_ptr(pm80x_dt_ids),
		},
	.probe = pm801_probe,
	.remove = pm801_remove,
	.id_table = pm80x_id_table,
};

static int __init pm801_i2c_init(void)
{
	return i2c_add_driver(&pm801_driver);
}
subsys_initcall(pm801_i2c_init);

static void __exit pm801_i2c_exit(void)
{
	i2c_del_driver(&pm801_driver);
}
module_exit(pm801_i2c_exit);

MODULE_DESCRIPTION("PMIC Driver for Marvell 88PM801");
MODULE_AUTHOR("Qiao Zhou <zhouqiao@marvell.com>");
MODULE_LICENSE("GPL");