| /* |
| * alc5616.h -- ALC5616 Soc Audio driver |
| * |
| * This program is free software; you can redistribute it and/or modify |
| * it under the terms of the GNU General Public License version 2 as |
| * published by the Free Software Foundation. |
| */ |
| |
| #ifndef _RT5616_H_ |
| #define _RT5616_H_ |
| |
| /* Info */ |
| #define RT5616_RESET 0x00 |
| /* I/O - Output */ |
| #define RT5616_HP_VOL 0x02 |
| #define RT5616_LOUT_CTRL1 0x03 |
| #define RT5616_LOUT_CTRL2 0x05 |
| /* I/O - Input */ |
| #define RT5616_IN1_IN2 0x0d |
| #define RT5616_INL1_INR1_VOL 0x0f |
| /* I/O - ADC/DAC/DMIC */ |
| #define RT5616_DAC1_DIG_VOL 0x19 |
| #define RT5616_ADC_DIG_VOL 0x1c |
| #define RT5616_ADC_BST_VOL 0x1e |
| /* Mixer - D-D */ |
| #define RT5616_STO1_ADC_MIXER 0x27 |
| #define RT5616_AD_DA_MIXER 0x29 |
| #define RT5616_STO_DAC_MIXER 0x2a |
| |
| /* Mixer - ADC */ |
| #define RT5616_REC_L1_MIXER 0x3b |
| #define RT5616_REC_L2_MIXER 0x3c |
| #define RT5616_REC_R1_MIXER 0x3d |
| #define RT5616_REC_R2_MIXER 0x3e |
| /* Mixer - DAC */ |
| #define RT5616_HPO_MIXER 0x45 |
| #define RT5616_OUT_L1_MIXER 0x4d |
| #define RT5616_OUT_L2_MIXER 0x4e |
| #define RT5616_OUT_L3_MIXER 0x4f |
| #define RT5616_OUT_R1_MIXER 0x50 |
| #define RT5616_OUT_R2_MIXER 0x51 |
| #define RT5616_OUT_R3_MIXER 0x52 |
| #define RT5616_LOUT_MIXER 0x53 |
| /* Power */ |
| #define RT5616_PWR_DIG1 0x61 |
| #define RT5616_PWR_DIG2 0x62 |
| #define RT5616_PWR_ANLG1 0x63 |
| #define RT5616_PWR_ANLG2 0x64 |
| #define RT5616_PWR_MIXER 0x65 |
| #define RT5616_PWR_VOL 0x66 |
| /* Private Register Control */ |
| #define RT5616_PRIV_INDEX 0x6a |
| #define RT5616_PRIV_DATA 0x6c |
| /* Format - ADC/DAC */ |
| #define RT5616_I2S1_SDP 0x70 |
| #define RT5616_ADDA_CLK1 0x73 |
| #define RT5616_ADDA_CLK2 0x74 |
| |
| /* Function - Analog */ |
| #define RT5616_GLB_CLK 0x80 |
| #define RT5616_PLL_CTRL1 0x81 |
| #define RT5616_PLL_CTRL2 0x82 |
| #define RT5616_HP_OVCD 0x8b |
| #define RT5616_DEPOP_M1 0x8e |
| #define RT5616_DEPOP_M2 0x8f |
| #define RT5616_DEPOP_M3 0x90 |
| #define RT5616_CHARGE_PUMP 0x91 |
| #define RT5616_PV_DET_SPK_G 0x92 |
| #define RT5616_MICBIAS 0x93 |
| #define RT5616_A_JD_CTL1 0x94 |
| #define RT5616_A_JD_CTL2 0x95 |
| /* Function - Digital */ |
| #define RT5616_EQ_CTRL1 0xb0 |
| #define RT5616_EQ_CTRL2 0xb1 |
| #define RT5616_WIND_FILTER 0xb2 |
| #define RT5616_DRC_AGC_1 0xb4 |
| #define RT5616_DRC_AGC_2 0xb5 |
| #define RT5616_DRC_AGC_3 0xb6 |
| #define RT5616_SVOL_ZC 0xb7 |
| #define RT5616_JD_CTRL1 0xbb |
| #define RT5616_JD_CTRL2 0xbc |
| #define RT5616_IRQ_CTRL1 0xbd |
| #define RT5616_IRQ_CTRL2 0xbe |
| #define RT5616_INT_IRQ_ST 0xbf |
| #define RT5616_GPIO_CTRL1 0xc0 |
| #define RT5616_GPIO_CTRL2 0xc1 |
| #define RT5616_GPIO_CTRL3 0xc2 |
| #define RT5616_PGM_REG_ARR1 0xc8 |
| #define RT5616_PGM_REG_ARR2 0xc9 |
| #define RT5616_PGM_REG_ARR3 0xca |
| #define RT5616_PGM_REG_ARR4 0xcb |
| #define RT5616_PGM_REG_ARR5 0xcc |
| #define RT5616_SCB_FUNC 0xcd |
| #define RT5616_SCB_CTRL 0xce |
| #define RT5616_BASE_BACK 0xcf |
| #define RT5616_MP3_PLUS1 0xd0 |
| #define RT5616_MP3_PLUS2 0xd1 |
| #define RT5616_ADJ_HPF_CTRL1 0xd3 |
| #define RT5616_ADJ_HPF_CTRL2 0xd4 |
| #define RT5616_HP_CALIB_AMP_DET 0xd6 |
| #define RT5616_HP_CALIB2 0xd7 |
| #define RT5616_SV_ZCD1 0xd9 |
| #define RT5616_SV_ZCD2 0xda |
| #define RT5616_D_MISC 0xfa |
| /* Dummy Register */ |
| #define RT5616_DUMMY2 0xfb |
| #define RT5616_DUMMY3 0xfc |
| #define RT5616_VERSION_ID 0xfd |
| #define RT5616_VENDOR_ID 0xfe |
| #define RT5616_DEVICE_ID 0xff |
| |
| |
| /* Index of Codec Private Register definition */ |
| #define RT5616_BIAS_CUR1 0x12 |
| #define RT5616_BIAS_CUR3 0x14 |
| #define RT5616_CLSD_INT_REG1 0x1c |
| #define RT5616_MAMP_INT_REG2 0x37 |
| #define RT5616_CHOP_DAC_ADC 0x3d |
| #define RT5616_3D_SPK 0x63 |
| #define RT5616_WND_1 0x6c |
| #define RT5616_WND_2 0x6d |
| #define RT5616_WND_3 0x6e |
| #define RT5616_WND_4 0x6f |
| #define RT5616_WND_5 0x70 |
| #define RT5616_WND_8 0x73 |
| #define RT5616_DIP_SPK_INF 0x75 |
| #define RT5616_HP_DCC_INT1 0x77 |
| #define RT5616_EQ_BW_LOP 0xa0 |
| #define RT5616_EQ_GN_LOP 0xa1 |
| #define RT5616_EQ_FC_BP1 0xa2 |
| #define RT5616_EQ_BW_BP1 0xa3 |
| #define RT5616_EQ_GN_BP1 0xa4 |
| #define RT5616_EQ_FC_BP2 0xa5 |
| #define RT5616_EQ_BW_BP2 0xa6 |
| #define RT5616_EQ_GN_BP2 0xa7 |
| #define RT5616_EQ_FC_BP3 0xa8 |
| #define RT5616_EQ_BW_BP3 0xa9 |
| #define RT5616_EQ_GN_BP 0xaa |
| #define RT5616_EQ_FC_BP4 0xab |
| #define RT5616_EQ_BW_BP4 0xac |
| #define RT5616_EQ_GN_BP4 0xad |
| #define RT5616_EQ_FC_HIP1 0xae |
| #define RT5616_EQ_GN_HIP1 0xaf |
| #define RT5616_EQ_FC_HIP2 0xb0 |
| #define RT5616_EQ_BW_HIP2 0xb1 |
| #define RT5616_EQ_GN_HIP2 0xb2 |
| #define RT5616_EQ_PRE_VOL 0xb3 |
| #define RT5616_EQ_PST_VOL 0xb4 |
| |
| /* global definition */ |
| #define RT5616_L_MUTE (0x1 << 15) |
| #define RT5616_L_MUTE_SFT 15 |
| #define RT5616_VOL_L_MUTE (0x1 << 14) |
| #define RT5616_VOL_L_SFT 14 |
| #define RT5616_R_MUTE (0x1 << 7) |
| #define RT5616_R_MUTE_SFT 7 |
| #define RT5616_VOL_R_MUTE (0x1 << 6) |
| #define RT5616_VOL_R_SFT 6 |
| #define RT5616_L_VOL_MASK (0x3f << 8) |
| #define RT5616_L_VOL_SFT 8 |
| #define RT5616_R_VOL_MASK (0x3f) |
| #define RT5616_R_VOL_SFT 0 |
| |
| /* LOUT Control 2(0x05) */ |
| #define RT5616_EN_DFO (0x1 << 15) |
| |
| /* IN1 and IN2 Control (0x0d) */ |
| /* IN3 and IN4 Control (0x0e) */ |
| #define RT5616_BST_MASK1 (0xf<<12) |
| #define RT5616_BST_SFT1 12 |
| #define RT5616_BST_MASK2 (0xf<<8) |
| #define RT5616_BST_SFT2 8 |
| #define RT5616_IN_DF1 (0x1 << 7) |
| #define RT5616_IN_SFT1 7 |
| #define RT5616_IN_DF2 (0x1 << 6) |
| #define RT5616_IN_SFT2 6 |
| |
| /* INL1 and INR1 Volume Control (0x0f) */ |
| #define RT5616_INL_VOL_MASK (0x1f << 8) |
| #define RT5616_INL_VOL_SFT 8 |
| #define RT5616_INR_SEL_MASK (0x1 << 7) |
| #define RT5616_INR_SEL_SFT 7 |
| #define RT5616_INR_SEL_IN4N (0x0 << 7) |
| #define RT5616_INR_SEL_MONON (0x1 << 7) |
| #define RT5616_INR_VOL_MASK (0x1f) |
| #define RT5616_INR_VOL_SFT 0 |
| |
| /* DAC1 Digital Volume (0x19) */ |
| #define RT5616_DAC_L1_VOL_MASK (0xff << 8) |
| #define RT5616_DAC_L1_VOL_SFT 8 |
| #define RT5616_DAC_R1_VOL_MASK (0xff) |
| #define RT5616_DAC_R1_VOL_SFT 0 |
| |
| /* DAC2 Digital Volume (0x1a) */ |
| #define RT5616_DAC_L2_VOL_MASK (0xff << 8) |
| #define RT5616_DAC_L2_VOL_SFT 8 |
| #define RT5616_DAC_R2_VOL_MASK (0xff) |
| #define RT5616_DAC_R2_VOL_SFT 0 |
| |
| /* ADC Digital Volume Control (0x1c) */ |
| #define RT5616_ADC_L_VOL_MASK (0x7f << 8) |
| #define RT5616_ADC_L_VOL_SFT 8 |
| #define RT5616_ADC_R_VOL_MASK (0x7f) |
| #define RT5616_ADC_R_VOL_SFT 0 |
| |
| /* Mono ADC Digital Volume Control (0x1d) */ |
| #define RT5616_M_MONO_ADC_L (0x1 << 15) |
| #define RT5616_M_MONO_ADC_L_SFT 15 |
| #define RT5616_MONO_ADC_L_VOL_MASK (0x7f << 8) |
| #define RT5616_MONO_ADC_L_VOL_SFT 8 |
| #define RT5616_M_MONO_ADC_R (0x1 << 7) |
| #define RT5616_M_MONO_ADC_R_SFT 7 |
| #define RT5616_MONO_ADC_R_VOL_MASK (0x7f) |
| #define RT5616_MONO_ADC_R_VOL_SFT 0 |
| |
| /* ADC Boost Volume Control (0x1e) */ |
| #define RT5616_ADC_L_BST_MASK (0x3 << 14) |
| #define RT5616_ADC_L_BST_SFT 14 |
| #define RT5616_ADC_R_BST_MASK (0x3 << 12) |
| #define RT5616_ADC_R_BST_SFT 12 |
| #define RT5616_ADC_COMP_MASK (0x3 << 10) |
| #define RT5616_ADC_COMP_SFT 10 |
| |
| /* Stereo ADC1 Mixer Control (0x27) */ |
| #define RT5616_M_STO1_ADC_L1 (0x1 << 14) |
| #define RT5616_M_STO1_ADC_L1_SFT 14 |
| #define RT5616_M_STO1_ADC_R1 (0x1 << 6) |
| #define RT5616_M_STO1_ADC_R1_SFT 6 |
| |
| /* ADC Mixer to DAC Mixer Control (0x29) */ |
| #define RT5616_M_ADCMIX_L (0x1 << 15) |
| #define RT5616_M_ADCMIX_L_SFT 15 |
| #define RT5616_M_IF1_DAC_L (0x1 << 14) |
| #define RT5616_M_IF1_DAC_L_SFT 14 |
| #define RT5616_M_ADCMIX_R (0x1 << 7) |
| #define RT5616_M_ADCMIX_R_SFT 7 |
| #define RT5616_M_IF1_DAC_R (0x1 << 6) |
| #define RT5616_M_IF1_DAC_R_SFT 6 |
| |
| /* Stereo DAC Mixer Control (0x2a) */ |
| #define RT5616_M_DAC_L1_MIXL (0x1 << 14) |
| #define RT5616_M_DAC_L1_MIXL_SFT 14 |
| #define RT5616_DAC_L1_STO_L_VOL_MASK (0x1 << 13) |
| #define RT5616_DAC_L1_STO_L_VOL_SFT 13 |
| #define RT5616_M_DAC_R1_MIXL (0x1 << 9) |
| #define RT5616_M_DAC_R1_MIXL_SFT 9 |
| #define RT5616_DAC_R1_STO_L_VOL_MASK (0x1 << 8) |
| #define RT5616_DAC_R1_STO_L_VOL_SFT 8 |
| #define RT5616_M_DAC_R1_MIXR (0x1 << 6) |
| #define RT5616_M_DAC_R1_MIXR_SFT 6 |
| #define RT5616_DAC_R1_STO_R_VOL_MASK (0x1 << 5) |
| #define RT5616_DAC_R1_STO_R_VOL_SFT 5 |
| #define RT5616_M_DAC_L1_MIXR (0x1 << 1) |
| #define RT5616_M_DAC_L1_MIXR_SFT 1 |
| #define RT5616_DAC_L1_STO_R_VOL_MASK (0x1) |
| #define RT5616_DAC_L1_STO_R_VOL_SFT 0 |
| |
| |
| /* REC Left Mixer Control 1 (0x3b) */ |
| #define RT5616_G_LN_L2_RM_L_MASK (0x7 << 13) |
| #define RT5616_G_IN_L2_RM_L_SFT 13 |
| #define RT5616_G_LN_L1_RM_L_MASK (0x7 << 10) |
| #define RT5616_G_IN_L1_RM_L_SFT 10 |
| #define RT5616_G_BST3_RM_L_MASK (0x7 << 4) |
| #define RT5616_G_BST3_RM_L_SFT 4 |
| #define RT5616_G_BST2_RM_L_MASK (0x7 << 1) |
| #define RT5616_G_BST2_RM_L_SFT 1 |
| |
| /* REC Left Mixer Control 2 (0x3c) */ |
| #define RT5616_G_BST1_RM_L_MASK (0x7 << 13) |
| #define RT5616_G_BST1_RM_L_SFT 13 |
| #define RT5616_G_OM_L_RM_L_MASK (0x7 << 10) |
| #define RT5616_G_OM_L_RM_L_SFT 10 |
| #define RT5616_M_IN2_L_RM_L (0x1 << 6) |
| #define RT5616_M_IN2_L_RM_L_SFT 6 |
| #define RT5616_M_IN1_L_RM_L (0x1 << 5) |
| #define RT5616_M_IN1_L_RM_L_SFT 5 |
| #define RT5616_M_BST3_RM_L (0x1 << 3) |
| #define RT5616_M_BST3_RM_L_SFT 3 |
| #define RT5616_M_BST2_RM_L (0x1 << 2) |
| #define RT5616_M_BST2_RM_L_SFT 2 |
| #define RT5616_M_BST1_RM_L (0x1 << 1) |
| #define RT5616_M_BST1_RM_L_SFT 1 |
| #define RT5616_M_OM_L_RM_L (0x1) |
| #define RT5616_M_OM_L_RM_L_SFT 0 |
| |
| /* REC Right Mixer Control 1 (0x3d) */ |
| #define RT5616_G_IN2_R_RM_R_MASK (0x7 << 13) |
| #define RT5616_G_IN2_R_RM_R_SFT 13 |
| #define RT5616_G_IN1_R_RM_R_MASK (0x7 << 10) |
| #define RT5616_G_IN1_R_RM_R_SFT 10 |
| #define RT5616_G_BST3_RM_R_MASK (0x7 << 4) |
| #define RT5616_G_BST3_RM_R_SFT 4 |
| #define RT5616_G_BST2_RM_R_MASK (0x7 << 1) |
| #define RT5616_G_BST2_RM_R_SFT 1 |
| |
| /* REC Right Mixer Control 2 (0x3e) */ |
| #define RT5616_G_BST1_RM_R_MASK (0x7 << 13) |
| #define RT5616_G_BST1_RM_R_SFT 13 |
| #define RT5616_G_OM_R_RM_R_MASK (0x7 << 10) |
| #define RT5616_G_OM_R_RM_R_SFT 10 |
| #define RT5616_M_IN2_R_RM_R (0x1 << 6) |
| #define RT5616_M_IN2_R_RM_R_SFT 6 |
| #define RT5616_M_IN1_R_RM_R (0x1 << 5) |
| #define RT5616_M_IN1_R_RM_R_SFT 5 |
| #define RT5616_M_BST3_RM_R (0x1 << 3) |
| #define RT5616_M_BST3_RM_R_SFT 3 |
| #define RT5616_M_BST2_RM_R (0x1 << 2) |
| #define RT5616_M_BST2_RM_R_SFT 2 |
| #define RT5616_M_BST1_RM_R (0x1 << 1) |
| #define RT5616_M_BST1_RM_R_SFT 1 |
| #define RT5616_M_OM_R_RM_R (0x1) |
| #define RT5616_M_OM_R_RM_R_SFT 0 |
| |
| /* HPMIX Control (0x45) */ |
| #define RT5616_M_DAC1_HM (0x1 << 14) |
| #define RT5616_M_DAC1_HM_SFT 14 |
| #define RT5616_M_HPVOL_HM (0x1 << 13) |
| #define RT5616_M_HPVOL_HM_SFT 13 |
| #define RT5616_G_HPOMIX_MASK (0x1 << 12) |
| #define RT5616_G_HPOMIX_SFT 12 |
| |
| /* Output Left Mixer Control 1 (0x4d) */ |
| #define RT5616_G_BST2_OM_L_MASK (0x7 << 10) |
| #define RT5616_G_BST2_OM_L_SFT 10 |
| #define RT5616_G_BST1_OM_L_MASK (0x7 << 7) |
| #define RT5616_G_BST1_OM_L_SFT 7 |
| #define RT5616_G_IN1_L_OM_L_MASK (0x7 << 4) |
| #define RT5616_G_IN1_L_OM_L_SFT 4 |
| #define RT5616_G_RM_L_OM_L_MASK (0x7 << 1) |
| #define RT5616_G_RM_L_OM_L_SFT 1 |
| |
| /* Output Left Mixer Control 2 (0x4e) */ |
| #define RT5616_G_DAC_L1_OM_L_MASK (0x7 << 7) |
| #define RT5616_G_DAC_L1_OM_L_SFT 7 |
| #define RT5616_G_IN2_L_OM_L_MASK (0x7 << 4) |
| #define RT5616_G_IN2_L_OM_L_SFT 4 |
| |
| /* Output Left Mixer Control 3 (0x4f) */ |
| #define RT5616_M_IN2_L_OM_L (0x1 << 9) |
| #define RT5616_M_IN2_L_OM_L_SFT 9 |
| #define RT5616_M_BST2_OM_L (0x1 << 6) |
| #define RT5616_M_BST2_OM_L_SFT 6 |
| #define RT5616_M_BST1_OM_L (0x1 << 5) |
| #define RT5616_M_BST1_OM_L_SFT 5 |
| #define RT5616_M_IN1_L_OM_L (0x1 << 4) |
| #define RT5616_M_IN1_L_OM_L_SFT 4 |
| #define RT5616_M_RM_L_OM_L (0x1 << 3) |
| #define RT5616_M_RM_L_OM_L_SFT 3 |
| #define RT5616_M_DAC_L1_OM_L (0x1) |
| #define RT5616_M_DAC_L1_OM_L_SFT 0 |
| |
| /* Output Right Mixer Control 1 (0x50) */ |
| #define RT5616_G_BST2_OM_R_MASK (0x7 << 10) |
| #define RT5616_G_BST2_OM_R_SFT 10 |
| #define RT5616_G_BST1_OM_R_MASK (0x7 << 7) |
| #define RT5616_G_BST1_OM_R_SFT 7 |
| #define RT5616_G_IN1_R_OM_R_MASK (0x7 << 4) |
| #define RT5616_G_IN1_R_OM_R_SFT 4 |
| #define RT5616_G_RM_R_OM_R_MASK (0x7 << 1) |
| #define RT5616_G_RM_R_OM_R_SFT 1 |
| |
| /* Output Right Mixer Control 2 (0x51) */ |
| #define RT5616_G_DAC_R1_OM_R_MASK (0x7 << 7) |
| #define RT5616_G_DAC_R1_OM_R_SFT 7 |
| #define RT5616_G_IN2_R_OM_R_MASK (0x7 << 4) |
| #define RT5616_G_IN2_R_OM_R_SFT 4 |
| |
| /* Output Right Mixer Control 3 (0x52) */ |
| #define RT5616_M_IN2_R_OM_R (0x1 << 9) |
| #define RT5616_M_IN2_R_OM_R_SFT 9 |
| #define RT5616_M_BST2_OM_R (0x1 << 6) |
| #define RT5616_M_BST2_OM_R_SFT 6 |
| #define RT5616_M_BST1_OM_R (0x1 << 5) |
| #define RT5616_M_BST1_OM_R_SFT 5 |
| #define RT5616_M_IN1_R_OM_R (0x1 << 4) |
| #define RT5616_M_IN1_R_OM_R_SFT 4 |
| #define RT5616_M_RM_R_OM_R (0x1 << 3) |
| #define RT5616_M_RM_R_OM_R_SFT 3 |
| #define RT5616_M_DAC_R1_OM_R (0x1) |
| #define RT5616_M_DAC_R1_OM_R_SFT 0 |
| |
| /* LOUT Mixer Control (0x53) */ |
| #define RT5616_M_DAC_L1_LM (0x1 << 15) |
| #define RT5616_M_DAC_L1_LM_SFT 15 |
| #define RT5616_M_DAC_R1_LM (0x1 << 14) |
| #define RT5616_M_DAC_R1_LM_SFT 14 |
| #define RT5616_M_OV_L_LM (0x1 << 13) |
| #define RT5616_M_OV_L_LM_SFT 13 |
| #define RT5616_M_OV_R_LM (0x1 << 12) |
| #define RT5616_M_OV_R_LM_SFT 12 |
| #define RT5616_G_LOUTMIX_MASK (0x1 << 11) |
| #define RT5616_G_LOUTMIX_SFT 11 |
| |
| /* Power Management for Digital 1 (0x61) */ |
| #define RT5616_PWR_I2S1 (0x1 << 15) |
| #define RT5616_PWR_I2S1_BIT 15 |
| #define RT5616_PWR_I2S2 (0x1 << 14) |
| #define RT5616_PWR_I2S2_BIT 14 |
| #define RT5616_PWR_DAC_L1 (0x1 << 12) |
| #define RT5616_PWR_DAC_L1_BIT 12 |
| #define RT5616_PWR_DAC_R1 (0x1 << 11) |
| #define RT5616_PWR_DAC_R1_BIT 11 |
| #define RT5616_PWR_ADC_L (0x1 << 2) |
| #define RT5616_PWR_ADC_L_BIT 2 |
| #define RT5616_PWR_ADC_R (0x1 << 1) |
| #define RT5616_PWR_ADC_R_BIT 1 |
| |
| /* Power Management for Digital 2 (0x62) */ |
| #define RT5616_PWR_ADC_STO1_F (0x1 << 15) |
| #define RT5616_PWR_ADC_STO1_F_BIT 15 |
| #define RT5616_PWR_DAC_STO1_F (0x1 << 11) |
| #define RT5616_PWR_DAC_STO1_F_BIT 11 |
| |
| /* Power Management for Analog 1 (0x63) */ |
| #define RT5616_PWR_VREF1 (0x1 << 15) |
| #define RT5616_PWR_VREF1_BIT 15 |
| #define RT5616_PWR_FV1 (0x1 << 14) |
| #define RT5616_PWR_FV1_BIT 14 |
| #define RT5616_PWR_MB (0x1 << 13) |
| #define RT5616_PWR_MB_BIT 13 |
| #define RT5616_PWR_LM (0x1 << 12) |
| #define RT5616_PWR_LM_BIT 12 |
| #define RT5616_PWR_BG (0x1 << 11) |
| #define RT5616_PWR_BG_BIT 11 |
| #define RT5616_PWR_HP_L (0x1 << 7) |
| #define RT5616_PWR_HP_L_BIT 7 |
| #define RT5616_PWR_HP_R (0x1 << 6) |
| #define RT5616_PWR_HP_R_BIT 6 |
| #define RT5616_PWR_HA (0x1 << 5) |
| #define RT5616_PWR_HA_BIT 5 |
| #define RT5616_PWR_VREF2 (0x1 << 4) |
| #define RT5616_PWR_VREF2_BIT 4 |
| #define RT5616_PWR_FV2 (0x1 << 3) |
| #define RT5616_PWR_FV2_BIT 3 |
| #define RT5616_PWR_LDO (0x1 << 2) |
| #define RT5616_PWR_LDO_BIT 2 |
| #define RT5616_PWR_LDO_DVO_MASK (0x3) |
| #define RT5616_PWR_LDO_DVO_1_0V 0 |
| #define RT5616_PWR_LDO_DVO_1_1V 1 |
| #define RT5616_PWR_LDO_DVO_1_2V 2 |
| #define RT5616_PWR_LDO_DVO_1_3V 3 |
| |
| /* Power Management for Analog 2 (0x64) */ |
| #define RT5616_PWR_BST1 (0x1 << 15) |
| #define RT5616_PWR_BST1_BIT 15 |
| #define RT5616_PWR_BST2 (0x1 << 14) |
| #define RT5616_PWR_BST2_BIT 14 |
| #define RT5616_PWR_MB1 (0x1 << 11) |
| #define RT5616_PWR_MB1_BIT 11 |
| #define RT5616_PWR_PLL (0x1 << 9) |
| #define RT5616_PWR_PLL_BIT 9 |
| #define RT5616_PWR_BST1_OP2 (0x1 << 5) |
| #define RT5616_PWR_BST1_OP2_BIT 5 |
| #define RT5616_PWR_BST2_OP2 (0x1 << 4) |
| #define RT5616_PWR_BST2_OP2_BIT 4 |
| #define RT5616_PWR_BST3_OP2 (0x1 << 3) |
| #define RT5616_PWR_BST3_OP2_BIT 3 |
| #define RT5616_PWR_JD_M (0x1 << 2) |
| #define RT5616_PWM_JD_M_BIT 2 |
| #define RT5616_PWR_JD2 (0x1 << 1) |
| #define RT5616_PWM_JD2_BIT 1 |
| #define RT5616_PWR_JD3 (0x1) |
| #define RT5616_PWM_JD3_BIT 0 |
| |
| /* Power Management for Mixer (0x65) */ |
| #define RT5616_PWR_OM_L (0x1 << 15) |
| #define RT5616_PWR_OM_L_BIT 15 |
| #define RT5616_PWR_OM_R (0x1 << 14) |
| #define RT5616_PWR_OM_R_BIT 14 |
| #define RT5616_PWR_RM_L (0x1 << 11) |
| #define RT5616_PWR_RM_L_BIT 11 |
| #define RT5616_PWR_RM_R (0x1 << 10) |
| #define RT5616_PWR_RM_R_BIT 10 |
| |
| /* Power Management for Volume (0x66) */ |
| #define RT5616_PWR_OV_L (0x1 << 13) |
| #define RT5616_PWR_OV_L_BIT 13 |
| #define RT5616_PWR_OV_R (0x1 << 12) |
| #define RT5616_PWR_OV_R_BIT 12 |
| #define RT5616_PWR_HV_L (0x1 << 11) |
| #define RT5616_PWR_HV_L_BIT 11 |
| #define RT5616_PWR_HV_R (0x1 << 10) |
| #define RT5616_PWR_HV_R_BIT 10 |
| #define RT5616_PWR_IN1_L (0x1 << 9) |
| #define RT5616_PWR_IN1_L_BIT 9 |
| #define RT5616_PWR_IN1_R (0x1 << 8) |
| #define RT5616_PWR_IN1_R_BIT 8 |
| #define RT5616_PWR_IN2_L (0x1 << 7) |
| #define RT5616_PWR_IN2_L_BIT 7 |
| #define RT5616_PWR_IN2_R (0x1 << 6) |
| #define RT5616_PWR_IN2_R_BIT 6 |
| |
| /* I2S1/2/3 Audio Serial Data Port Control (0x70 0x71) */ |
| #define RT5616_I2S_MS_MASK (0x1 << 15) |
| #define RT5616_I2S_MS_SFT 15 |
| #define RT5616_I2S_MS_M (0x0 << 15) |
| #define RT5616_I2S_MS_S (0x1 << 15) |
| #define RT5616_I2S_O_CP_MASK (0x3 << 10) |
| #define RT5616_I2S_O_CP_SFT 10 |
| #define RT5616_I2S_O_CP_OFF (0x0 << 10) |
| #define RT5616_I2S_O_CP_U_LAW (0x1 << 10) |
| #define RT5616_I2S_O_CP_A_LAW (0x2 << 10) |
| #define RT5616_I2S_I_CP_MASK (0x3 << 8) |
| #define RT5616_I2S_I_CP_SFT 8 |
| #define RT5616_I2S_I_CP_OFF (0x0 << 8) |
| #define RT5616_I2S_I_CP_U_LAW (0x1 << 8) |
| #define RT5616_I2S_I_CP_A_LAW (0x2 << 8) |
| #define RT5616_I2S_BP_MASK (0x1 << 7) |
| #define RT5616_I2S_BP_SFT 7 |
| #define RT5616_I2S_BP_NOR (0x0 << 7) |
| #define RT5616_I2S_BP_INV (0x1 << 7) |
| #define RT5616_I2S_DL_MASK (0x3 << 2) |
| #define RT5616_I2S_DL_SFT 2 |
| #define RT5616_I2S_DL_16 (0x0 << 2) |
| #define RT5616_I2S_DL_20 (0x1 << 2) |
| #define RT5616_I2S_DL_24 (0x2 << 2) |
| #define RT5616_I2S_DL_8 (0x3 << 2) |
| #define RT5616_I2S_DF_MASK (0x3) |
| #define RT5616_I2S_DF_SFT 0 |
| #define RT5616_I2S_DF_I2S (0x0) |
| #define RT5616_I2S_DF_LEFT (0x1) |
| #define RT5616_I2S_DF_PCM_A (0x2) |
| #define RT5616_I2S_DF_PCM_B (0x3) |
| |
| /* ADC/DAC Clock Control 1 (0x73) */ |
| #define RT5616_I2S_PD1_MASK (0x7 << 12) |
| #define RT5616_I2S_PD1_SFT 12 |
| #define RT5616_I2S_PD1_1 (0x0 << 12) |
| #define RT5616_I2S_PD1_2 (0x1 << 12) |
| #define RT5616_I2S_PD1_3 (0x2 << 12) |
| #define RT5616_I2S_PD1_4 (0x3 << 12) |
| #define RT5616_I2S_PD1_6 (0x4 << 12) |
| #define RT5616_I2S_PD1_8 (0x5 << 12) |
| #define RT5616_I2S_PD1_12 (0x6 << 12) |
| #define RT5616_I2S_PD1_16 (0x7 << 12) |
| #define RT5616_I2S_BCLK_MS2_MASK (0x1 << 11) |
| #define RT5616_DAC_OSR_MASK (0x3 << 2) |
| #define RT5616_DAC_OSR_SFT 2 |
| #define RT5616_DAC_OSR_128 (0x0 << 2) |
| #define RT5616_DAC_OSR_64 (0x1 << 2) |
| #define RT5616_DAC_OSR_32 (0x2 << 2) |
| #define RT5616_DAC_OSR_128_3 (0x3 << 2) |
| #define RT5616_ADC_OSR_MASK (0x3) |
| #define RT5616_ADC_OSR_SFT 0 |
| #define RT5616_ADC_OSR_128 (0x0) |
| #define RT5616_ADC_OSR_64 (0x1) |
| #define RT5616_ADC_OSR_32 (0x2) |
| #define RT5616_ADC_OSR_128_3 (0x3) |
| |
| /* ADC/DAC Clock Control 2 (0x74) */ |
| #define RT5616_DAHPF_EN (0x1 << 11) |
| #define RT5616_DAHPF_EN_SFT 11 |
| #define RT5616_ADHPF_EN (0x1 << 10) |
| #define RT5616_ADHPF_EN_SFT 10 |
| |
| /* Global Clock Control (0x80) */ |
| #define RT5616_SCLK_SRC_MASK (0x3 << 14) |
| #define RT5616_SCLK_SRC_SFT 14 |
| #define RT5616_SCLK_SRC_MCLK (0x0 << 14) |
| #define RT5616_SCLK_SRC_PLL1 (0x1 << 14) |
| #define RT5616_PLL1_SRC_MASK (0x3 << 12) |
| #define RT5616_PLL1_SRC_SFT 12 |
| #define RT5616_PLL1_SRC_MCLK (0x0 << 12) |
| #define RT5616_PLL1_SRC_BCLK1 (0x1 << 12) |
| #define RT5616_PLL1_SRC_BCLK2 (0x2 << 12) |
| #define RT5616_PLL1_PD_MASK (0x1 << 3) |
| #define RT5616_PLL1_PD_SFT 3 |
| #define RT5616_PLL1_PD_1 (0x0 << 3) |
| #define RT5616_PLL1_PD_2 (0x1 << 3) |
| |
| /* PLL M/N/K Code Control 1 (0x81) */ |
| #define RT5616_PLL_N_MAX 0x1ff |
| #define RT5616_PLL_N_MASK (RT5616_PLL_N_MAX << 7) |
| #define RT5616_PLL_N_SFT 7 |
| #define RT5616_PLL_K_MAX 0x1f |
| #define RT5616_PLL_K_MASK (RT5616_PLL_K_MAX) |
| #define RT5616_PLL_K_SFT 0 |
| |
| /* PLL M/N/K Code Control 2 (0x82) */ |
| #define RT5616_PLL_M_MAX 0xf |
| #define RT5616_PLL_M_MASK (RT5616_PLL_M_MAX << 12) |
| #define RT5616_PLL_M_SFT 12 |
| #define RT5616_PLL_M_BP (0x1 << 11) |
| #define RT5616_PLL_M_BP_SFT 11 |
| |
| /* Depop Mode Control 1 (0x8e) */ |
| #define RT5616_SMT_TRIG_MASK (0x1 << 15) |
| #define RT5616_SMT_TRIG_SFT 15 |
| #define RT5616_SMT_TRIG_DIS (0x0 << 15) |
| #define RT5616_SMT_TRIG_EN (0x1 << 15) |
| #define RT5616_HP_L_SMT_MASK (0x1 << 9) |
| #define RT5616_HP_L_SMT_SFT 9 |
| #define RT5616_HP_L_SMT_DIS (0x0 << 9) |
| #define RT5616_HP_L_SMT_EN (0x1 << 9) |
| #define RT5616_HP_R_SMT_MASK (0x1 << 8) |
| #define RT5616_HP_R_SMT_SFT 8 |
| #define RT5616_HP_R_SMT_DIS (0x0 << 8) |
| #define RT5616_HP_R_SMT_EN (0x1 << 8) |
| #define RT5616_HP_CD_PD_MASK (0x1 << 7) |
| #define RT5616_HP_CD_PD_SFT 7 |
| #define RT5616_HP_CD_PD_DIS (0x0 << 7) |
| #define RT5616_HP_CD_PD_EN (0x1 << 7) |
| #define RT5616_RSTN_MASK (0x1 << 6) |
| #define RT5616_RSTN_SFT 6 |
| #define RT5616_RSTN_DIS (0x0 << 6) |
| #define RT5616_RSTN_EN (0x1 << 6) |
| #define RT5616_RSTP_MASK (0x1 << 5) |
| #define RT5616_RSTP_SFT 5 |
| #define RT5616_RSTP_DIS (0x0 << 5) |
| #define RT5616_RSTP_EN (0x1 << 5) |
| #define RT5616_HP_CO_MASK (0x1 << 4) |
| #define RT5616_HP_CO_SFT 4 |
| #define RT5616_HP_CO_DIS (0x0 << 4) |
| #define RT5616_HP_CO_EN (0x1 << 4) |
| #define RT5616_HP_CP_MASK (0x1 << 3) |
| #define RT5616_HP_CP_SFT 3 |
| #define RT5616_HP_CP_PD (0x0 << 3) |
| #define RT5616_HP_CP_PU (0x1 << 3) |
| #define RT5616_HP_SG_MASK (0x1 << 2) |
| #define RT5616_HP_SG_SFT 2 |
| #define RT5616_HP_SG_DIS (0x0 << 2) |
| #define RT5616_HP_SG_EN (0x1 << 2) |
| #define RT5616_HP_DP_MASK (0x1 << 1) |
| #define RT5616_HP_DP_SFT 1 |
| #define RT5616_HP_DP_PD (0x0 << 1) |
| #define RT5616_HP_DP_PU (0x1 << 1) |
| #define RT5616_HP_CB_MASK (0x1) |
| #define RT5616_HP_CB_SFT 0 |
| #define RT5616_HP_CB_PD (0x0) |
| #define RT5616_HP_CB_PU (0x1) |
| |
| /* Depop Mode Control 2 (0x8f) */ |
| #define RT5616_DEPOP_MASK (0x1 << 13) |
| #define RT5616_DEPOP_SFT 13 |
| #define RT5616_DEPOP_AUTO (0x0 << 13) |
| #define RT5616_DEPOP_MODE2 (0x1 << 13) |
| #define RT5616_RAMP_MASK (0x1 << 12) |
| #define RT5616_RAMP_SFT 12 |
| #define RT5616_RAMP_DIS (0x0 << 12) |
| #define RT5616_RAMP_EN (0x1 << 12) |
| #define RT5616_BPS_MASK (0x1 << 11) |
| #define RT5616_BPS_SFT 11 |
| #define RT5616_BPS_DIS (0x0 << 11) |
| #define RT5616_BPS_EN (0x1 << 11) |
| #define RT5616_FAST_UPDN_MASK (0x1 << 10) |
| #define RT5616_FAST_UPDN_SFT 10 |
| #define RT5616_FAST_UPDN_DIS (0x0 << 10) |
| #define RT5616_FAST_UPDN_EN (0x1 << 10) |
| #define RT5616_MRES_MASK (0x3 << 8) |
| #define RT5616_MRES_SFT 8 |
| #define RT5616_MRES_15MO (0x0 << 8) |
| #define RT5616_MRES_25MO (0x1 << 8) |
| #define RT5616_MRES_35MO (0x2 << 8) |
| #define RT5616_MRES_45MO (0x3 << 8) |
| #define RT5616_VLO_MASK (0x1 << 7) |
| #define RT5616_VLO_SFT 7 |
| #define RT5616_VLO_3V (0x0 << 7) |
| #define RT5616_VLO_32V (0x1 << 7) |
| #define RT5616_DIG_DP_MASK (0x1 << 6) |
| #define RT5616_DIG_DP_SFT 6 |
| #define RT5616_DIG_DP_DIS (0x0 << 6) |
| #define RT5616_DIG_DP_EN (0x1 << 6) |
| #define RT5616_DP_TH_MASK (0x3 << 4) |
| #define RT5616_DP_TH_SFT 4 |
| |
| /* Micbias Control (0x93) */ |
| #define RT5616_MIC1_BS_MASK (0x1 << 15) |
| #define RT5616_MIC1_BS_SFT 15 |
| #define RT5616_MIC1_BS_9AV (0x0 << 15) |
| #define RT5616_MIC1_BS_75AV (0x1 << 15) |
| #define RT5616_MIC1_CLK_MASK (0x1 << 13) |
| #define RT5616_MIC1_CLK_SFT 13 |
| #define RT5616_MIC1_CLK_DIS (0x0 << 13) |
| #define RT5616_MIC1_CLK_EN (0x1 << 13) |
| #define RT5616_MIC1_OVCD_MASK (0x1 << 11) |
| #define RT5616_MIC1_OVCD_SFT 11 |
| #define RT5616_MIC1_OVCD_DIS (0x0 << 11) |
| #define RT5616_MIC1_OVCD_EN (0x1 << 11) |
| #define RT5616_MIC1_OVTH_MASK (0x3 << 9) |
| #define RT5616_MIC1_OVTH_SFT 9 |
| #define RT5616_MIC1_OVTH_600UA (0x0 << 9) |
| #define RT5616_MIC1_OVTH_1500UA (0x1 << 9) |
| #define RT5616_MIC1_OVTH_2000UA (0x2 << 9) |
| #define RT5616_PWR_MB_MASK (0x1 << 5) |
| #define RT5616_PWR_MB_SFT 5 |
| #define RT5616_PWR_MB_PD (0x0 << 5) |
| #define RT5616_PWR_MB_PU (0x1 << 5) |
| #define RT5616_PWR_CLK12M_MASK (0x1 << 4) |
| #define RT5616_PWR_CLK12M_SFT 4 |
| #define RT5616_PWR_CLK12M_PD (0x0 << 4) |
| #define RT5616_PWR_CLK12M_PU (0x1 << 4) |
| |
| |
| /* GPIO Control 1 (0xc0) */ |
| #define RT5616_GP1_PIN_MASK (0x1 << 15) |
| #define RT5616_GP1_PIN_SFT 15 |
| #define RT5616_GP1_PIN_GPIO1 (0x0 << 15) |
| #define RT5616_GP1_PIN_IRQ (0x1 << 15) |
| #define RT5616_GP2_PIN_MASK (0x1 << 14) |
| #define RT5616_GP2_PIN_SFT 14 |
| #define RT5616_GP2_PIN_GPIO2 (0x0 << 14) |
| #define RT5616_GP2_PIN_DMIC1_SCL (0x1 << 14) |
| #define RT5616_GPIO_M_MASK (0x1 << 9) |
| #define RT5616_GPIO_M_SFT 9 |
| #define RT5616_GPIO_M_FLT (0x0 << 9) |
| #define RT5616_GPIO_M_PH (0x1 << 9) |
| #define RT5616_I2S2_SEL_MASK (0x1 << 8) |
| #define RT5616_I2S2_SEL_SFT 8 |
| #define RT5616_I2S2_SEL_I2S (0x0 << 8) |
| #define RT5616_I2S2_SEL_GPIO (0x1 << 8) |
| #define RT5616_GP5_PIN_MASK (0x1 << 7) |
| #define RT5616_GP5_PIN_SFT 7 |
| #define RT5616_GP5_PIN_GPIO5 (0x0 << 7) |
| #define RT5616_GP5_PIN_IRQ (0x1 << 7) |
| #define RT5616_GP6_PIN_MASK (0x1 << 6) |
| #define RT5616_GP6_PIN_SFT 6 |
| #define RT5616_GP6_PIN_GPIO6 (0x0 << 6) |
| #define RT5616_GP6_PIN_DMIC_SDA (0x1 << 6) |
| #define RT5616_GP7_PIN_MASK (0x1 << 5) |
| #define RT5616_GP7_PIN_SFT 5 |
| #define RT5616_GP7_PIN_GPIO7 (0x0 << 5) |
| #define RT5616_GP7_PIN_IRQ (0x1 << 5) |
| #define RT5616_GP8_PIN_MASK (0x1 << 4) |
| #define RT5616_GP8_PIN_SFT 4 |
| #define RT5616_GP8_PIN_GPIO8 (0x0 << 4) |
| #define RT5616_GP8_PIN_DMIC_SDA (0x1 << 4) |
| #define RT5616_GPIO_PDM_SEL_MASK (0x1 << 3) |
| #define RT5616_GPIO_PDM_SEL_SFT 3 |
| #define RT5616_GPIO_PDM_SEL_GPIO (0x0 << 3) |
| #define RT5616_GPIO_PDM_SEL_PDM (0x1 << 3) |
| |
| /* GPIO Control 2 (0xc1) */ |
| #define RT5616_GP5_DR_MASK (0x1 << 14) |
| #define RT5616_GP5_DR_SFT 14 |
| #define RT5616_GP5_DR_IN (0x0 << 14) |
| #define RT5616_GP5_DR_OUT (0x1 << 14) |
| #define RT5616_GP5_OUT_MASK (0x1 << 13) |
| #define RT5616_GP5_OUT_SFT 13 |
| #define RT5616_GP5_OUT_LO (0x0 << 13) |
| #define RT5616_GP5_OUT_HI (0x1 << 13) |
| #define RT5616_GP5_P_MASK (0x1 << 12) |
| #define RT5616_GP5_P_SFT 12 |
| #define RT5616_GP5_P_NOR (0x0 << 12) |
| #define RT5616_GP5_P_INV (0x1 << 12) |
| #define RT5616_GP4_DR_MASK (0x1 << 11) |
| #define RT5616_GP4_DR_SFT 11 |
| #define RT5616_GP4_DR_IN (0x0 << 11) |
| #define RT5616_GP4_DR_OUT (0x1 << 11) |
| #define RT5616_GP4_OUT_MASK (0x1 << 10) |
| #define RT5616_GP4_OUT_SFT 10 |
| #define RT5616_GP4_OUT_LO (0x0 << 10) |
| #define RT5616_GP4_OUT_HI (0x1 << 10) |
| #define RT5616_GP4_P_MASK (0x1 << 9) |
| #define RT5616_GP4_P_SFT 9 |
| #define RT5616_GP4_P_NOR (0x0 << 9) |
| #define RT5616_GP4_P_INV (0x1 << 9) |
| #define RT5616_GP3_DR_MASK (0x1 << 8) |
| #define RT5616_GP3_DR_SFT 8 |
| #define RT5616_GP3_DR_IN (0x0 << 8) |
| #define RT5616_GP3_DR_OUT (0x1 << 8) |
| #define RT5616_GP3_OUT_MASK (0x1 << 7) |
| #define RT5616_GP3_OUT_SFT 7 |
| #define RT5616_GP3_OUT_LO (0x0 << 7) |
| #define RT5616_GP3_OUT_HI (0x1 << 7) |
| #define RT5616_GP3_P_MASK (0x1 << 6) |
| #define RT5616_GP3_P_SFT 6 |
| #define RT5616_GP3_P_NOR (0x0 << 6) |
| #define RT5616_GP3_P_INV (0x1 << 6) |
| #define RT5616_GP2_DR_MASK (0x1 << 5) |
| #define RT5616_GP2_DR_SFT 5 |
| #define RT5616_GP2_DR_IN (0x0 << 5) |
| #define RT5616_GP2_DR_OUT (0x1 << 5) |
| #define RT5616_GP2_OUT_MASK (0x1 << 4) |
| #define RT5616_GP2_OUT_SFT 4 |
| #define RT5616_GP2_OUT_LO (0x0 << 4) |
| #define RT5616_GP2_OUT_HI (0x1 << 4) |
| #define RT5616_GP2_P_MASK (0x1 << 3) |
| #define RT5616_GP2_P_SFT 3 |
| #define RT5616_GP2_P_NOR (0x0 << 3) |
| #define RT5616_GP2_P_INV (0x1 << 3) |
| #define RT5616_GP1_DR_MASK (0x1 << 2) |
| #define RT5616_GP1_DR_SFT 2 |
| #define RT5616_GP1_DR_IN (0x0 << 2) |
| #define RT5616_GP1_DR_OUT (0x1 << 2) |
| #define RT5616_GP1_OUT_MASK (0x1 << 1) |
| #define RT5616_GP1_OUT_SFT 1 |
| #define RT5616_GP1_OUT_LO (0x0 << 1) |
| #define RT5616_GP1_OUT_HI (0x1 << 1) |
| #define RT5616_GP1_P_MASK (0x1) |
| #define RT5616_GP1_P_SFT 0 |
| #define RT5616_GP1_P_NOR (0x0) |
| #define RT5616_GP1_P_INV (0x1) |
| |
| /* Digital Misc Control (0xfa) */ |
| #define RT5616_I2S2_MS_SP_MASK (0x1 << 8) |
| #define RT5616_I2S2_MS_SP_SEL 8 |
| #define RT5616_I2S2_MS_SP_64 (0x0 << 8) |
| #define RT5616_I2S2_MS_SP_50 (0x1 << 8) |
| #define RT5616_CLK_DET_EN (0x1 << 3) |
| #define RT5616_CLK_DET_EN_SFT 3 |
| #define RT5616_AMP_DET_EN (0x1 << 1) |
| #define RT5616_AMP_DET_EN_SFT 1 |
| #define RT5616_D_GATE_EN (0x1) |
| #define RT5616_D_GATE_EN_SFT 0 |
| |
| typedef enum { |
| BCLK_32_FS = 0, |
| BCLK_64_FS, |
| BCLK_128_FS, |
| BCLK_256_FS, |
| BCLK_MAX_FS = BCLK_256_FS |
| } ACM_BLCK_TYPE; |
| |
| typedef enum { |
| RT5616_OUTPUT_DEVICE_SPEAKER = 0, |
| RT5616_OUTPUT_DEVICE_HEADPHONE, |
| RT5616_INPUT_DEVICE_MAIN_MIC, |
| RT5616_INPUT_DEVICE_HEADSET_MIC, |
| RT5616_INPUT_DEVICE_HEADSET_DETECT, |
| } RT5616_DEVICE; |
| |
| enum { |
| RT5616_DEVICE_OFF = 0, |
| RT5616_DEVICE_ON, |
| }; |
| |
| #endif |