marvell/linux/drivers/mfd/tlv320aic3x.h

/*
 * alc5616.h  --  ALC5616 Soc Audio driver
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#ifndef _TLV320AIC3X_H_
#define _TLV320AIC3X_H_


/*
*   TLV320AIC3X_REGISTER NAME_REG_REGISTER ADDRESS
*/
#define TLV320AIC3X_RESET_REG00          0x00  /*reset digital,csm,clock manager etc.*/

/*
* Clock Scheme Register definition
*/
#define TLV320AIC3X_CLK_MANAGER_REG01        0x01 /* select clk src for mclk, enable clock for codec */
#define TLV320AIC3X_CLK_MANAGER_REG02        0x02 /* clk divider and clk multiplier */
#define TLV320AIC3X_CLK_MANAGER_REG03        0x03 /* adc fsmode and osr  */
#define TLV320AIC3X_CLK_MANAGER_REG04        0x04 /* dac osr */
#define TLV320AIC3X_CLK_MANAGER_REG05        0x05 /* clk divier for adc and dac */
#define TLV320AIC3X_CLK_MANAGER_REG06        0x06 /* bclk inverter and divider */
#define TLV320AIC3X_CLK_MANAGER_REG07        0x07 /* tri-state, lrck divider */
#define TLV320AIC3X_CLK_MANAGER_REG08        0x08 /* lrck divider */
#define TLV320AIC3X_SDPIN_REG09          0x09 /* dac serial digital port */
#define TLV320AIC3X_SDPOUT_REG0A         0x0A /* adc serial digital port */
#define TLV320AIC3X_SYSTEM_REG0B         0x0B /* system */
#define TLV320AIC3X_SYSTEM_REG0C         0x0C /* system */
#define TLV320AIC3X_SYSTEM_REG0D         0x0D /* system, power up/down */
#define TLV320AIC3X_SYSTEM_REG0E         0x0E /* system, power up/down */
#define TLV320AIC3X_SYSTEM_REG0F         0x0F /* system, low power */
#define TLV320AIC3X_SYSTEM_REG10         0x10 /* system */
#define TLV320AIC3X_SYSTEM_REG11         0x11 /* system */
#define TLV320AIC3X_SYSTEM_REG12         0x12 /* system, Enable DAC */
#define TLV320AIC3X_SYSTEM_REG13         0x13 /* system */
#define TLV320AIC3X_SYSTEM_REG14         0x14 /* system, select DMIC, select analog pga gain */
#define TLV320AIC3X_ADC_REG15            0x15 /* ADC, adc ramp rate, dmic sense */
#define TLV320AIC3X_ADC_REG16            0x16 /* ADC */
#define TLV320AIC3X_ADC_REG17            0x17 /* ADC, volume */
#define TLV320AIC3X_ADC_REG18            0x18 /* ADC, alc enable and winsize */
#define TLV320AIC3X_ADC_REG19            0x19 /* ADC, alc maxlevel */
#define TLV320AIC3X_ADC_REG1A            0x1A /* ADC, alc automute */
#define TLV320AIC3X_ADC_REG1B            0x1B /* ADC, alc automute, adc hpf s1 */
#define TLV320AIC3X_ADC_REG1C            0x1C /* ADC, equalizer, hpf s2 */
#define TLV320AIC3X_ADC_REG1E            0x1E /* ADC, equalizer, hpf s2 */
#define TLV320AIC3X_DAC_REG31            0x31 /* DAC, mute */
#define TLV320AIC3X_DAC_REG32            0x32 /* DAC, volume */
#define TLV320AIC3X_DAC_REG33            0x33 /* DAC, offset */
#define TLV320AIC3X_DAC_REG34            0x34 /* DAC, drc enable, drc winsize */
#define TLV320AIC3X_DAC_REG35            0x35 /* DAC, drc maxlevel, minilevel */
#define TLV320AIC3X_DAC_REG37            0x37 /* DAC, ramprate */
#define TLV320AIC3X_GPIO_REG44           0x44 /* GPIO, dac2adc for test */
#define TLV320AIC3X_GP_REG45             0x45 /* GP CONTROL */
#define TLV320AIC3X_CHD1_REGFD           0xFD /* CHIP ID1 */
#define TLV320AIC3X_CHD2_REGFE           0xFE /* CHIP ID2 */
#define TLV320AIC3X_CHVER_REGFF          0xFF /* VERSION */


#define TLV320AIC3X_MAX_REGISTER         0xFF
/* Private Register Control */
#define TLV320AIC3X_PRIV_INDEX                   0x6a
#define TLV320AIC3X_PRIV_DATA                    0x6c

typedef enum {
    BCLK_32_FS = 0,
    BCLK_64_FS,
    BCLK_128_FS,
    BCLK_256_FS,
    BCLK_MAX_FS = BCLK_256_FS
} ACM_BLCK_TYPE;

typedef enum {
    TLV320AIC3X_OUTPUT_DEVICE_SPEAKER = 0,
    TLV320AIC3X_OUTPUT_DEVICE_HEADPHONE,
    TLV320AIC3X_INPUT_DEVICE_MAIN_MIC,
    TLV320AIC3X_INPUT_DEVICE_HEADSET_MIC,
    TLV320AIC3X_INPUT_DEVICE_HEADSET_DETECT,
} TLV320AIC3X_DEVICE;

enum {
    TLV320AIC3X_DEVICE_OFF = 0,
    TLV320AIC3X_DEVICE_ON,
};

#endif