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/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C)
*
* Author:
*/
#ifndef _DT_BINDINGS_SOC_ZX297520V3_IRQ_H
#define _DT_BINDINGS_SOC_ZX297520V3_IRQ_H
#include <linux/irq.h>
//#define WDT_INT (0)
#define UART1_MIX_INT (27)
#define UART2_MIX_INT (59)
#define UART3_MIX_INT (28)
#define UART4_MIX_INT (19)
#define SSP0_INT (3)
#define RTC_ALARM_INT (6)
#define RTC_TIMER_INT (5)
//#define I2S0_INT (6)
//#define I2S1_INT (7)
#define I2C1_INT (15)
#define I2C0_INT (7) /*pmic i2c*/
#define I2C2_INT (54)
#define I2C3_INT (67)
#define KEYPAD_INT (9)
#define SD1_INT (39)
#define SD0_INT (39)
//#define EX21_INT (gpio_to_irq(21))
//#define EX22_INT (gpio_to_irq(22))
//#define EX23_INT (gpio_to_irq(23))
//#define EX24_INT (gpio_to_irq(24))
#if 0
#define ICP_PS2AP_INT (13)
#define ICP_M02AP_INT (14)
#define AP_TIMER0_INT (15)
#define AP_TIMER1_INT (16)
#define AP_TIMER2_INT (17)
#define GSM_RFSSCR_INT (18)
#define GSM_RFSSCT_INT (19)
#define GSM_GP0_INT (20)
#define GSM_T_INT (21)
#define GSM_TL_INT (22)
#define GPRS0_INT (23)
#define GPRS1_INT (24)
#define DSP0_INT (25)
#define DSP1_INT (26)
#define DSP2_INT (27)
#define DSP3_INT (28)
#define DSP4_INT (29)
#define DSP6_INT (30)
#define DSP7_INT (31)
#define SPCU_PW_INT (32)
#define ROUT1_INT (33)
#define PS_DMA_INT (34)
#define NAND_INT (35)
#define USB_INT (36)
#define USB_POWERDWN_UP_INT (37)
#define USB_POWERDWN_DOWN_INT (38)
#define HSIC_INT (39)
#define HSIC_POWERDWN_UP_INT (40)
#define HSIC_POWERDWN_DOWN_INT (41)
#define LTE_LPM_TIMER5_INT (42)
#define GSM_USIM_INT (43)
#define EX8IN1_INT (44)
#define EX0_INT (45)
#define EX1_INT (46)
#define EX2_INT (47)
#define EX3_INT (48)
#define EX4_INT (49)
#define EX5_INT (50)
#define EX6_INT (51)
#define EX7_INT (52)
#define SD1_DATA1_INT (53)
#define UART0_RXD_INT (54)
#define SPI_FC0_INT (55) /*spi nand*/
#define SSP1_INT (56)
#define SD0_DATA1_INT (57)
#define EFUSE_INT (58)
#define RSA_INT (59)
#define HASH_INT (60)
#define GMAC_INT (61)
#define AP_TIMER3_INT (62)
#define AP_TIMER4_INT (63)
#define FRM_ARM_INT (64)
#define WD_FRAME_INT (65)
#define ICP_PHY2AP_INT (66)
#define MCU_LCD_INT (67)
#define VOU_OSD_INT (68)
#define TDM_INT (69)
#define RESERVED_INT (70)
#define SYS_COUNTER_INT (71)
#define PWM_INT (72)
#define GMACPHY_WAKE_INT (73)
#define GMACPHY_INT (74)
#define USIM1_INT (75)
#define IRQ_ZX297520V3_SPI_NUM (77)
/* pcu ext8_1 */
#define EX8_INT (0)
#define EX9_INT (1)
#define EX10_INT (2)
#define EX11_INT (3)
#define EX12_INT (4)
#define EX13_INT (5)
#define EX14_INT (6)
#define EX15_INT (7)
#endif
#endif /* _DT_BINDINGS_SOC_ZX297520V3_IRQ_H */