| From 13fdde4dfdccd567ae459db6e439a53496732748 Mon Sep 17 00:00:00 2001 |
| From: Pramod Kumar <pramod.kumar_1@nxp.com> |
| Date: Wed, 8 May 2019 18:25:16 +0530 |
| Subject: [PATCH] sdk: arm64: dts: nxp: add DPAA1 SDK flavor dts files |
| |
| dts fsl-ls1046a-frwy-sdk.dts which enables sdk specific entries |
| dts fsl-ls1046a-frwy-usdpaa.dts which enables dpdk |
| |
| Signed-off-by: Vabhav Sharma <vabhav.sharma@nxp.com> |
| Signed-off-by: Pramod Kumar <pramod.kumar_1@nxp.com> |
| --- |
| arch/arm64/boot/dts/freescale/Makefile | 2 + |
| .../boot/dts/freescale/fsl-ls1046a-frwy-sdk.dts | 53 ++++++++++++ |
| .../boot/dts/freescale/fsl-ls1046a-frwy-usdpaa.dts | 99 ++++++++++++++++++++++ |
| 3 files changed, 154 insertions(+) |
| create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1046a-frwy-sdk.dts |
| create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1046a-frwy-usdpaa.dts |
| |
| --- a/arch/arm64/boot/dts/freescale/Makefile |
| +++ b/arch/arm64/boot/dts/freescale/Makefile |
| @@ -13,6 +13,8 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1 |
| dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-rdb-sdk.dtb |
| dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-rdb-usdpaa.dtb |
| dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-frwy.dtb |
| +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-frwy-sdk.dtb |
| +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-frwy-usdpaa.dtb |
| dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-qds.dtb |
| dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-qds-sdk.dtb |
| dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-rdb.dtb |
| --- /dev/null |
| +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-frwy-sdk.dts |
| @@ -0,0 +1,53 @@ |
| +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
| +/* |
| + * Device Tree Include file for Freescale Layerscape-1046A family SoC. |
| + * |
| + * Copyright 2019 NXP. |
| + * |
| + */ |
| + |
| +#include "fsl-ls1046a-frwy.dts" |
| +#include "qoriq-qman-portals-sdk.dtsi" |
| +#include "qoriq-bman-portals-sdk.dtsi" |
| + |
| +&bman_fbpr { |
| + compatible = "fsl,bman-fbpr"; |
| + alloc-ranges = <0 0 0x10000 0>; |
| +}; |
| +&qman_fqd { |
| + compatible = "fsl,qman-fqd"; |
| + alloc-ranges = <0 0 0x10000 0>; |
| +}; |
| +&qman_pfdr { |
| + compatible = "fsl,qman-pfdr"; |
| + alloc-ranges = <0 0 0x10000 0>; |
| +}; |
| + |
| +&soc { |
| +#include "qoriq-dpaa-eth.dtsi" |
| +#include "qoriq-fman3-0-6oh.dtsi" |
| +}; |
| + |
| +&fsldpaa { |
| + ethernet@1 { |
| + status = "disabled"; |
| + }; |
| + ethernet@2 { |
| + status = "disabled"; |
| + }; |
| + ethernet@3 { |
| + status = "disabled"; |
| + }; |
| + ethernet@6 { |
| + status = "disabled"; |
| + }; |
| + ethernet@9 { |
| + compatible = "fsl,dpa-ethernet"; |
| + fsl,fman-mac = <&enet7>; |
| + dma-coherent; |
| + }; |
| +}; |
| + |
| +&fman0 { |
| + compatible = "fsl,fman", "simple-bus"; |
| +}; |
| --- /dev/null |
| +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-frwy-usdpaa.dts |
| @@ -0,0 +1,99 @@ |
| +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
| +/* |
| + * Device Tree Include file for Freescale Layerscape-1046A family SoC. |
| + * |
| + * Copyright 2019 NXP. |
| + * |
| + */ |
| + |
| +#include "fsl-ls1046a-frwy-sdk.dts" |
| + |
| +&soc { |
| + bp7: buffer-pool@7 { |
| + compatible = "fsl,ls1046a-bpool", "fsl,bpool"; |
| + fsl,bpid = <7>; |
| + fsl,bpool-ethernet-cfg = <0 0 0 192 0 0xdeadbeef>; |
| + fsl,bpool-thresholds = <0x400 0xc00 0x0 0x0>; |
| + }; |
| + |
| + bp8: buffer-pool@8 { |
| + compatible = "fsl,ls1046a-bpool", "fsl,bpool"; |
| + fsl,bpid = <8>; |
| + fsl,bpool-ethernet-cfg = <0 0 0 576 0 0xabbaf00d>; |
| + fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>; |
| + }; |
| + |
| + bp9: buffer-pool@9 { |
| + compatible = "fsl,ls1046a-bpool", "fsl,bpool"; |
| + fsl,bpid = <9>; |
| + fsl,bpool-ethernet-cfg = <0 0 0 2048 0 0xfeedabba>; |
| + fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>; |
| + }; |
| + |
| + fsl,dpaa { |
| + compatible = "fsl,ls1046a", "fsl,dpaa", "simple-bus"; |
| + |
| + ethernet@0 { |
| + compatible = "fsl,dpa-ethernet-init"; |
| + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>; |
| + fsl,qman-frame-queues-rx = <0x50 1 0x51 1>; |
| + fsl,qman-frame-queues-tx = <0x70 1 0x71 1>; |
| + }; |
| + |
| + ethernet@4 { |
| + compatible = "fsl,dpa-ethernet-init"; |
| + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>; |
| + fsl,qman-frame-queues-rx = <0x52 1 0x53 1>; |
| + fsl,qman-frame-queues-tx = <0x72 1 0x73 1>; |
| + }; |
| + |
| + ethernet@5 { |
| + compatible = "fsl,dpa-ethernet-init"; |
| + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>; |
| + fsl,qman-frame-queues-rx = <0x54 1 0x55 1>; |
| + fsl,qman-frame-queues-tx = <0x74 1 0x75 1>; |
| + }; |
| + |
| + ethernet@9 { |
| + compatible = "fsl,dpa-ethernet-init"; |
| + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>; |
| + fsl,qman-frame-queues-rx = <0x56 1 0x57 1>; |
| + fsl,qman-frame-queues-tx = <0x76 1 0x77 1>; |
| + }; |
| + |
| + dpa-fman0-oh@2 { |
| + compatible = "fsl,dpa-oh"; |
| + /* Define frame queues for the OH port*/ |
| + /* <OH Rx error, OH Rx default> */ |
| + fsl,qman-frame-queues-oh = <0x60 1 0x61 1>; |
| + fsl,fman-oh-port = <&fman0_oh2>; |
| + }; |
| + }; |
| +}; |
| +/ { |
| + reserved-memory { |
| + #address-cells = <2>; |
| + #size-cells = <2>; |
| + ranges; |
| + /* For legacy usdpaa based use-cases, update the size and |
| + alignment parameters. e.g. to allocate 256 MB memory: |
| + size = <0 0x10000000>; |
| + alignment = <0 0x10000000>; |
| + */ |
| + |
| + usdpaa_mem: usdpaa_mem { |
| + compatible = "fsl,usdpaa-mem"; |
| + alloc-ranges = <0 0 0x10000 0>; |
| + size = <0 0x1000>; |
| + alignment = <0 0x1000>; |
| + }; |
| + }; |
| +}; |
| + |
| +&fman0 { |
| + fman0_oh2: port@83000 { |
| + cell-index = <1>; |
| + compatible = "fsl,fman-port-oh"; |
| + reg = <0x83000 0x1000>; |
| + }; |
| +}; |