| // SPDX-License-Identifier: GPL-2.0-or-later OR MIT |
| /dts-v1/; |
| |
| #include <dt-bindings/clock/ath79-clk.h> |
| |
| / { |
| #address-cells = <1>; |
| #size-cells = <1>; |
| |
| cpuintc: interrupt-controller { |
| compatible = "qca,ar7100-cpu-intc"; |
| |
| interrupt-controller; |
| #interrupt-cells = <1>; |
| }; |
| |
| ahb { |
| compatible = "simple-bus"; |
| ranges; |
| |
| #address-cells = <1>; |
| #size-cells = <1>; |
| |
| interrupt-parent = <&cpuintc>; |
| |
| apb { |
| compatible = "simple-bus"; |
| ranges; |
| |
| #address-cells = <1>; |
| #size-cells = <1>; |
| |
| interrupt-parent = <&miscintc>; |
| |
| miscintc: interrupt-controller@18060010 { |
| compatible = "qca,ar7240-misc-intc"; |
| reg = <0x18060010 0x4>; |
| |
| interrupt-parent = <&cpuintc>; |
| interrupts = <6>; |
| |
| interrupt-controller; |
| #interrupt-cells = <1>; |
| }; |
| }; |
| |
| eth0: eth@19000000 { |
| status = "disabled"; |
| |
| compatible = "qca,ath79-eth", "syscon"; |
| reg = <0x19000000 0x200>; |
| |
| interrupts = <4>; |
| phy-mode = "mii"; |
| |
| mdio0: mdio { |
| status = "disabled"; |
| |
| compatible = "qca,ath79-mdio"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| regmap = <ð0>; |
| |
| clocks = <&pll ATH79_CLK_MDIO>; |
| clock-names = "ref"; |
| }; |
| }; |
| |
| eth1: eth@1a000000 { |
| status = "disabled"; |
| |
| compatible = "qca,ath79-eth", "syscon"; |
| reg = <0x1a000000 0x200>; |
| |
| interrupts = <5>; |
| phy-mode = "mii"; |
| |
| mdio1: mdio { |
| status = "disabled"; |
| |
| compatible = "qca,ath79-mdio"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| regmap = <ð1>; |
| |
| clocks = <&pll ATH79_CLK_MDIO>; |
| clock-names = "ref"; |
| }; |
| }; |
| }; |
| }; |