| From 477cad715de1dfc256a20da3ed83b62f3cb2944d Mon Sep 17 00:00:00 2001 |
| From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> |
| Date: Tue, 28 Feb 2023 15:45:18 +0100 |
| Subject: [PATCH] arm64: dts: broadcom: bcmbca: bcm4908: add on-SoC USB ports |
| MIME-Version: 1.0 |
| Content-Type: text/plain; charset=UTF-8 |
| Content-Transfer-Encoding: 8bit |
| |
| BCM4908 has 3 USB controllers each with 2 USB ports. Home routers often |
| have LEDs indicating state of selected USB ports. Describe those SoC USB |
| ports to allow using them as LED trigger sources. |
| |
| Signed-off-by: Rafał Miłecki <rafal@milecki.pl> |
| Link: https://lore.kernel.org/all/20230228144520.21816-1-zajec5@gmail.com/ |
| Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> |
| --- |
| .../boot/dts/broadcom/bcmbca/bcm4908.dtsi | 39 +++++++++++++++++++ |
| 1 file changed, 39 insertions(+) |
| |
| --- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi |
| +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi |
| @@ -148,6 +148,19 @@ |
| interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; |
| phys = <&usb_phy PHY_TYPE_USB2>; |
| status = "disabled"; |
| + |
| + #address-cells = <1>; |
| + #size-cells = <0>; |
| + |
| + ehci_port1: port@1 { |
| + reg = <1>; |
| + #trigger-source-cells = <0>; |
| + }; |
| + |
| + ehci_port2: port@2 { |
| + reg = <2>; |
| + #trigger-source-cells = <0>; |
| + }; |
| }; |
| |
| ohci: usb@c400 { |
| @@ -156,6 +169,19 @@ |
| interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; |
| phys = <&usb_phy PHY_TYPE_USB2>; |
| status = "disabled"; |
| + |
| + #address-cells = <1>; |
| + #size-cells = <0>; |
| + |
| + ohci_port1: port@1 { |
| + reg = <1>; |
| + #trigger-source-cells = <0>; |
| + }; |
| + |
| + ohci_port2: port@2 { |
| + reg = <2>; |
| + #trigger-source-cells = <0>; |
| + }; |
| }; |
| |
| xhci: usb@d000 { |
| @@ -164,6 +190,19 @@ |
| interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; |
| phys = <&usb_phy PHY_TYPE_USB3>; |
| status = "disabled"; |
| + |
| + #address-cells = <1>; |
| + #size-cells = <0>; |
| + |
| + xhci_port1: port@1 { |
| + reg = <1>; |
| + #trigger-source-cells = <0>; |
| + }; |
| + |
| + xhci_port2: port@2 { |
| + reg = <2>; |
| + #trigger-source-cells = <0>; |
| + }; |
| }; |
| |
| bus@80000 { |