| From c813fbe806257c574240770ef716fbee19f7dbfa Mon Sep 17 00:00:00 2001 |
| From: Xiangsheng Hou <xiangsheng.hou@mediatek.com> |
| Date: Thu, 6 Jun 2019 16:29:04 +0800 |
| Subject: [PATCH] spi: spi-mem: Mediatek: Add SPI Nand support for MT7629 |
| |
| Signed-off-by: Xiangsheng Hou <xiangsheng.hou@mediatek.com> |
| --- |
| arch/arm/boot/dts/mt7629-rfb.dts | 45 ++++++++++++++++++++++++++++++++ |
| arch/arm/boot/dts/mt7629.dtsi | 22 ++++++++++++++++ |
| 3 files changed, 79 insertions(+) |
| |
| --- a/arch/arm/boot/dts/mt7629.dtsi |
| +++ b/arch/arm/boot/dts/mt7629.dtsi |
| @@ -258,6 +258,28 @@ |
| status = "disabled"; |
| }; |
| |
| + bch: ecc@1100e000 { |
| + compatible = "mediatek,mt7622-ecc"; |
| + reg = <0x1100e000 0x1000>; |
| + interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_LOW>; |
| + clocks = <&pericfg CLK_PERI_NFIECC_PD>; |
| + clock-names = "nfiecc_clk"; |
| + status = "disabled"; |
| + }; |
| + |
| + snfi: spi@1100d000 { |
| + compatible = "mediatek,mt7629-snfi"; |
| + reg = <0x1100d000 0x1000>; |
| + interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_LOW>; |
| + clocks = <&pericfg CLK_PERI_NFI_PD>, |
| + <&pericfg CLK_PERI_SNFI_PD>; |
| + clock-names = "nfi_clk", "spi_clk"; |
| + ecc-engine = <&bch>; |
| + #address-cells = <1>; |
| + #size-cells = <0>; |
| + status = "disabled"; |
| + }; |
| + |
| spi: spi@1100a000 { |
| compatible = "mediatek,mt7629-spi", |
| "mediatek,mt7622-spi"; |
| --- a/arch/arm/boot/dts/mt7629-rfb.dts |
| +++ b/arch/arm/boot/dts/mt7629-rfb.dts |
| @@ -276,6 +276,52 @@ |
| }; |
| }; |
| |
| +&bch { |
| + status = "okay"; |
| +}; |
| + |
| +&snfi { |
| + pinctrl-names = "default"; |
| + pinctrl-0 = <&serial_nand_pins>; |
| + status = "okay"; |
| + |
| + spi_nand@0 { |
| + #address-cells = <1>; |
| + #size-cells = <1>; |
| + compatible = "spi-nand"; |
| + spi-max-frequency = <104000000>; |
| + reg = <0>; |
| + |
| + partitions { |
| + compatible = "fixed-partitions"; |
| + #address-cells = <1>; |
| + #size-cells = <1>; |
| + |
| + partition@0 { |
| + label = "Bootloader"; |
| + reg = <0x00000 0x0100000>; |
| + read-only; |
| + }; |
| + |
| + partition@100000 { |
| + label = "Config"; |
| + reg = <0x100000 0x0040000>; |
| + }; |
| + |
| + partition@140000 { |
| + label = "factory"; |
| + reg = <0x140000 0x0080000>; |
| + }; |
| + |
| + partition@1c0000 { |
| + label = "firmware"; |
| + reg = <0x1c0000 0x1000000>; |
| + }; |
| + |
| + }; |
| + }; |
| +}; |
| + |
| &spi { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&spi_pins>; |